HFSS AND SEMICONDUCTOR TEST SOCKET DESIGN

1
HFSS AND SEMICONDUCTOR
TEST SOCKET DESIGN
How 3D electromagnetic
simulations benefit ECT in the
design of test contactors
Author: Jason Mroczkowski
Title: RF Engineer

■ Design and Manufacture Semiconductor Test
Contactors
➤ What is a test Contactor
– Compliant Interface between DUT I/O and PCB
– Back end testing of semiconductor devices
➤ Design Goal
– Reliable connection mechanically and electrically
– Electrically transparent interconnect
between DUT and PCB (Superconductivity)
➤ DUT sensitivity
– Parasitics of interconnect limit frequency
range of contactor

■ Electrical parameters
➤ Inductance, Capacitance, Impedance,
Crosstalk, Bandwidth, Return loss
➤ Before HFSS - Measure then Choose
➤ After HFSS - Design to specification

■ 3D EM Simulation (Signal Integrity)
➤ Ansoft HFSS V9
➤ HFSS Optimetrics Optimization
■ 2D Planer EM Simulation
➤ AnsoftDesigner Suite
➤ AnsoftDesigner Optimetrics Optimization
■ Circuit Simulation and Transmission Line Tools
➤ AnsoftDesigner Suite - Linear and non-linear transient analyisis

■ HFSS and the other Ansoft tools allow system level optimization
➤ Capability to simulate entire transmission path from tester to DUT

■ Objective
➤ simulate Ground Signal Ground configuration of pogo pins
➤ correlate to VNA measured data
SIGNAL
NO CONNECT
GROUND
GOLD PLATED
GROUND PLATE
VNA Measured HFSS Simulated

■ Obstacles (not so simple)
➤ helical spring geometry - hard to mesh
➤ modeling internal probe contact points - changes resonance
➤ simulation time due to complex geometry - record 19 hours
■ Invaluable data from HFSS Simulation
➤ effects of various dielectrics
➤ effects of geometric modifications

Inductance of Probe
Measured HFSS Post Processing

Optimization of coaxial Bantam
■ HFSS used for simulation and optimization
■ Optimized coaxial contactor
➤ Integrated PCB
➤ grounded CPW transmission lines
➤ terminated in end launch Rosenberger SMA connectors
■ Overall clean performance to 6 GHz
■ Impedance matched to 50 ohms

■ HFSS can be used to simulate all S parameter information needed, single
or differential signaling.
■ HFSS Geometry can be imported from SolidWorks CAD (but not 100%
reliably), and can be combined with SPICE and planar EM data to
simulate an entire system. This is a very time consuming and complex
task. (resolved using HFSS V9)

HFSS Simulated VNA Measured
Impedance (Ohms)
70
65
60
55
50
45
40
35
TIME DOMAIN ( S11 IMPEDANCE - THRU )
30
-50 0 50 100 150 200
Time (ps)
Through contactor only Through connector board and
contactor
THRU IMPEDANCE
5/14/03

Before After
Basic Coaxial theory HFSS Optimized

Mixed mode
S-parameters
Perfect H field symmetry
Differential and common
mode impedance
Differential mode
Common mode

Insertion Loss (dB)
RF Material Properties Analysis
0
5
10
15
20
25
30
35
40
Insertion Loss (dB)
0.0
5.0
10.0
15.0
20.0
T-resonator, GSG
PEEK INSERTION LOSS (dB)
Resonance Index # 2
Measured PEEK
HFSS
25.0
6.0 6.5 7.0 7.5
Frequency (GHz)
8.0 8.5 9.0
Composite of Materials Tested
Insertion Loss (dB)
PPS
Torlon 4203
Ultem 1000
Peek 1000
Torlon 5530
0 2 4 6 8 10 12 14 16 18 20
Frequency (GHz)
Dielectric Constant (Er)
4.10
3.90
3.70
3.50
3.30
3.10
2.90
2.70
Dependence of frequency on Dielectric constant
2.50
0 5 10 15 20 25
Frequency (GHz)
■ Published dielectric properties of contactor materials are limited to 10 MHz
■ ECT developed technology to characterize dielectric properties of any
material at GHz frequencies.
➤ Coplanar Waveguide Tee technique developed, based on U of M research
➤ Allows characterization of dielectric constant and loss tangent over a broad
frequency range
➤ Results to date have been achieved for Torlon 4203, Torlon 5530, Ultem, PEEK,
PPS, Polyimide, others.
Ultem 1000
Torlon 5530
Peek 1000
PPS
Torlon 4203
Method presented at IEEE BiTS 2003 conference
Attenuation (dB/mm)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
Total Attenuation for Various Materials
0.0
2 4 6 8 10 12 14 16 18 20
Frequency (GHz)
Ultem 1000
Torlon 5530
Peek
PPS
Torlon 4203

■ Relieves ECT from the manufacture-testmanufacture-test
cycle
➤ Reduces lead-times
■ Improves design accuracy
➤ eliminates approximations often used in theory
■ Keeps us ahead of the game
➤ Design next generation of product with confidence