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Deductive Verification of System Software in the Verisoft XT Project

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trigger<strong>in</strong>g annotation can be viewed as a logic programm<strong>in</strong>g language<br />

used to implement a <strong>the</strong>ory to be executed by <strong>the</strong> SMT<br />

solver. Of course one could also implement <strong>the</strong> <strong>the</strong>ory <strong>in</strong>side an<br />

SMT solver, which would likely be much more efficient, but <strong>the</strong><br />

implementation would be much harder. Given how fast such a<br />

<strong>the</strong>ory evolves dur<strong>in</strong>g development <strong>of</strong> a verification tool, it seems<br />

counterproductive <strong>in</strong> most cases.<br />

The problems stemm<strong>in</strong>g from deductive s<strong>of</strong>tware verification<br />

are quite different from <strong>the</strong> ground SMT problems that mostly<br />

result from hardware verification. For example, <strong>the</strong> number <strong>of</strong><br />

conflicts per time unit that <strong>the</strong> solver f<strong>in</strong>ds tends to a thousand<br />

times smaller for s<strong>of</strong>tware. This is not enough to calibrate<br />

usual heuristics for order<strong>in</strong>g propositional assignments. Also <strong>the</strong><br />

implementation <strong>of</strong> various <strong>in</strong>dices for E-match<strong>in</strong>g is crucial for<br />

performance. Z3 is very good with ground SMT problems, and<br />

it is def<strong>in</strong>itely <strong>the</strong> lead<strong>in</strong>g solver for quantified queries. This is<br />

partially a result <strong>of</strong> close collaboration between <strong>the</strong> authors <strong>of</strong><br />

Z3 and researchers us<strong>in</strong>g it for s<strong>of</strong>tware verification.<br />

4 Conclusion<br />

The Hypervisor sub-project <strong>in</strong>volves up to 20 people work<strong>in</strong>g,<br />

mostly on specification <strong>of</strong> <strong>the</strong> Hyper-V, for three years, mak<strong>in</strong>g<br />

it one <strong>of</strong> <strong>the</strong> largest formal verification efforts ever attempted.<br />

While <strong>the</strong> Avionics sub-project is smaller, it still <strong>in</strong>volves <strong>the</strong> full<br />

functional verification <strong>of</strong> thousands <strong>of</strong> l<strong>in</strong>es <strong>of</strong> complex C code.<br />

Based on experience and results from <strong>the</strong> first half <strong>of</strong> <strong>the</strong><br />

project, we can conclude that verify<strong>in</strong>g concurrent system s<strong>of</strong>tware<br />

written <strong>in</strong> C and assembly code is difficult and at <strong>the</strong> edge<br />

<strong>of</strong> <strong>the</strong> state <strong>of</strong> <strong>the</strong> art <strong>of</strong> s<strong>of</strong>tware verification. But given sufficient<br />

resources, it can be done and, consider<strong>in</strong>g <strong>the</strong> importance<br />

<strong>of</strong> correct system s<strong>of</strong>tware, is useful and feasible on an <strong>in</strong>dustrial<br />

scale. The Veris<strong>of</strong>t <strong>XT</strong> project emphasises <strong>the</strong> well-known<br />

fact that s<strong>of</strong>tware verification is one <strong>of</strong> <strong>the</strong> most important applications<br />

<strong>of</strong> automated deduction. The project’s success relies<br />

heavily on recent advances <strong>in</strong> deduction technology.<br />

References<br />

[1] Wolfgang Ahrendt, Bernhard Beckert, Mart<strong>in</strong> Giese, and Philipp<br />

Rümmer. Practical aspects <strong>of</strong> automated deduction for program<br />

verification. KI, 2009. In this issue.<br />

[2] Mike Barnett, K. Rustan M. Le<strong>in</strong>o, and Wolfram Schulte. The<br />

Spec# programm<strong>in</strong>g system: An overview. In Proc. CASSIS<br />

2004, LNCS 3362, pages 49–69. Spr<strong>in</strong>ger, 2005.<br />

[3] Christoph Baumann, Bernhard Beckert, Holger Blasum, and<br />

Thorsten Bormer. Better avionics s<strong>of</strong>tware reliability by code<br />

verification. In Proc. Embedded World Conference, 2009.<br />

[4] Christoph Baumann, Bernhard Beckert, Holger Blasum, and<br />

Thorsten Bormer. Formal verification <strong>of</strong> a microkernel used <strong>in</strong><br />

dependable s<strong>of</strong>tware systems. In Proc. SAFECOMP 2009, LNCS.<br />

Spr<strong>in</strong>ger, 2009. To appear.<br />

[5] Sascha Böhme, Micha̷l Moskal, Wolfram Schulte, and Burkhart<br />

Wolff. HOL-Boogie: An <strong>in</strong>teractive prover-backend for <strong>the</strong> Verifiy<strong>in</strong>g<br />

C Compiler. Journal <strong>of</strong> Automated Reason<strong>in</strong>g, 2009. To<br />

appear.<br />

[6] Ernie Cohen, Markus Dahlweid, Mark Hillebrand, Dirk Le<strong>in</strong>enbach,<br />

Micha̷l Moskal, Thomas Santen, Wolfram Schulte, and<br />

Stephan Tobies. VCC: A practical system for verify<strong>in</strong>g concurrent<br />

C. In Proc. TPHOLs 2009, LNCS 5674, pages 23–42. Spr<strong>in</strong>ger,<br />

2009. Invited paper.<br />

[7] Leonardo de Moura and Nikolaj Bjørner. Z3: An efficient SMT<br />

solver. In Proc. TACAS 2008, LNCS 4963, pages 337–340.<br />

Spr<strong>in</strong>ger, 2008.<br />

[8] Rob DeL<strong>in</strong>e and K. Rustan M. Le<strong>in</strong>o. BoogiePL: A typed procedural<br />

language for check<strong>in</strong>g object-oriented programs. Technical<br />

Report MSR-TR-2005-70, Micros<strong>of</strong>t Research, 2005.<br />

[9] David L. Detlefs, K. Rustan M. Le<strong>in</strong>o, Greg Nelson, and James B.<br />

Saxe. Extended static check<strong>in</strong>g. SRC Research Report 159,<br />

Compaq <strong>System</strong>s Research Center, Palo Alto, 1998.<br />

[10] Cormac Flanagan, K. Rustan M. Le<strong>in</strong>o, Mark Lillibridge, Greg<br />

Nelson, James B. Saxe, and Raymie Stata. Extended static<br />

check<strong>in</strong>g for Java. In Proc. PLDI 2002, SIGPLAN Notices 37,<br />

pages 234–245. ACM, 2002.<br />

[11] Robert Kaiser and Stephan Wagner. Evolution <strong>of</strong> <strong>the</strong> PikeOS<br />

microkernel. In Proc. 1st International Workshop on Microkernels<br />

for Embedded <strong>System</strong>s (MIKES), 2007. Available<br />

at http://ertos.nicta.com.au/publications/papers/<br />

Kuz_Petters_07.pdf.<br />

[12] Shuvendu K. Lahiri and Shaz Qadeer. Back to <strong>the</strong> future: revisit<strong>in</strong>g<br />

precise program verification us<strong>in</strong>g SMT solvers. In Proc.<br />

POPL 2008, pages 171–182. ACM, 2008.<br />

[13] K. Rustan M. Le<strong>in</strong>o and Peter Müller. Object <strong>in</strong>variants <strong>in</strong> dynamic<br />

contexts. In Proc. ECOOP 2008, LNCS 3086. Spr<strong>in</strong>ger,<br />

2004.<br />

Contact<br />

Pr<strong>of</strong>. Dr. Bernhard Beckert<br />

Karlsruhe Institute <strong>of</strong> Technology<br />

Institute for Theoretical Informatics<br />

Am Fasanengarten 5, 76131 Karlsruhe, Germany<br />

Phone: +49 721 608-4025<br />

Email: beckert@kit.de<br />

Micha̷l Moskal<br />

European Micros<strong>of</strong>t Innovation Center<br />

Ritterstrasse 23, 52072 Aachen, Germany<br />

Email: michal.moskal@micros<strong>of</strong>t.com<br />

Bild Bernhard Beckert is a pr<strong>of</strong>essor <strong>of</strong><br />

Application-oriented Formal <strong>Verification</strong><br />

at <strong>the</strong> Karlsruhe Insitute <strong>of</strong> Technology.<br />

His research <strong>in</strong>terests <strong>in</strong>clude automated<br />

deduction, non-classical logics, and formal<br />

methods <strong>in</strong> s<strong>of</strong>tware eng<strong>in</strong>eer<strong>in</strong>g.<br />

Bild Micha̷l Moskal is a researcher at <strong>the</strong> European<br />

Micros<strong>of</strong>t Innovation Center, Aachen,<br />

Germany, closely collaborat<strong>in</strong>g with <strong>the</strong> Research<br />

<strong>in</strong> S<strong>of</strong>tware Eng<strong>in</strong>eer<strong>in</strong>g Group at Micros<strong>of</strong>t<br />

Research, Redmond, USA. He is also<br />

a PhD student at <strong>the</strong> Computer Science Institute<br />

<strong>of</strong> <strong>the</strong> University <strong>of</strong> Wroc̷law, Poland.<br />

His research currently focuses on s<strong>of</strong>tware<br />

verification with SMT and <strong>the</strong> VCC verifier<br />

<strong>in</strong> particular.

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