Jennifer Zhao - EEWeb

PULSE
With added complexity in embedded
systems comes the need for more
pins especially general purpose inputs
and outputs that are more versatile. In
late 2012, NXP Semiconductors—the
inventors of the I 2 C-bus—launched a
GPIO family of devices to remedy these
limitations. The new family of peripheral
expanders includes an innovative
feature set called Agile I/O that helps
integrate common system functions
within the semiconductor. This new
family allows the user to expand their
interface without taking up much
additional board space.
8 Visit: eeweb.com
Device Family Overview
“These peripheral expanders are an expansion of our
current GPIO family, which is the broadest portfolio
in the market,” says Jennifer Zhao, General Manager
of NXP’s System Management product line. NXP’s
new line is able to expand the two wires of the I2C bus into 8-bit and 16-bit, inputs and outputs. These
general-purpose I/O pins have consolidated interfacing
functions that eliminate the amount of external
components needed on the PCB, which saves space
and simplifies the design.
Addressing Industry Trends
The Agile I/O expanders also have a reduced package
size, which is another trend in the industry. “We have
what we call HLA BGA, which is a really small 0.4 mm
pitch package to address the trend of saving board
space,” says Jennifer Zhao. Although the new packages
are significantly smaller, there is no cost premium.
Addressing the industry trend of lower voltages, the
new GPIO family has very low voltage operation, from
1.65 to 5.5 volts. In addition, it has a very low standby
current with a maximum of 3mA. With an expansive
FEATURED ARTICLE
voltage range to choose from, NXP has allowed
customers the option of selecting the optimal device
for their applications. Some devices have two supply
pins to allow separate voltage selections for the I2C-bus interface and the I/O interface.
Visit: eeweb.com
9