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Chapter News - RTP Designers Council

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Today’s featured speaker:<br />

Mike Catrambone<br />

Lead Product Validation Engineer<br />

Email: MikeC@Cadence.com<br />

Web site: www.cadence.com<br />

IPC <strong>Designers</strong> <strong>Council</strong><br />

March 19 th<br />

<strong>Chapter</strong> Meeting<br />

• Today’s presentation: “Layout challenges for implementing DDR2 and<br />

DDR3 interfaces on a PCB.<br />

• Presentation materials will be posted on our web site after the meeting.<br />

Go to ipc-rtp.org for more information about our chapter

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