PCB Thermal Simulation - RTP Designers Council

PCB Thermal 

Simulation - The State 

of the Art 

Alexandra Francois-Saint-Cyr 

Applications Engineering Manager 

Mechanical Analysis Division 

March 16, 2010

2 

PCB Thermal Simulation – 

The State of the Art 

Agenda 

— Introduction to the Mentor Graphics Mechanical 

Analysis Division 

— PCB Design Challenges 

— Electronics Failures Related To Temperature 

— Heat Transfer 101 

— Thermal Design Tools Review 

— PCB Thermal Simulation 

— Application Example 

— Assessing Thermal Simulation Accuracy 

© 2010 Mentor Graphics Corp. Company Confidential 

www.mentor.com

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About the Mentor Graphics 

Mechanical Analysis Division 

A new division formed in August 2008 after the 

acquisition of Flomerics by Mentor Graphics 

Focused on delivering analysis and simulation 

software and services for mechanical design 

Division headquarters: Hampton Court, London, UK 

Over 180 employees 

Development in UK, Moscow and Budapest 

Direct Sales and Support operations throughout the 

world 


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Principal Lines of Business 

Thermal Design of Electronics 

— FloTHERM = clear market leader 

— 75% of division’s revenue 

Concurrent Computational Fluid 

Dynamics (CFD) 

— FloEFD - a different breed of CFD 

software that is fully embedded 

in the mechanical design 

environment 

Building Heating & Ventilation 

— Optimize airflow, temperature 

distribution and contamination 

control in and around buildings 

and in HVAC equipment 

— Data Center Cooling is a 

particular focus 


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Typical Design Constraints 

Operate at Maximum Ambient 

Temperature 

Meet Federal EMI 

Specifications 

Reliability, Cost, Size and 

Noise Considerations limit the 

Number of Fans 

Meet Manufacturer 

Recommended Maximum 

Junction Temperature for 

Components 


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Causes of Electronic Failure 

Examples of failures related to temperature 

— Coefficient of Thermal Expansion mismatches inducing 

mechanical stresses 

— Electrical performance lessened by changing device 

parameters 

— Corrosion (Encapsulant failure) 

— Current leakage 

— Oxide breakdown 

— Electro-migration 

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Causes of Electronic Failure 

Number of Failures after 1000 HRS / Million Units 

Component T = 25 ºC T= 75 ºC 

Thick film resistor 5 15 3X 

Chip capacitor 10 25 2.5X 

Power transistor 50 300 6X 

Diode 1 9 9X 

Logic ICs - SSI 125 1125 9X 

Logic Ics - MSI 250 2250 9X 

Logic Ics - LSI 500 4500 9X 

Source: C.A. Harper, Handbook of Thick Film Hybrid Microelectronics 

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Effect of PCB Component Layout on Junction 

Temperature and Failure Rate 

Layout 1 Layout 2 

105.5 

60.8 

114.8 

105.6 

126.3 

122.1 

128.2 

125.8 

113.1 

Mean Tj = 112.9°C 

Std. Dev. = 15.2°C 

122.4 

124 

128.9 

124 

108.8 

104.9 

111.9 

111.9 

108.8 

97.6 

84.9 92.2 

87.5 

90.9 

93 

92.2 

83 

47.9 

96.1 

89.9 

97.2 

124 

92.1 

95 

Mean Tj = 89.8°C 

Std. Dev. = 10.6°C 

Failure rate 8 times higher in layout 1 than in layout 2 

Source: Hanneman, 1977 

93.7 

94.4 


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89 

94.4 

97.6

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Heat Transfer 101 

Heat transfer is the transfer of thermal energy due to a 

temperature difference 

Heat gets moved from heat source to heat sink by 

conduction 

Heat sink transfers heat to ambient air by convection 

— Heat can also be radiated to surrounding environment 

Heat Transfer by Conduction 

Heat Transfer by Convection and Radiation 

Heat Sink 

Component dissipating heat 

PCB 


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Thermal Resistance Definition 

Conductive Heat Transfer 

• R k = ∆T/Q = L/kA (K/W) 

• Similar to R Ω = ∆V/I (Ohms) 

k: Material thermal conductivity 

Convective Heat Transfer 

— R h = ∆T/Q h = 1/hA (K/W) 

∆T = T s - T ∞ 

h: Heat transfer coefficient 

Face A 

at fixed 

T 1 > T 2 

T 1 

V ∞ ,T ∞ 

T S 

L 

Q 

x 

L/kA 

Surface A 

1/hA 



T S 

T 2 

Q h 

T ∞ 

Face A 

at 

fixed 

T 2 < T 1

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The Thermal Budget 

A useful design tool defined as: 

— Defined as: ∆T budget = Q * R JA [K] 

Breaks the problem into clearly defined heat paths for a 

clear design understanding 

T A 

T s 

T C 

T J 

T B 

R SA 

R CS 

R JC 

R JB 

Sink to Ambient Resistance 

Case to Sink Resistance 

Junction to Case Resistance 

Junction to Board Resistance 


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Thermal Design Tools 

Hand calculations/Spreadsheet 

— Excellent tool for early design exploration 

Finite Element Analysis (FEA) 

— 3D numerical analysis 

— Typically doesn’t calculate convective heat transfer and 

radiation explicitly 

Computational Fluid Dynamics (CFD) 

— 3D Conjugate fluid flow and heat transfer numerical 

analysis 

Lab tests 

— Most value when used as a model validation - rather 

than for parametric investigation 


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In the beginning… 

20 years ago thermal 

management, and therefore 

simulation, was focussed on the 

mechanical system level 

PCBs represented as 2D plates 

Prescribed split of heat dumped 

into the air on either side 

Good enough for local T a 

prediction 

— and so optimisation of air flow 

partitioning in slots etc. 

No board or component 

temperature prediction 

— Also an assumption of uniform 

heat distribution on PCB 

Q(W) 

Q(W) 

Q(W) 

Q(W) 



Q(W) 

Q(W)

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Simplest of 3D representations 

Heatsinking soon became a 

common cooling method 

From a simulation 

perspective this forced a 3D 

representation of the board 

and components 

Simple block representations 

of board and components 

— With power uniformly 

dissipated in the component 

blocks 

What value to use for 

thermal conductivity? 

— Indicative of case 

temperature… in most cases 

The Question 

What is a good value of thermal conductivity to use in 

FLOTHERM simulations for printed circuit boards (PCBs) 

and components if you have no real data? 

The Short Answer 

10 watt/m/C. 

[Tony Kordyban, 3 rd International Flotherm user 

conference , 1993] 


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The grail of T j and T c modeling 

The most dependable indicator of 

thermally affected reliability is the 

component junction temperature (Tj) (as well as the temperature 

gradients created as a consequence) 

Increases in functional layout density 

and speeds have resulted in many 

more components operating at/near 

their maximum operating 

temperatures 

The need for thermal validation (“will 

this design fail thermally or not?”) is 

now an integral part of all electronic 

design processes 

So, how best to predict such T j and 

T c values…? 


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18 

Component Representation 

θ ja 

Thermal 

resistance 

from junction 

to ambient 

metric 

Good for 

comparative 

purposes 

only, NOT 

predictive 

Various methods of component representation exist 

Choice most often based on data availability rather than 

simulation intent! 

k=? 

Simple block 

model 

Good for 

‘typical’ case 

temperature 

prediction at 

best 

Case (top) 

Junction 

Board 

Top Inner Top Outer 

Side 

Junction 

Leads 

Bottom Outer 

Bottom Inner 

Thermal Resistor Network model 

“2-Resistor” and “DELPHI” types 

Capable of Tj and Tc prediction 

Generally DELPHI models are better 

than 2-Resistor 

Results as good as the derivation of 

the characteristic thermal 

resistances 

Increasing T j and T c predictive accuracy 

Detailed model 

Explicit representation of 

internal construction 

geometry, materials, die 

size etc. 

Capable of Tj and Tc 

prediction 

Most accurate model type 

available 


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From source to ambient: 

Modeling heat flow paths 

Heat is dissipated in the component and travels to a (colder) ambient 

From a design perspective it’s important to get the heat out 

easily/quickly (choose your analogy), conversely get the cold in 

easily/quickly 

Similarly, from a simulation perspective, it’s important to model the 

critical heat flow paths accurately 

— In terms of the thermal resistances the heat experiences as it leaves by: 

– Convection (heat removal by air) 

– Conduction (heat removal through solid) 

– Radiation (heat removal by em radiative transfer from solid to solid surface) 

Only a full 3D CFD simulation captures all modes of heat transfer 

accurately 


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Modeling the thermal resistance of the PCB 

stack-up 

Arguably the most critical thermal resistance the heat experiences 

(outside of the package) is the conductive resistance of the PCB itself 

Various methods exist for the representation of the PCB stack-up 

All of which are predicated on the theory of serial and parallel thermal 

resistances theorem (Thévenin’s equivalent electrical circuit) such that: 

R 1 

R 2 

R 3 

R 1 R 2 R 3 

R effective 

1/R effective = 1/R 1 + 1/R 2 + 1/R 3 

R effective R effective = R 1 + R 2 + R 3 

For conductive thermal resistances, R = d/kA 

— d = length of heat flow, k = thermal conductivity, A = cross sectional area of heat flow 

— So, for a given collection of resistances (e.g. FR4 and Cu) a single ‘effective’ thermal conductivity 

may be derived 


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The fully lumped approximation 

A refinement of the lumped “10 W/mK” single block approach 

The PCB is represented as a single block and effective thermal 

conductivities (orthotropic, different in different directions) 

applied in the x, y (in-plane) and z (through plane) directions 

21 

Z 

Y 

X 


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The fully lum ped approximation 

Top layer FR4 GND FR4 

VCC FR4 Bottom layer 




applied in the x, y (in- plane) and z (through plane) directions 

Through Plane (z) 

Effective 

Z 

k z (W/mK) 

Y 

X 


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applied in the x, y (in-plane) and z (through plane) directions 

Top layer 

FR4 

GND 

FR4 

VCC 

FR4 

Bottom layer 

In Plane (x = y) 

Effective 

Z 

k x = k y 

(W/mK) 

Y 

X 


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Based on the assumption that all heat is either conducting through or in 

the plane of the board 

Accuracy reduced when spreading occurs, e.g. from small high powered 

surface mount actives 

But numerically efficient and simple to specify (%Cu, board dimensions) 

Z 

Y 

X 


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Discrete layer representation 

Next level of refinement is a more 

explicit representation of the change in 

thermal resistances through the 

thickness of the board 

Each layer is modeled as a separate 

object with its own thermal conductivity 

Metallic layers are still composites of 

FR4 and Cu traces, pads etc. 

— Metallic layer effective thermal conductivity 

can be derived assuming thermal resistances 

in parallel for all 3 directions, just %Cu 

required 

Numerically more intensive but provides a 

better accommodation of spreading effects 

— Especially if the distribution of Cu on metallic 

layers is relatively uniform 


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Full metallic distribution representation 

Current simulation 

state of the art is a 

representation of the 

change in thermal 

resistances in X, Y 

and Z directions 

To achieve this a 

detailed description 

of the distribution of 

Cu in both metallic 

and dielectric layers 

is required 

— Necessitating import 

of layer artwork 

descriptions from 

EDA tools into the 

simulation tool 


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Full Metallic Distribution Representation 

Computational resources 

are currently not at a 

level to support explicit 

representation of each 

individual Cu feature 

Even at this level an 

effective thermal 

resistance approach is 

taken 

Each layer is subdivided 

into a tessellated array of 

‘patches’ 

Effective orthotropic 

thermal conductivities are 

calculated for each ‘patch’ 

by examining the 

distribution of Cu/FR4 

within that area 


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Trace data imported directly from major EDA tools into 

FloTHERM/FloTHERM PCB 

Discretized Cu distribution for top layer 


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Black and white image of Cu distribution is attached to 

each layer and is transformed into patches of various 

thermal conductivities 


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Application Example: JCI PCB 

FloTHERM PCB Top Side FloTHERM PCB Bottom Side 

Board provided by JCI 

Automotive Group, MI 

Dashboard PCB tested in 26ºC 

still air environment 

Total power dissipation = 9 W 

Analysis done using FloTHERM 


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Bottom trace before discretization 

Bottom trace after discretization 

Trace 4 before discretization Trace 4 after discretization 

PCB contains 6 copper layers 

— Each layer becomes a pixelized 

representation of the thermal 

conductivity based on the 

Copper distribution 

— Each pixel is assigned a value 

for kx, ky, and kz as determined 

by image processing and 

becomes a layer patch 

— A similar approach is used for 

the via representation 


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PCB bottom surface temperature (IR) 

PCB bottom surface temperature (FloTHERM) 

Results 

— Temperature 

distribution very 

similar between 

experimental and 

numerical model 

— Top layer results 

also compared 

very well 


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Results 

— 3.4% Average 

discrepancy 

between 

numerical and 

experimental 

results 

— Maximum error 

of 10.7% 


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Detail leads to accuracy? 

“A detailed PCB representation will increase my results 

accuracy” 

A true statement but caution is required 

Increased detail will lead to longer simulation solution times 

So, when is a detailed PCB representation necessary? 

— When the critical heat flow path is through the board 

– Natural convection or conduction cooled environments 

– Small high powered surface mount actives where the local PCB 

copper acts as a heatspreader 

So, when should a simpler PCB representation be used? 

— When the board is not on the critical heat flow path 

– Forced convection cooled environments 

— When your component representation is not detailed enough 

– Why model the PCB Cu content in detail when all components are 

modelled as simple blocks? 


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A final word on Accuracy 

“How accurate is the thermal simulation?”, a common 

question for obvious reasons 

Sources of error fall into three categories: 

1. Data availability 

– Dictates both component and PCB modeling approaches 

2. Data accuracy 

– If there are just 3 inputs to define accurately then they are power 

dissipation, power dissipation and power dissipation 

3. Numerical modelling 

– CFD grid not fine enough on the air side around components and/or 

in the board just under components 

– Incorrect assumption made about the environment the PCB is 

placed in 

A good model(er) that is aware of the above 3 issues should 

produce T j – T a results within 10% of experimental 


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36 

PCB Thermal Simulation – 

The State of the Art 

Questions? 


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37 

www. mentor. com 


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PCB Thermal Simulation - RTP Designers Council

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