SMBus Quick Start Guide - Freescale Semiconductor

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SMBus usage model 6 Slave address Bits 7–1 1111 1XX X Reserved for future use 0001 000 X SMBus host 0001 100 X SMBus alert response address 1100 001 X SMBus device default address 1 Source: System Management Bus Specification, version 2.0, Table 4 Each device that exists as a slave on the SMBus has one unique seven bit address called the slave address. Each address is seven bits long with a read/write bit appended in bit position 0. When a device “sees” its address, it wakes up and responds to the rest of the command. Besides the General Call Address, SMBus systems can have 127 devices. SMBus version 2.0 introduces the concept of dynamically assigned addresses, and the SMBus Device Default Address is reserved for this purpose. A process called SMBus Address Resolution Protocol (ARP) uses this address. When the host detects two devices with the same slave address, the ARP process resolves the slave address conflict by dynamically assigning a new unique address to slaves. For reference, some addresses in the table below are reserved and must not be used or assigned to any SMBus slave device unless otherwise detailed by the SMBus specification. The following table lists the current assigned device addresses. Table 4. Assigned SMBus addresses 1 Slave Address Description Specification 0001 000 SMBus Host System Management Bus Specification, version 1.1 December 1998 0001 001 Smart Battery Charger Smart Battery Charger Specification, version 1.1 December 1998 0001 010 Smart Battery Selector Smart Battery System Manager SMBus Quick Start Guide, Rev. 1 Smart Battery Selector Specification, version 1.1 December 1998 Smart Battery System Manager Specification, version 1.0B August 1999 0001 011 Smart Battery Smart Battery Data Specification, version 1.1 December 1998 0001 100 SMBus Alert Response System Management Bus Specification, version 1.1 December 1998 0101 000 ACCESS.bus host Table 3. Reserved SMBus addresses (continued) 1 R/W# bit Bit 0 0101 100 Reserved by previous versions of the SMBus specification for LCD Contrast Controller. This address may be reassigned in future versions of the SMBus specification. 0101 101 Reserved by previous versions of the SMBus specification for CCFL Backlight Driver. This address may be reassigned in future versions of the SMBus specification. 0110 111 ACCESS.bus default address Comment Freescale Semiconductor
5 Using an SMBus device SMBus Quick Start Guide, Rev. 1 Using an SMBus device A typical SMBus device will have a set of commands by which data can be read and written. All commands are one byte long while their arguments and return values can vary in length. Accessing a command that does not exist or is not supported may cause an error condition. In accordance with the SMBus specification, the most significant bit (MSB) is transferred first. There are eleven possible command protocols for any given device. These commands are Quick Command, Send Byte, Receive Byte, Write Byte, Write Word, Read Byte, Read Word, Process Call, Block Read, Block Write, and Block Write-Block Read Process Call. A slave device may use any or all of the eleven protocols to communicate. Many of the commands defined by SMBus are geared for simple logic implementations; therefore, SMBus devices do not need to implement all of the commands defined in the SMBus specification. They can implement only those commands that they need for their simple system. For example, SMBus devices like Smart Batteries, Smart Battery Chargers, and Selectors may use only Read/Write Word and Block Read commands. This makes implementing a SMBus driver for these devices much easier. One interesting thing is that Smart Batteries are free to use any SMBus commands such as Block Write, to implement custom functions, but it is not required by the Smart Battery Data specification. The Block Write command protocol is typically used during the manufacturing process to initialize the battery data (for example, manufacturing date, serial number, electronics trimming, scaling values, and so on). 6 Packet error checking Table 4. Assigned SMBus addresses (continued) 1 Slave Address Description Specification 1000 0XX Reserved by previous versions of the SMBus specification for PCMCIA Socket Controllers (four addresses). These addresses may be reassigned in future versions of the SMBus specification. 1000 100 Reserved by previous versions of the SMBus specification for (VGA) Graphics Controller. This address may be reassigned in future versions of the SMBus specification. 1001 0XX Unrestricted addresses System Management Bus Specification, version 1.1 December 1998 1100 001 SMBus Device Default Address System Management Bus Specification, version 1.1 December 1998 1 Source: System Management Bus Specification, version 2.0, Table 11 SMBus version 1.1 introduced a Packet Error Checking mechanism to improve communication reliability and robustness. Implementation of Packet Error Checking is optional for SMBus devices, but it is required for devices participating in the ARP process. Devices that implement Packet Error Checking must be capable of communicating with the host and other devices that do not implement the Packet Error Checking mechanism. Packet Error Checking, whenever applicable, is implemented by appending a Freescale Semiconductor 7
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