Houman Homayoun - Department of Electrical and Computer ...

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TEACHING EXPERIENCE § Group Leader Teaching Assistant, leadership, management, and manufacturing engineering, University of California, Irvine, The Paul Merage School of Business § Teaching Assistant, Fundamental Data Structures University of California Irvine, Computer Science Department. § Teaching Assistant, Logic Design Lab University of California Irvine, Computer Science Department. § Teaching Assistant, Senior Design Project University of California Irvine, Computer Science Department. § Teaching Assistant, Introduction to Computer Design University of California Irvine, Computer Science Department. § Laboratory and Tutorial Instructor, Advanced Internet Communications McMaster University, Electrical and Computer Engineering Department. § Laboratory instructor, General Physics University of Victoria, Physics Department. § Laboratory and Tutorial instructor, Linear Circuit I University of Victoria, Electrical and Computer Engineering Department. § Laboratory instructor, Electronic Circuit I University of Victoria, Electrical and Computer Engineering Department. § Laboratory instructor, Microprocessor Systems University of Victoria, Electrical and Computer Engineering Department. § Tutorial instructor, Digital Circuit Design Sharif University of Technology, Electrical and Computer Engineering Department. PRESENTATIONS/INVITED TALKS/TUTORIALS ü System-Level Exploration of Power, Performance, and Area for Multicore Architectures (Tutorial) ü “Multiple Sleep Modes Leakage Control in Peripheral Circuits of All Major SRAM-Based Processor Units” ü “FFT-Cache:A Flexible Fault-Tolerant Cache Architecture for Low Voltage Operation” (Invited Talk) ü “Beyond Memory Cells for Leakage and Temperature Control in SRAM-based Units, the Peripheral Circuits Story” ü “Power Management in High Performance Processors through Dynamic Resource Adaptation and Multiple Sleep Mode Assignments” (Invited Talk) ü “Temperature-Aware SoC Optimization Framework” Semiconductor Research Corporation (SRC) ICSS Systems Contract Review. ü “Architectural and Circuit-Levels Design Techniques for Power and Temperature Optimizations in On-Chip SRAM Memories” ü “Power, Temperature, Reliability and Performance - Aware Optimizations in On-Chip SRAM-based Caches” (Invited Talk) ü “RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor”. 5th International Conference of High Performance Embedded Architectures and Compilers. ü “Dynamic Register File Resizing and Frequency Scaling to Improve Embedded Processor Performance and Energy-Delay Efficiency”. ACM/IEEE 45TH Design Automation Conference. Houman Homayoun Page 6 of 9 August-September 2010 June-August 2010 January-March 2010 September-December 2009 September-December 2007 January 2006-March 2006 September 2004-December 2004 May 2004-August 2004 January 2004-April 2004 September 2003-December 2003 March 2002-July 2002 June-2012 DAC Conference August-2011 Florida International University November 2011 9 th SOC Conference November-2010 Arizona State University November 2010 8 th SOC Conference SRC-2010, Pittsburgh, U.S.A. April-2010, University of Southern California May-2010, UCSD HiPEAC-2010, Pisa, Italy. DAC-2008, Anaheim, U.S.A.
ü “Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Houman Homayoun Page 7 of 9 CASES-2008, Atlanta, Processors”. In Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. U.S.A. ü “Adaptive Techniques for Leakage Power Management in L2 Cache Peripheral Circuits”. ICCD-2008, Lake In Proceedings of XXVI IEEE International Conference on Computer Design. Tahoe,U.S.A. ü “Improving Performance and Reducing Energy-Delay with Adaptive Resource Resizing for Out-Of Order Embedded Processors”. ACM SIGPLAN/SIGBED 2008 Conference on Languages, Compilers, and Tools for Embedded Systems. ü “ZZ-HVS: Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On Chip SRAM Peripheral Circuits”. In Proceedings of XXVI IEEE International Conference on Computer Design. ü “A Centralized Cache Miss Driven Technique to Improve Processor Power Dissipation”. International Symposium on Systems, Systems, Architectures, Modeling and Simulation. ü “Reducing Leakage Power in Peripheral Circuit of L2 Caches”. In Proceedings of XXV IEEE International Conference on Computer Design. ü “Lazy Instruction Prediction to Reduce Processor Wakeup Power Dissipation”. The 2nd workshop on unique chips and systems, in conjunction with IEEE International Symposium on Performance Analysis of Systems and Software. LCTES-2008, Tucson, AZ, U.S.A. ICCD-2008, Lake Tahoe,U.S.A. SAMOS-2008, Samos, Greece. ICCD-2007, Lake Tahoe,U.S.A. UCAS2-ISPASS-2006, Austin, U.S.A. CONFERENCE COMMITTEE MEMBER/REVIEWER § Technical Program Committee of The Fourth International Green Computing Conference. IGCC-2013 § Technical Program Committee of The IEEE International Symposium on Quality Electronic Design. ISQED-2013 § Technical Program Committee of The International Symposium on Low Power Electronics Design. ISLPED-2012 § Technical Program Committee of The IEEE International Symposium on Quality Electronic Design. ISQED-2012 § Technical Program Committee of The 2011 ACM International Conference on Computing Frontiers. CF-2011 § Technical Program Committee of The IEEE International Symposium on Quality Electronic Design. ISQED-2011 § Technical Program Committee of The 9 th IEEE International Conference on Computer Systems AICCSA-2011 and Applications § Program Session Chair of The International Symposium on Low Power Electronics Design. ISLPED-2012 § Program Session Chair of The IEEE International Symposium on Quality Electronic Design. ISQED-2011 § Reviewer of International Symposium on High-Performance Computer Architecture. HPCA-2012 § Reviewer of Design, Automation & Test in Europe. DATE-2012 § Reviewer of The 19th International Conference on Parallel Architectures and Compilation Techniques. PACT-2010 § Reviewer of The First International Green Computing Conference. IGCC-2010 § Reviewer of The 23rd International Conference on Supercomputing. ICS-2009 § Reviewer of International Conference on Compilers, Architecture, and Synthesis for Embedded Systems. CASES-2009 § Reviewer of The 35th International Symposium on Computer Architecture. ISCA-2008 § Program Session Chair of The XXVI IEEE International Conference on Computer Design. ICCD-2008 § Reviewer of The XXVI IEEE International Conference on Computer Design. ICCD-2008 § Reviewer of The ACM International Conference on Computing Frontiers. CF-2008 § Reviewer of International Symposium on Computer Architecture and High Performance Computing. SBAC-PAD-2007 § Reviewer of International Symposium on Low Power Electronics and Design. ISLPED-2009 § Reviewer of the ACM Transactions on Embedded Computing Systems. TECS
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