sale overview document - Green Patent Blog

1 

Rob Aronoff 

rob@pluritas.com 

(415) 963-3790 ext. 101 

Copyright ©2013 Pluritas, LLC. 

Patent Portfolio Overview 

Illumitex 

LED Extraction Efficiency & Chip Shaping Technology 

Mitch Rosenfeld 

mitch@pluritas.com 

(415) 963-3790 ext. 103 

Myron Kassaraba 

myron@pluritas.com 

(415) 963-3790 ext. 104 

201 California Street, Suite 650, San Francisco, California 94111

2 

Opportunity Overview 

Illumitex was founded in 2005 by imaging and optics industry 

veterans. 

The Company’s current business is vibrant and focused on LED total 

solutions including fixtures and optics. The IP being offered for sale is 

being divested since LED chip manufacturing is a business that is no 

longer being pursued. 

The Illumitex chip-level IP incorporates fundamental physics 

principles to maximize light extraction from the source. By extracting 

and directing photons at the die level, Illumitex delivers more usable 

light to the intended target while consuming less energy. 

This sale represents a unique opportunity for a strategic buyer to 

acquire lab-tested technology with very solid patent protection in a 

critical area of the rapidly growing LED market. 

Copyright ©2013 Pluritas, LLC.

3 

Portfolio Summary 

Illumitex Assets For Sale 

• 6 issued US patents 

• 1 US provisional application 

• 5 patent families total 

• Foreign equivalents from Europe, China, 

Japan, Taiwan, and South Korea 

• Forward References from: 

• Hon Hai Precision Industry Co., 

Ltd. 

• Osram Opto Semiconductors 

• Samsung Electronics 

• No encumbrances 

Market Application and Strategic Opportunity 


Patent Portfolio Details 

• US 7,789,531 (Priority: 10/2/2006) 

• US 7,829,358 (Priority: 2/8/2008) 

• US 8,087,960 (Priority: 10/2/2006) 

• US 8,115,217 (Priority: 12/11/2008) 

• US 8,217,399 (Priority: 8/1/2008) 

• US 8,263,993 (Priority: 2/8/2008) 

• US 61/587,552 (Provisional) 

• Foreign equivalents 

• The worldwide LED chips market is expected to reach $8.5 billion by 2014 

(http://www.marketsandmarkets.com/Market-Reports/led-chips-229.html) 

• Leading exemplary vendors: Nichia, Samsung, Osram, LG, Seoul Opto, Cree, Philips/Lumileds, Sharp, 

Toyoda Gosei, Everlight, GE, Micron, BridgeLux, SemiLEDs, Epistar, 3M, Rambus, 

Panasonic/Matsushita, TSMC, Rohm & Haas, Showa Denko, Toshiba, etc. 

(Representative market participants. Not an opinion, claim, or representation as to infringement.)

4 

Sorted by Patent Family (1 of 2) 

Pat/Pub 

Number 


Patent 

Family 

US 7,829,358 A 

US 8,263,993 A 

US 61/587,552 

(Provisional) 

B 

US 7,789,531 C 

US 8,087,960 C 

Illumitex’s IP Portfolio 

Tech Cluster Title 

LED Emitter 

Layer Shaping 

LED Emitter 

Layer Shaping 

LED Micro‐ 

Mirrors 

LED Substrate 

Shaping (Exit 

Face & 

Sidewalls) 

LED Substrate 

Shaping (Exit 

Face & 

Sidewalls) 

System and method for emitter layer 

shaping 

System and method for emitter layer 

shaping 

Hybrid mirror for higher extraction 

efficiency from bottom‐emitting LEDs 

Priority 

Date 

2/8/2008 

2/8/2008 

LED system and method 10/2/2006 

LED system and method 10/2/2006 

US Patent 

Family 

Members 

US 8,263,993 

(Divisional) 

US 7,829,358 

(Parent) 

Ex‐US 


Family 

Members 

EP2240968A1 

WO2009100358A1 

KR2010122485A 

CN101939849A 

TW200941773A 

JP2011512037A 

See ‘358 Patent 

1/17/2012 None None 

US 8,087,960 

US20090275266A1 

(Abandoned) 

US20090275157A1 

(Abandoned) 

US 7,789,531 

US20090275266A1 

(Abandoned) 

US20090275157A1 

(Abandoned) 

EP2070123A2 

WO2009158573A1 

WO2009158574A1 

WO2008042351B1 

KR2009064474A 

CN101553928B 

TW201009921A 

TW201007993A 

TW200824161A 

JP2010506402A 

See ‘531 Patent

5 

Sorted by Patent Family (2 of 2) 

Pat/Pub 

Number 



Family 

US 8,115,217 D LED Packaging 

US 8,217,399 E 

Illumitex’s IP Portfolio 

Tech Cluster Title 

LED Emitter & 

Submount 

Structure 

Photon 

Tunneling 

Systems and methods for packaging 

light‐emitting diode devices 

Photon tunneling light emitting diodes 

and methods 

Priority 

Date 

US Patent 

Family 

Members 

12/11/2008 None 

8/1/2008 None 

Ex‐US 


Family 

Members 

WO2010068886A1 

TW201034256A 

EP2351111A1 

WO2010014610A1 

KR2011049843A 

CN102150285A 

TW201013994A 

JP2011530173A

6 

Comprehensive IP 

Illumitex’s IP includes proprietary technology covering different parts 

of an LED: 


Family D – 

LED 

Packaging: 

US 8,115,217 

Image Source: 

Illumitex, Fig. 4 of US 8,115,217. 


Submount 

Sapphire or SiC 

GaN 


Family B – 

LED Micro- 

Mirrors: 

US Prov. 

61/587,552 

Flip-Chip LED 

Image Source: Illumitex. 


Family E – 

LED Emitter 

& Submount 

Structure 

Photon 

Tunneling: 

US 8,217,399 


Family C – 

LED 

Substrate 

Shaping (Exit 

Face & 

Sidewalls): 

US 7,789,531 

US 8,087,960 


Family A – 

LED Emitter 

Layer 

Shaping: 

US 7,829,358 

US 8,263,993

7 

Technology Overview 

• Light extraction from an LED chip depends on: 

• Minimizing the number of reflections (N) in the LED structure 

• Maximizing reflectivity of all surfaces 

• Minimizing absorption losses of all materials 

• Rough estimate of Losses: 

• Optimized structures does 

all of this: 

• Sidewall TIR: 

R = 100% 

• Sidewall shape 

directs light into 

escape cone: N = 1 


Absorption Losses Compound! 

# Reflections 

Absorption 1 

R 

 

All rays strike exit 

face and exit! 

light 

LED 

Emitter 

Lossless 

reflection at 

sidewalls

8 

LED Emitter Layer Shaping 

US 7,829,358 & US 8,263,993 

LED Emitter Layer Shaping (Patent Family A) 

Shaped emitters achieve highest possible light extraction efficiencies 

(LEE) 

• Minimize internal reflections 

• Control beam shape into substrate 

or encapsulant 

Key Achievements 

• Light extraction improvements up to 

50% demonstrated 

• Fabrication process developed 

• Performance matches advanced 

optical modeling 

• Comparable test data from 

prototype test wafers available 


9 

LED Micro-Mirrors 

US Prov. 61/587,552 

LED Micro-Mirrors (Patent Family B) 

Replace conventional Ag mirror with combination of Ag & dielectric 

mirrors 

• Higher reflectivity = higher extraction 

efficiency 


• Dielectric stacks can give 99+% reflectance 

• Potential add-on process to improve conventional vertical or flipchip 

device designs 

• Demonstrated 10-15% higher extraction efficiency than PSS 

• Production-ready 

• Comparative performance data available 


Absorption Losses Compound! 

# Reflections 

Absorption 1 

R 

Ag 

pCon. 

TiO2 

SiO2 

 

P‐GaN 

MQW‐active 

n‐GaN 

nContact

10 

LED Substrate Shaping 

(Exit Face & Sidewalls) 

US 7,789,531 & US 8,087,960 

LED Substrate Shaping (Patent Family C) 

Shaped substrates achieve greater 

efficiency than previous LEDs 

• The height of the substrate can be selected 

to limit the critical angle of rays incident 

on the exit surface 

• The exit face has at least 70% of a 

minimum area needed to conserve 

radiance for a desired half-angle of light 

projected from the shaped substrate 


• Theoretical efficiency of up to 89% (89% of the light entering the 

substrate is emitted in the desired half-angle with 11% Fresnel loss) 


11 

LED Packaging 

US 8,115,217 

LED Packaging (Patent Family D) 

Improved LED Packaging of Patent 

Family C achieves overall brightness 

• The size of a packaged LED defines 

the LED’s brightness (lumens) 

• A phospor plate is on top or within 

the housing 

• The rays of light exit the exit face 

with negligible side emission 

through the side walls of the 

substrate 


• LED does not need secondary 

optics 


12 

LED Emitter & Submount 

Structure Photon Tunneling 

US 8,217,399 

Photon Tunneling (Patent Family E) 

Photon Tunneling increases light that makes it into air 

• Photons do not become trapped in the substrate 

• The LED layer structure has a thickness that is less than the 

wavelength of the light produced 


• Geometric modification 

of the GaN and/or 

substrate is not needed 

to extract light 


13 

Illumitex In The News 


Sources (left to right): 

http://www.illumitex.com/news/news-illumitex-announces-new-ceo-and-funding/; 

http://ledsmagazine.com/press/33543; 

http://www.photonics.com/Article.aspx?AID=48616.

14 

Applicable Market 

Representative Market Participants 1 

1 Representative market participants. Not an opinion, claim, or representation as to infringement. 


15 

Market Trends 

Illumitex IP Applies to Two Large 

Related Growing Markets 

• Packaged LED Market: The worldwide packaged LED 

market (does not include LED chips) grew nearly 10% from 

$11 billion in 2010 to $12.5 billion in 2011 (the packaged 

LED market sorted by commercial application is shown on the 

immediate right) 

• Chip LED Market: The worldwide LED chips market was 

roughly $3 billion in 2009 and is estimated to grow to $8.5 

billion by 2014 (see lower right) – this is the applicable 

market for Illumitex’s IP 


$9,000 

$8,000 

$7,000 

$6,000 

$5,000 

$4,000 

$3,000 

$2,000 

$1,000 

Source: LEDs Magazine, http://ledsmagazine.com/features/9/3/2 and 

http://www.marketsandmarkets.com/Market-Reports/led-chips-229.html 

$‐ 

Worldwide Chip LED Market (in $ mil) 

2009 2010 2011 2012 2013 2014

16 

Patent Landscape Analysis 

The following four slides represent analysis performed on patents in 

the LED technology space to illustrate the relationship of the Illumitex 

IP to those of major market participants. 

Methodology 

• Pluritas first performed keyword and semantic searches to identify 

top relevant vendors within the Illumitex IP space as illustrated in 

Slide 17. 

• Pluritas then worked with IP Checkups, a research firm that 

provides technical analysis, to graphically map the patent 

landscape of top vendors by tech area as illustrated in Slide 18. 

• Next, by accessing IP Checkups’ LED database, Pluritas identified 

the vendors with “gaps” as illustrated in Slide 19 – as these 

companies could find this Illumitex IP useful in enhancing their 

patent portfolios. 


17 

Patent Landscape 

Leading LED Vendors 1 

• Pluritas performed keyword and semantic searches to identify top vendors with patents relevant to Illumitex’s IP. 

Using this data and collaborating with IP Checkups, the following pie chart was built illustrating the leading patent 

holders: 


1 Representative market participants. Not an opinion, claim, or 

representation as to infringement. 

Efficient LED Technology: Patent Landscape (United States) 

Showa Denko 

5% 

Seoul Opto 

3% 

SemiLEDs 

1% 

Sharp 

10% 

Toshiba 

10% 

Samsung 

11% 

Toyoda 

Gosei 

5% 

Rohm & Haas 

4% 

3M Acuity 

1% 0% 

Cree 

6% 

Philips/Lumileds 

9% 

BridgeLux 

1% 

Epistar 

2% 

Panasonic 

11% 

GE 

2% 

LG 

8% 

Nichia 

4% 

Osram 

5% 

Everlight 

1% 

Goldeneye 

0% 

Source: 7,494 patents from IP Checkups’ LED Database. 

Illumitex 

3M 

Acuity 

BridgeLux 

Cree 

Epistar 

Everlight 

GE 

Goldeneye 

LG 

Nichia 

Osram 

Panasonic 

Philips/Lumileds 

Rohm & Haas 

Samsung 

SemiLEDs 

Sharp 

Seoul Opto 

Showa Denko 

Toshiba 

Toyoda Gosei

18 


Tech Breakdown 1 

• The LED IP landscape for 10 Assignees is mapped by tech area below. Philips/Lumileds and LG have IP similar to the 

‘993, ‘358, ‘960, and ‘531 Illumitex patents. Cree, LG, and Panasonic have IP similar to the ‘217 and ‘399 Illumitex patents. 

Patent Family A 

US 8,263,993 

US 7,829,358 


1 Representative market participants. Not an opinion, claim, or representation as to infringement. 

Patent Family C 

US 8,087,960 

US 7,789,531 

Patent Family D 

US 8,115,217 

Note: In the patent map, patents (dots) are clustered based on 

thematic similarity. Dense areas of similar patents, are represented 

as snow-capped peaks, while relatively sparse areas are represented 

as blue lakes or oceans. The absolute positioning of each peak and 

valley is not important, only relative location – the closer together 

the peaks are located on the map, the more closely the 

corresponding patents are related. 

Source: IP Checkups’ LED Database. 

Patent Family E 

US 8,217,399

19 


Tech Breakdown 1 

• The table below illustrates Illumitex’s IP alongside the leading LED vendors (sorted by tech area). Cells 

highlighted in yellow indicate areas where vendors have fewer than 20 patents in a relevant Illumitex tech area. 

For example, Nichia, Sharp, Toyoda Gosei, Everlight, GE, Acuity, BridgeLux, SemiLEDs, Epistar, 3M, Goldeneye, 

and Rohm & Haas fewer patents than their competitors in areas relevant to the Illumitex patents. 

Within LED Space ‐ From IP Checkups (PatentCam) Pats Pubs Pats Pubs Pats Pubs Pats Pubs 

Company US Pats US Pubs Total 

Illumitex 6 3 9 1 0 1 0 4 0 3 0 

Nichia 286 217 503 22 2 12 14 161 121 80 51 

Samsung 1564 1682 3246 119 76 242 191 209 312 283 398 

Osram 550 508 1058 124 89 34 39 176 203 58 42 

LG 925 499 1424 197 44 143 43 109 80 154 67 

Seoul Opto 158 317 475 31 28 32 34 68 151 58 103 

Cree 133 385 518 53 53 34 35 243 186 137 65 

Philips/Lumileds 975 1114 2089 156 147 49 62 292 204 179 143 

Sharp 810 527 1337 31 55 20 53 444 188 263 142 

Toyoda Gosei 335 243 578 29 19 2 8 238 160 139 87 

Everlight 61 89 150 24 11 15 8 5 9 7 15 

GE 296 235 531 52 37 13 18 58 46 34 37 

Acuity 4 2 6 2 1 0 0 0 0 0 0 

BridgeLux 73 80 153 16 20 15 14 25 18 20 10 

SemiLEDs 31 10 41 3 1 0 3 20 5 25 8 

Epistar 130 99 229 8 4 17 8 75 77 63 43 

3M 183 165 348 30 8 16 11 39 42 12 17 

Goldeneye 23 31 54 2 2 4 0 12 23 6 11 

Panasonic/Matsushita 970 570 1540 128 56 52 50 470 247 200 120 

Rohm & Haas 342 321 663 36 34 12 15 148 135 122 86 

Showa Denko 200 248 448 55 64 21 11 152 192 132 159 

Toshiba 754 619 1373 151 93 51 69 339 247 177 158 

Total 8809 7964 16773 


Solid State Lighting ‐> 

Fixtures 


representation as to infringement. 

Solid State Lighting ‐> LED 

Control ‐> Power 

Management ‐> Distribution 


Technology ‐> Chemistry & 

Materials ‐> Epitaxy 

Source: 8,809 patents and 7,964 applications from IP Checkups’ LED Database. 


Technology ‐> Chemistry & 

Materials ‐> Substrates

20 

Patent Landscape Conclusion 

Conclusion 1 

• Philips/Lumileds and LG have IP similar to Illumitex Patent Families 

“A” and “C”. 

• Cree, LG, and Panasonic have IP similar to the Illumitex Patent 

Familities “D” and “E”. 

• Nichia, Sharp, Toyoda Gosei, Everlight, GE, Acuity, BridgeLux, 

SemiLEDs, Epistar, 3M, Goldeneye, and Rohm & Haas fewer 

patents than their competitors in areas relevant to the Illumitex 

patents. 



representation as to infringement.

21 

Transaction Parameters and Objectives 

• Illumitex is seeking the sale of these assets 

• No Encumbrances 

• Seller requires a Grant Back license 

• The identity of all inquiries and bidders is confidential except as modified 

by a transaction between the parties 


22 

Diligence Resources Available 

• Technical and IP Diligence calls are available with 

Pluritas experts who have completed reviews of the IP 

assets and are knowledgeable about the markets to 

which they apply 


23 

For More Information 

• For more information and/or execution 

of an inquiry- and identity-protecting 

NDA, please contact: 

Rob Aronoff 

Managing Partner 

rob@pluritas.com 

(415) 963-3790 x101 


Mitch Rosenfeld 

Partner 

mitch@pluritas.com 

(415) 963-3790 x103 

Myron Kassaraba 

Partner 

myron@pluritas.com 

(415) 963-3790 x104 

Craig Carothers 

General Counsel 

craig@pluritas.com 

(415) 963-3790 x102

24 

Pluritas Profile 

Pluritas is a transaction advisory firm specializing in divestitures, 

acquisitions, and mergers where Intellectual Property (IP) is a 

major component of the transaction. 

We provide arms-length sell side transaction services to all 

owners of IP assets. We provide arms-length buy side 

transaction services to a select group of Corporate Clients. 

We expertly navigate the risks and nuances for all parties 

involved with transacting IP, yielding a 'safer' and more 

comfortable transaction climate for all participants. 

We also strongly differentiate ourselves by our track record 

of success, as well as by integrating seasoned professionals 

with deep industry, technical and IP expertise into every 

engagement. 


25 

NOTICE 

THIS PRESENTATION DOES NOT CONSTITUTE AN OFFER FOR SALE OF 

ASSETS OR SECURITIES FOR ILLUMITEX OR AN OFFER FOR, OR 

SOLICITATION OF, A LICENSE OF ANY KIND. IN MAKING A DECISION 

REGARDING THE ILLUMITEX OPPORTUNITY, POTENTIAL PURCHASERS 

MUST RELY ON THEIR OWN EXAMINATION OF THE INTELLECTUAL 

PROPERTY RIGHTS AND OTHER ASSETS INCLUDING BUT NOT LIMITED TO 

THE TITLE, VALUE, MERITS AND RISKS INVOLVED. THERE IS NO 

ASSURANCE THAT THESE INTELLECTUAL PROPERTY RIGHTS WILL BE 

UPHELD. PLURITAS MAKES NO REPRESENTATION CONCERNING THE 

VALIDITY OF THE INTELLECTUAL PROPERTY HEREIN. ADDITIONALLY, 

THESE MATERIALS ARE SOLELY ATTRIBUTABLE TO PLURITAS AND DO 

NOT NECESSARILY REPRESENT THE VIEWS OR OPINIONS OF ILLUMITEX. 

NOTHING IN THIS DOCUMENT SHALL CONSTITUTE OR BE INTERPRETED AS 

LEGAL ANALYSIS REGARDING THE SCOPE OF THE PATENTS OR OTHER 

INTELLECTUAL PROPERTY RIGHTS. SIMILARLY, NOTHING INCLUDED IN 

THIS DOCUMENT SHALL BE USED TO INTERPRET, DEFINE, OR OTHERWISE 

LIMIT THE SCOPE AFFORDED THE ASSOCIATED INTELLECTUAL PROPERTY 

RIGHTS. 


26 


Appendix: Exemplary Claims

27 

U.S. Patent No. 7,789,531 – Representative Claim 

‘531 Patent, Claim 1 


Representative Claim 

An LED comprising: 

a quantum well region operable to generate light; and 

a shaped substrate having an interface to receive light generated by the quantum well region, 

wherein light generated by the quantum well region traverses the interface, the shaped 

substrate comprising: 

an exit face opposite from and a distance from the interface, wherein the substrate is 

shaped so that a portion of the light entering the shaped substrate through the interface will 

exit the shaped substrate through the exit face and wherein the exit face has at least 70% of 

a minimum area necessary to conserve radiance for a desired half-angle of light projected 

from the shaped substrate; and 

a set of sidewalls, wherein each sidewall is positioned and shaped so that at least a 

majority of rays having a straight transmission path from the interface to that sidewall can 

reflect through total internal reflection to the exit face with an angle of incidence at the exit 

face at less than or equal to a critical angle at the exit face.

28 


’358 Patent, Claim 1 



A method of shaping an emitter layer of the LED, comprising: 

determining an exit area (b) and an emitter area (a) of a miniature emitter, wherein the exit 

area (b) has an exit face in a first geometric configuration and wherein the emitter area (a) 

has a quantum well region in a second geometric configuration; 

determining a minimum height (h) of the miniature emitter utilizing the exit area (b) and the 

emitter area (a); 

removing matter from an emitting material or growing the emitting material according to the 

first geometric configuration, the second geometric configuration, and the minimum height (h) 

to form a shaped portion having one or more miniature emitters meeting the minimum height 

(h); and 

shaping sidewalls of the miniature emitters, wherein each sidewall is positioned and shaped to 

cause at least a majority of rays having a straight transmission path from the emitter area to 

that sidewall to reflect to the exit face with an angle of incidence at the exit face at less than 

or equal to a critical angle at the exit face.

29 





A method of shaping an LED comprising: 

providing a wafer comprising a substrate and one or more layers for a quantum well region of the LED; 

grinding the substrate to form a shaped substrate portion of the LED; 

wherein the shaped substrate portion is shaped to comprise: 

an exit face opposite from and a distance from an interface with the to receive light generated by a quantum well 

region of the LED, the exit face having a size being at least 70% of a minimum area necessary to conserve radiance 

for a desired half-angle of light projected from the shaped substrate; and 

a set of sidewalls, wherein each sidewall is positioned and shaped so that at least a majority of rays having a 

straight transmission path from the interface to that sidewall reflect through total internal reflection to the exit face 

with an angle of incidence at the exit face of less than or equal to a critical angle at the exit face; wherein the method 

is performed by performing steps in the order of: 

(a) determining boundary conditions for the shaped substrate portion of the LED, wherein the boundary conditions 

comprise the size of the exit face of the shaped substrate portion of the LED and the distance between the exit face 

and the interface between the shaped substrate portion and the quantum well region of the LED; 

(b) determining the shapes and positions of the set of sidewalls of the shaped substrate portion of the LED; and 

(c) shaping the shaped substrate portion of the LED.

30 


‘217 Patent, Claim 1 



A packaged light-emitting diode (LED) device, comprising: 

a housing having a cavity; 

a phosphor plate on top or within the housing; 

a submount attached to the housing, wherein the submount comprises metal traces, 

vias, or a combination thereof; and 

at least one LED chip residing in the cavity of the housing between the phosphor plate 

and the submount and comprising a substrate and a light emitting region, wherein the 

substrate comprises a side wall and an exit face on top of the side wall, wherein all or 

substantially all rays of light emitting from the light emitting region exit the exit face with 

negligible or substantially negligible side emission through the side wall of the 

substrate, and wherein the light emitting region is connected to the metal traces of the 

submount inside the housing through an electrically conductive contact area.

31 





A light-emitting diode (LED) device comprising: 

an LED layer structure comprising a quantum well layer adapted to generate light having 

a wavelength, a p-doped alloy layer on a first side of the quantum well layer, an ndoped 

alloy layer on a second side of the quantum well layer obverse from the first side 

and between the quantum well layer and a medium; 

an electrode electrically connected to the p-doped alloy layer; and 

an electrode electrically connected to the n-doped alloy layer; 

wherein the combined thickness of the LED layer structure on the second side of the 

quantum well layer including the n-doped alloy layer is thinner than the wavelength of 

light that the quantum well layer is adapted to generate to allow light generated by the 

quantum well layer to photon tunnel to the medium.

32 





An LED, comprising: 

a base substrate; and 

an emitter layer on a surface of the substrate configured to emit light in an emission half angle, 

wherein the emitter layer has a shaped portion comprising: 

an emitter area; 

an exit area a height from the emitter area; 

sidewalls running from the emitter area to the exit area, wherein each of the sidewalls comprises 

a plurality of areas at different angles relative to the emitter area and wherein each sidewall is 

positioned and shaped to cause at least a majority of rays having a straight transmission path from 

the emitter area to that sidewall to reflect to the exit area with an angle of incidence at the exit area 

at less than or equal to a critical angle at an emitter layer to substrate boundary; and 

wherein the size of the exit area and shapes of the sidewalls are configured so that at least 60% 

of the light generated in the emitter layer exits the emitter layer into the substrate in the emission 

half angle.

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