2012 - Apacer

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1. General Description PCI-Express SSD AP-PxxxxXXX-XXX Apacer’s mPDM (mini PCIe Disk Module) SSD offers a breakthrough in non-volatile memory storage. Formed as a mini PCI-Express card, this mPDM can fit in various types of embedded platforms, such as workstation, thin computing devices and high-end heavy duty servers where spaces are concerned. Though in mini form factor, Apacer mPDM delivers ideal data read/write performance that easily surpasses its SATA counterparts. The controller unit of our mPDM is designed to support synchronous interface for enhanced transfer rate. Apacer mPDM provides one-lane PCI-Express 2.0 host interface, and is compatible with 5.0 Gbps maximum transfer rate. Regarding flash management design, the central controlling unit of this PCI- Express SSD is built with on-chip ECC engine and wear-leveling mechanism for endurance. For optimal operation, mPDM supports AHCI (Advanced Host Controller Interface) and NVMHCI (Non-volatile Memory Host Controller Interface), which makes it an ideal storage device for heavy duty and high end embedded applications. With the low-latency nature and advanced interface compatibility, the mPDM can be the ideal industrial drive as it cuts boot time. Regarding operating conditions, PCI-Express SSD is built to work at 3.3 Volts, with +/- 5% deviance, and under the ideal ambient temperature at the range between 0 ~ 70°C. 1.1 Host Interface Features The controller unit of this mPDM is designed to support synchronous flash interface for ideal performance. Regarding host system interface, it supports AHCI and NVMHCI for optimal operations. 1.1.1 AHCI Programming Interface The controller unit of our mPDM supports AHCI (Advanced Host Controller Interface) standard programming interface. Introduced and defined by Intel, AHCI outlines a system memory structure that serves as the framework for hardware designers to establish the data flow between host system’s memory and attached storage devices. 1.1.2 NVMHCI Our mPDM supports NVMHCI (Non-volatile Memory Host Controller Interface) which defines the uniform interface for host controller and software programming. NVMHCI is established to optimize interface communications between attached NAND-based memory devices and host system cache. Through standardization, NVMHCI removes the compatibility boundaries so that an operating system only has to work with one particular device driver for proper operations, saving the time for testing multiple possible candidates. 1.2 Wear Leveling The mPDM is designed with on-chip wear leveling for endurance support. It is generally understood that NAND flash devices are limited by a certain number of write cycles. When using a file system, frequent file table updates is mandatory. If some area on the flash wears out faster than others, it would significantly reduce the lifetime of the whole device, even if the erase counts of others are far from the write cycle limit. Thus, if the write cycles can be distributed evenly across the media, the lifetime of the media can be prolonged significantly. The scheme is achieved both via buffer management and the onchip wear leveling to ensure that the lifetime of the flash media can be increased, and the disk access performance is optimized as well. 3 © 2012 Apacer Technology Inc. Rev. 1.0
1.3 ECC PCI-Express SSD AP-PxxxxXXX-XXX ECC (Error Correction Codes) plays a critical role in terms of data integrity and block management. Errors may be generated from NAND flash blocks from time to time and thus, a detection and correction mechanism is necessary. The mPDM is built with enhanced onboard ECC engine capable of correcting up to 8 bit per 512 which is 32 bit per 2K. 4 © 2012 Apacer Technology Inc. Rev. 1.0
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2012 - Apacer

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