"Real World" Problems in the Analog and Mixed Signal Domains
"Real World" Problems in the Analog and Mixed Signal Domains
"Real World" Problems in the Analog and Mixed Signal Domains
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A Verification Nightmare<br />
• Individual components can be wrong<br />
• Individual components can be f<strong>in</strong>e but assumptions<br />
between components can be wrong<br />
• Most of <strong>the</strong>se issues are not visible if we assume<br />
“correct <strong>in</strong>itialization” i.e. we start simulation from a<br />
locked state, as we do for most parametric<br />
simulation<br />
• It takes a very (very, very, …) long time to simulate,<br />
us<strong>in</strong>g sufficiently accurate models, from any<br />
arbitrary <strong>in</strong>itial state to reach lock<br />
• Bugs like <strong>the</strong>se make it through to production<br />
DCC 08<br />
Slide 29<br />
Novel th<strong>in</strong>k<strong>in</strong>g for analog verification<br />
• <strong>Analog</strong> verification is an<br />
underdeveloped field<br />
• We’ve been look<strong>in</strong>g at a number of<br />
<strong>in</strong>terest<strong>in</strong>g ideas that h<strong>in</strong>t at some<br />
promis<strong>in</strong>g directions of research<br />
• We’ll present one example<br />
DCC 08<br />
Slide 30
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