Integrated Flash Controller: The New-Generation Enhanced Local ...

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IFC NOR flash IFC_AD[0:15] IFC_ADDR[16:24] IFC_AVD IFC_OE# IFC_WE# IFC_CS# TM IFC_AD[0:15] IFC_ADDR[16:23] latch latch_addr[0:15] 14 DQ[15:0] A[24:1] OE# WE# CE# Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc.
IP_CLK AVD CS_B ADDR WE_B AD Address Phase Data Phase TM NOR Write Cycle 1 2 3 4 5 6 7 8 9 10 Address LSB Address MSB Data 15 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc.
Page 1 and 2: August 2012 TM Freescale, the Frees
Page 3 and 4: Role of IFC After the power is turn
Page 5 and 6: • MPC8xx Memory Controller (1995)
Page 7 and 8: Machine Features IFC eLBC NAND Flas
Page 9 and 10: • Currently two versions of IFC:
Page 11 and 12: TM 11 Freescale, the Freescale logo
Page 13: IFC NOR flash IFC_AD[0:7] IFC_AD[8:
Page 17 and 18: • IFC_ADDR[24] must be left out f
Page 19 and 20: • Support x8/x16 NAND devices •
Page 21 and 22: • Different vendors might have sl
Page 23 and 24: Setting to 1 triggers the operation
Page 25 and 26: ONFi AC Timing Parameter IFC contro
Page 27 and 28: • NAND controller is selected as
Page 29 and 30: TM Bit reversing 29 Freescale, the
Page 31 and 32: • GPCM supports 2 modes: − Norm
Page 33 and 34: ALE timing controlled by FTIM0_CSn
Page 35 and 36: • A simple interface useful for t
Page 37 and 38: TM 37 Write Freescale, the Freescal

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