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International <strong>Journal</strong> of<br />
High<br />
Performance<br />
Systems<br />
Architecture
Scope of the <strong>Journal</strong><br />
IJHPSA proposes and fosters discussion on all aspects of the design and<br />
implementation of high-performance architectures, which are centred around the<br />
concept of parallel process<strong>in</strong>g. The journal will cover all types of advanced<br />
architectures rang<strong>in</strong>g from pipel<strong>in</strong>ed structures, array processors and multiprocessor<br />
systems. Dedicated high-performance architectures and systems, as well as<br />
hardware and software design methods and tools, will also fall with<strong>in</strong> the scope of<br />
IJHPSA.<br />
Subject coverage:<br />
Suitable topics <strong>in</strong>clude, but are not limited to:<br />
• Pipel<strong>in</strong><strong>in</strong>g<br />
• Pipel<strong>in</strong>ed architectures<br />
• Vectorisation methods<br />
• Vector process<strong>in</strong>g<br />
• Dynamic pipel<strong>in</strong>es<br />
• Pipel<strong>in</strong>e cha<strong>in</strong><strong>in</strong>g<br />
• Array Processors<br />
• Interconnections network topologies, such<br />
as systolic, mesh, cube, etc.<br />
• Parallel algorithms for array processors<br />
• Associative array processors<br />
• Mask<strong>in</strong>g and rout<strong>in</strong>g mechanisms<br />
• Multiprocessor Systems<br />
• Multiprocessor architectures<br />
• Tightly and loosely-coupled multiprocessors<br />
• Interconnection networks<br />
• Parallel memory organisation and multicache<br />
• Multiprocess<strong>in</strong>g control<br />
• RISC Architectures<br />
• Instruction set<br />
• Pipel<strong>in</strong>ed RISC architectures<br />
• Data Flow Systems<br />
• Data-driven comput<strong>in</strong>g<br />
• Data flow architectures<br />
• VLSI Architectures<br />
• VLSI comput<strong>in</strong>g structures<br />
• Dedicated VLSI architectures<br />
• Performance evaluation and new trends<br />
International <strong>Journal</strong> of<br />
High<br />
Performance<br />
Systems<br />
Architecture<br />
www.<strong>in</strong>derscience.com/ijhpsa<br />
visit<br />
www.<strong>in</strong>derscience.com
Members of the Editorial Board<br />
Editor-<strong>in</strong>-Chief<br />
Dr. Nadia Nedjah<br />
State University of Rio de Janeiro,<br />
Brazil<br />
Editorial Board<br />
Dr. Nader Bagherzadeh<br />
University of California, Irv<strong>in</strong>e,<br />
USA<br />
Dr. Moreshwar R Bhujade<br />
Indian Institute of Technology,<br />
India<br />
Dr. Felipe M. G. França<br />
Universidade Federal do Rio de Janeiro,<br />
Brazil<br />
Dr. Fabrizio Gagliardi<br />
Microsoft Corporation,<br />
Switzerland<br />
Lech Jozwiak<br />
E<strong>in</strong>dhoven University of Technology,<br />
The Netherlands<br />
Dr. Paul H. J. Kelly<br />
Imperial College London,<br />
UK<br />
Dr. Antonio C. Mesquita<br />
Universidade Federal do Rio de Janeiro,<br />
Brazil<br />
Dr. Alberto Prieto<br />
Universidad de Granada,<br />
Spa<strong>in</strong><br />
Dr. Stanislav G. Sedukh<strong>in</strong><br />
The University of Aizu,<br />
Japan<br />
Dr. Arnaud Tisserand<br />
IRISA-ENSAT,<br />
France<br />
Dr. Pedro Trancoso<br />
University of Cyprus,<br />
Cyprus<br />
Prof. Mateo Valero<br />
Universidad Politecnica de Catalunya,<br />
Spa<strong>in</strong><br />
Prof. Cheng-Zhong Xu<br />
Wayne State University,<br />
USA<br />
Dr. Mei Yang<br />
University of Nevada, Las Vegas,<br />
USA<br />
Dr. Jurij Silc<br />
Jozef Stefan Institute,<br />
Slovenia<br />
^<br />
^<br />
^<br />
^<br />
Dr. Luiza de Macedo Mourelle<br />
State University of Rio de Janeiro,<br />
Brazil<br />
Philippe Navaux<br />
Federal University of Rio Grande do Sul (UFRGS),<br />
Brazil<br />
visit<br />
www.<strong>in</strong>derscience.com
Methods of payment<br />
Content of Inaugural<br />
Issue of IJHPSA<br />
VOL. 1(1), 2007<br />
High Performance Systems Architecture-<br />
Editorial<br />
Nadia Nedjah and Luiza de Macedo Mourelle<br />
Dynamic Branch Prediction and Control<br />
Speculation<br />
Jurij Silc, Theo Ungerer and Borut Robic<br />
^<br />
High-Performance Hardware Operators for<br />
Polynomial Evaluation<br />
Arnaud Tisserand<br />
Chip Multiprocessor Based on Data-Driven<br />
Multithread<strong>in</strong>g Model<br />
Kyriakos Stavrou, Paraskevas Evripidou and<br />
Pedro Trancoso<br />
An Array Processor for the Algebraic Path<br />
Problem<br />
S. Sedukh<strong>in</strong>, T. Miyazaki, A. Zekri and<br />
K. Kuroda<br />
Two Models of Parallel ACO Algorithms for<br />
the M<strong>in</strong>imum Tardy Task Problem<br />
E. Alba, G. Leguizamon and G. Ordóñez<br />
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F<strong>in</strong>e Gra<strong>in</strong> Pipel<strong>in</strong>e Systems -- a Design<br />
Strategy for High Performance Real-Time<br />
Image Process<strong>in</strong>g Devices<br />
J.Díaz, E. Ros, A. Prieto and F. Pelayo.<br />
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GOSMA: A Grid Operat<strong>in</strong>g System for<br />
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