Interfaces, channels and ports
Interfaces, channels and ports
Interfaces, channels and ports
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Some considerations on clock<br />
• Clocks are commonly used when modelling low-level hardware<br />
where clocked logic design currently dominates<br />
• Clocks add many events, <strong>and</strong> much resulting simulation activity is<br />
required to update those events -> clocks can slow down simulation<br />
significantly<br />
• SystemC provides a built-in hierarchical channel called sc_clock
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