A Hardware Implementation of the Soft Output Viterbi Algorithm for ...

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Serially Concatenated Convolutional Codes • SCCC Encoder »Two differing convolutional codes are serially concatenated before transmission •Separated by an interleaver •Most previous concatenation schemes involved a convolutional code and a Reed Solomon code 18
Serially Concatenated Convolutional Codes • SCCC Decoder »Two soft-input soft-output (SISO) convolutional decoders operate on the received sequence •Separated by an interleaver and de-interleaver •Multiple iterations before final output (e.g. 10) 19
Page 1 and 2: A Hardware Implementation of the So
Page 3 and 4: Introduction 3
Page 5 and 6: Motivation • There is a need for
Page 7 and 8: • Class of linear forward error c
Page 9 and 10: Convolutional Codes • A convoluti
Page 11 and 12: • Each stage in the trellis corre
Page 13 and 14: • Convolutional Codes • Channel
Page 15 and 16: Channel Models - BSC • Binary sym
Page 17: • Convolutional Codes • Channel
Page 21 and 22: Decoding Convolutional Codes 21
Page 23 and 24: Viterbi Algorithm - Forward Pass
Page 25 and 26: Soft Output Viterbi Algorithm • E
Page 27 and 28: Soft Output Viterbi Algorithm - Exa
Page 35 and 36: Hardware Implementation • Designe
Page 37 and 38: Hardware Implementation • Metric
Page 39 and 40: Hardware Implementation • Reliabi
Page 41 and 42: Performance Results 41
Page 43 and 44: Performance Results - Software Comp
Page 45 and 46: Performance Results - Software Comp
Page 47 and 48: Conclusions and Future Work 47
Page 49 and 50: Future Work • New method of overf

A Hardware Implementation of the Soft Output Viterbi Algorithm for ...

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