semaphores, classic problems

October 8, 2001
• Processes and concurrent programming
– Synchronization and communication
– Semaphores
– Basic problems
• Producer/consumer
• Bounded buffer
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Peterson’s algorithm
• Use both turn and critical section flags
bool c1 = true;
bool c2 = true;
int turn;
cobegin
while(true) {
c1 = false;
turn = 1;
while(!c2 && turn = 1); // busy wait
critical_section_1;
c1 = true;
program_1;
} | ...
coend
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Multi-process mutual exclusion
• n processes, numbered 0...n-1
• Bakery algorithm: when entering the critical
section
– Take a number and wait
– Can’t guarantee that numbers are distinct
• Process with lowest process-id goes first
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Bakery algorithm
bool choosing[n]; // initially false
int number[n]; // initially 0
cobegin
/* process i */
while(true) {
choosing[i] = true;
number[i] = max(number[0], ..., number[n]) + 1;
choosing[i] = false;
for(j = 0; j != i; j++) {
while(choosing[j]); // busy wait
while(number[j] && number[j]

Problems with these algorithms
• Solutions are complex and awkward
• Too much time spent in the busy wait
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Semaphores (Dijkstra 1965)
• Slightly more abstract primitives
• A semaphore is a non-negative integer variable
with two atomic operations:
– Passeren (wait): P(s) decrements s by 1 if possible,
otherwise it waits until s becomes positive, then
decrements it.
– Verhogen (signal): V(s) increments s by one.
• The operations are atomic: no other process is
allowed to access the semaphore during a P or V
operation, unless the P operation is blocked.
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Mutual-exclusion with semaphores
• Semaphore s = new Semaphore();
V(s);
...
P(s);
critical section;
V(s);
...
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

The producer/consumer problem
Producer
Buffer
Consumer
Semaphore s = new Semaphore();
cobegin
/* Producer */
while(true) {
produce;
V(s);
} |
/* Consumer */
while(true) {
P(s);
consume;
}
coend
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

The bounded-buffer problem (Dijkstra 1968)
• A producer produces data and adds it to a buffer.
• A consumer consumes data from the buffer.
• The buffer contains room for n values.
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

The bounded-buffer algorithm
Semaphore e(n); // number of empty buffers
Semaphore f(0); // number of full buffers
Semaphore b(1); // critical section
cobegin
while(true) {
produce;
P(e); P(b);
add to buffer;
V(b); V(f);
} |
while(true) {
P(f); P(b);
take from buffer;
V(b); V(e);
consume;
}
coend
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Implementing semaphores
• Most CPUs have an atomic test-and-set
instruction
int ts(int *x) { int y = *x; *x = 1; return y; }
• This is used to implement a binary semaphore
• void Pb(sb) { while(ts(&sb)); }
• void Vb(sb) { sb = 0; }
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Exchange instruction
XCHG—Exchange Register/Memory with Register
INSTRUCTION SET REFERENCE
Opcode Instruction Description
87 /r XCHG r32,r/m32 Exchange doubleword from r/m32 with
Description
This instruction exchanges the contents of the destination (first) and source (second) operands.
The operands can be two general-purpose registers or a register and a memory location. If a
memory operand is referenced, the processor’s locking protocol is automatically implemented
for the duration of the exchange operation, regardless of the presence or absence of the LOCK
prefix or of the value of the IOPL. Refer to the LOCK prefix description in this chapter for more
information on the locking protocol.
This instruction is useful for implementing semaphores or similar data structures for process
synchronization. Refer to Section 7.1.2., Bus Locking in Chapter 7, Multiple-Processor
Management of the Intel Architecture Software Developer’s Manual, Volume 3, for more information
on bus locking.
The XCHG instruction can also be used instead of the BSWAP instruction for 16-bit operands.
Operation
TEMP ← DEST
DEST ← SRC
SRC ← TEMP
Flags Affected
None.
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001

Normal semaphores
struct Semaphore {
int count;
BinarySemaphore mutex, delay;
}
P(Semaphore &s) {
disable interrupts;
Pb(s.mutex);
s.count--;
if(s.count < 0) {
Vb(s.mutex);
Pb(s.delay);
}
Vb(s.mutex);
enable interrupts;
}
V(Semaphore &s) {
disable interrupts;
Pb(s.mutex);
s.count++;
if(s.count

Problems with semaphores
• Still too low-level
• Semaphore operations are scattered through
code
• P and V are used in pairs: how do you know
which pairs match?
Computing Systems
http://www.cs.caltech.edu/cs134/cs134a October 10, 2001