Compal Confidential - ROM.by
Compal Confidential - ROM.by
Compal Confidential - ROM.by
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A<br />
B<br />
C<br />
D<br />
E<br />
ZZZ<br />
PCB<br />
Part Number = DAZ0FQ00100<br />
ZZZ<br />
1 1<br />
64M512@<br />
X76244BOL01<br />
Part Number = X76244BOL01<br />
ZZZ<br />
64M1G@<br />
<strong>Compal</strong> <strong>Confidential</strong><br />
X76244BOL03<br />
Part Number = X76244BOL03<br />
ZZZ<br />
128M1G@<br />
X76244BOL05<br />
Part Number = X76244BOL05<br />
ZZZ<br />
128M2G@<br />
2 2<br />
X76244BOL06<br />
Part Number = X76244BOL06<br />
PEW76 Schematics Document<br />
AMD Danube<br />
Champlain Processor with RS880M/SB820/Madison VGA<br />
2010-06-07<br />
3 3<br />
LA5911P REV: 1.0<br />
www.mycomp.su<br />
4 4<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 1 of<br />
55<br />
C<br />
D<br />
E
A<br />
<strong>Compal</strong> <strong>Confidential</strong><br />
Model Name : NEW75/85/95<br />
B<br />
1 1<br />
2 2<br />
LED<br />
page 40<br />
3 3<br />
RTC CKT.<br />
page 26<br />
LID SW / MEDIA/B<br />
page 39<br />
Power On/Off CKT.<br />
page 41<br />
MINI Card 1<br />
WLAN<br />
page 36<br />
GPP1<br />
LVDS<br />
CRT<br />
page 24<br />
page 26<br />
HDMI Conn.<br />
page 25<br />
Fan Control<br />
VRAM 1GB<br />
64M16 x 8<br />
DDR3<br />
ATI M97<br />
Madisan/Park<br />
uFCBGA-962<br />
page 19, 20<br />
Page 14,15,16,17,18,21,22<br />
LAN(GbE)<br />
Broadcom<br />
BCM57780<br />
GPP0<br />
page 44<br />
Extend Card/B<br />
1. USB X2<br />
2. Cardreader<br />
JM385<br />
page 34<br />
RJ45<br />
page 35<br />
PCI-Express x 16<br />
Gen2<br />
Danube<br />
AMD S1G4 Processor<br />
Touch Pad<br />
EC I/O Buffer<br />
uPGA-638 Package<br />
Champlain<br />
Hyper Transport Link<br />
16 x 16<br />
page 39<br />
page 38<br />
ATI RS880M<br />
uFCBGA-528<br />
A link Express2<br />
Gen1<br />
C<br />
page 4,5,6,7<br />
page 10,11,12,13<br />
ATI SB820M<br />
uFCBGA-605<br />
page 27,28,29,30,31<br />
LPC BUS<br />
ENE KB926<br />
page 38<br />
Int.KBD<br />
BIOS<br />
3.3V 48MHz<br />
page 39<br />
page 39<br />
USB<br />
conn<br />
X 3<br />
3.3V 24.576MHz/48Mhz<br />
S-ATA<br />
USB port 0,1,2<br />
SATA HDD<br />
Conn.<br />
page 36,37 page 27 page 37 page 36<br />
page 32<br />
port 0<br />
CMOS<br />
Camera<br />
CD<strong>ROM</strong><br />
Conn.<br />
page 32<br />
port 1<br />
D<br />
Memory BUS(DDR3)<br />
204pin DDRIII-SO-DIMM X2<br />
Dual Channel BANK 0, 1, 2, 3 page 8,9<br />
1.5V DDRIII 800~1333MHz<br />
Thermal Sensor<br />
ADM1032<br />
Bluetooth<br />
Conn<br />
<br />
USB<br />
HD Audio<br />
www.mycomp.su<br />
Gen2<br />
Clock Generator<br />
ICS9LPRS488<br />
page 6 page 23<br />
Mini<br />
card<br />
(WL)X1<br />
USB port 5 USB port 12 USB port 8<br />
HDA Codec<br />
ALC272X<br />
page 42<br />
Audio AMP<br />
page 43<br />
Phone Jack x2<br />
page 43<br />
page 36<br />
3G/GPS<br />
WWAN<br />
<br />
USB port 9<br />
E<br />
page 36<br />
Card<br />
Reader<br />
USB port 6<br />
DC/DC Interface CKT.<br />
page 45<br />
4 4<br />
Power Circuit<br />
page 46,47,48,49,50,51<br />
52,53,54<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2009/10/06<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 2 of<br />
55<br />
C<br />
D<br />
E
5<br />
4<br />
3<br />
2<br />
1<br />
AMD<br />
D<br />
VGA<br />
ATI<br />
Madison/Park<br />
D<br />
C<br />
B<br />
A_SODIMM<br />
B_SODIMM<br />
MEM_MA_CLK1_P/N<br />
MEM_MA_CLK7_P/N<br />
1066MHz<br />
MEM_MB_CLK1_P/N<br />
MEM_MB_CLK7_P/N<br />
1066MHz<br />
AMD<br />
S1G4<br />
CPU SOCKET<br />
GPP_CLK3P<br />
WLAN<br />
Mini PCI Socket<br />
100MHz<br />
CPU_HT_CLKP/N<br />
200MHz<br />
GbE LAN<br />
Broadcom<br />
B57780<br />
GPP_CLK1P/N<br />
100MHz<br />
AMD<br />
VGA_CLKP/N<br />
100MHz<br />
SB<br />
SB820M<br />
Internal CLK GEN<br />
32.768KHz<br />
25MHz<br />
CLK_SBSRC_BCLK/#<br />
100MHz<br />
NB_DISP_CLKP/N<br />
100MHz<br />
NB_HT_CLKP/N<br />
100MHz<br />
www.mycomp.su<br />
AMD<br />
NB<br />
RS880M<br />
C<br />
B<br />
A<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
<strong>Compal</strong> Electronics, Inc.<br />
Issued Date<br />
2005/10/10 Title<br />
Deciphered Date 2010/03/12<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
Custom<br />
401827 D<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 3 of<br />
55<br />
3<br />
2<br />
1
A<br />
B<br />
C<br />
D<br />
E<br />
Voltage Rails<br />
STATE<br />
Full ON<br />
SIGNAL<br />
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock<br />
HIGH HIGH HIGH HIGH ON ON ON ON<br />
Power Plane<br />
Description<br />
S1 S3 S5<br />
S1(Power On Suspend)<br />
LOW<br />
HIGH<br />
HIGH<br />
HIGH<br />
ON<br />
ON<br />
ON<br />
LOW<br />
VIN<br />
Adapter power supply (19V)<br />
N/A N/A N/A<br />
B+<br />
AC or battery power rail for power circuit. N/A N/A N/A<br />
+CPU_CORE_0 Core voltage for CPU (0.7-1.2V)<br />
ON OFF OFF<br />
+CPU_CORE_1 Core voltage for CPU (0.7-1.2V) ON OFF OFF<br />
+CPU_CORE_NB Voltage for On-die Northbridge of CPU(0.8-1.1V)ON OFF OFF<br />
+0.9V<br />
0.9V switched power rail for DDR terminator ON ON OFF<br />
+1.1VS<br />
1.1V switched power rail for NB VDDC & VGA ON OFF OFF<br />
+1.2V_HT 1.2V switched power rail ON OFF OFF<br />
+VGA_CORE<br />
0.95-1.2V switched power rail<br />
ON OFF OFF<br />
+1.5VS<br />
1.5V power rail for PCIE Card<br />
ON OFF OFF<br />
+1.8V<br />
1.8V power rail for CPU VDDIO and DDR ON ON OFF<br />
+1.8VS<br />
1.8V switched power rail<br />
ON OFF OFF<br />
+2.5VS<br />
2.5V for CPU_VDDA<br />
ON OFF OFF<br />
+3VALW<br />
3.3V always on power rail<br />
ON ON ON*<br />
+3V_LAN 3.3V power rail for LAN ON ON ON<br />
S3 (Suspend to RAM)<br />
S4 (Suspend to Disk)<br />
1 1<br />
+3VS<br />
+5VALW<br />
+5VS<br />
3.3V switched power rail<br />
5V always on power rail<br />
5V switched power rail<br />
+VSB VSB always on power rail ON ON ON*<br />
+RTCVCC<br />
RTC power<br />
ON ON ON<br />
S5 (Soft OFF)<br />
LOW LOW LOW LOW<br />
2 2<br />
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.<br />
External PCI Devices<br />
Device IDSEL# REQ#/GNT# Interrupts<br />
EC SM Bus1 address<br />
SB820<br />
SM Bus 0 address<br />
Device<br />
Clock Generator<br />
(SILEGO SLG8SP626)<br />
DDR DIMM1<br />
DDR DIMM2<br />
Mini card<br />
Address<br />
1101 001Xb<br />
1001 000Xb<br />
1001 010Xb<br />
ON<br />
ON<br />
ON<br />
OFF<br />
ON<br />
OFF<br />
OFF<br />
ON*<br />
OFF<br />
EC SM Bus2 address<br />
SB820<br />
SM Bus 1 address<br />
4 4<br />
LOW<br />
LOW<br />
LOW<br />
LOW<br />
HIGH<br />
LOW<br />
HIGH<br />
HIGH<br />
Board ID / SKU ID Table for AD channel<br />
Vcc 3.3V +/- 5%<br />
Ra/Rc/Re 100K +/- 5%<br />
Board ID<br />
Rb / Rd / Rf VAD_BID min VAD_BID<br />
typ VAD_BID max<br />
0<br />
0<br />
0 V<br />
0 V 0 V<br />
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V<br />
2<br />
3<br />
4<br />
18K +/- 5%<br />
33K +/- 5%<br />
56K +/- 5%<br />
0.436 V<br />
0.712 V<br />
1.036 V<br />
0.503 V<br />
0.819 V<br />
1.185 V<br />
0.538 V<br />
0.875 V<br />
1.264 V<br />
5 100K +/- 5% 1.453 V 1.650 V 1.759 V<br />
6<br />
7<br />
200K +/- 5%<br />
NC<br />
1.935 V<br />
2.500 V<br />
2.200 V<br />
3.300 V<br />
2.341 V<br />
3.300 V<br />
BOARD ID Table<br />
Board ID<br />
0<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
PCB Revision<br />
ON<br />
ON<br />
ON<br />
ON<br />
OFF<br />
OFF<br />
OFF<br />
OFF<br />
OFF<br />
OFF<br />
OFF<br />
OFF<br />
BTO Option Table<br />
BTO Item<br />
BOM Structure<br />
3 3<br />
Device<br />
Address HEX<br />
Device<br />
Address HEX<br />
0<br />
NEW75/85/95<br />
Smart Battery 0001 011X b 16H<br />
ADI ADM1032 (CPU) 1001 100X b 98H<br />
1<br />
PEW76/86/96<br />
GMT G781-1 (GPU) 1001 101X b 9AH<br />
2<br />
PEW56<br />
SB-Temp Sensor<br />
98H<br />
HEX<br />
D2<br />
90<br />
94<br />
Device<br />
Address<br />
BOM Config<br />
Project ID Table<br />
Board ID<br />
3<br />
4<br />
5<br />
6<br />
7<br />
EXT CLKGEN<br />
INT CLKGEN<br />
No USB Patch<br />
Capilano w/ USB patch<br />
Add USB patch<br />
--For SSID define<br />
--For TSI thermal math<br />
PCB Revision<br />
www.mycomp.su<br />
PowerXpress SKU(Madison): 3G@/BT@/UMA@/ VGA@/SG@/EXT@/EXTPW@/VB@/MAD@<br />
PowerXpress SKU(Park): 3G@/BT@/UMA@/ VGA@/SG@/EXT@/EXTPW@/VB@/PARK@<br />
DIS ONLY:(Park) 3G@/BT@/DISO@/ VGA@/EXT@/EXTPW@/PARK@<br />
UMA only SKU: 3G@/BT@/UMA@/ UMAO@/EXT@/VB@<br />
PowerXpress SKU(Madison):3G@/BT@/UMA@/VGA@/SG@/INT@/VB@/MAD@<br />
PowerXpress SKU(Park): 3G@/BT@/UMA@/VGA@/SG@/INT@/VB@/PARK@<br />
DIS ONLY(PARK): 3G@/BT@/DISO@/VGA@/INT@/PARK@<br />
UMA only SKU: 3G@/BT@/UMA@/UMAO@/INT@/VB@<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 4 of<br />
55<br />
C<br />
D<br />
E
5<br />
4<br />
3<br />
2<br />
1<br />
BATTERY<br />
12.6V<br />
AC ADAPTOR<br />
19V 90W<br />
BATT+<br />
VIN<br />
PU5<br />
CHARGER<br />
ISL6261AHAZ-T<br />
PU15<br />
ISL6265IRZ-T<br />
+CPU_CORE<br />
+CPU_CORE_NB<br />
PU16<br />
APL5508-25DC<br />
+2.5VS<br />
PU12<br />
APL5915<br />
+1.05VS<br />
+CPU_CORE<br />
+CPU_CORE_NB<br />
+1.05VS<br />
+1.1VS<br />
AMD CPU S1G4<br />
0.7~1.3V VDD CORE 36A<br />
0.8~1.2V VDDNB 4A<br />
2.5V VDDA 250mA<br />
1.5V VDDIO 3A<br />
1.05V VDDR 1.5A<br />
1.1V VLDT 1.5A<br />
D<br />
B+<br />
PU7<br />
RT8209BGQW<br />
+1.5V<br />
+1.5V<br />
RAM DDRIII SODIMMX2<br />
1.5V VDD_MEM 4A<br />
0.75V VTT_MEM 0.5A<br />
+0.75VS<br />
PU10<br />
APL5913<br />
D<br />
NorthBridge AMD RS880M<br />
C<br />
B<br />
+INVPWR_B+<br />
LCD panel<br />
15.6"<br />
B+ 300mA<br />
+3.3 350mA<br />
FAN Control<br />
APL5607<br />
PU8<br />
RT8209BGQW<br />
PU6<br />
RT8209BGQW<br />
PU17<br />
APW7138NITRL<br />
PU4<br />
SN0806081 RHBR<br />
+NB_CORE<br />
+1.1VALW<br />
+GPU_CORE<br />
+3VALW<br />
+5VALW<br />
PU19<br />
TSP51117RGYR<br />
+VDDCI<br />
+1.8VS<br />
PU14<br />
PU11<br />
APL5913<br />
MP2121DQ<br />
+1.8VSP2<br />
+1.8VSP1<br />
U34<br />
SI4800BDY +5VS<br />
PU10<br />
APL5913<br />
+1.5V<br />
+1VSG<br />
U37<br />
SI1800BDY<br />
+3VS<br />
U35<br />
SI4800BDY<br />
+1.5VS<br />
+1.1VALW<br />
+1.5VS<br />
www.mycomp.su<br />
+1.1VALW<br />
+1.1VS<br />
U36<br />
SI4800BDY<br />
+1.1VS<br />
Delay<br />
+3VS_DELAY<br />
1.0~1.1V<br />
1.1V_S0<br />
1.8V_S0<br />
3.3V_S0<br />
No Use<br />
VGA ATI Madison / Park<br />
0.85~1.1V<br />
1.0V<br />
1.5V<br />
1.8V<br />
3.3V<br />
SouthBridge AMD SB820M<br />
1.1V_S0<br />
1.1V_S5<br />
VDDC 1.0V-1.1V 7.6A<br />
VDDHTRX+HT 0.68A<br />
VDDPCIE 1.1A<br />
VDDHTTX 0.68A<br />
PLLs 0.23A<br />
VDDA18 0.64A<br />
VDDG18 0.005A<br />
VDDLT18 0.22A<br />
PLLs 0.1A<br />
VDDG33 0.06A<br />
AVDD 0.125A<br />
VDDLT33 0A<br />
VDD18_MEM 1.8V 0.005A<br />
VDD_MEM 1.8V 0.23A<br />
VDDC 29 A<br />
VDDCI 4 A<br />
PCIE_VDDC 2 A<br />
DP[F:A]_VDD10 230 mA<br />
DPLL_VDDC 125 mA<br />
SPV10 100 mA<br />
VDDR1 TBD A<br />
PCIE_PVDD 40 mA<br />
PCIE_VDDR 400 mA<br />
TSVDD 5 mA<br />
VDDR4 TBD mA<br />
VDD_CT 17 mA<br />
DP[F:A]_PVDD 20 mA<br />
DP[F:A]_VDD18 330 mA<br />
AVDD 70 mA<br />
VDD1DI 45 mA<br />
A2VDDQ 1.5 mA<br />
VDD2DI 50 mA<br />
DPLL_PVDD 75 mA<br />
MPV18 150 mA<br />
SPV18 50 mA<br />
VDDR3 60 mA<br />
A2VDD 130 mA<br />
VDDCR_11 1.1V 0.5A<br />
VDDAN_11_PCIE 1A<br />
VDDAN_11_SATA 0.8A<br />
VDDAN_11_CLK 0.4A<br />
VDDCR_11_S 113mA<br />
VDDAN_11_USB_S 200mA<br />
VDDCR_11_USB_S 197mA<br />
VDDPL_11_SYS_S<br />
VRAM 1GB<br />
64Mx16 (K4B1G1646E) * 8<br />
1.5V 2.4 A<br />
C<br />
B<br />
+5VS 500mA<br />
3.3V_S0<br />
VDDIO_33_PCIGP 0.020A<br />
VDDPL_33_PCIE 0.030A<br />
VDDPL_33_SATA 0.020A<br />
VDDPL_33_SYS<br />
U25/U40<br />
TPS2061DRG4 +USB_VCCA<br />
+USB_VCCB<br />
+3VALW<br />
3.3V_S5<br />
VDDIO_33_S<br />
VDDPL_33_USB_S<br />
VDDAN_33_USB_S 0.2A<br />
VDDAN_33_S<br />
VDDXL_33_S<br />
VDDIO_AZ_S<br />
A<br />
USB X3<br />
+5V<br />
Dual+1<br />
2.5A<br />
Audio AMP<br />
TPA6017A2<br />
+5V 25mA<br />
SATA<br />
+5V 3A<br />
+3.3V<br />
Audio Codec<br />
ALC272<br />
+5V 45mA<br />
+3.3VS 25mA<br />
Realtek<br />
RTS5159<br />
+3.3VS 300mA<br />
EC<br />
ENE KB926<br />
+3.3VALW 30mA<br />
+3.3VS 3mA<br />
LAN<br />
Atheros AR8114<br />
+3.3VALW 201mA<br />
ICS9LPRS488B<br />
+3.3V 400mA<br />
+1.1V<br />
Mini Card<br />
+1.5VS 500mA<br />
+3.3VS 1A<br />
+3.3VALW 330mA<br />
RTC<br />
Bettary<br />
No Use<br />
2.5~3.6V<br />
BAT<br />
VDDCR_11_GBE_S<br />
VDDRF_GBE_S<br />
VDDIO_33_GBE_S<br />
VDDIO_GBE_S<br />
VDDIO_18_FC<br />
VDDBT_RTC_G<br />
A<br />
5<br />
4<br />
3<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
<strong>Compal</strong> Electronics, Inc.<br />
Issued Date<br />
2009/3/8 Title<br />
Deciphered Date 2010/03/12<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
401827 D<br />
Custom<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Tuesday, September 14, 2010<br />
Date: Sheet of<br />
5 55<br />
2<br />
1
A<br />
B<br />
C<br />
D<br />
E<br />
1 1<br />
H_CADIP[0..15]<br />
H_CADIN[0..15]<br />
H_CADIP[0..15]<br />
H_CADIN[0..15]<br />
+1.1VS<br />
TBD<br />
JCPU1A<br />
+1.1VS<br />
H_CADOP[0..15]<br />
H_CADON[0..15]<br />
C7<br />
H_CADOP[0..15] <br />
H_CADON[0..15] <br />
+1.1VS<br />
250 mil<br />
2<br />
C1<br />
10U_0805_10V4Z<br />
1<br />
2<br />
C2<br />
10U_0805_10V4Z<br />
1<br />
VLDT CAP.<br />
1<br />
1<br />
1<br />
C3<br />
0.22U_0603_16V4Z<br />
C4<br />
0.22U_0603_16V4Z<br />
C5<br />
180P_0402_50V8J<br />
2<br />
2<br />
2<br />
Near CPU Socket<br />
1<br />
C6<br />
180P_0402_50V8J<br />
2<br />
2 2<br />
D1<br />
VLDT_A0<br />
HT LINK VLDT_B0<br />
AE2<br />
2 1<br />
D2<br />
VLDT_A1<br />
VLDT_B1<br />
AE3<br />
D3<br />
10U_0805_10V4Z<br />
VLDT_A2<br />
VLDT_B2<br />
AE4<br />
D4<br />
VLDT_A3<br />
VLDT_B3<br />
AE5<br />
H_CADIP0 E3<br />
H_CADOP0<br />
H_CADIN0<br />
L0_CADIN_H0 L0_CADOUT_H0<br />
AD1<br />
E2<br />
H_CADON0<br />
H_CADIP1<br />
L0_CADIN_L0 L0_CADOUT_L0<br />
AC1<br />
E1<br />
H_CADOP1<br />
H_CADIN1<br />
L0_CADIN_H1 L0_CADOUT_H1<br />
AC2<br />
F1<br />
H_CADON1<br />
H_CADIP2<br />
L0_CADIN_L1 L0_CADOUT_L1<br />
AC3<br />
G3<br />
H_CADOP2<br />
H_CADIN2<br />
L0_CADIN_H2 L0_CADOUT_H2<br />
AB1<br />
G2<br />
H_CADON2<br />
H_CADIP3<br />
L0_CADIN_L2 L0_CADOUT_L2<br />
AA1<br />
G1<br />
H_CADOP3<br />
H_CADIN3<br />
L0_CADIN_H3 L0_CADOUT_H3<br />
AA2<br />
H1<br />
H_CADON3<br />
H_CADIP4<br />
L0_CADIN_L3 L0_CADOUT_L3<br />
AA3<br />
J1<br />
H_CADOP4<br />
H_CADIN4<br />
L0_CADIN_H4 L0_CADOUT_H4<br />
W2<br />
K1<br />
H_CADON4<br />
H_CADIP5<br />
L0_CADIN_L4 L0_CADOUT_L4<br />
W3<br />
L3<br />
H_CADOP5<br />
H_CADIN5<br />
L0_CADIN_H5 L0_CADOUT_H5<br />
V1<br />
L2<br />
H_CADON5<br />
H_CADIP6<br />
L0_CADIN_L5 L0_CADOUT_L5<br />
U1<br />
L1<br />
H_CADOP6<br />
H_CADIN6<br />
L0_CADIN_H6 L0_CADOUT_H6<br />
U2<br />
M1<br />
H_CADON6<br />
H_CADIP7<br />
L0_CADIN_L6 L0_CADOUT_L6<br />
U3<br />
N3<br />
H_CADOP7<br />
H_CADIN7<br />
L0_CADIN_H7 L0_CADOUT_H7<br />
T1<br />
N2<br />
H_CADON7<br />
H_CADIP8<br />
L0_CADIN_L7 L0_CADOUT_L7<br />
R1<br />
E5<br />
H_CADOP8<br />
H_CADIN8<br />
L0_CADIN_H8 L0_CADOUT_H8<br />
AD4<br />
F5<br />
H_CADON8<br />
H_CADIP9<br />
L0_CADIN_L8 L0_CADOUT_L8<br />
AD3<br />
F3<br />
H_CADOP9<br />
H_CADIN9<br />
L0_CADIN_H9 L0_CADOUT_H9<br />
AD5<br />
F4<br />
H_CADON9<br />
H_CADIP10<br />
L0_CADIN_L9 L0_CADOUT_L9<br />
AC5<br />
G5<br />
H_CADOP10<br />
H_CADIN10<br />
L0_CADIN_H10 L0_CADOUT_H10<br />
AB4<br />
H5<br />
H_CADON10<br />
H_CADIP11<br />
L0_CADIN_L10 L0_CADOUT_L10<br />
AB3<br />
H3<br />
H_CADOP11<br />
H_CADIN11<br />
L0_CADIN_H11 L0_CADOUT_H11<br />
AB5<br />
H4<br />
H_CADON11<br />
H_CADIP12<br />
L0_CADIN_L11 L0_CADOUT_L11<br />
AA5<br />
K3<br />
H_CADOP12<br />
H_CADIN12<br />
L0_CADIN_H12 L0_CADOUT_H12<br />
Y5<br />
K4<br />
H_CADON12<br />
H_CADIP13<br />
L0_CADIN_L12 L0_CADOUT_L12<br />
W5<br />
L5<br />
H_CADOP13<br />
3 H_CADIN13<br />
L0_CADIN_H13 L0_CADOUT_H13<br />
V4<br />
H_CADON13<br />
3<br />
M5<br />
H_CADIP14<br />
L0_CADIN_L13 L0_CADOUT_L13<br />
V3<br />
M3<br />
H_CADOP14<br />
H_CADIN14<br />
L0_CADIN_H14 L0_CADOUT_H14<br />
V5<br />
M4<br />
H_CADON14<br />
H_CADIP15<br />
L0_CADIN_L14 L0_CADOUT_L14<br />
U5<br />
N5<br />
H_CADOP15<br />
H_CADIN15<br />
L0_CADIN_H15 L0_CADOUT_H15<br />
T4<br />
P5<br />
H_CADON15<br />
L0_CADIN_L15 L0_CADOUT_L15<br />
T3<br />
H_CLKIP0<br />
J3<br />
L0_CLKIN_H0 L0_CLKOUT_H0<br />
Y1<br />
H_CLKOP0 <br />
H_CLKIN0<br />
J2<br />
L0_CLKIN_L0 L0_CLKOUT_L0<br />
W1<br />
H_CLKON0 <br />
H_CLKIP1<br />
J5<br />
L0_CLKIN_H1 L0_CLKOUT_H1<br />
Y4<br />
H_CLKOP1 <br />
H_CLKIN1<br />
K5<br />
L0_CLKIN_L1 L0_CLKOUT_L1<br />
Y3<br />
H_CLKON1 <br />
H_CTLIP0<br />
N1<br />
L0_CTLIN_H0 L0_CTLOUT_H0<br />
R2<br />
H_CTLOP0 <br />
H_CTLIN0<br />
P1<br />
L0_CTLIN_L0 L0_CTLOUT_L0<br />
R3<br />
H_CTLON0 <br />
H_CTLIP1<br />
P3<br />
L0_CTLIN_H1 L0_CTLOUT_H1<br />
T5<br />
H_CTLOP1 <br />
H_CTLIN1<br />
P4<br />
L0_CTLIN_L1 L0_CTLOUT_L1<br />
R5<br />
H_CTLON1 <br />
FOX_PZ6382A-284S-41F_Champlian<br />
CONN@<br />
www.mycomp.su<br />
4 4<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 6 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
Processor DDR3 Memory Interface<br />
JCPU1C<br />
DDRB_SDQ[63..0]<br />
MEM:DATA<br />
DDRA_SDQ[63..0] <br />
DDRB_SDQ0<br />
C11<br />
DDRA_SDQ0<br />
1 +1.5V<br />
DDRB_SDQ1<br />
MB_DATA0<br />
MA_DATA0<br />
G12<br />
1<br />
A11<br />
DDRA_SDQ1<br />
DDRB_SDQ2<br />
MB_DATA1<br />
MA_DATA1<br />
F12<br />
A14<br />
DDRA_SDQ2<br />
DDRB_SDQ3<br />
MB_DATA2<br />
MA_DATA2<br />
H14<br />
B14<br />
DDRA_SDQ3<br />
DDRB_SDQ4<br />
MB_DATA3<br />
MA_DATA3<br />
G14<br />
G11<br />
DDRA_SDQ4<br />
R1<br />
DDRB_SDQ5<br />
MB_DATA4<br />
MA_DATA4<br />
H11<br />
E11<br />
DDRA_SDQ5<br />
1K_0402_1%<br />
DDRB_SDQ6<br />
MB_DATA5<br />
MA_DATA5<br />
H12<br />
D12<br />
DDRA_SDQ6<br />
DDRB_SDQ7<br />
MB_DATA6<br />
MA_DATA6<br />
C13<br />
A13<br />
DDRA_SDQ7<br />
DDRB_SDQ8<br />
MB_DATA7<br />
MA_DATA7<br />
E13<br />
A15<br />
DDRA_SDQ8<br />
MEM_VREF<br />
DDRB_SDQ9<br />
MB_DATA8<br />
MA_DATA8<br />
H15<br />
A16<br />
DDRA_SDQ9<br />
DDRB_SDQ10<br />
MB_DATA9<br />
MA_DATA9<br />
E15<br />
A19<br />
DDRA_SDQ10<br />
DDRB_SDQ11<br />
MB_DATA10<br />
MA_DATA10<br />
E17<br />
1<br />
1<br />
A20<br />
DDRA_SDQ11<br />
R2<br />
DDRB_SDQ12<br />
MB_DATA11<br />
MA_DATA11<br />
H17<br />
C14<br />
DDRA_SDQ12<br />
1K_0402_1%<br />
DDRB_SDQ13<br />
MB_DATA12<br />
MA_DATA12<br />
E14<br />
D14<br />
DDRA_SDQ13<br />
DDRB_SDQ14<br />
MB_DATA13<br />
MA_DATA13<br />
F14<br />
C18<br />
DDRA_SDQ14<br />
2<br />
DDRB_SDQ15<br />
MB_DATA14<br />
MA_DATA14<br />
C17<br />
2<br />
D18<br />
DDRA_SDQ15<br />
DDRB_SDQ16<br />
MB_DATA15<br />
MA_DATA15<br />
G17<br />
D20<br />
DDRA_SDQ16<br />
DDRB_SDQ17<br />
MB_DATA16<br />
MA_DATA16<br />
G18<br />
A21<br />
DDRA_SDQ17<br />
DDRB_SDQ18<br />
MB_DATA17<br />
MA_DATA17<br />
C19<br />
D24<br />
DDRA_SDQ18<br />
DDRB_SDQ19<br />
MB_DATA18<br />
MA_DATA18<br />
D22<br />
C25<br />
DDRA_SDQ19<br />
DDRB_SDQ20<br />
MB_DATA19<br />
MA_DATA19<br />
E20<br />
B20<br />
DDRA_SDQ20<br />
DDRB_SDQ21<br />
MB_DATA20<br />
MA_DATA20<br />
E18<br />
C20<br />
DDRA_SDQ21<br />
DDRB_SDQ22<br />
MB_DATA21<br />
MA_DATA21<br />
F18<br />
B24<br />
DDRA_SDQ22<br />
DDRB_SDQ23<br />
MB_DATA22<br />
MA_DATA22<br />
B22<br />
C24<br />
DDRA_SDQ23<br />
DDRB_SDQ24<br />
MB_DATA23<br />
MA_DATA23<br />
C23<br />
E23<br />
DDRA_SDQ24<br />
DDRB_SDQ25<br />
MB_DATA24<br />
MA_DATA24<br />
F20<br />
E24<br />
DDRA_SDQ25<br />
DDRB_SDQ26<br />
MB_DATA25<br />
MA_DATA25<br />
F22<br />
G25<br />
DDRA_SDQ26<br />
DDRB_SDQ27<br />
MB_DATA26<br />
MA_DATA26<br />
H24<br />
G26<br />
DDRA_SDQ27<br />
DDRB_SDQ28<br />
MB_DATA27<br />
MA_DATA27<br />
J19<br />
C26<br />
DDRA_SDQ28<br />
DDRB_SDQ29<br />
MB_DATA28<br />
MA_DATA28<br />
E21<br />
D26<br />
DDRA_SDQ29<br />
DDRB_SDQ30<br />
MB_DATA29<br />
MA_DATA29<br />
E22<br />
G23<br />
DDRA_SDQ30<br />
+1.5V<br />
+CPU_VDDR<br />
+CPU_VDDR<br />
DDRB_SDQ31<br />
MB_DATA30<br />
MA_DATA30<br />
H20<br />
G24<br />
DDRA_SDQ31<br />
JCPU1B<br />
DDRB_SDQ32<br />
MB_DATA31<br />
MA_DATA31<br />
H22<br />
AA24<br />
DDRA_SDQ32<br />
2 DDRB_SDQ33<br />
MB_DATA32<br />
MA_DATA32<br />
Y24<br />
Place them<br />
DDRA_SDQ33<br />
2<br />
1.5A<br />
VDDR: DDR3 under 1033MHz<br />
AA23<br />
DDRB_SDQ34<br />
MB_DATA33<br />
MA_DATA33<br />
AB24<br />
close to CPU<br />
D10<br />
DDRA_SDQ34<br />
VDDR1<br />
set to 0.9V to save power<br />
MEM:CMD/CTRL/CLK<br />
VDDR5<br />
W10<br />
AD24<br />
DDRB_SDQ35<br />
MB_DATA34<br />
MA_DATA34<br />
AB22<br />
R368<br />
DDRA_SDQ35<br />
within 1"<br />
C10<br />
VDDR2<br />
VDDR6<br />
AC10<br />
AE24<br />
DDRB_SDQ36<br />
MB_DATA35<br />
MA_DATA35<br />
AA21<br />
B10<br />
DDRA_SDQ36<br />
VDDR3<br />
VDDR7<br />
AB10<br />
AA26<br />
DDRB_SDQ37<br />
MB_DATA36<br />
MA_DATA36<br />
W22<br />
0_0402_5%<br />
AD10<br />
DDRA_SDQ37<br />
VDDR4<br />
VDDR8<br />
AA10<br />
AA25<br />
R4<br />
39.2_0402_1%<br />
DDRB_SDQ38<br />
MB_DATA37<br />
MA_DATA37<br />
W21<br />
DDRA_SDQ38<br />
MEMZP<br />
VDDR9<br />
A10<br />
AD26<br />
DDRB_SDQ39<br />
MB_DATA38<br />
MA_DATA38<br />
Y22<br />
1 2<br />
AF10<br />
DDRA_SDQ39<br />
MEMZN<br />
MEMZP<br />
AE25<br />
AE10<br />
VTT_SENSE<br />
DDRB_SDQ40<br />
DDRA_SDQ40<br />
MEMZN<br />
VDDR_SENSE<br />
Y10<br />
MB_DATA39<br />
MA_DATA39<br />
AA22<br />
1 2<br />
PAD<br />
T1<br />
AC22<br />
R5<br />
39.2_0402_1%<br />
DDRB_SDQ41<br />
MB_DATA40<br />
MA_DATA40<br />
Y20<br />
2<br />
AD22<br />
DDRA_SDQ41<br />
C588<br />
MEM_MA_RST#<br />
MEM_VREF<br />
DDRB_SDQ42<br />
MB_DATA41<br />
MA_DATA41<br />
AA20<br />
DDRA_SDQ42<br />
MEM_MA_RST#<br />
H16<br />
MA_RESET_L<br />
MEMVREF<br />
W17<br />
AE20<br />
DDRB_SDQ43<br />
MB_DATA42<br />
MA_DATA42<br />
AA18<br />
AF20<br />
DDRA_SDQ43<br />
10U_0805_10V4Z<br />
DDRA_ODT0<br />
MEM_MB_RST#<br />
DDRB_SDQ44<br />
MB_DATA43<br />
MA_DATA43<br />
AB18<br />
DDRA_SDQ44<br />
DDRA_ODT0<br />
T19<br />
DDRA_ODT1<br />
MA0_ODT0 MB_RESET_L<br />
B18<br />
MEM_MB_RST# <br />
@ 1 AF24<br />
DDRB_SDQ45<br />
MB_DATA44<br />
MA_DATA44<br />
AB21<br />
DDRA_SDQ45<br />
DDRA_ODT1<br />
V22<br />
MA0_ODT1<br />
AF23<br />
DDRB_ODT0<br />
DDRB_SDQ46<br />
MB_DATA45<br />
MA_DATA45<br />
AD21<br />
U21<br />
DDRA_SDQ46<br />
MA1_ODT0<br />
MB0_ODT0<br />
W26<br />
DDRB_ODT0 <br />
AC20<br />
DDRB_ODT1<br />
DDRB_SDQ47<br />
MB_DATA46<br />
MA_DATA46<br />
AD19<br />
V19<br />
DDRA_SDQ47<br />
MA1_ODT1<br />
MB0_ODT1<br />
W23<br />
DDRB_ODT1 <br />
AD20<br />
DDRB_SDQ48<br />
MB_DATA47<br />
MA_DATA47<br />
Y18<br />
DDRA_SDQ48<br />
DDRA_SCS0#<br />
MB1_ODT0<br />
Y26<br />
AD18<br />
DDRB_SDQ49<br />
MB_DATA48<br />
MA_DATA48<br />
AD17<br />
DDRA_SDQ49<br />
DDRA_SCS0#<br />
T20<br />
DDRA_SCS1#<br />
MA0_CS_L0<br />
AE18<br />
DDRB_SCS0#<br />
DDRB_SDQ50<br />
MB_DATA49<br />
MA_DATA49<br />
W16<br />
DDRA_SDQ50<br />
DDRA_SCS1#<br />
U19<br />
MA0_CS_L1<br />
MB0_CS_L0<br />
V26<br />
DDRB_SCS0# <br />
AC14<br />
DDRB_SCS1#<br />
DDRB_SDQ51<br />
MB_DATA50<br />
MA_DATA50<br />
W14<br />
U20<br />
DDRA_SDQ51<br />
MA1_CS_L0<br />
MB0_CS_L1<br />
W25<br />
DDRB_SCS1# <br />
AD14<br />
V20<br />
DDRB_SDQ52<br />
MB_DATA51<br />
MA_DATA51<br />
Y14<br />
DDRA_SDQ52<br />
MA1_CS_L1<br />
MB1_CS_L0<br />
U22<br />
AF19<br />
DDRB_SDQ53<br />
MB_DATA52<br />
MA_DATA52<br />
Y17<br />
AC18<br />
DDRA_SDQ53<br />
DDRA_CKE0<br />
DDRB_CKE0<br />
DDRB_SDQ54<br />
MB_DATA53<br />
MA_DATA53<br />
AB17<br />
DDRA_SDQ54<br />
DDRA_CKE0<br />
J22<br />
DDRB_CKE0 <br />
DDRA_CKE1<br />
MA_CKE0<br />
MB_CKE0<br />
J25<br />
AF16<br />
DDRB_CKE1<br />
DDRB_SDQ55<br />
MB_DATA54<br />
MA_DATA54<br />
AB15<br />
DDRA_SDQ55<br />
DDRA_CKE1<br />
J20<br />
MA_CKE1<br />
MB_CKE1<br />
H26<br />
DDRB_CKE1 <br />
AF15<br />
DDRB_SDQ56<br />
MB_DATA55<br />
MA_DATA55<br />
AD15<br />
AF13<br />
DDRA_SDQ56<br />
DDRA_CLK0<br />
DDRB_CLK0<br />
DDRB_SDQ57<br />
MB_DATA56<br />
MA_DATA56<br />
AB13<br />
DDRA_SDQ57<br />
DDRA_CLK0<br />
N19<br />
DDRB_CLK0 <br />
DDRA_CLK0#<br />
MA_CLK_H5<br />
MB_CLK_H5<br />
P22<br />
AC12<br />
DDRB_CLK0#<br />
DDRB_SDQ58<br />
MB_DATA57<br />
MA_DATA57<br />
AD13<br />
DDRA_SDQ58<br />
DDRA_CLK0#<br />
N20<br />
MA_CLK_L5<br />
MB_CLK_L5<br />
R22<br />
DDRB_CLK0# <br />
AB11<br />
E16<br />
DDRB_SDQ59<br />
MB_DATA58<br />
MA_DATA58<br />
Y12<br />
DDRA_SDQ59<br />
MA_CLK_H1<br />
MB_CLK_H1<br />
A17<br />
Y11<br />
F16<br />
DDRB_SDQ60<br />
MB_DATA59<br />
MA_DATA59<br />
W11<br />
DDRA_SDQ60<br />
MA_CLK_L1<br />
MB_CLK_L1<br />
A18<br />
AE14<br />
Y16<br />
DDRB_SDQ61<br />
MB_DATA60<br />
MA_DATA60<br />
AB14<br />
DDRA_SDQ61<br />
MA_CLK_H7<br />
MB_CLK_H7<br />
AF18<br />
AF14<br />
AA16<br />
DDRB_SDQ62<br />
MB_DATA61<br />
MA_DATA61<br />
AA14<br />
DDRA_SDQ62<br />
DDRA_CLK1<br />
MA_CLK_L7<br />
MB_CLK_L7<br />
AF17<br />
AF11<br />
DDRB_CLK1<br />
DDRB_SDQ63<br />
MB_DATA62<br />
MA_DATA62<br />
AB12<br />
DDRA_SDQ63<br />
DDRA_CLK1<br />
P19<br />
DDRB_CLK1 <br />
DDRA_CLK1#<br />
MA_CLK_H4<br />
MB_CLK_H4<br />
R26<br />
AD11<br />
DDRB_CLK1#<br />
MB_DATA63<br />
MA_DATA63<br />
AA12<br />
3 DDRA_CLK1#<br />
P20<br />
MA_CLK_L4<br />
MB_CLK_L4<br />
R25<br />
DDRB_CLK1# DDRB_SDM[7..0]<br />
DDRA_SDM[7..0] <br />
DDRB_SDM0<br />
DDRA_SDM0<br />
3<br />
DDRA_SMA[15..0]<br />
DDRB_SMA[15..0] <br />
A12<br />
DDRA_SMA0<br />
N21<br />
DDRB_SMA0<br />
DDRB_SDM1<br />
MB_DM0<br />
MA_DM0<br />
E12<br />
DDRA_SDM1<br />
DDRA_SMA1<br />
MA_ADD0<br />
MB_ADD0<br />
P24<br />
B16<br />
M20<br />
DDRB_SMA1<br />
DDRB_SDM2<br />
MB_DM1<br />
MA_DM1<br />
C15<br />
DDRA_SDM2<br />
DDRA_SMA2<br />
MA_ADD1<br />
MB_ADD1<br />
N24<br />
A22<br />
N22<br />
DDRB_SMA2<br />
DDRB_SDM3<br />
MB_DM2<br />
MA_DM2<br />
E19<br />
DDRA_SDM3<br />
DDRA_SMA3<br />
MA_ADD2<br />
MB_ADD2<br />
P26<br />
E25<br />
M19<br />
DDRB_SMA3<br />
DDRB_SDM4<br />
MB_DM3<br />
MA_DM3<br />
F24<br />
DDRA_SDM4<br />
DDRA_SMA4<br />
MA_ADD3<br />
MB_ADD3<br />
N23<br />
AB26<br />
M22<br />
DDRB_SMA4<br />
DDRB_SDM5<br />
MB_DM4<br />
MA_DM4<br />
AC24<br />
DDRA_SDM5<br />
DDRA_SMA5<br />
MA_ADD4<br />
MB_ADD4<br />
N26<br />
AE22<br />
L20<br />
DDRB_SMA5<br />
DDRB_SDM6<br />
MB_DM5<br />
MA_DM5<br />
Y19<br />
DDRA_SDM6<br />
DDRA_SMA6<br />
MA_ADD5<br />
MB_ADD5<br />
L23<br />
AC16<br />
M24<br />
DDRB_SMA6<br />
DDRB_SDM7<br />
MB_DM6<br />
MA_DM6<br />
AB16<br />
DDRA_SDM7<br />
DDRA_SMA7<br />
MA_ADD6<br />
MB_ADD6<br />
N25<br />
AD12<br />
L21<br />
DDRB_SMA7<br />
MB_DM7<br />
MA_DM7<br />
Y13<br />
DDRA_SMA8<br />
MA_ADD7<br />
MB_ADD7<br />
L24<br />
L19<br />
DDRB_SMA8<br />
DDRB_SDQS0<br />
DDRA_SDQS0<br />
DDRB_SDQS0<br />
DDRA_SDQS0 <br />
DDRA_SMA9<br />
MA_ADD8<br />
MB_ADD8<br />
M26<br />
C12<br />
K22<br />
DDRB_SMA9<br />
DDRB_SDQS0#<br />
MB_DQS_H0<br />
MA_DQS_H0<br />
G13<br />
DDRA_SDQS0#<br />
DDRB_SDQS0#<br />
DDRA_SDQS0# <br />
DDRA_SMA10<br />
MA_ADD9<br />
MB_ADD9<br />
K26<br />
B12<br />
R21<br />
DDRB_SMA10<br />
DDRB_SDQS1<br />
MB_DQS_L0<br />
MA_DQS_L0<br />
H13<br />
DDRA_SDQS1<br />
DDRB_SDQS1<br />
DDRA_SDQS1 <br />
DDRA_SMA11<br />
MA_ADD10<br />
MB_ADD10<br />
T26<br />
D16<br />
L22<br />
DDRB_SMA11<br />
DDRB_SDQS1#<br />
MB_DQS_H1<br />
MA_DQS_H1<br />
G16<br />
DDRA_SDQS1#<br />
DDRB_SDQS1#<br />
DDRA_SDQS1# <br />
DDRA_SMA12<br />
MA_ADD11<br />
MB_ADD11<br />
L26<br />
C16<br />
K20<br />
DDRB_SMA12<br />
DDRB_SDQS2<br />
MB_DQS_L1<br />
MA_DQS_L1<br />
G15<br />
DDRA_SDQS2<br />
DDRB_SDQS2<br />
DDRA_SDQS2 <br />
DDRA_SMA13<br />
MA_ADD12<br />
MB_ADD12<br />
L25<br />
A24<br />
V24<br />
DDRB_SMA13<br />
DDRB_SDQS2#<br />
MB_DQS_H2<br />
MA_DQS_H2<br />
C22<br />
DDRA_SDQS2#<br />
DDRB_SDQS2#<br />
DDRA_SDQS2# <br />
DDRA_SMA14<br />
MA_ADD13<br />
MB_ADD13<br />
W24<br />
A23<br />
K24<br />
DDRB_SMA14<br />
DDRB_SDQS3<br />
MB_DQS_L2<br />
MA_DQS_L2<br />
C21<br />
DDRA_SDQS3<br />
DDRB_SDQS3<br />
DDRA_SDQS3 <br />
DDRA_SMA15<br />
MA_ADD14<br />
MB_ADD14<br />
J23<br />
F26<br />
K19<br />
DDRB_SMA15<br />
DDRB_SDQS3#<br />
MB_DQS_H3<br />
MA_DQS_H3<br />
G22<br />
DDRA_SDQS3#<br />
MA_ADD15<br />
MB_ADD15<br />
J24<br />
DDRB_SDQS3#<br />
E26<br />
DDRA_SDQS3# <br />
DDRB_SDQS4<br />
MB_DQS_L3<br />
MA_DQS_L3<br />
G21<br />
DDRA_SDQS4<br />
DDRB_SDQS4<br />
AC25<br />
DDRA_SDQS4 <br />
DDRA_SBS0#<br />
DDRB_SBS0#<br />
DDRB_SDQS4#<br />
MB_DQS_H4<br />
MA_DQS_H4<br />
AD23<br />
DDRA_SDQS4#<br />
DDRA_SBS0#<br />
R20<br />
DDRB_SBS0# DDRB_SDQS4#<br />
DDRA_SDQS4# <br />
DDRA_SBS1#<br />
MA_BANK0<br />
MB_BANK0<br />
R24<br />
AC26<br />
DDRB_SBS1#<br />
DDRB_SDQS5<br />
MB_DQS_L4<br />
MA_DQS_L4<br />
AC23<br />
DDRA_SDQS5<br />
DDRA_SBS1#<br />
R23<br />
DDRB_SBS1# DDRB_SDQS5<br />
DDRA_SDQS5 <br />
DDRA_SBS2#<br />
MA_BANK1<br />
MB_BANK1<br />
U26<br />
AF21<br />
DDRB_SBS2#<br />
DDRB_SDQS5#<br />
MB_DQS_H5<br />
MA_DQS_H5<br />
AB19<br />
DDRA_SDQS5#<br />
DDRA_SBS2#<br />
J21<br />
MA_BANK2<br />
MB_BANK2<br />
J26<br />
DDRB_SBS2# DDRB_SDQS5#<br />
AF22<br />
DDRA_SDQS5# <br />
DDRB_SDQS6<br />
MB_DQS_L5<br />
MA_DQS_L5<br />
AB20<br />
DDRA_SDQS6<br />
DDRB_SDQS6<br />
AE16<br />
DDRA_SDQS6 <br />
DDRA_SRAS#<br />
DDRB_SRAS#<br />
DDRB_SDQS6#<br />
MB_DQS_H6<br />
MA_DQS_H6<br />
Y15<br />
DDRA_SDQS6#<br />
DDRA_SRAS#<br />
R19<br />
DDRB_SRAS# DDRB_SDQS6#<br />
DDRA_SDQS6# <br />
DDRA_SCAS#<br />
MA_RAS_L<br />
MB_RAS_L<br />
U25<br />
AD16<br />
DDRB_SCAS#<br />
DDRB_SDQS7<br />
MB_DQS_L6<br />
MA_DQS_L6<br />
W15<br />
DDRA_SDQS7<br />
DDRA_SCAS#<br />
T22<br />
DDRB_SCAS# DDRB_SDQS7<br />
DDRA_SDQS7 <br />
DDRA_SWE#<br />
MA_CAS_L<br />
MB_CAS_L<br />
U24<br />
AF12<br />
DDRB_SWE#<br />
DDRB_SDQS7#<br />
MB_DQS_H7<br />
MA_DQS_H7<br />
W12<br />
DDRA_SDQS7#<br />
DDRA_SWE#<br />
T24<br />
MA_WE_L<br />
MB_WE_L<br />
U23<br />
DDRB_SWE# DDRB_SDQS7#<br />
AE12<br />
MB_DQS_L7<br />
MA_DQS_L7<br />
W13<br />
DDRA_SDQS7# <br />
1 2<br />
1 2<br />
1 2<br />
C9<br />
0.01U_0402_25V7K<br />
C8<br />
1000P_0402_50V7K<br />
www.mycomp.su<br />
FOX_PZ6382A-284S-41F_Champlian<br />
CONN@<br />
FOX_PZ6382A-284S-41F_Champlian<br />
CONN@<br />
4 4<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 7 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
+2.5VS<br />
+2.5VDDA<br />
VDDA=0.25A<br />
Champlain: C1E<br />
C1E: LDT_REQ# no connect<br />
CLMC: LDT_REQ# connect to NB<br />
1<br />
FBMA-L11-201209-221LMA30T_0805 1<br />
1<br />
1<br />
LDT_RES# / MEMHOT#<br />
+ C11<br />
4.7U_0805_10V4Z<br />
C12<br />
C13<br />
C14<br />
no support in S1g4<br />
R6<br />
change to SGA00002N80<br />
150U_B_6.3VM_R40M<br />
0.22U_0603_16V4Z<br />
2<br />
2<br />
2<br />
R7<br />
10K_0402_5%<br />
2<br />
JCPU1D<br />
1K_0402_5%<br />
1 1<br />
Q1<br />
F8<br />
CPU_THERMTRIP#_R<br />
VDDA1<br />
VSS<br />
M11<br />
3 1<br />
1 2<br />
H_THERMTRIP# <br />
F9<br />
VDDA2<br />
RSVD11<br />
W18<br />
R8<br />
0_0402_5%<br />
MMBT3904_NL_SOT23-3<br />
CLK_CPU_BCLK<br />
1 2<br />
3900P_0402_50V7K<br />
CPU_CLKIN_SC_P<br />
A9<br />
CPU_SVC<br />
C16<br />
CPU_CLKIN_SC_N<br />
CLKIN_H<br />
SVC<br />
A6<br />
CPU_SVD<br />
CPU_SVC <br />
1 2<br />
A8<br />
SVD<br />
A4<br />
R9<br />
@<br />
0_0402_5%<br />
CLKIN_L<br />
CPU_SVD <br />
MAINPWON <br />
LDT_RST#<br />
B7<br />
+1.5V<br />
H_PWRGD<br />
RESET_L<br />
1 2<br />
R10<br />
A7<br />
R11<br />
300_0402_5%<br />
169_0402_1%<br />
LDT_STOP#<br />
PWROK<br />
F10<br />
CPU_THERMTRIP#_R<br />
LDTSTOP_L THERMTRIP_L<br />
AF6<br />
H_PROCHOT#<br />
T2<br />
PAD<br />
C6<br />
LDTREQ_L PROCHOT_L<br />
AC7<br />
CLK_CPU_BCLK#<br />
1 2<br />
+1.5V<br />
CPU_SIC<br />
MEMHOT_L<br />
AA8<br />
PAD<br />
T3<br />
C15<br />
3900P_0402_50V7K<br />
1 2<br />
AF4<br />
H_PROCHOT#<br />
H_PROCHOT_R# <br />
+1.5V<br />
1 2<br />
CPU_SID<br />
SIC<br />
1 2<br />
R12<br />
1K_0402_5%<br />
AF5<br />
R13<br />
0_0402_5%<br />
R14<br />
1K_0402_5%<br />
SID<br />
AE6<br />
THERMDC_CPU<br />
+1.5VS<br />
ALERT_L<br />
THERMDC<br />
W7<br />
THERMDA_CPU<br />
PROCHOT:<br />
CPU_HTREF0<br />
THERMDA<br />
W8<br />
R15 1 2<br />
44.2_0402_1%<br />
R6<br />
+1.1VS<br />
R16 1 2<br />
44.2_0402_1% CPU_HTREF1<br />
HT_REF0<br />
P6<br />
Input: For HTC Function<br />
HT_REF1<br />
Output: Over Temperature Condition<br />
R17<br />
CPU_VDD0_FB_H<br />
CPU_VDD0_FB_H F6<br />
CPU_VDD0_FB_L<br />
CPU_VDD0_FB_L<br />
VDD0_FB_H VDDIO_FB_H<br />
W9<br />
300_0402_5%<br />
E6<br />
VDD0_FB_L VDDIO_FB_L<br />
Y9<br />
CPU_VDD1_FB_H<br />
CPU_VDD1_FB_H Y6<br />
CPU_VDDNB_FB_H<br />
CPU_VDDNB_FB_H <br />
LDT_RST#<br />
CPU_VDD1_FB_L<br />
VDD1_FB_H VDDNB_FB_H<br />
H6<br />
CPU_VDDNB_FB_L<br />
LDT_RST#<br />
CPU_VDD1_FB_L<br />
AB6<br />
VDD1_FB_L VDDNB_FB_L<br />
G6<br />
CPU_VDDNB_FB_L <br />
+1.5VS<br />
1<br />
CPU_DBRDY<br />
G10<br />
C17<br />
CPU_TMS<br />
DBRDY<br />
AA9<br />
CPU_DBREQ#<br />
CPU_TCK<br />
TMS<br />
DBREQ_L<br />
E10<br />
0.01U_0402_25V4Z<br />
AC9<br />
@<br />
CPU_TRST#<br />
TCK<br />
AD9<br />
CPU_TDO<br />
2<br />
R18<br />
CPU_TDI<br />
TRST_L<br />
TDO<br />
AE9<br />
AF9<br />
TDI<br />
300_0402_5%<br />
+1.5V<br />
CPU_TEST23 AD7<br />
TEST23<br />
TEST28_H<br />
J7<br />
LDT_STOP#<br />
CPU_TEST18<br />
TEST28_L<br />
H8<br />
CPU_SVC<br />
+1.5VS LDT_STOP#<br />
H10<br />
CPU_TEST19<br />
TEST18<br />
1 2<br />
G9<br />
CPU_TEST17<br />
TEST19<br />
TEST17<br />
D7<br />
R19<br />
1K_0402_5%<br />
PAD<br />
T5<br />
1<br />
CPU_TEST16<br />
CPU_SVD<br />
CPU_TEST25H<br />
TEST16<br />
E7<br />
PAD<br />
T6<br />
1 2<br />
C18<br />
E9<br />
CPU_TEST15<br />
CPU_TEST25L<br />
TEST25_H<br />
TEST15<br />
F7<br />
R20<br />
1K_0402_5%<br />
PAD<br />
T7<br />
0.01U_0402_25V4Z<br />
E8<br />
CPU_TEST14<br />
R21<br />
TEST25_L<br />
TEST14<br />
C7<br />
PAD<br />
T8<br />
@<br />
2 2<br />
2<br />
300_0402_5%<br />
CPU_TEST21 AB8<br />
+1.5V<br />
CPU_TEST20<br />
TEST21<br />
TEST7<br />
C3<br />
AF7<br />
CPU_TEST24<br />
TEST20<br />
TEST10<br />
K8<br />
AE7<br />
CPU_TEST25H 1 2<br />
H_PWRGD<br />
CPU_TEST22<br />
TEST24<br />
R22<br />
510_0402_5%<br />
H_PWRGD<br />
AE8<br />
CPU_TEST12<br />
TEST22<br />
TEST8<br />
C4<br />
AC8<br />
CPU_TEST27<br />
TEST12<br />
1 2<br />
1<br />
AF8<br />
R23<br />
@<br />
510_0402_5%<br />
C19<br />
TEST27<br />
CPU_TEST29_H_FBCLKOUT_P<br />
+1.5V<br />
0.01U_0402_25V4Z<br />
TEST29_H<br />
C9<br />
1 2<br />
C2<br />
CPU_TEST29_L_FBCLKOUT_N<br />
TEST9<br />
TEST29_L<br />
C8<br />
2 1<br />
@<br />
R24<br />
0_0402_5% AA6<br />
R25<br />
80.6_0402_1%<br />
CPU_TEST25L<br />
2<br />
TEST6<br />
1 2<br />
R26<br />
@<br />
510_0402_5%<br />
+3VS<br />
A3<br />
RSVD1<br />
RSVD10<br />
H18<br />
1 2<br />
A5<br />
R27<br />
510_0402_5%<br />
RSVD2<br />
RSVD9<br />
H19<br />
B3<br />
RSVD3<br />
RSVD8<br />
AA7<br />
B5<br />
RSVD4<br />
RSVD7<br />
D5<br />
C1<br />
RSVD5<br />
RSVD6<br />
C5<br />
+1.5V<br />
1<br />
FOX_PZ6382A-284S-41F_Champlian<br />
CONN@<br />
C20<br />
CPU_TEST27 1 2<br />
R28<br />
1K_0402_5%<br />
2<br />
U1<br />
@<br />
1<br />
VDD SCLK 8 EC_SMB_CK2<br />
EC_SMB_CK2 <br />
0.1U_0402_16V4Z<br />
1 2<br />
1 2<br />
1 2<br />
1<br />
2<br />
L1<br />
1 2<br />
THERMDA_CPU 2<br />
D+ SDATA<br />
7 EC_SMB_DA2<br />
EC_SMB_DA2 <br />
3 3<br />
THERMDC_CPU 3<br />
CPU_TEST12<br />
D- ALERT#<br />
6<br />
1 2<br />
1 R29<br />
2<br />
1K_0402_5%<br />
4<br />
CPU_TEST18 1 2<br />
C21<br />
THERM# GND 5<br />
R30<br />
1K_0402_5%<br />
100P_0402_50V8J<br />
CPU_TEST19 1 2<br />
@<br />
ADM1032ARMZ_MSOP8<br />
R31<br />
1K_0402_5%<br />
+1.5V<br />
CPU_TEST20 1 2<br />
Address 1001 100X b<br />
R32<br />
1K_0402_5%<br />
CPU_TEST21 1 2<br />
R33<br />
1K_0402_5%<br />
CPU_TEST22 1 2<br />
R34<br />
1K_0402_5%<br />
CPU internal thermal sensor<br />
CPU_TEST24 1 2<br />
R35<br />
1K_0402_5%<br />
CPU_TEST23 1 2<br />
1 2<br />
FDV301N, the Vgs is:<br />
R265<br />
1K_0402_5%<br />
JP2<br />
min = 0.65V<br />
C22<br />
0.1U_0402_16V4Z<br />
Typ = 0.85V<br />
@<br />
@<br />
@<br />
@<br />
1 2<br />
R41<br />
R42<br />
3 4<br />
Max = 1.5V<br />
5 6<br />
CPU_DBREQ#<br />
+3VS 2 1 2 1<br />
R43<br />
CPU_DBRDY<br />
7 8<br />
1 2<br />
@<br />
0_0402_5%<br />
31.6K_0402_1%<br />
30K_0402_1%<br />
CPU_TCK<br />
9 10<br />
11 12<br />
CPU_TMS<br />
+3VS<br />
13 14<br />
CPU_TDI<br />
15 16<br />
2.09V for Gate<br />
CPU_TRST#<br />
Q2<br />
CPU_TDO<br />
17 18<br />
U2<br />
@<br />
19 20<br />
LDT_RST#<br />
CPU_SID<br />
EC_SMB_DA<br />
SB_SID<br />
21 22<br />
HDT_RST#<br />
B<br />
SB_SID T0 SB<br />
3 1<br />
1 2<br />
4<br />
R44<br />
0_0402_5%<br />
23 24<br />
Y<br />
SB_PWRGD <br />
EC_SMB_DA2<br />
26<br />
A<br />
TO EC<br />
1 2<br />
4 4<br />
BSH111 1N_SOT23-3<br />
R45<br />
0_0402_5%<br />
NC7SZ08P5X_NL_SC70-5<br />
CONN@<br />
SAMTEC_ASP-68200-07<br />
S<br />
G<br />
2<br />
D<br />
3300P_0402_50V7K<br />
www.mycomp.su<br />
1<br />
2<br />
220_0402_5% R36<br />
1<br />
2<br />
220_0402_5% R37<br />
1<br />
2<br />
220_0402_5% R38<br />
1<br />
2<br />
300_0402_5% R39<br />
1 2<br />
300_0402_5%<br />
R40<br />
5<br />
P<br />
G<br />
3<br />
1 2<br />
E<br />
+1.5V<br />
1<br />
2<br />
B<br />
2<br />
C<br />
For SCAN connect use<br />
CPU_SIC 3<br />
S<br />
G<br />
2<br />
Q3<br />
1<br />
D<br />
BSH111 1N_SOT23-3<br />
A<br />
EC_SMB_CK<br />
@<br />
1 2<br />
SB_SIC<br />
R46<br />
0_0402_5%<br />
1 2 EC_SMB_CK2<br />
R47<br />
0_0402_5%<br />
B<br />
SB_SIC <br />
T0 SB<br />
TO EC<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 8 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
VDD(+CPU_CORE) decoupling.<br />
+CPU_CORE<br />
JCPU1E<br />
AA4<br />
+CPU_CORE<br />
VSS1<br />
VSS66<br />
J6<br />
AA11<br />
VSS2<br />
VSS67<br />
J8<br />
36A<br />
AA13<br />
VSS3<br />
VSS68<br />
J10<br />
G4<br />
VDD0_1 VDD1_1<br />
P8<br />
AA15<br />
VSS4<br />
VSS69<br />
J12<br />
H2<br />
+CPU_CORE<br />
VDD0_2 VDD1_2<br />
P10<br />
AA17<br />
VSS5<br />
VSS70<br />
J14<br />
J9<br />
VDD0_3 VDD1_3<br />
R4<br />
AA19<br />
VSS6<br />
VSS71<br />
J16<br />
J11<br />
VDD0_4 VDD1_4<br />
R7<br />
AB2<br />
VSS7<br />
VSS72<br />
J18<br />
J13<br />
VDD0_5 VDD1_5<br />
R9<br />
AB7<br />
VSS8<br />
VSS73<br />
K2<br />
J15<br />
VDD0_6 VDD1_6<br />
R11<br />
AB9<br />
VSS9<br />
VSS74<br />
K7<br />
1<br />
1<br />
1<br />
1<br />
1<br />
K6<br />
VDD0_7 VDD1_7<br />
T2<br />
AB23<br />
VSS10<br />
VSS75<br />
K9<br />
K10<br />
VDD0_8 VDD1_8<br />
T6<br />
AB25<br />
+ C23<br />
+ C24<br />
+ C25<br />
+ C26<br />
+ C27<br />
VSS11<br />
VSS76<br />
K11<br />
K12<br />
1 VDD0_9 VDD1_9<br />
T8<br />
AC11<br />
330U_X_2VM_R6M<br />
330U_X_2VM_R6M<br />
330U_X_2VM_R6M<br />
330U_X_2VM_R6M<br />
330U_X_2VM_R6M<br />
VSS12<br />
VSS77<br />
K13<br />
1<br />
K14<br />
VDD0_10 VDD1_10<br />
T10<br />
AC13<br />
@<br />
VSS13<br />
VSS78<br />
K15<br />
L4<br />
VDD0_11 VDD1_11<br />
T12<br />
AC15<br />
2<br />
2<br />
2<br />
2<br />
2<br />
VSS14<br />
VSS79<br />
K17<br />
L7<br />
VDD0_12 VDD1_12<br />
T14<br />
AC17<br />
VSS15<br />
VSS80<br />
L6<br />
L9<br />
VDD0_13 VDD1_13<br />
U7<br />
AC19<br />
VSS16<br />
VSS81<br />
L8<br />
L11<br />
Near CPU Socket<br />
VDD0_14 VDD1_14<br />
U9<br />
AC21<br />
VSS17<br />
VSS82<br />
L10<br />
L13<br />
VDD0_15 VDD1_15<br />
U11<br />
AD6<br />
VSS18<br />
VSS83<br />
L12<br />
L15<br />
VDD0_16 VDD1_16<br />
U13<br />
AD8<br />
VSS19<br />
VSS84<br />
L14<br />
M2<br />
VDD0_17 VDD1_17<br />
U15<br />
AD25<br />
VSS20<br />
VSS85<br />
L16<br />
M6<br />
VDD0_18 VDD1_18<br />
V6<br />
AE11<br />
VSS21<br />
VSS86<br />
L18<br />
M8<br />
+CPU_CORE<br />
VDD0_19 VDD1_19<br />
V8<br />
AE13<br />
VSS22<br />
VSS87<br />
M7<br />
M10<br />
+CPU_CORE<br />
VDD0_20 VDD1_20<br />
V10<br />
AE15<br />
VSS23<br />
VSS88<br />
M9<br />
N7<br />
VDD0_21 VDD1_21<br />
V12<br />
AE17<br />
VSS24<br />
VSS89<br />
AC6<br />
N9<br />
+CPU_CORE_NB<br />
VDD0_22 VDD1_22<br />
V14<br />
AE19<br />
VSS25<br />
VSS90<br />
M17<br />
N11<br />
VDD0_23 VDD1_23<br />
W4<br />
AE21<br />
VSS26<br />
VSS91<br />
N4<br />
1<br />
1<br />
1<br />
1<br />
4A<br />
VDD1_24<br />
Y2<br />
AE23<br />
C28<br />
C29<br />
C30<br />
C35<br />
VSS27<br />
VSS92<br />
N8<br />
1<br />
1<br />
1<br />
1<br />
K16<br />
VDDNB_1 VDD1_25<br />
AC4<br />
B4<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
C31<br />
C32<br />
C33<br />
C34<br />
M16<br />
+1.5V<br />
VSS28<br />
VSS93<br />
N10<br />
VDDNB_2 VDD1_26<br />
AD2<br />
B6<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
VSS29<br />
VSS94<br />
N16<br />
P16<br />
2<br />
2<br />
2<br />
2<br />
VDDNB_3<br />
TBD<br />
B8<br />
VSS30<br />
VSS95<br />
N18<br />
T16<br />
+1.5V<br />
VDDNB_4 VDDIO27<br />
Y25<br />
B9<br />
2<br />
2<br />
2<br />
2<br />
VSS31<br />
VSS96<br />
P2<br />
V16<br />
VDDNB_5 VDDIO26<br />
V25<br />
B11<br />
VSS32<br />
VSS97<br />
P7<br />
+CPU_CORE<br />
VDDIO25<br />
V23<br />
B13<br />
VSS33<br />
VSS98<br />
P9<br />
H25<br />
+CPU_CORE<br />
VDDIO1 VDDIO24<br />
V21<br />
B15<br />
VSS34<br />
VSS99<br />
P11<br />
J17<br />
VDDIO2 VDDIO23<br />
V18<br />
B17<br />
VSS35<br />
VSS100<br />
P17<br />
K18<br />
VDDIO3 VDDIO22<br />
U17<br />
B19<br />
VSS36<br />
VSS101<br />
R8<br />
K21<br />
VDDIO4 VDDIO21<br />
T25<br />
B21<br />
VSS37<br />
VSS102<br />
R10<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
K23<br />
VDDIO5 VDDIO20<br />
T23<br />
B23<br />
C36<br />
C37<br />
C38<br />
C39<br />
C41<br />
VSS38<br />
VSS103<br />
R16<br />
C40<br />
K25<br />
VDDIO6 VDDIO19<br />
T21<br />
B25<br />
0.22U_0603_16V4Z<br />
0.01U_0402_25V4Z<br />
180P_0402_50V8J<br />
0.22U_0603_16V4Z<br />
180P_0402_50V8J<br />
VSS39<br />
VSS104<br />
R18<br />
0.01U_0402_25V4Z<br />
L17<br />
VDDIO7 VDDIO18<br />
T18<br />
D6<br />
VSS40<br />
VSS105<br />
T7<br />
M18<br />
VDDIO8 VDDIO17<br />
R17<br />
D8<br />
2<br />
2<br />
2<br />
2<br />
2<br />
VSS41<br />
VSS106<br />
T9<br />
2<br />
M21<br />
VDDIO9 VDDIO16<br />
P25<br />
D9<br />
VSS42<br />
VSS107<br />
T11<br />
M23<br />
Under CPU Socket<br />
VDDIO10 VDDIO15<br />
P23<br />
D11<br />
VSS43<br />
VSS108<br />
T13<br />
M25<br />
2 VDDIO11 VDDIO14<br />
P21<br />
D13<br />
VSS44<br />
VSS109<br />
T15<br />
2<br />
N17<br />
VDDIO12 VDDIO13<br />
P18<br />
D15<br />
VSS45<br />
VSS110<br />
T17<br />
D17<br />
VSS46<br />
VSS111<br />
U4<br />
D19<br />
FOX_PZ6382A-284S-41F_Champlian<br />
VSS47<br />
VSS112<br />
U6<br />
D21<br />
Athlon 64 S1<br />
CONN@<br />
VSS48<br />
VSS113<br />
U8<br />
D23<br />
Processor Socket<br />
VSS49<br />
VSS114<br />
U10<br />
VDDIO decoupling.<br />
D25<br />
VSS50<br />
VSS115<br />
U12<br />
E4<br />
VSS51<br />
VSS116<br />
U14<br />
F2<br />
VSS52<br />
VSS117<br />
U16<br />
+CPU_CORE_NB decoupling.<br />
F11<br />
VSS53<br />
VSS118<br />
U18<br />
F13<br />
+1.5V<br />
VSS54<br />
VSS119<br />
V2<br />
F15<br />
VSS55<br />
VSS120<br />
V7<br />
F17<br />
+CPU_CORE_NB<br />
VSS56<br />
VSS121<br />
V9<br />
F19<br />
VSS57<br />
VSS122<br />
V11<br />
F21<br />
VSS58<br />
VSS123<br />
V13<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
F23<br />
C44<br />
C45<br />
C46<br />
C47<br />
C48<br />
VSS59<br />
VSS124<br />
V15<br />
C50<br />
1<br />
1<br />
1<br />
F25<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
C42<br />
C43<br />
C49<br />
VSS60<br />
VSS125<br />
V17<br />
H7<br />
0.22U_0603_16V4Z<br />
0.22U_0603_16V4Z<br />
180P_0402_50V8J<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
22U_0805_6.3V6M<br />
VSS61<br />
VSS126<br />
W6<br />
180P_0402_50V8J<br />
H9<br />
2<br />
2<br />
2<br />
2<br />
2<br />
VSS62<br />
VSS127<br />
Y21<br />
2<br />
H21<br />
2<br />
2<br />
2<br />
VSS63<br />
VSS128<br />
Y23<br />
H23<br />
VSS64<br />
VSS129<br />
N6<br />
J4<br />
VSS65<br />
FOX_PZ6382A-284S-41F_Champlian<br />
Under CPU Socket<br />
Athlon 64 S1<br />
CONN@<br />
Processor Socket<br />
+1.5V<br />
Between CPU Socket and DIMM<br />
+1.5V<br />
+CPU_VDDR<br />
Near Power Supply<br />
VDDR decoupling.<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
3 3<br />
C51<br />
C52<br />
C53<br />
C54<br />
C354<br />
C355<br />
C55<br />
0.22U_0603_16V4Z<br />
0.22U_0603_16V4Z<br />
0.22U_0603_16V4Z<br />
0.22U_0603_16V4Z<br />
0.22U_0603_16V4Z<br />
0.22U_0603_16V4Z<br />
+ C56<br />
22U_0805_6.3V6M<br />
change to SGA00002N80<br />
150U_B_6.3VM_R40M<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
1<br />
1<br />
C64<br />
C65<br />
0.01U_0402_25V4Z<br />
0.01U_0402_25V4Z<br />
2<br />
2<br />
+1.5V<br />
180PF Qt'y follow the distance between<br />
CPU socket and DIMM0. <br />
2<br />
2<br />
1<br />
C68<br />
C66<br />
C67<br />
180P_0402_50V8J<br />
1<br />
0.1U_0402_16V7K<br />
1<br />
0.1U_0402_16V7K<br />
2<br />
+CPU_VDDR<br />
www.mycomp.su<br />
1<br />
C69<br />
1<br />
180P_0402_50V8J<br />
C57<br />
4.7U_0805_10V4Z<br />
2<br />
2<br />
1<br />
C58<br />
4.7U_0805_10V4Z<br />
2<br />
1<br />
1<br />
1<br />
1<br />
1<br />
C59<br />
0.22U_0603_16V4Z<br />
C60<br />
0.22U_0603_16V4Z<br />
C61<br />
1000P_0402_50V7K<br />
C62<br />
1000P_0402_50V7K<br />
C63<br />
180P_0402_50V8J<br />
2<br />
2<br />
2<br />
2<br />
2<br />
JCPU1F<br />
1<br />
C70<br />
180P_0402_50V8J<br />
2<br />
+1.5V<br />
1<br />
1<br />
1<br />
1<br />
1<br />
+ C75<br />
C71<br />
C72<br />
C73<br />
C74<br />
330U_X_2VM_R6M<br />
4.7U_0805_10V4Z<br />
4.7U_0805_10V4Z<br />
4.7U_0805_10V4Z<br />
4.7U_0805_10V4Z<br />
2<br />
2<br />
2<br />
2<br />
2<br />
Near CPU Socket Right side.<br />
+CPU_VDDR<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
C76<br />
C77<br />
C78<br />
C79<br />
C80<br />
C81<br />
C82<br />
C83<br />
4.7U_0805_10V4Z<br />
4.7U_0805_10V4Z<br />
0.22U_0603_16V4Z<br />
0.22U_0603_16V4Z<br />
1000P_0402_50V7K<br />
1000P_0402_50V7K<br />
180P_0402_50V8J<br />
180P_0402_50V8J<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
4 4<br />
Near CPU Socket Left side.<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 9 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
+VREF_DQ<br />
+1.5V<br />
+1.5V<br />
JDIMM1<br />
1<br />
VREF_DQ VSS1<br />
2<br />
3<br />
DDRA_SDQ4<br />
DDRA_SDQ0<br />
VSS2<br />
DQ4<br />
4<br />
5<br />
DDRA_SDQ5<br />
DDRA_SDQ1<br />
DQ0<br />
DQ5<br />
6<br />
7<br />
DQ1<br />
VSS3<br />
8<br />
9<br />
DDRA_SDQS0#<br />
DDRA_SDM0<br />
VSS4<br />
DQS#0<br />
10<br />
DDRA_SDQS0# <br />
11<br />
DDRA_SDQS0<br />
DM0<br />
DQS0<br />
12<br />
DDRA_SDQS0 <br />
13<br />
DDRA_SDQ[0..63]<br />
DDRA_SDQ2<br />
VSS5<br />
VSS6<br />
14<br />
DDRA_SDQ6<br />
DDRA_SDQ[0..63] <br />
15<br />
DDRA_SDQ3<br />
DQ2<br />
DQ6<br />
16<br />
17<br />
DDRA_SDQ7<br />
DDRA_SDM[0..7]<br />
DQ3<br />
DQ7<br />
18<br />
DDRA_SDM[0..7] <br />
19<br />
1 DDRA_SDQ8<br />
VSS7<br />
VSS8<br />
20<br />
DDRA_SDQ12<br />
1<br />
21<br />
DDRA_SDQ9<br />
DQ8<br />
DQ12<br />
22<br />
23<br />
DDRA_SDQ13<br />
DQ9<br />
DQ13<br />
24<br />
25<br />
DDRA_SMA[0..15]<br />
DDRA_SMA[0..15] <br />
DDRA_SDQS1#<br />
VSS9<br />
VSS10<br />
26<br />
DDRA_SDM1<br />
DDRA_SDQS1#<br />
27<br />
DDRA_SDQS1<br />
DQS#1<br />
DM1<br />
28<br />
MEM_MA_RST#<br />
DDRA_SDQS1<br />
29<br />
DQS1 RESET#<br />
30<br />
MEM_MA_RST# <br />
31<br />
DDRA_SDQ10<br />
VSS11 VSS12<br />
32<br />
33<br />
DDRA_SDQ14<br />
DDRA_SDQ11<br />
DQ10<br />
DQ14<br />
34<br />
35<br />
DDRA_SDQ15<br />
DQ11<br />
DQ15<br />
36<br />
37<br />
DDRA_SDQ16<br />
VSS13 VSS14<br />
38<br />
39<br />
DDRA_SDQ20<br />
DDRA_SDQ17<br />
DQ16<br />
DQ20<br />
40<br />
41<br />
DDRA_SDQ21<br />
DQ17<br />
DQ21<br />
42<br />
43<br />
DDRA_SDQS2#<br />
VSS15 VSS16<br />
44<br />
DDRA_SDM2<br />
DDRA_SDQS2#<br />
45<br />
DDRA_SDQS2<br />
DQS#2<br />
DM2<br />
46<br />
DDRA_SDQS2<br />
47<br />
DQS2<br />
VSS17<br />
48<br />
49<br />
DDRA_SDQ22<br />
DDRA_SDQ18<br />
VSS18<br />
DQ22<br />
50<br />
51<br />
DDRA_SDQ23<br />
DDRA_SDQ19<br />
DQ18<br />
DQ23<br />
52<br />
53<br />
DQ19<br />
VSS19<br />
54<br />
55<br />
DDRA_SDQ28<br />
DDRA_SDQ24<br />
VSS20<br />
DQ28<br />
56<br />
57<br />
DDRA_SDQ29<br />
+VREF_CA<br />
+1.5V<br />
DDRA_SDQ25<br />
DQ24<br />
DQ29<br />
58<br />
59<br />
+VREF_DQ<br />
+1.5V<br />
DQ25<br />
VSS21<br />
60<br />
61<br />
DDRA_SDQS3#<br />
DDRA_SDQS3# <br />
DDRA_SDM3<br />
VSS22 DQS#3<br />
62<br />
63<br />
DDRA_SDQS3<br />
DM3<br />
DQS3<br />
64<br />
DDRA_SDQS3 <br />
65<br />
R310<br />
DDRA_SDQ26<br />
VSS23 VSS24<br />
66<br />
67<br />
DDRA_SDQ30<br />
R48<br />
1K_0402_1%<br />
DDRA_SDQ27<br />
DQ26<br />
DQ30<br />
68<br />
69<br />
DDRA_SDQ31<br />
1K_0402_1%<br />
DQ27<br />
DQ31<br />
70<br />
71<br />
VSS25 VSS26<br />
72<br />
+VREF_CA<br />
+VREF_DQ<br />
DDRA_CKE0<br />
DDRA_CKE1<br />
DDRA_CKE0<br />
73<br />
CKE0<br />
CKE1<br />
74<br />
DDRA_CKE1 <br />
75<br />
VDD1<br />
VDD2<br />
76<br />
1<br />
2<br />
1<br />
77<br />
DDRA_SMA15<br />
1<br />
2 1<br />
C235<br />
C680<br />
DDRA_SBS2#<br />
NC1<br />
A15<br />
78<br />
C351<br />
DDRA_SMA14<br />
DDRA_SBS2#<br />
79<br />
C84<br />
C85<br />
C10<br />
@<br />
R315<br />
BA2<br />
A14<br />
80<br />
81<br />
@<br />
R49<br />
1K_0402_1%<br />
DDRA_SMA12<br />
VDD3<br />
VDD4<br />
82<br />
DDRA_SMA11<br />
1K_0402_1%<br />
2<br />
1<br />
2<br />
83<br />
DDRA_SMA9<br />
A12/BC#<br />
A11<br />
84<br />
DDRA_SMA7<br />
2<br />
1<br />
2<br />
85<br />
A9<br />
A7<br />
86<br />
87<br />
DDRA_SMA8<br />
VDD5<br />
VDD6<br />
88<br />
89<br />
DDRA_SMA6<br />
DDRA_SMA5<br />
A8<br />
A6<br />
90<br />
91<br />
DDRA_SMA4<br />
A5<br />
A4<br />
92<br />
93<br />
DDRA_SMA3<br />
VDD7<br />
VDD8<br />
94<br />
95<br />
DDRA_SMA2<br />
DDRA_SMA1<br />
A3<br />
A2<br />
96<br />
97<br />
DDRA_SMA0<br />
A1<br />
A0<br />
98<br />
99<br />
DDRA_CLK0<br />
VDD9<br />
VDD10<br />
100<br />
DDRA_CLK1<br />
DDRA_CLK0<br />
101<br />
DDRA_CLK1 <br />
DDRA_CLK0#<br />
CK0<br />
CK1<br />
102<br />
DDRA_CLK1#<br />
DDRA_CLK0#<br />
103<br />
CK0#<br />
CK1#<br />
104<br />
DDRA_CLK1# <br />
105<br />
DDRA_SMA10<br />
VDD11 VDD12<br />
106<br />
107<br />
DDRA_SBS1#<br />
DDRA_SBS1# <br />
DDRA_SBS0#<br />
A10/AP<br />
BA1<br />
108<br />
DDRA_SRAS#<br />
DDRA_SBS0#<br />
109<br />
BA0<br />
RAS#<br />
110<br />
DDRA_SRAS# <br />
111<br />
DDRA_SWE#<br />
VDD13 VDD14<br />
112<br />
DDRA_SCS0#<br />
DDRA_SWE#<br />
113<br />
DDRA_SCS0# <br />
DDRA_SCAS#<br />
WE#<br />
S0#<br />
114<br />
DDRA_ODT0<br />
DDRA_SCAS#<br />
115<br />
CAS#<br />
ODT0<br />
116<br />
DDRA_ODT0 <br />
117<br />
DDRA_SMA13<br />
VDD15 VDD16<br />
118<br />
119<br />
DDRA_ODT1<br />
DDRA_ODT1 <br />
DDRA_SCS1#<br />
A13<br />
ODT1<br />
120<br />
DDRA_SCS1#<br />
121<br />
S1#<br />
NC2<br />
122<br />
123<br />
VDD17 VDD18<br />
124<br />
125<br />
NCTEST VREF_CA 126<br />
+VREF_CA<br />
127<br />
DDRA_SDQ32<br />
VSS27 VSS28<br />
128<br />
129<br />
DDRA_SDQ36<br />
DDRA_SDQ33<br />
DQ32<br />
DQ36<br />
130<br />
131<br />
DDRA_SDQ37<br />
DQ33<br />
DQ37<br />
132<br />
1<br />
133<br />
C89<br />
DDRA_SDQS4#<br />
VSS29 VSS30<br />
134<br />
DDRA_SDM4<br />
DDRA_SDQS4#<br />
135<br />
DDRA_SDQS4<br />
DQS#4<br />
DM4<br />
136<br />
1000P_0402_50V7K<br />
+1.5V<br />
DDRA_SDQS4<br />
137<br />
DQS4<br />
VSS31<br />
138<br />
DDRA_SDQ38<br />
2<br />
139<br />
DDRA_SDQ34<br />
VSS32<br />
DQ38<br />
140<br />
141<br />
DDRA_SDQ39<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
DDRA_SDQ35<br />
DQ34<br />
DQ39<br />
142<br />
143<br />
DQ35<br />
VSS33<br />
144<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
145<br />
DDRA_SDQ44<br />
DDRA_SDQ40<br />
VSS34<br />
DQ44<br />
146<br />
147<br />
DDRA_SDQ45<br />
C87<br />
C643<br />
C88<br />
C644<br />
C640<br />
C645<br />
C641<br />
C646<br />
C642<br />
C647<br />
DDRA_SDQ41<br />
DQ40<br />
DQ45<br />
148<br />
149<br />
DQ41<br />
VSS35<br />
150<br />
DDRA_SDQS5#<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
151<br />
DDRA_SDQS5# <br />
DDRA_SDM5<br />
VSS36 DQS#5<br />
152<br />
153<br />
DDRA_SDQS5<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
DM5<br />
DQS5<br />
154<br />
DDRA_SDQS5 <br />
155<br />
DDRA_SDQ42<br />
VSS37 VSS38<br />
156<br />
157<br />
DDRA_SDQ46<br />
DDRA_SDQ43<br />
DQ42<br />
DQ46<br />
158<br />
159<br />
DDRA_SDQ47<br />
DQ43<br />
DQ47<br />
160<br />
161<br />
DDRA_SDQ48<br />
VSS39 VSS40<br />
162<br />
163<br />
DDRA_SDQ52<br />
DDRA_SDQ49<br />
DQ48<br />
DQ52<br />
164<br />
165<br />
DDRA_SDQ53<br />
+0.75VS<br />
DQ49<br />
DQ53<br />
166<br />
167<br />
DDRA_SDQS6#<br />
VSS41 VSS42<br />
168<br />
DDRA_SDM6<br />
0.1U_0402_16V4Z<br />
DDRA_SDQS6#<br />
169<br />
DDRA_SDQS6<br />
DQS#6<br />
DM6<br />
170<br />
DDRA_SDQS6<br />
171<br />
DQS6<br />
VSS43<br />
172<br />
2<br />
2<br />
1<br />
173<br />
DDRA_SDQ54<br />
DDRA_SDQ50<br />
VSS44<br />
DQ54<br />
174<br />
175<br />
DDRA_SDQ55<br />
C664<br />
C961<br />
DDRA_SDQ51<br />
DQ50<br />
DQ55<br />
176<br />
C665<br />
177<br />
DQ51<br />
VSS45<br />
178<br />
DDRA_SDQ60<br />
1<br />
1<br />
2<br />
179<br />
DDRA_SDQ56<br />
VSS46<br />
DQ60<br />
180<br />
181<br />
DDRA_SDQ61<br />
4.7U_0603_6.3V6K<br />
Place near DIMM1<br />
DDRA_SDQ57<br />
DQ56<br />
DQ61<br />
182<br />
0.1U_0402_16V4Z<br />
183<br />
DQ57<br />
VSS47<br />
184<br />
185<br />
DDRA_SDQS7#<br />
DDRA_SDQS7# <br />
DDRA_SDM7<br />
VSS48 DQS#7<br />
186<br />
187<br />
DDRA_SDQS7<br />
DM7<br />
DQS7<br />
188<br />
DDRA_SDQS7 <br />
189<br />
DDRA_SDQ58<br />
VSS49 VSS50<br />
190<br />
191<br />
DDRA_SDQ62<br />
DDRA_SDQ59<br />
DQ58<br />
DQ62<br />
192<br />
193<br />
DDRA_SDQ63<br />
R50<br />
10K_0402_5%<br />
DQ59<br />
DQ63<br />
194<br />
195<br />
VSS51 VSS52<br />
196<br />
1 2<br />
197<br />
SA0<br />
EVENT#<br />
198<br />
PAD<br />
T9<br />
+3VS<br />
199<br />
VDDSPD SDA 200<br />
SB_SMDAT0 <br />
201<br />
SA1<br />
SCL<br />
202<br />
SB_SMCLK0 <br />
203<br />
VTT1<br />
VTT2<br />
204<br />
+0.75VS<br />
2 2<br />
3 3<br />
+3VS<br />
R51<br />
205<br />
G1<br />
G2<br />
206<br />
4 4<br />
10K_0402_5%<br />
FOX_AS0A626-U8SN-7F<br />
CONN@<br />
1<br />
2<br />
www.mycomp.su<br />
4.7U_0805_10V4Z<br />
0.01U_0402_25V7K<br />
1000P_0402_50V7K<br />
1 2<br />
1 2<br />
4.7U_0805_10V4Z<br />
0.01U_0402_25V7K<br />
1000P_0402_50V7K<br />
1 2<br />
1 2<br />
1<br />
C90<br />
2.2U_0603_6.3V4Z<br />
2<br />
1<br />
C91<br />
0.1U_0402_16V4Z<br />
2<br />
A<br />
DIMM_A STD H:8mm<br />
<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 10 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
+VREF_DQ<br />
+1.5V<br />
+1.5V<br />
JDIMM2<br />
1<br />
VREF_DQ VSS1<br />
2<br />
3<br />
DDRB_SDQ4<br />
DDRB_SDQ0<br />
VSS2<br />
DQ4<br />
4<br />
5<br />
DDRB_SDQ5<br />
DDRB_SDQ1<br />
DQ0<br />
DQ5<br />
6<br />
7<br />
DQ1<br />
VSS3<br />
8<br />
9<br />
DDRB_SDQS0#<br />
DDRB_SDM0<br />
VSS4<br />
DQS#0<br />
10<br />
DDRB_SDQS0# <br />
11<br />
DDRB_SDQS0<br />
DM0<br />
DQS0<br />
12<br />
DDRB_SDQS0 <br />
13<br />
DDRB_SDQ[0..63]<br />
DDRB_SDQ2<br />
VSS5<br />
VSS6<br />
14<br />
DDRB_SDQ6<br />
DDRB_SDQ[0..63] <br />
15<br />
DDRB_SDQ3<br />
DQ2<br />
DQ6<br />
16<br />
17<br />
DDRB_SDQ7<br />
DDRB_SDM[0..7]<br />
DQ3<br />
DQ7<br />
18<br />
DDRB_SDM[0..7] <br />
19<br />
1 DDRB_SDQ8<br />
VSS7<br />
VSS8<br />
20<br />
DDRB_SDQ12<br />
1<br />
21<br />
DDRB_SDQ9<br />
DQ8<br />
DQ12<br />
22<br />
23<br />
DDRB_SDQ13<br />
DQ9<br />
DQ13<br />
24<br />
25<br />
DDRB_SMA[0..15]<br />
DDRB_SMA[0..15] <br />
DDRB_SDQS1#<br />
VSS9<br />
VSS10<br />
26<br />
DDRB_SDM1<br />
DDRB_SDQS1#<br />
27<br />
DDRB_SDQS1<br />
DQS#1<br />
DM1<br />
28<br />
MEM_MB_RST#<br />
DDRB_SDQS1<br />
29<br />
DQS1 RESET#<br />
30<br />
MEM_MB_RST# <br />
31<br />
DDRB_SDQ10<br />
VSS11 VSS12<br />
32<br />
33<br />
DDRB_SDQ14<br />
DDRB_SDQ11<br />
DQ10<br />
DQ14<br />
34<br />
35<br />
DDRB_SDQ15<br />
DQ11<br />
DQ15<br />
36<br />
37<br />
DDRB_SDQ16<br />
VSS13 VSS14<br />
38<br />
39<br />
DDRB_SDQ20<br />
DDRB_SDQ17<br />
DQ16<br />
DQ20<br />
40<br />
41<br />
DDRB_SDQ21<br />
DQ17<br />
DQ21<br />
42<br />
43<br />
DDRB_SDQS2#<br />
VSS15 VSS16<br />
44<br />
DDRB_SDM2<br />
DDRB_SDQS2#<br />
45<br />
DDRB_SDQS2<br />
DQS#2<br />
DM2<br />
46<br />
DDRB_SDQS2<br />
47<br />
DQS2<br />
VSS17<br />
48<br />
49<br />
DDRB_SDQ22<br />
DDRB_SDQ18<br />
VSS18<br />
DQ22<br />
50<br />
51<br />
DDRB_SDQ23<br />
DDRB_SDQ19<br />
DQ18<br />
DQ23<br />
52<br />
53<br />
DQ19<br />
VSS19<br />
54<br />
55<br />
DDRB_SDQ28<br />
DDRB_SDQ24<br />
VSS20<br />
DQ28<br />
56<br />
57<br />
DDRB_SDQ29<br />
DDRB_SDQ25<br />
DQ24<br />
DQ29<br />
58<br />
59<br />
DQ25<br />
VSS21<br />
60<br />
61<br />
DDRB_SDQS3#<br />
DDRB_SDQS3# <br />
DDRB_SDM3<br />
VSS22 DQS#3<br />
62<br />
63<br />
DDRB_SDQS3<br />
DM3<br />
DQS3<br />
64<br />
DDRB_SDQS3 <br />
65<br />
DDRB_SDQ26<br />
VSS23 VSS24<br />
66<br />
67<br />
DDRB_SDQ30<br />
DDRB_SDQ27<br />
DQ26<br />
DQ30<br />
68<br />
69<br />
DDRB_SDQ31<br />
DQ27<br />
DQ31<br />
70<br />
71<br />
VSS25 VSS26<br />
72<br />
DDRB_CKE0<br />
DDRB_CKE1<br />
DDRB_CKE0<br />
73<br />
CKE0<br />
CKE1<br />
74<br />
DDRB_CKE1 <br />
75<br />
VDD1<br />
VDD2<br />
76<br />
77<br />
DDRB_SMA15<br />
DDRB_SBS2#<br />
NC1<br />
A15<br />
78<br />
DDRB_SMA14<br />
DDRB_SBS2#<br />
79<br />
BA2<br />
A14<br />
80<br />
81<br />
DDRB_SMA12<br />
VDD3<br />
VDD4<br />
82<br />
83<br />
DDRB_SMA11<br />
DDRB_SMA9<br />
A12/BC#<br />
A11<br />
84<br />
85<br />
DDRB_SMA7<br />
A9<br />
A7<br />
86<br />
87<br />
DDRB_SMA8<br />
VDD5<br />
VDD6<br />
88<br />
89<br />
DDRB_SMA6<br />
+VREF_DQ<br />
+VREF_CA<br />
DDRB_SMA5<br />
A8<br />
A6<br />
90<br />
91<br />
DDRB_SMA4<br />
A5<br />
A4<br />
92<br />
93<br />
DDRB_SMA3<br />
VDD7<br />
VDD8<br />
94<br />
95<br />
DDRB_SMA2<br />
+VREF_DQ<br />
+VREF_CA<br />
DDRB_SMA1<br />
A3<br />
A2<br />
96<br />
97<br />
DDRB_SMA0<br />
A1<br />
A0<br />
98<br />
99<br />
DDRB_CLK0<br />
VDD9<br />
VDD10<br />
100<br />
DDRB_CLK1<br />
DDRB_CLK0<br />
101<br />
DDRB_CLK0#<br />
CK0<br />
CK1<br />
102<br />
DDRB_CLK1 <br />
DDRB_CLK1#<br />
DDRB_CLK0#<br />
103<br />
CK0#<br />
CK1#<br />
104<br />
DDRB_CLK1# <br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
105<br />
C92<br />
C93<br />
C682<br />
C352<br />
C353<br />
C683<br />
DDRB_SMA10<br />
VDD11 VDD12<br />
106<br />
107<br />
DDRB_SBS1#<br />
DDRB_SBS1# <br />
DDRB_SBS0#<br />
A10/AP<br />
BA1<br />
108<br />
DDRB_SRAS#<br />
DDRB_SBS0#<br />
109<br />
BA0<br />
RAS#<br />
110<br />
DDRB_SRAS# <br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
111<br />
DDRB_SWE#<br />
VDD13 VDD14<br />
112<br />
DDRB_SCS0#<br />
DDRB_SWE#<br />
113<br />
DDRB_SCS0# <br />
DDRB_SCAS#<br />
WE#<br />
S0#<br />
114<br />
DDRB_ODT0<br />
DDRB_SCAS#<br />
115<br />
CAS#<br />
ODT0<br />
116<br />
DDRB_ODT0 <br />
117<br />
DDRB_SMA13<br />
VDD15 VDD16<br />
118<br />
119<br />
DDRB_ODT1<br />
DDRB_ODT1 <br />
DDRB_SCS1#<br />
A13<br />
ODT1<br />
120<br />
DDRB_SCS1#<br />
121<br />
S1#<br />
NC2<br />
122<br />
123<br />
VDD17 VDD18<br />
124<br />
125<br />
NCTEST VREF_CA 126<br />
+VREF_CA<br />
127<br />
DDRB_SDQ32<br />
VSS27 VSS28<br />
128<br />
129<br />
DDRB_SDQ36<br />
DDRB_SDQ33<br />
DQ32<br />
DQ36<br />
130<br />
131<br />
DDRB_SDQ37<br />
DQ33<br />
DQ37<br />
132<br />
1<br />
133<br />
C94<br />
DDRB_SDQS4#<br />
VSS29 VSS30<br />
134<br />
DDRB_SDM4<br />
1000P_0402_50V7K<br />
DDRB_SDQS4#<br />
135<br />
DDRB_SDQS4<br />
DQS#4<br />
DM4<br />
136<br />
DDRB_SDQS4<br />
137<br />
DQS4<br />
VSS31<br />
138<br />
DDRB_SDQ38<br />
2<br />
139<br />
DDRB_SDQ34<br />
VSS32<br />
DQ38<br />
140<br />
141<br />
DDRB_SDQ39<br />
DDRB_SDQ35<br />
DQ34<br />
DQ39<br />
142<br />
143<br />
DQ35<br />
VSS33<br />
144<br />
145<br />
DDRB_SDQ44<br />
DDRB_SDQ40<br />
VSS34<br />
DQ44<br />
146<br />
147<br />
DDRB_SDQ45<br />
DDRB_SDQ41<br />
DQ40<br />
DQ45<br />
148<br />
149<br />
DQ41<br />
VSS35<br />
150<br />
151<br />
DDRB_SDQS5#<br />
DDRB_SDQS5# <br />
DDRB_SDM5<br />
VSS36 DQS#5<br />
152<br />
153<br />
DDRB_SDQS5<br />
+1.5V<br />
DM5<br />
DQS5<br />
154<br />
DDRB_SDQS5 <br />
155<br />
DDRB_SDQ42<br />
VSS37 VSS38<br />
156<br />
157<br />
DDRB_SDQ46<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
DDRB_SDQ43<br />
DQ42<br />
DQ46<br />
158<br />
0.1U_0402_16V4Z<br />
159<br />
DDRB_SDQ47<br />
DQ43<br />
DQ47<br />
160<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
161<br />
DDRB_SDQ48<br />
VSS39 VSS40<br />
162<br />
163<br />
DDRB_SDQ52<br />
C670<br />
C671<br />
C667<br />
C668<br />
C673<br />
C674<br />
DDRB_SDQ49<br />
DQ48<br />
DQ52<br />
164<br />
C677<br />
C666<br />
C672<br />
C669<br />
165<br />
DDRB_SDQ53<br />
DQ49<br />
DQ53<br />
166<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
167<br />
DDRB_SDQS6#<br />
VSS41 VSS42<br />
168<br />
DDRB_SDM6<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
DDRB_SDQS6#<br />
169<br />
DDRB_SDQS6<br />
DQS#6<br />
DM6<br />
170<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
DDRB_SDQS6<br />
171<br />
DQS6<br />
VSS43<br />
172<br />
173<br />
DDRB_SDQ54<br />
DDRB_SDQ50<br />
VSS44<br />
DQ54<br />
174<br />
175<br />
DDRB_SDQ55<br />
DDRB_SDQ51<br />
DQ50<br />
DQ55<br />
176<br />
177<br />
DQ51<br />
VSS45<br />
178<br />
179<br />
DDRB_SDQ60<br />
DDRB_SDQ56<br />
VSS46<br />
DQ60<br />
180<br />
181<br />
DDRB_SDQ61<br />
+0.75VS<br />
DDRB_SDQ57<br />
DQ56<br />
DQ61<br />
182<br />
183<br />
+1.5V<br />
DQ57<br />
VSS47<br />
184<br />
185<br />
DDRB_SDQS7#<br />
DDRB_SDQS7# <br />
DDRB_SDM7<br />
VSS48 DQS#7<br />
186<br />
0.1U_0402_16V4Z<br />
187<br />
DDRB_SDQS7<br />
DM7<br />
DQS7<br />
188<br />
DDRB_SDQS7 <br />
2<br />
2<br />
1<br />
1<br />
189<br />
DDRB_SDQ58<br />
VSS49 VSS50<br />
190<br />
191<br />
DDRB_SDQ62<br />
C676<br />
DDRB_SDQ59<br />
DQ58<br />
DQ62<br />
192<br />
C675<br />
C925<br />
+ C86<br />
193<br />
DDRB_SDQ63<br />
R52<br />
10K_0402_5%<br />
DQ59<br />
DQ63<br />
194<br />
@<br />
330U_X_2VM_R6M<br />
1<br />
1<br />
2<br />
195<br />
VSS51 VSS52<br />
196<br />
1 2<br />
197<br />
0.1U_0402_16V4Z<br />
SA0<br />
EVENT#<br />
198<br />
4.7U_0603_6.3V6K<br />
2<br />
PAD<br />
T10<br />
+3VS<br />
199<br />
VDDSPD SDA 200<br />
SB_SMDAT0 <br />
201<br />
SA1<br />
SCL<br />
202<br />
SB_SMCLK0 <br />
Place near DIMM2<br />
203<br />
VTT1<br />
VTT2<br />
204<br />
+0.75VS<br />
2 2<br />
3 3<br />
R53<br />
205<br />
G1<br />
G2<br />
206<br />
4 4<br />
10K_0402_5%<br />
FOX_AS0A626-U4SN-7F<br />
CONN@<br />
1<br />
2<br />
www.mycomp.su<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
1000P_0402_50V7K<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
1000P_0402_50V7K<br />
A<br />
DIMM_B STD H:4mm<br />
<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 11 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
PCIE_GTX_C_MRX_P[0..15]<br />
PCIE_GTX_C_MRX_N[0..15]<br />
PCIE_GTX_C_MRX_P[0..15]<br />
PCIE_GTX_C_MRX_N[0..15]<br />
PCIE_MTX_C_GRX_P[0..15]<br />
PCIE_MTX_C_GRX_N[0..15]<br />
PCIE_MTX_C_GRX_P[0..15] <br />
PCIE_MTX_C_GRX_N[0..15] <br />
U3B<br />
PCIE_GTX_C_MRX_P0 D4<br />
PCIE_MTX_GRX_P0<br />
C95<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P0<br />
PCIE_GTX_C_MRX_N0<br />
GFX_RX0P<br />
GFX_TX0P<br />
A5<br />
1 2VGA@<br />
C4<br />
PCIE_MTX_GRX_N0<br />
PCIE_MTX_C_GRX_N0<br />
PCIE_GTX_C_MRX_P1<br />
GFX_RX0N<br />
PART 2 OF 6 GFX_TX0N<br />
B5<br />
C96 1 2VGA@<br />
0.1U_0402_16V7K<br />
A3<br />
PCIE_MTX_GRX_P1<br />
C97<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P1<br />
PCIE_GTX_C_MRX_N1<br />
GFX_RX1P<br />
GFX_TX1P<br />
A4<br />
1 2VGA@<br />
B3<br />
PCIE_MTX_GRX_N1<br />
C98<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N1<br />
1 PCIE_GTX_C_MRX_P2<br />
GFX_RX1N<br />
GFX_TX1N<br />
B4<br />
1 2VGA@<br />
PCIE_MTX_GRX_P2<br />
PCIE_MTX_C_GRX_P2<br />
1<br />
C2<br />
C99<br />
0.1U_0402_16V7K<br />
PCIE_GTX_C_MRX_N2<br />
GFX_RX2P<br />
GFX_TX2P<br />
C3<br />
1 2VGA@<br />
C1<br />
PCIE_MTX_GRX_N2<br />
C100<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N2<br />
PCIE_GTX_C_MRX_P3<br />
GFX_RX2N<br />
GFX_TX2N<br />
B2<br />
1 2VGA@<br />
E5<br />
PCIE_MTX_GRX_P3<br />
PCIE_MTX_C_GRX_P3<br />
PCIE_GTX_C_MRX_N3<br />
GFX_RX3P<br />
GFX_TX3P<br />
D1<br />
C101 1 2VGA@<br />
0.1U_0402_16V7K<br />
F5<br />
PCIE_MTX_GRX_N3<br />
C102<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N3<br />
PCIE_GTX_C_MRX_P4<br />
GFX_RX3N<br />
GFX_TX3N<br />
D2<br />
1 2VGA@<br />
G5<br />
PCIE_MTX_GRX_P4<br />
C103<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P4<br />
PCIE_GTX_C_MRX_N4<br />
GFX_RX4P<br />
GFX_TX4P<br />
E2<br />
1 2VGA@<br />
G6<br />
PCIE_MTX_GRX_N4<br />
C104<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N4<br />
PCIE_GTX_C_MRX_P5<br />
GFX_RX4N<br />
GFX_TX4N<br />
E1<br />
1 2VGA@<br />
H5<br />
PCIE_MTX_GRX_P5<br />
C105<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P5<br />
PCIE_GTX_C_MRX_N5<br />
GFX_RX5P<br />
GFX_TX5P<br />
F4<br />
1 2VGA@<br />
H6<br />
PCIE_MTX_GRX_N5<br />
C106<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N5<br />
PCIE_GTX_C_MRX_P6<br />
GFX_RX5N<br />
GFX_TX5N<br />
F3<br />
1 2VGA@<br />
J6<br />
PCIE_MTX_GRX_P6<br />
C107 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P6<br />
PCIE_GTX_C_MRX_N6<br />
GFX_RX6P<br />
GFX_TX6P<br />
F1<br />
J5<br />
PCIE_MTX_GRX_N6<br />
C108 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N6<br />
PCIE_GTX_C_MRX_P7<br />
GFX_RX6N<br />
GFX_TX6N<br />
F2<br />
J7<br />
PCIE_MTX_GRX_P7<br />
C109 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P7<br />
PCIE_GTX_C_MRX_N7<br />
GFX_RX7P<br />
GFX_TX7P<br />
H4<br />
J8<br />
PCIE_MTX_GRX_N7<br />
PCIE_MTX_C_GRX_N7<br />
PCIE_GTX_C_MRX_P8<br />
GFX_RX7N<br />
GFX_TX7N<br />
H3<br />
C110 1 2VGA@<br />
0.1U_0402_16V7K<br />
L5<br />
PCIE_MTX_GRX_P8<br />
C111<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P8<br />
PCIE_GTX_C_MRX_N8<br />
GFX_RX8P<br />
GFX_TX8P<br />
H1<br />
1 2VGA@<br />
L6<br />
PCIE_MTX_GRX_N8<br />
C112 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N8<br />
PCIE_GTX_C_MRX_P9<br />
GFX_RX8N<br />
GFX_TX8N<br />
H2<br />
M8<br />
PCIE_MTX_GRX_P9<br />
C113 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P9<br />
PCIE_GTX_C_MRX_N9<br />
GFX_RX9P<br />
GFX_TX9P<br />
J2<br />
L8<br />
PCIE_MTX_GRX_N9<br />
PCIE_MTX_C_GRX_N9<br />
PCIE_GTX_C_MRX_P10<br />
GFX_RX9N<br />
GFX_TX9N<br />
J1<br />
C114 1 2VGA@<br />
0.1U_0402_16V7K<br />
P7<br />
PCIE_MTX_GRX_P10<br />
PCIE_MTX_C_GRX_P10<br />
PCIE_GTX_C_MRX_N10<br />
GFX_RX10P<br />
GFX_TX10P<br />
K4<br />
C115 1 2VGA@<br />
0.1U_0402_16V7K<br />
M7<br />
PCIE_MTX_GRX_N10<br />
C116 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N10<br />
PCIE_GTX_C_MRX_P11<br />
GFX_RX10N<br />
GFX_TX10N<br />
K3<br />
P5<br />
PCIE_MTX_GRX_P11<br />
C117 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P11<br />
PCIE_GTX_C_MRX_N11<br />
GFX_RX11P<br />
GFX_TX11P<br />
K1<br />
M5<br />
PCIE_MTX_GRX_N11<br />
C118 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N11<br />
PCIE_GTX_C_MRX_P12<br />
GFX_RX11N<br />
GFX_TX11N<br />
K2<br />
R8<br />
PCIE_MTX_GRX_P12<br />
C119 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P12<br />
PCIE_GTX_C_MRX_N12<br />
GFX_RX12P<br />
GFX_TX12P<br />
M4<br />
P8<br />
PCIE_MTX_GRX_N12<br />
C120 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N12<br />
PCIE_GTX_C_MRX_P13<br />
GFX_RX12N<br />
GFX_TX12N<br />
M3<br />
R6<br />
PCIE_MTX_GRX_P13<br />
C121 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P13<br />
PCIE_GTX_C_MRX_N13<br />
GFX_RX13P<br />
GFX_TX13P<br />
M1<br />
R5<br />
PCIE_MTX_GRX_N13<br />
C122 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N13<br />
PCIE_GTX_C_MRX_P14<br />
GFX_RX13N<br />
GFX_TX13N<br />
M2<br />
P4<br />
PCIE_MTX_GRX_P14<br />
C123 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P14<br />
PCIE_GTX_C_MRX_N14<br />
GFX_RX14P<br />
GFX_TX14P<br />
N2<br />
P3<br />
PCIE_MTX_GRX_N14<br />
C124 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N14<br />
PCIE_GTX_C_MRX_P15<br />
GFX_RX14N<br />
GFX_TX14N<br />
N1<br />
T4<br />
PCIE_MTX_GRX_P15<br />
C125 1 2VGA@<br />
0.1U_0402_16V7K PCIE_MTX_C_GRX_P15<br />
PCIE_GTX_C_MRX_N15<br />
GFX_RX15P<br />
GFX_TX15P<br />
P1<br />
T3<br />
PCIE_MTX_GRX_N15<br />
C126 1 2VGA@<br />
0.1U_0402_16V7K<br />
PCIE_MTX_C_GRX_N15<br />
GFX_RX15N<br />
GFX_TX15N<br />
P2<br />
GPP0P<br />
PCIE_ITX_PRX_P0<br />
PCIE_PTX_C_IRX_P0<br />
1 2 AE3<br />
C127 1 2<br />
0.1U_0402_16V7K<br />
PCIE_ITX_C_PRX_P0 <br />
R54<br />
GPP0N<br />
PCIE_ITX_PRX_N0<br />
PCIE_PTX_C_IRX_N0<br />
1 0_0402_5%<br />
GPP_RX0P<br />
GPP_TX0P<br />
AC1<br />
2 AD4<br />
PCIE_ITX_C_PRX_N0 GLAN<br />
R55<br />
0_0402_5%<br />
GPP_RX0N<br />
GPP_TX0N<br />
AC2<br />
C128 1 2<br />
0.1U_0402_16V7K<br />
PCIE_ITX_PRX_P1<br />
2 PCIE_PTX_C_IRX_P1<br />
AE2<br />
C129<br />
0.1U_0402_16V7K<br />
GPP_RX1P<br />
GPP_TX1P<br />
AB4<br />
1 2<br />
PCIE_ITX_C_PRX_P1 <br />
PCIE_ITX_PRX_N1<br />
2<br />
PCIE_PTX_C_IRX_N1<br />
AD3<br />
GPP_RX1N<br />
GPP_TX1N<br />
AB3<br />
C130 1 2<br />
0.1U_0402_16V7K<br />
PCIE_ITX_C_PRX_N1 WLAN<br />
AD1<br />
GPP_RX2P<br />
GPP_TX2P<br />
AA2<br />
AD2<br />
PCIE_PTX_C_IRX_P0 1 @ 2 PCIE_PTX_C_IRX_P3<br />
GPP_RX2N<br />
PCIE I/F GPP GPP_TX2N<br />
AA1<br />
V5<br />
PCIE_ITX_PRX_P3<br />
PCIE_ITX_C_PRX_P0 Reserve for LAN debug<br />
PCIE_PTX_C_IRX_N0 1 R56<br />
@<br />
0_0402_5% 2 PCIE_PTX_C_IRX_N3<br />
GPP_TX3P<br />
Y1<br />
C131<br />
GPP_RX3P<br />
@1 2<br />
0.1U_0402_16V7K<br />
W6<br />
PCIE_ITX_PRX_N3<br />
C132<br />
@1 2<br />
0.1U_0402_16V7K PCIE_ITX_C_PRX_N0<br />
R57<br />
0_0402_5%<br />
GPP_RX3N<br />
GPP_TX3N<br />
Y2<br />
U5<br />
GPP_RX4P<br />
GPP_TX4P<br />
Y4<br />
R56,R57 close to R54,R55<br />
U6<br />
C131,C132 close to C127,C128<br />
H_CADOP[0..15]<br />
H_CADIP[0..15]<br />
GPP_RX4N<br />
GPP_TX4N<br />
Y3<br />
H_CADOP[0..15]<br />
H_CADIP[0..15] <br />
U8<br />
GPP_RX5P<br />
GPP_TX5P<br />
V1<br />
U7<br />
H_CADON[0..15]<br />
H_CADIN[0..15]<br />
GPP_RX5N<br />
GPP_TX5N<br />
V2<br />
H_CADON[0..15]<br />
H_CADIN[0..15] <br />
SB_RX0P<br />
SB_RX0N<br />
SB_RX1P<br />
SB_RX1N<br />
SB_RX2P<br />
SB_RX2N<br />
SB_RX3P<br />
SB_RX3N<br />
AA8<br />
SB_RX0P<br />
Y8<br />
SB_RX0N<br />
AA7<br />
SB_RX1P<br />
Y7<br />
SB_RX1N<br />
AA5<br />
SB_RX2P<br />
AA6<br />
SB_RX2N<br />
W5<br />
SB_RX3P<br />
Y5<br />
SB_RX3N<br />
PCIE I/F GFX<br />
PCIE I/F SB<br />
RS780M_FCBGA528<br />
RS880 A11(SA000032710)<br />
SB_TX0P<br />
AD7<br />
SB_TX0N<br />
AE7<br />
SB_TX1P<br />
AE6<br />
SB_TX1N<br />
AD6<br />
SB_TX2P<br />
AB6<br />
SB_TX2N<br />
AC6<br />
SB_TX3P<br />
AD5<br />
SB_TX3N<br />
AE5<br />
PCE_CALRP(PCE_BCALRP)<br />
AC8<br />
PCE_CALRN(PCE_BCALRN)<br />
AB8<br />
SB_TX0P_C<br />
SB_TX0N_C<br />
SB_TX1P_C<br />
SB_TX1N_C<br />
SB_TX2P_C<br />
SB_TX2N_C<br />
SB_TX3P_C<br />
SB_TX3N_C<br />
C133<br />
C134<br />
C135<br />
C136<br />
C137<br />
C138<br />
C139<br />
C140<br />
R59 1 2<br />
R58 1 2<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
1.27K_0402_1%<br />
2K_0402_1%<br />
0.1U_0402_16V7K<br />
0.1U_0402_16V7K<br />
0.1U_0402_16V7K<br />
0.1U_0402_16V7K<br />
0.1U_0402_16V7K<br />
0.1U_0402_16V7K<br />
0.1U_0402_16V7K<br />
0.1U_0402_16V7K<br />
+1.1VS<br />
H_CADOP8 AC24<br />
H_CADIP8<br />
3 H_CADON8<br />
HT_RXCAD8P<br />
HT_TXCAD8P<br />
F21<br />
H_CADIN8<br />
3<br />
AC25<br />
H_CADOP9<br />
HT_RXCAD8N<br />
HT_TXCAD8N<br />
G21<br />
AB25<br />
H_CADIP9<br />
H_CADON9<br />
HT_RXCAD9P<br />
HT_TXCAD9P<br />
G20<br />
AB24<br />
H_CADIN9<br />
H_CADOP10<br />
HT_RXCAD9N<br />
HT_TXCAD9N<br />
H21<br />
AA24<br />
H_CADIP10<br />
H_CADON10<br />
HT_RXCAD10P<br />
HT_TXCAD10P<br />
J20<br />
AA25<br />
H_CADIN10<br />
H_CADOP11<br />
HT_RXCAD10N<br />
HT_TXCAD10N<br />
J21<br />
Y22<br />
H_CADIP11<br />
H_CADON11<br />
HT_RXCAD11P<br />
HT_TXCAD11P<br />
J18<br />
Y23<br />
H_CADIN11<br />
H_CADOP12<br />
HT_RXCAD11N<br />
HT_TXCAD11N<br />
K17<br />
W21<br />
H_CADIP12<br />
H_CADON12<br />
HT_RXCAD12P<br />
HT_TXCAD12P<br />
L19<br />
W20<br />
H_CADIN12<br />
H_CADOP13<br />
HT_RXCAD12N<br />
HT_TXCAD12N<br />
J19<br />
V21<br />
H_CADIP13<br />
H_CADON13<br />
HT_RXCAD13P<br />
HT_TXCAD13P<br />
M19<br />
V20<br />
H_CADIN13<br />
H_CADOP14<br />
HT_RXCAD13N<br />
HT_TXCAD13N<br />
L18<br />
U20<br />
H_CADIP14<br />
H_CADON14<br />
HT_RXCAD14P<br />
HT_TXCAD14P<br />
M21<br />
U21<br />
H_CADIN14<br />
H_CADOP15<br />
HT_RXCAD14N<br />
HT_TXCAD14N<br />
P21<br />
U19<br />
H_CADIP15<br />
H_CADON15<br />
HT_RXCAD15P<br />
HT_TXCAD15P<br />
P18<br />
U18<br />
H_CADIN15<br />
HT_RXCAD15N<br />
HT_TXCAD15N<br />
M18<br />
1 R60 2 HT_RXCALP<br />
HT_RXCALN<br />
301_0402_1%~D<br />
0718 Place within 1"<br />
layout 1:2<br />
4 4<br />
SB_TX0P <br />
SB_TX0N <br />
SB_TX1P <br />
SB_TX1N <br />
SB_TX2P <br />
SB_TX2N <br />
SB_TX3P <br />
SB_TX3N <br />
H_CLKOP0<br />
H_CLKON0<br />
H_CLKOP1<br />
H_CLKON1<br />
<br />
<br />
<br />
<br />
H_CTLOP0<br />
H_CTLON0<br />
H_CTLOP1<br />
H_CTLON1<br />
H_CADOP0<br />
H_CADON0<br />
H_CADOP1<br />
H_CADON1<br />
H_CADOP2<br />
H_CADON2<br />
H_CADOP3<br />
H_CADON3<br />
H_CADOP4<br />
H_CADON4<br />
H_CADOP5<br />
H_CADON5<br />
H_CADOP6<br />
H_CADON6<br />
H_CADOP7<br />
H_CADON7<br />
www.mycomp.su<br />
H_CTLOP0<br />
H_CTLON0<br />
H_CTLOP1<br />
H_CTLON1<br />
U3A<br />
Y25<br />
HT_RXCAD0P<br />
HT_TXCAD0P<br />
D24<br />
Y24<br />
HT_RXCAD0N<br />
PART 1 OF 6 HT_TXCAD0N<br />
D25<br />
V22<br />
HT_RXCAD1P<br />
HT_TXCAD1P<br />
E24<br />
V23<br />
HT_RXCAD1N<br />
HT_TXCAD1N<br />
E25<br />
V25<br />
HT_RXCAD2P<br />
HT_TXCAD2P<br />
F24<br />
V24<br />
HT_RXCAD2N<br />
HT_TXCAD2N<br />
F25<br />
U24<br />
HT_RXCAD3P<br />
HT_TXCAD3P<br />
F23<br />
U25<br />
HT_RXCAD3N<br />
HT_TXCAD3N<br />
F22<br />
T25<br />
HT_RXCAD4P<br />
HT_TXCAD4P<br />
H23<br />
T24<br />
HT_RXCAD4N<br />
HT_TXCAD4N<br />
H22<br />
P22<br />
HT_RXCAD5P<br />
HT_TXCAD5P<br />
J25<br />
P23<br />
HT_RXCAD5N<br />
HT_TXCAD5N<br />
J24<br />
P25<br />
HT_RXCAD6P<br />
HT_TXCAD6P<br />
K24<br />
P24<br />
HT_RXCAD6N<br />
HT_TXCAD6N<br />
K25<br />
N24<br />
HT_RXCAD7P<br />
HT_TXCAD7P<br />
K23<br />
N25<br />
HT_RXCAD7N<br />
HT_TXCAD7N<br />
K22<br />
T22<br />
HT_RXCLK0P<br />
T23<br />
HT_RXCLK0N<br />
AB23<br />
HT_RXCLK1P<br />
AA22<br />
HT_RXCLK1N<br />
M22<br />
HT_RXCTL0P<br />
M23<br />
HT_RXCTL0N<br />
R21<br />
HT_RXCTL1P<br />
R20<br />
HT_RXCTL1N<br />
C23<br />
HT_RXCALP<br />
A24<br />
HT_RXCALN<br />
RS780M_FCBGA528<br />
HYPER TRANSPORT CPU I/F<br />
RS880 A11(SA000032710)<br />
HT_TXCLK0P<br />
H24<br />
HT_TXCLK0N<br />
H25<br />
HT_TXCLK1P<br />
L21<br />
HT_TXCLK1N<br />
L20<br />
HT_TXCTL0P<br />
HT_TXCTL0N<br />
HT_TXCTL1P<br />
HT_TXCTL1N<br />
HT_TXCALP<br />
B24<br />
HT_TXCALN<br />
B25<br />
H_CADIP0<br />
H_CADIN0<br />
H_CADIP1<br />
H_CADIN1<br />
H_CADIP2<br />
H_CADIN2<br />
H_CADIP3<br />
H_CADIN3<br />
H_CADIP4<br />
H_CADIN4<br />
H_CADIP5<br />
H_CADIN5<br />
H_CADIP6<br />
H_CADIN6<br />
H_CADIP7<br />
H_CADIN7<br />
M24 H_CTLIP0<br />
M25 H_CTLIN0<br />
P19 H_CTLIP1<br />
R18 H_CTLIN1<br />
H_CLKIP0 <br />
H_CLKIN0 <br />
H_CLKIP1 <br />
H_CLKIN1 <br />
H_CTLIP0 <br />
H_CTLIN0 <br />
H_CTLIP1 <br />
H_CTLIN1 <br />
HT_TXCALP<br />
HT_TXCALN<br />
1 R61 2<br />
301_0402_1%~D<br />
0718 Place within 1"<br />
layout 1:2<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 12 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
+1.8VS<br />
+1.8VS<br />
+1.8VS<br />
0.1U_0402_16V4Z<br />
+1.8VS<br />
1 2<br />
R417<br />
R63<br />
U4<br />
+1.1VS<br />
+NB_PLLVDD<br />
@<br />
C684<br />
2.2K_0402_5%<br />
NC7SZ08P5X_NL_SC70-5<br />
L2<br />
300_0402_5%<br />
NB_PWRGD 2<br />
B<br />
1 2<br />
2<br />
NB_PWRGD_R<br />
+3VS<br />
B<br />
NB_LDTSTOP#<br />
Y 4<br />
1 1<br />
SB_PWRGD<br />
1<br />
FBMA-L11-160808-221LMT 0603<br />
L3<br />
Y 4<br />
A<br />
LDT_STOP#<br />
1<br />
C141<br />
C142<br />
1 2 C679<br />
C144<br />
C143<br />
A<br />
U8<br />
@<br />
2.2U_0603_6.3V4Z<br />
1U_0402_6.3V4Z<br />
2 2<br />
1 1 1<br />
FBMA-L11-160808-221LMT 0603<br />
NC7SZ08P5X_NL_SC70-5<br />
1 1<br />
2.2U_0603_6.3V4Z<br />
22U_0805_6.3V6M 2 2 2<br />
1 2<br />
1U_0402_6.3V4Z<br />
R64<br />
@<br />
0_0402_5%<br />
+1.8VS<br />
+1.8VS<br />
+NB_HTPVDD<br />
L4<br />
1 2<br />
+AVDDDI<br />
AMD suggest<br />
Check if needed?<br />
L5<br />
1<br />
1 2<br />
FBMA-L11-160808-221LMT 0603<br />
1 1<br />
C145<br />
FBMA-L11-160808-221LMT 0603<br />
0.1U_0402_16V4Z<br />
C146<br />
C147<br />
2<br />
U3C<br />
2.2U_0603_6.3V4Z<br />
1U_0402_6.3V4Z<br />
F12<br />
+1.8VS<br />
TXOUT_L0P(NC)<br />
A22<br />
2 2<br />
AVDD1(NC)<br />
GMCH_TXOUT0+ <br />
20mA<br />
E12<br />
AVDD2(NC)<br />
PART 3 OF 6<br />
TXOUT_L0N(NC)<br />
B22<br />
GMCH_TXOUT0- <br />
F14<br />
TXOUT_L1P(NC)<br />
A21<br />
GMCH_TXOUT1+ <br />
L6<br />
AVDDDI(NC)<br />
4mA<br />
G15<br />
GMCH_TXOUT1- <br />
+AVDDQ<br />
AVSSDI(NC)<br />
TXOUT_L1N(NC)<br />
B21<br />
1 2<br />
H15<br />
AVDDQ(NC)<br />
TXOUT_L2P(NC)<br />
B20<br />
GMCH_TXOUT2+ <br />
1<br />
1<br />
H14<br />
TXOUT_L2N(DBG_GPIO0)<br />
A20<br />
GMCH_TXOUT2- <br />
FBMA-L11-160808-221LMT 0603<br />
AVSSQ(NC)<br />
TXOUT_L3P(NC)<br />
A19<br />
C148<br />
C149<br />
E17<br />
+1.8VS<br />
+VDDA18HTPLL<br />
TXOUT_L3N(DBG_GPIO2)<br />
B19<br />
2.2U_0603_6.3V4Z<br />
1U_0402_6.3V4Z<br />
C_Pr(DFT_GPIO5)<br />
F17<br />
L7<br />
2<br />
2<br />
Y(DFT_GPIO2)<br />
F15<br />
COMP_Pb(DFT_GPIO4)<br />
TXOUT_U0P(NC)<br />
B18<br />
1 2<br />
1<br />
GMCH_CRT_R<br />
TXOUT_U0N(NC)<br />
A18<br />
1<br />
GMCH_CRT_R<br />
G18<br />
TXOUT_U1P(PCIE_RESET_GPIO3)<br />
A17<br />
FBMA-L11-160808-221LMT 0603<br />
RED(DFT_GPIO0)<br />
G17<br />
C150<br />
GMCH_CRT_G<br />
TXOUT_U1N(PCIE_RESET_GPIO2)<br />
B17<br />
L8<br />
C151<br />
REDb(NC)<br />
+VDDLTP18<br />
GMCH_CRT_G<br />
E18<br />
+1.8VS<br />
2.2U_0603_6.3V4Z<br />
GREEN(DFT_GPIO1)<br />
TXOUT_U2P(NC)<br />
D20<br />
1 2<br />
1U_0402_6.3V4Z<br />
F18<br />
2<br />
GMCH_CRT_B<br />
TXOUT_U2N(NC)<br />
D21<br />
2<br />
GREENb(NC)<br />
1 1<br />
GMCH_CRT_B<br />
E19<br />
TXOUT_U3P(PCIE_RESET_GPIO5)<br />
D18<br />
FBMA-L11-160808-221LMT 0603<br />
BLUE(DFT_GPIO3)<br />
F19<br />
TXOUT_U3N(NC)<br />
D19<br />
C152<br />
C153<br />
BLUEb(NC)<br />
1U_0402_6.3V4Z<br />
2.2U_0603_6.3V4Z<br />
GMCH_CRT_HSYNC<br />
2 2<br />
GMCH_CRT_HSYNC<br />
A11<br />
GMCH_TXCLK+ <br />
GMCH_CRT_VSYNC<br />
DAC_HSYNC(PWM_GPIO4)<br />
TXCLK_LP(DBG_GPIO1)<br />
B16<br />
GMCH_CRT_VSYNC<br />
B11<br />
GMCH_TXCLK- <br />
GMCH_CRT_CLK<br />
DAC_VSYNC(PWM_GPIO6)<br />
TXCLK_LN(DBG_GPIO3)<br />
A16<br />
+1.8VS<br />
+VDDA18PCIEPLL<br />
GMCH_CRT_CLK<br />
F8<br />
GMCH_CRT_DATA<br />
DAC_SCL(PCE_RCALRN)<br />
TXCLK_UP(PCIE_RESET_GPIO4)<br />
D16<br />
GMCH_CRT_DATA<br />
E8<br />
TXCLK_UN(PCIE_RESET_GPIO1)<br />
D17<br />
L9<br />
DAC_SDA(PCE_TCALRN)<br />
2 2<br />
1 2<br />
1 2 DAC_RSET G14<br />
DAC_RSET(PWM_GPIO1)<br />
15mA<br />
L10<br />
1 1<br />
R65<br />
715_0402_1% 65mA<br />
+VDDLTP18<br />
+VDDLT18<br />
+1.8VS<br />
+NB_PLLVDD<br />
+NB_PLLVDD<br />
VDDLTP18(NC)<br />
A13<br />
1 2<br />
FBMA-L11-160808-221LMT 0603<br />
A12<br />
+NB_HTPVDD<br />
+NB_HTPVDD<br />
PLLVDD(NC)<br />
VSSLTP18(NC)<br />
B13<br />
1 1<br />
BLM18AG601SN1D_2P<br />
C154<br />
C155<br />
20mAD14<br />
PLLVDD18(NC)<br />
300mA<br />
C156<br />
2.2U_0603_6.3V4Z<br />
1U_0402_6.3V4Z<br />
B12<br />
+VDDLT18<br />
PLLVSS(NC)<br />
VDDLT18_1(NC)<br />
A15<br />
0.1U_0402_16V4Z<br />
C157<br />
2 2<br />
20mA<br />
VDDLT18_2(NC)<br />
B15<br />
4.7U_0805_10V4Z<br />
2 2<br />
+VDDA18HTPLL<br />
H17<br />
VDDA18HTPLL<br />
VDDLT33_1(NC)<br />
A14<br />
120mA<br />
VDDLT33_2(NC)<br />
B14<br />
+VDDA18PCIEPLL<br />
D7<br />
VDDA18PCIEPLL1<br />
E7<br />
VDDA18PCIEPLL2<br />
VSSLT1(VSS)<br />
C14<br />
R66<br />
0_0402_5%<br />
NB_RESET#<br />
VSSLT2(VSS)<br />
D15<br />
A_RST#<br />
1 2<br />
D8<br />
NB_PWRGD_R<br />
SYSRESETb<br />
VSSLT3(VSS)<br />
C16<br />
NB_PWRGD<br />
1 2<br />
A10<br />
NB_LDTSTOP#<br />
POWERGOOD<br />
VSSLT4(VSS)<br />
C18<br />
R67<br />
0_0402_5%<br />
C10<br />
+1.8VS<br />
NB_ALLOW_LDTSTOP<br />
LDTSTOPb<br />
VSSLT5(VSS)<br />
C20<br />
2 1<br />
C12<br />
ALLOW_LDTSTOP<br />
VSSLT6(VSS)<br />
E20<br />
R68<br />
300_0402_5%<br />
VSSLT7(VSS)<br />
C22<br />
CLK_NBHT<br />
C25<br />
HT_REFCLKP<br />
CLK_NB_14.318M<br />
1 EXT@ 2<br />
CLK_NBHT#<br />
C24<br />
R536<br />
0_0402_5%<br />
HT_REFCLKN<br />
INT@<br />
NB_REFCLK_P<br />
NB_DISP_CLKP<br />
1 2<br />
E11<br />
R456<br />
0_0402_5%<br />
NB_REFCLK_N<br />
REFCLK_P/OSCIN(OSCIN)<br />
NB_DISP_CLKN<br />
1 INT@ 2<br />
F11<br />
REFCLK_N(PWM_GPIO3)<br />
LVDS_DIGON(PCE_TCALRP)<br />
E9<br />
GMCH_ENVDD <br />
R439<br />
0_0402_5%<br />
+1.1VS<br />
CLK_NBGFX<br />
LVDS_BLON(PCE_RCALRP)<br />
F7<br />
1 2 1 2<br />
VARY_ENBKL<br />
GMCH_ENBKL<br />
CLK_NBGFX<br />
T2<br />
CLK_NBGFX#<br />
GFX_REFCLKP<br />
LVDS_ENA_BL(PWM_GPIO2)<br />
G12<br />
R71 1 @ 2<br />
0_0402_5%<br />
R69<br />
R70<br />
CLK_NBGFX#<br />
T1<br />
4.7K_0402_5%<br />
4.7K_0402_5%<br />
GFX_REFCLKN<br />
R72 1 VB@ 2<br />
0_0402_5%<br />
GMCH_INVT_PWM <br />
U1<br />
+3VS<br />
EXT@<br />
EXT@<br />
2<br />
INT@ 1<br />
R504<br />
INT@<br />
GPP_REFCLKP<br />
2<br />
4.7K_0402_5% 1<br />
U2<br />
R76<br />
R506<br />
4.7K_0402_5%<br />
GPP_REFCLKN<br />
1 VB@ 2<br />
0_0402_5%<br />
R77 1 2<br />
4.7K_0402_5% GMCH_LCD_CLK<br />
If support VB, pop VB@ and reserve R71<br />
CLK_SBLINK_BCLK<br />
V4<br />
GPPSB_REFCLKP(SB_REFCLKP)<br />
CLK_SBLINK_BCLK#<br />
V3<br />
GPPSB_REFCLKN(SB_REFCLKN)<br />
R73<br />
R74<br />
R75<br />
3 3<br />
R78 1 2<br />
4.7K_0402_5% GMCH_LCD_DATA<br />
GMCH_LCD_CLK<br />
GMCH_LCD_CLK<br />
B9<br />
GMCH_LCD_DATA<br />
I2C_CLK<br />
GMCH_LCD_DATA<br />
A9<br />
GMCH_CRT_CLK<br />
I2C_DATA<br />
MIS.<br />
TMDS_HPD(NC)<br />
D9<br />
R79 1 2<br />
4.7K_0402_5%<br />
AUX0N<br />
B8<br />
DDC_DATA0/AUX0N(NC)<br />
HPD(NC)<br />
D10<br />
A8<br />
R80 1 2<br />
4.7K_0402_5% GMCH_CRT_DATA<br />
DDC_CLK0/AUX0P(NC)<br />
B7<br />
DDC_CLK1/AUX1P(NC)<br />
SUS_STAT#(PWM_GPIO5)<br />
D12 1 2<br />
SUS_STAT# To SB<br />
1 2<br />
A7<br />
R81<br />
0_0402_5%<br />
R173<br />
AUX0N<br />
R82<br />
2K_0402_5%<br />
DDC_DATA1/AUX1N(NC)<br />
2<br />
@ 1<br />
4.7K_0402_5%<br />
SUS_STAT_R# Strap pin<br />
POWER_SEL<br />
THERMALDIODE_P<br />
AE8<br />
POWER_SEL<br />
B10<br />
STRP_DATA<br />
THERMALDIODE_N<br />
AD8<br />
EMI<br />
G11<br />
RSVD<br />
TESTMODE<br />
D13 1 2<br />
R84<br />
1 2<br />
C8<br />
1.8K_0402_5%<br />
@<br />
R86<br />
@C158<br />
R85<br />
150_0402_1%<br />
AUX_CAL(NC)<br />
CLK_NB_14.318M 1 2 1 2<br />
RS780M_FCBGA528<br />
RS880 POWER_SEL<br />
+3VS<br />
Wire-OR<br />
100_0402_5%<br />
100P_0402_25V8K<br />
RS880 A11(SA000032710)<br />
+3VS 2 1<br />
R106<br />
4.7K_0402_5%<br />
HIGH 0.95V<br />
+AVDD1<br />
125mA<br />
+1.8VS<br />
R149<br />
D<br />
Q41<br />
4.7K_0402_5%<br />
LOW 1.1V<br />
GMCH_ENBKL 2<br />
UMA@<br />
1 2 GMCH_CRT_R<br />
G<br />
R87<br />
140_0402_1%<br />
S<br />
2N7002_SOT23<br />
ENBKL <br />
R90<br />
1 2 GMCH_CRT_G<br />
1K_0402_5%<br />
R88<br />
150_0402_1%<br />
D<br />
Q63<br />
R91<br />
0_0402_5%<br />
1 2 GMCH_CRT_B<br />
PD on chip side<br />
2<br />
ALLOW_LDTSTOP<br />
1 2 NB_ALLOW_LDTSTOP<br />
R89<br />
150_0402_1%<br />
G<br />
D<br />
S<br />
2N7002_SOT23<br />
4 4<br />
VGA_ENBKL<br />
VGA_ENBKL 2<br />
Q62<br />
G<br />
VGA@<br />
S<br />
2N7002_SOT23<br />
1<br />
2<br />
CRT/TVOUT<br />
CLOCKs PM<br />
PLL PWR<br />
LVTM<br />
www.mycomp.su<br />
1 2<br />
P 5<br />
G<br />
3<br />
1<br />
2<br />
4.7K_0402_5%<br />
1 2<br />
1<br />
2<br />
4.7K_0402_5%<br />
1<br />
2<br />
4.7K_0402_5%<br />
1<br />
3<br />
1<br />
3<br />
1<br />
2<br />
1<br />
3<br />
P 5<br />
G<br />
3<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 13 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
1.3A<br />
L11<br />
0.1U_0402_16V4Z<br />
1U_0402_6.3V4Z<br />
+1.1VS<br />
2<br />
1<br />
+VDDHT<br />
L28<br />
1 2<br />
U3F<br />
FBMA-L11-201209-221LMA30T_0805 1 1 1 1<br />
FBMA-L11-201209-221LMA30T_0805<br />
A25<br />
L12<br />
VSSAHT1<br />
VSSAPCIE1<br />
A2<br />
D23<br />
C165<br />
C166<br />
C159<br />
C167<br />
VSSAHT2<br />
PART 6/6 VSSAPCIE2<br />
B1<br />
1 2<br />
+1.1VS<br />
E22<br />
FBMA-L11-201209-221LMA30T_0805<br />
VSSAHT3<br />
VSSAPCIE3<br />
D3<br />
2 2 2 2<br />
U3E<br />
G22<br />
VSSAHT4<br />
VSSAPCIE4<br />
D5<br />
2.5A<br />
G24<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
+VDDA11PCIE<br />
C160<br />
10U_0805_10V4Z<br />
VSSAHT5<br />
VSSAPCIE5<br />
E4<br />
J17<br />
VDDHT_1<br />
VDDPCIE_1<br />
A6<br />
1 2<br />
G25<br />
C162<br />
10U_0805_10V4Z<br />
VSSAHT6<br />
VSSAPCIE6<br />
G1<br />
K16<br />
VDDHT_2<br />
PART 5/6 VDDPCIE_2<br />
B6<br />
1 2<br />
H19<br />
VSSAHT7<br />
VSSAPCIE7<br />
G2<br />
L16<br />
L13<br />
1U_0402_6.3V4Z<br />
VDDHT_3<br />
VDDPCIE_3<br />
C6<br />
J22<br />
VSSAHT8<br />
VSSAPCIE8<br />
G4<br />
M16<br />
2<br />
1<br />
0.1U_0402_16V4Z<br />
+VDDHTRX<br />
VDDHT_4<br />
VDDPCIE_4<br />
D6<br />
L17<br />
C163<br />
4.7U_0805_10V4Z<br />
VSSAHT9<br />
VSSAPCIE9<br />
H7<br />
P16<br />
VDDHT_5<br />
VDDPCIE_5<br />
E6<br />
1 2<br />
L22<br />
VSSAHT10<br />
VSSAPCIE10<br />
J4<br />
R16<br />
FBMA-L11-201209-221LMA30T_0805<br />
VDDHT_6<br />
VDDPCIE_6<br />
F6<br />
L24<br />
VSSAHT11<br />
VSSAPCIE11<br />
R7<br />
1 1 1 1<br />
T16<br />
VDDHT_7<br />
VDDPCIE_7<br />
G7<br />
C168 1 2<br />
1U_0402_6.3V4Z<br />
L25<br />
700mA<br />
C171<br />
1U_0402_6.3V4Z<br />
VSSAHT12<br />
VSSAPCIE12<br />
L1<br />
1 2<br />
C169<br />
C170<br />
C161<br />
VDDPCIE_8<br />
H8<br />
M20<br />
VSSAHT13<br />
VSSAPCIE13<br />
L2<br />
C164<br />
H18<br />
VDDHTRX_1<br />
VDDPCIE_9<br />
J9<br />
N22<br />
VSSAHT14<br />
VSSAPCIE14<br />
L4<br />
G19<br />
1 2<br />
2 2 2<br />
VDDHTRX_2<br />
VDDPCIE_10<br />
K9<br />
P20<br />
C172<br />
0.1U_0402_16V4Z<br />
VSSAHT15<br />
VSSAPCIE15<br />
L7<br />
2<br />
F20<br />
0.1U_0402_16V4Z<br />
VDDHTRX_3<br />
VDDPCIE_11<br />
M9<br />
1 2<br />
R19<br />
C173<br />
0.1U_0402_16V4Z<br />
VSSAHT16<br />
VSSAPCIE16<br />
M6<br />
4.7U_0805_10V4Z<br />
E21<br />
VDDHTRX_4<br />
VDDPCIE_12<br />
L9<br />
R22<br />
VSSAHT17<br />
VSSAPCIE17<br />
N4<br />
D22<br />
VDDHTRX_5<br />
VDDPCIE_13<br />
P9<br />
R24<br />
VSSAHT18<br />
VSSAPCIE18<br />
P6<br />
B23<br />
VDDHTRX_6<br />
VDDPCIE_14<br />
R9<br />
R25<br />
VSSAHT19<br />
VSSAPCIE19<br />
R1<br />
A23<br />
L14<br />
VDDHTRX_7<br />
VDDPCIE_15<br />
T9<br />
H20<br />
VSSAHT20<br />
VSSAPCIE20<br />
R2<br />
680mA<br />
+1.1VS 2<br />
1<br />
10U_0603_6.3V6M<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z +VDDHTTX<br />
VDDPCIE_16<br />
V9<br />
U22<br />
VSSAHT21<br />
VSSAPCIE21<br />
R4<br />
AE25<br />
VDDHTTX_1<br />
VDDPCIE_17<br />
U9<br />
V19<br />
VSSAHT22<br />
VSSAPCIE22<br />
V7<br />
AD24<br />
FBMA-L11-201209-221LMA30T_0805<br />
VDDHTTX_2<br />
W22<br />
VSSAHT23<br />
VSSAPCIE23<br />
U4<br />
2<br />
1 1 1 1 1<br />
AC23<br />
@<br />
VDDHTTX_3<br />
VDDC_1<br />
K12<br />
W24<br />
VSSAHT24<br />
VSSAPCIE24<br />
V8<br />
AB22<br />
C261<br />
C174<br />
C175<br />
C176<br />
C177<br />
C178<br />
VDDHTTX_4<br />
VDDC_2<br />
J14<br />
W25<br />
VSSAHT25<br />
VSSAPCIE25<br />
V6<br />
AA21<br />
VDDHTTX_5<br />
VDDC_3<br />
U16<br />
Y21<br />
VSSAHT26<br />
VSSAPCIE26<br />
W1<br />
Y20<br />
1<br />
2 2 2 2 2<br />
VDDHTTX_6<br />
VDDC_4<br />
J11<br />
AD25<br />
+NB_CORE<br />
VSSAHT27<br />
VSSAPCIE27<br />
W2<br />
W19<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
1U_0402_6.3V4Z<br />
VDDHTTX_7<br />
VDDC_5<br />
K15<br />
VSSAPCIE28<br />
W4<br />
V18<br />
VDDHTTX_8<br />
VDDC_6<br />
M12<br />
L12<br />
VSS11<br />
VSSAPCIE29<br />
W7<br />
U17<br />
VDDHTTX_9<br />
VDDC_7<br />
L14<br />
10A<br />
M14<br />
VSS12<br />
VSSAPCIE30<br />
W8<br />
T17<br />
VDDHTTX_10<br />
VDDC_8<br />
L11<br />
N13<br />
VSS13<br />
VSSAPCIE31<br />
Y6<br />
R17<br />
VDDHTTX_11<br />
VDDC_9<br />
M13<br />
P12<br />
VSS14<br />
VSSAPCIE32<br />
AA4<br />
P17<br />
VDDHTTX_12<br />
VDDC_10<br />
M15<br />
P15<br />
VSS15<br />
VSSAPCIE33<br />
AB5<br />
M17<br />
L15<br />
VDDHTTX_13<br />
VDDC_11<br />
N12<br />
R11<br />
VSS16<br />
VSSAPCIE34<br />
AB1<br />
700mA<br />
+1.8VS<br />
2<br />
1<br />
0.1U_0402_16V4Z<br />
+VDDA18PCIE<br />
VDDC_12<br />
N14<br />
1<br />
R14<br />
0.1U_0402_16V4Z<br />
VSS17<br />
VSSAPCIE35<br />
AB7<br />
J10<br />
1 1 1<br />
1 1 1<br />
FBMA-L11-201209-221LMA30T_0805<br />
VDDA18PCIE_1<br />
VDDC_13<br />
P11<br />
1 1 1 1 1<br />
T12<br />
+<br />
VSS18<br />
VSSAPCIE36<br />
AC3<br />
P10<br />
VDDA18PCIE_2<br />
VDDC_14<br />
P13<br />
U14<br />
VSS19<br />
VSSAPCIE37<br />
AC4<br />
1 1 1 1 1 1<br />
K10<br />
VDDA18PCIE_3<br />
VDDC_15<br />
P14<br />
U11<br />
VSS20<br />
VSSAPCIE38<br />
AE1<br />
M10<br />
C181<br />
C179<br />
C192<br />
C186<br />
VDDA18PCIE_4<br />
VDDC_16<br />
R12<br />
U15<br />
C185<br />
C190<br />
2 2 2 2 2 2 2 2 2 2 2 2<br />
VSS21<br />
VSSAPCIE39<br />
AE4<br />
L10<br />
4.7U_0805_10V4Z<br />
VDDA18PCIE_5<br />
VDDC_17<br />
R15<br />
V12<br />
VSS22<br />
VSSAPCIE40<br />
AB2<br />
W9<br />
2 2 2<br />
2<br />
VDDA18PCIE_6<br />
VDDC_18<br />
T11<br />
W11<br />
2 2<br />
VSS23<br />
H9<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
VDDA18PCIE_7<br />
VDDC_19<br />
T15<br />
W15<br />
0.1U_0402_16V4Z<br />
VSS24<br />
T10<br />
VDDA18PCIE_8<br />
VDDC_20<br />
U12<br />
AC12<br />
VSS25<br />
VSS1<br />
AE14<br />
R10<br />
VDDA18PCIE_9<br />
VDDC_21<br />
T14<br />
AA14<br />
VSS26<br />
VSS2<br />
D11<br />
Y9<br />
VDDA18PCIE_10<br />
VDDC_22<br />
J16<br />
Y18<br />
VSS27<br />
VSS3<br />
G8<br />
AA9<br />
VDDA18PCIE_11<br />
23mA<br />
AB11<br />
VSS28<br />
VSS4<br />
E14<br />
AB9<br />
VDDA18PCIE_12 VDD_MEM1(NC)<br />
AE10<br />
AB15<br />
VSS29<br />
VSS5<br />
E15<br />
AD9<br />
VDDA18PCIE_13 VDD_MEM2(NC)<br />
AA11<br />
AB17<br />
VSS30<br />
VSS6<br />
J15<br />
AE9<br />
VDDA18PCIE_14 VDD_MEM3(NC)<br />
Y11<br />
AB19<br />
VSS31<br />
VSS7<br />
J12<br />
U10<br />
VDDA18PCIE_15 VDD_MEM4(NC)<br />
AD10<br />
AE20<br />
VSS32<br />
VSS8<br />
K14<br />
10mA<br />
VDD_MEM5(NC)<br />
AB10<br />
AB21<br />
VSS33<br />
VSS9<br />
M11<br />
+1.8VS<br />
F9<br />
VDD18_1<br />
VDD_MEM6(NC)<br />
AC10<br />
K11<br />
VSS34<br />
VSS10<br />
L15<br />
G9<br />
VDD18_2<br />
60mA<br />
AE11<br />
VDD18_MEM1(NC) VDD33_1(NC)<br />
H11<br />
+3VS<br />
RS780M_FCBGA528<br />
AD11<br />
VDD18_MEM2(NC) VDD33_2(NC)<br />
H12<br />
5mA<br />
1 1<br />
RS780M_FCBGA528<br />
RS880 A11(SA000032710)<br />
1<br />
1 1<br />
PAR 4 OF 6<br />
AB12<br />
MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC)<br />
AA18<br />
Side port and Strap setting<br />
AE16<br />
MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC)<br />
AA20<br />
V11<br />
MEM_A2(NC)<br />
MEM_DQ2/DVO_DE(NC)<br />
AA19<br />
AE15<br />
MEM_A3(NC)<br />
MEM_DQ3/DVO_D0(NC)<br />
Y19<br />
AA12<br />
MEM_A4(NC)<br />
MEM_DQ4(NC)<br />
V17<br />
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb<br />
AB16<br />
MEM_A5(NC)<br />
MEM_DQ5/DVO_D1(NC)<br />
AA17<br />
Debug Mode<br />
AB14<br />
MEM_A6(NC)<br />
MEM_DQ6/DVO_D2(NC)<br />
AA15<br />
AD14<br />
MEM_A7(NC)<br />
MEM_DQ7/DVO_D4(NC)<br />
Y15<br />
GMCH_CRT_VSYNC<br />
2 1<br />
+3VS<br />
Enables the Test Debug Bus using GPIO. (VSYNC)<br />
AD13<br />
1 : Disable<br />
MEM_A8(NC)<br />
MEM_DQ8/DVO_D3(NC)<br />
AC20<br />
R92<br />
3K_0402_5%<br />
AD15<br />
R93<br />
@ 3K_0402_5%<br />
MEM_A9(NC)<br />
MEM_DQ9/DVO_D5(NC)<br />
AD19<br />
AC16<br />
0 : Enable<br />
MEM_A10(NC)<br />
MEM_DQ10/DVO_D6(NC)<br />
AE22<br />
AE13<br />
MEM_A11(NC)<br />
MEM_DQ11/DVO_D7(NC)<br />
AC18<br />
AC14<br />
MEM_A12(NC)<br />
MEM_DQ12(NC)<br />
AB20<br />
Y14<br />
MEM_A13(NC)<br />
MEM_DQ13/DVO_D9(NC)<br />
AD22<br />
MEM_DQ14/DVO_D10(NC)<br />
AC22<br />
DFT_GPIO1: LOAD_EEP<strong>ROM</strong>_STRAPS<br />
AD16<br />
MEM_BA0(NC)<br />
MEM_DQ15/DVO_D11(NC)<br />
AD21<br />
Load EEP<strong>ROM</strong> Strap<br />
AE17<br />
MEM_BA1(NC)<br />
Selects Loading of STRAPS from EP<strong>ROM</strong><br />
AD17<br />
D1<br />
@<br />
MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC)<br />
Y17<br />
1 : Bypass the loading of EEP<strong>ROM</strong> straps and use Hardware Default Values<br />
CH751H-40PT_SOD323-2<br />
MEM_DQS0N/DVO_IDCKN(NC)<br />
W18<br />
W12<br />
0 : I2C Master can load strap values from EEP<strong>ROM</strong> if connected, or use<br />
MEM_RASb(NC)<br />
MEM_DQS1P(NC)<br />
AD20<br />
SUS_STAT_R#<br />
2 1<br />
A_RST# <br />
Y12<br />
default values if not connected<br />
MEM_CASb(NC)<br />
MEM_DQS1N(NC)<br />
AE21<br />
AD18<br />
R264<br />
@ 3K_0402_5%<br />
MEM_WEb(NC)<br />
AB13<br />
MEM_CSb(NC)<br />
MEM_DM0(NC)<br />
W17<br />
AB18<br />
MEM_CKE(NC)<br />
MEM_DM1/DVO_D8(NC)<br />
AE19<br />
V14<br />
MEM_ODT(NC)<br />
15mA<br />
IOPLLVDD18(NC)<br />
AE23<br />
+1.8VS<br />
V15<br />
MEM_CKP(NC)<br />
IOPLLVDD(NC)<br />
AE24<br />
+1.1VS<br />
Enable Side Port Memory<br />
W14<br />
MEM_CKN(NC)<br />
26mA<br />
Enable Side Port Memory<br />
IOPLLVSS(NC)<br />
AD23<br />
AE12<br />
MEM_COMPP(NC)<br />
RS880: HSYNC#<br />
AD12<br />
MEM_COMPN(NC)<br />
MEM_VREF(NC)<br />
AE18<br />
GMCH_CRT_HSYNC<br />
2 1<br />
+3VS<br />
0: Enable Register Readback of strap:<br />
R94<br />
3K_0402_5%<br />
RS780M_FCBGA528<br />
1 : Disable NB_CLKCFG:CLK_TOP_SPARE_D[1]<br />
2<br />
@ 1<br />
R95<br />
3K_0402_5%<br />
RS880 A11(SA000032710)<br />
2 2<br />
C197<br />
C198<br />
C199<br />
1U_0402_6.3V4Z<br />
RS880 A11(SA000032710)<br />
0.1U_0402_16V4Z<br />
2<br />
0.1U_0402_16V4Z<br />
2<br />
2<br />
U3D<br />
3 3<br />
4 4<br />
600mA<br />
POWER<br />
0.1U_0402_16V4Z<br />
C191<br />
0.1U_0402_16V4Z<br />
C182<br />
0.1U_0402_16V4Z<br />
C187<br />
www.mycomp.su<br />
0.1U_0402_16V4Z<br />
C193<br />
0.1U_0402_16V4Z<br />
C194<br />
0.1U_0402_16V4Z<br />
C180<br />
0.1U_0402_16V4Z<br />
C188<br />
0.1U_0402_16V4Z<br />
C183<br />
0.1U_0402_16V4Z<br />
C195<br />
10U_0805_10V4Z<br />
C184<br />
10U_0805_10V4Z<br />
C196<br />
C189 330U_D2E_2.5VM<br />
SBD_MEM/DVO_I/F<br />
GROUND<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 14 of<br />
55<br />
C<br />
D<br />
E
5<br />
4<br />
3<br />
2<br />
1<br />
PCIE_GTX_C_MRX_P[0..15]<br />
PCIE_GTX_C_MRX_N[0..15]<br />
PCIE_GTX_C_MRX_P[0..15]<br />
PCIE_GTX_C_MRX_N[0..15]<br />
PCIE_MTX_C_GRX_P[0..15]<br />
PCIE_MTX_C_GRX_N[0..15]<br />
PCIE_MTX_C_GRX_P[0..15] <br />
PCIE_MTX_C_GRX_N[0..15] <br />
add for VB support.<br />
D<br />
GFX PCIE LANE REVERSAL<br />
U5A<br />
U5G<br />
LVDS CONTROL<br />
VARY_BL<br />
DIGON<br />
TXCLK_UP_DPF3P<br />
TXCLK_UN_DPF3N<br />
AK27<br />
AJ27<br />
AK35<br />
AL36<br />
R96<br />
10K_0402_5%<br />
1 2<br />
R97<br />
1 2<br />
10K_0402_5%<br />
VGA_PNL_PWM <br />
VGA_ENVDD <br />
D<br />
C<br />
B<br />
PCIE_MTX_C_GRX_P15 AA38<br />
PCIE_GTX_MRX_P15<br />
PCIE_GTX_C_MRX_P15<br />
PCIE_MTX_C_GRX_N15<br />
PCIE_RX0P<br />
PCIE_TX0P<br />
Y33<br />
C200 1 2<br />
0.1U_0402_16V7K<br />
Y37<br />
PCIE_GTX_MRX_N15<br />
PCIE_GTX_C_MRX_N15<br />
PCIE_RX0N<br />
PCIE_TX0N<br />
Y32<br />
C201 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P14 Y35<br />
PCIE_GTX_MRX_P14<br />
PCIE_GTX_C_MRX_P14<br />
PCIE_MTX_C_GRX_N14<br />
PCIE_RX1P<br />
PCIE_TX1P<br />
W33<br />
C202 1 2<br />
0.1U_0402_16V7K<br />
W36<br />
PCIE_GTX_MRX_N14<br />
PCIE_GTX_C_MRX_N14<br />
PCIE_RX1N<br />
PCIE_TX1N<br />
W32<br />
C203 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P13 W38<br />
PCIE_GTX_MRX_P13<br />
PCIE_GTX_C_MRX_P13<br />
PCIE_MTX_C_GRX_N13<br />
PCIE_RX2P<br />
PCIE_TX2P<br />
U33<br />
C204 1 2<br />
0.1U_0402_16V7K<br />
V37<br />
PCIE_GTX_MRX_N13<br />
PCIE_GTX_C_MRX_N13<br />
PCIE_RX2N<br />
PCIE_TX2N<br />
U32<br />
C205 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P12 V35<br />
PCIE_GTX_MRX_P12<br />
PCIE_GTX_C_MRX_P12<br />
PCIE_MTX_C_GRX_N12<br />
PCIE_RX3P<br />
PCIE_TX3P<br />
U30<br />
C206 1 2<br />
0.1U_0402_16V7K<br />
U36<br />
PCIE_GTX_MRX_N12<br />
PCIE_GTX_C_MRX_N12<br />
PCIE_RX3N<br />
PCIE_TX3N<br />
U29<br />
C207 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P11 U38<br />
PCIE_GTX_MRX_P11<br />
PCIE_GTX_C_MRX_P11<br />
PCIE_MTX_C_GRX_N11<br />
PCIE_RX4P<br />
PCIE_TX4P<br />
T33<br />
C208 1 2<br />
0.1U_0402_16V7K<br />
T37<br />
PCIE_GTX_MRX_N11<br />
PCIE_GTX_C_MRX_N11<br />
PCIE_RX4N<br />
PCIE_TX4N<br />
T32<br />
C209 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P10 T35<br />
PCIE_GTX_MRX_P10<br />
PCIE_GTX_C_MRX_P10<br />
PCIE_MTX_C_GRX_N10<br />
PCIE_RX5P<br />
PCIE_TX5P<br />
T30<br />
C210 1 2<br />
0.1U_0402_16V7K<br />
R36<br />
PCIE_GTX_MRX_N10<br />
PCIE_GTX_C_MRX_N10<br />
PCIE_RX5N<br />
PCIE_TX5N<br />
T29<br />
C211 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P9 R38<br />
PCIE_GTX_MRX_P9<br />
PCIE_GTX_C_MRX_P9<br />
PCIE_MTX_C_GRX_N9<br />
PCIE_RX6P<br />
PCIE_TX6P<br />
P33<br />
C212 1 2<br />
0.1U_0402_16V7K<br />
P37<br />
PCIE_GTX_MRX_N9<br />
PCIE_GTX_C_MRX_N9<br />
PCIE_RX6N<br />
PCIE_TX6N<br />
P32<br />
C213 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P8 P35<br />
PCIE_GTX_MRX_P8<br />
PCIE_GTX_C_MRX_P8<br />
PCIE_MTX_C_GRX_N8<br />
PCIE_RX7P<br />
PCIE_TX7P<br />
P30<br />
C214 1 2<br />
0.1U_0402_16V7K<br />
N36<br />
PCIE_GTX_MRX_N8<br />
PCIE_GTX_C_MRX_N8<br />
PCIE_RX7N<br />
PCIE_TX7N<br />
P29<br />
C215 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P7 N38<br />
PCIE_GTX_MRX_P7<br />
PCIE_GTX_C_MRX_P7<br />
PCIE_MTX_C_GRX_N7<br />
PCIE_RX8P<br />
PCIE_TX8P<br />
N33<br />
C216 1 2<br />
0.1U_0402_16V7K<br />
M37<br />
PCIE_GTX_MRX_N7<br />
PCIE_GTX_C_MRX_N7<br />
PCIE_RX8N<br />
PCIE_TX8N<br />
N32<br />
C217 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P6 M35<br />
PCIE_GTX_MRX_P6<br />
PCIE_GTX_C_MRX_P6<br />
PCIE_MTX_C_GRX_N6<br />
PCIE_RX9P<br />
PCIE_TX9P<br />
N30<br />
C218 1 2<br />
0.1U_0402_16V7K<br />
L36<br />
PCIE_GTX_MRX_N6<br />
PCIE_GTX_C_MRX_N6<br />
PCIE_RX9N<br />
PCIE_TX9N<br />
N29<br />
C219 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P5 L38<br />
PCIE_GTX_MRX_P5<br />
PCIE_GTX_C_MRX_P5<br />
PCIE_MTX_C_GRX_N5<br />
PCIE_RX10P<br />
PCIE_TX10P<br />
L33<br />
C220 1 2<br />
0.1U_0402_16V7K<br />
K37<br />
PCIE_GTX_MRX_N5<br />
PCIE_GTX_C_MRX_N5<br />
PCIE_RX10N<br />
PCIE_TX10N<br />
L32<br />
C221 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P4 K35<br />
PCIE_GTX_MRX_P4<br />
PCIE_GTX_C_MRX_P4<br />
PCIE_MTX_C_GRX_N4<br />
PCIE_RX11P<br />
PCIE_TX11P<br />
L30<br />
C222 1 2<br />
0.1U_0402_16V7K<br />
J36<br />
PCIE_GTX_MRX_N4<br />
PCIE_GTX_C_MRX_N4<br />
PCIE_RX11N<br />
PCIE_TX11N<br />
L29<br />
C223 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P3 J38<br />
PCIE_GTX_MRX_P3<br />
PCIE_GTX_C_MRX_P3<br />
PCIE_MTX_C_GRX_N3<br />
PCIE_RX12P<br />
PCIE_TX12P<br />
K33<br />
C224 1 2<br />
0.1U_0402_16V7K<br />
H37<br />
PCIE_GTX_MRX_N3<br />
PCIE_GTX_C_MRX_N3<br />
PCIE_RX12N<br />
PCIE_TX12N<br />
K32<br />
C225 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P2 H35<br />
PCIE_GTX_MRX_P2<br />
PCIE_GTX_C_MRX_P2<br />
PCIE_MTX_C_GRX_N2<br />
PCIE_RX13P<br />
PCIE_TX13P<br />
J33<br />
C226 1 2<br />
0.1U_0402_16V7K<br />
G36<br />
PCIE_GTX_MRX_N2<br />
PCIE_GTX_C_MRX_N2<br />
PCIE_RX13N<br />
PCIE_TX13N<br />
J32<br />
C227 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P1 G38<br />
PCIE_GTX_MRX_P1<br />
PCIE_GTX_C_MRX_P1<br />
PCIE_MTX_C_GRX_N1<br />
PCIE_RX14P<br />
PCIE_TX14P<br />
K30<br />
C228 1 2<br />
0.1U_0402_16V7K<br />
F37<br />
PCIE_GTX_MRX_N1<br />
PCIE_GTX_C_MRX_N1<br />
PCIE_RX14N<br />
PCIE_TX14N<br />
K29<br />
C229 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
PCIE_MTX_C_GRX_P0 F35<br />
PCIE_GTX_MRX_P0<br />
PCIE_GTX_C_MRX_P0<br />
PCIE_MTX_C_GRX_N0<br />
PCIE_RX15P<br />
PCIE_TX15P<br />
H33<br />
C230 1 2<br />
0.1U_0402_16V7K<br />
E37<br />
PCIE_GTX_MRX_N0<br />
PCIE_GTX_C_MRX_N0<br />
PCIE_RX15N<br />
PCIE_TX15N<br />
H32<br />
C231 1 2<br />
0.1U_0402_16V7K<br />
VGA@<br />
VGA@<br />
CLOCK<br />
CLK_PEG_VGA<br />
AB35<br />
PCIE_REFCLKP<br />
CLK_PEG_VGA#<br />
AA36<br />
PCIE_REFCLKN<br />
CALIBRATION<br />
For M96, AH16 is NC<br />
AJ21<br />
For Mahatten need PD<br />
NC#1<br />
PCIE_CALRP<br />
Y30<br />
R98 1 VGA@ 2<br />
1.27K_0402_1%<br />
AK21<br />
NC#2<br />
AH16<br />
NC_PWRGOOD<br />
PCIE_CALRN<br />
Y29<br />
R100 1 VGA@ 2<br />
2K_0402_1%<br />
+1.0VSG<br />
R99<br />
2 VGA@ 10K_0402_5%<br />
1<br />
VGA_RST#<br />
AA30<br />
PERSTB<br />
PCI EXPRESS INTERFACE<br />
216-0729002 A12 M96_BGA962<br />
MAD@<br />
MAD A12 (SA00003M300)<br />
www.mycomp.su<br />
PLT_RST#<br />
<br />
LVTMDP<br />
216-0729002 A12 M96_BGA962<br />
MAD@<br />
PE_GPIO0<br />
TXOUT_U0P_DPF2P<br />
AJ38<br />
TXOUT_U0N_DPF2N<br />
AK37<br />
TXOUT_U1P_DPF1P<br />
AH35<br />
TXOUT_U1N_DPF1N<br />
AJ36<br />
TXOUT_U2P_DPF0P<br />
AG38<br />
TXOUT_U2N_DPF0N<br />
AH37<br />
TXOUT_U3P<br />
AF35<br />
TXOUT_U3N<br />
AG36<br />
TXCLK_LP_DPE3P<br />
AP34<br />
TXCLK_LN_DPE3N<br />
AR34<br />
TXOUT_L0P_DPE2P<br />
AW37<br />
TXOUT_L0N_DPE2N<br />
AU35<br />
TXOUT_L1P_DPE1P<br />
AR37<br />
TXOUT_L1N_DPE1N<br />
AU39<br />
TXOUT_L2P_DPE0P<br />
AP35<br />
TXOUT_L2N_DPE0N<br />
AR35<br />
TXOUT_L3P<br />
AN36<br />
TXOUT_L3N<br />
AP37<br />
U5<br />
PARK@<br />
VGA_TXOUT1+<br />
VGA_TXOUT1-<br />
VGA_TXCLK+<br />
VGA_TXCLK-<br />
VGA_TXOUT0+<br />
VGA_TXOUT0-<br />
VGA_TXOUT2+<br />
VGA_TXOUT2-<br />
PARK XT-M2 A11<br />
PARK A11 (SA00003MC10)<br />
1<br />
R492<br />
2.2K_0402_5%<br />
@<br />
+3VSG<br />
1<br />
D45 RB751V_SOD323<br />
1 2<br />
VGA@<br />
2<br />
R491<br />
10K_0402_5%<br />
VGA@<br />
VGA_RST#<br />
1 2<br />
D44 RB751V_SOD323<br />
SG@<br />
Pop for PX verify<br />
VGA_TXCLK+ <br />
VGA_TXCLK- <br />
VGA_TXOUT0+ <br />
VGA_TXOUT0- <br />
VGA_TXOUT1+ <br />
VGA_TXOUT1- <br />
VGA_TXOUT2+ <br />
VGA_TXOUT2- <br />
C<br />
B<br />
+3VSG<br />
A<br />
2<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2009/7/14 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 15 of<br />
55<br />
3<br />
2<br />
1
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
5<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
2<br />
5<br />
3<br />
4<br />
3<br />
2<br />
1<br />
D<br />
C<br />
B<br />
A<br />
<br />
Strap Name<br />
VIP_DEVICE_EN<br />
VGA_DIS<br />
TX_PWRS_ENB<br />
TX_DEEMPH_EN<br />
CONFIG[2]<br />
CONFIG[1]<br />
CONFIG[0]<br />
BIOS_<strong>ROM</strong>_EN<br />
AUD[1]<br />
AUD(0)<br />
BIF_GEN2_EN<br />
RESERVED<br />
Park<br />
(XT)<br />
27M_NSSC<br />
+3VSG<br />
+1.8VSG<br />
+3VSG<br />
+3VSG<br />
XTALOUT<br />
V2SYNC<br />
GPIO9<br />
GPIO0<br />
GPIO1<br />
GPIO13<br />
GPIO12<br />
GPIO11<br />
GPIO22<br />
HSYNC<br />
VSYNC<br />
GPIO2<br />
H2SYNC<br />
GPIO8<br />
GPIO21<br />
VGA@ R104 1 2<br />
VGA@ R107 1 2<br />
@ R109 1 2<br />
5<br />
VIP Device Strap Enable indicates to the software driver<br />
0: Driver would ignore the value sampled on VHAD_0 during reset<br />
1: VHAD_0 to determine whether or not a VIP slave device<br />
27MCLK<br />
Pin Straps description <br />
VGA Disable determines<br />
0: VGA Controller capacity enabled<br />
1: The device will not be recognized as the system’s VGA controller<br />
Transmitter Power Saving Enable<br />
0: 50% Tx output swing for mobile mode<br />
1: full Tx output swing (Default setting for Desktop)<br />
PCI Express Transmitter De-emphasis Enable<br />
0: Tx de-emphasis diabled for mobile mode<br />
1: Tx de-emphasis enabled (Defailt setting for desktop)<br />
GPIO13,12,11 (config 2,1,0) :<br />
a) If BIOS_<strong>ROM</strong>_EN = 1, then Config[2:0] defines<br />
the <strong>ROM</strong> type.<br />
b) If BIOS_<strong>ROM</strong>_EN = 0, then Config[2:0] defines<br />
the primary memory aperture size.<br />
Enable external BIOS <strong>ROM</strong> device<br />
0: Diable, 1: Enable<br />
VRAM_ID0<br />
VRAM_ID1<br />
VRAM_ID2<br />
VRAM_ID3<br />
TRSTB<br />
TMS<br />
TCK<br />
TESTEN<br />
VGA_GPIO0<br />
VGA_GPIO1<br />
VGA_GPIO2<br />
VGA_AC_DET<br />
SOUT_GPIO8<br />
SIN_GPIO9<br />
VGA_GPIO11<br />
VGA_GPIO12<br />
VGA_GPIO13<br />
<strong>ROM</strong>SE_GPIO22<br />
GENERICC<br />
TESTEN <br />
memory apertures<br />
CONFIG[3:0]<br />
128 MB 000<br />
256 MB 001 *<br />
64 MB 010<br />
<br />
<br />
<br />
VGA_ENBKL<br />
<br />
VGA_LCD_CLK<br />
VGA_LCD_DAT<br />
CH751H-40PT_SOD323-2<br />
ACIN_BUF 1<br />
D2<br />
@ 2<br />
<br />
<br />
GPU_VID0<br />
GPU_VID1<br />
VGA_HDMI_DET<br />
+1.8VSG<br />
+1.8VSG<br />
L20<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
VGA@<br />
1<br />
+1.0VSG<br />
L21<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
VGA@<br />
Setting<br />
00: No audio function; 10: Audio for DisplayPort only;<br />
01: Audio for DisplayPort and HDMI if adapter is detected;<br />
11<br />
11: Audio for both DisplayPort and HDMI<br />
0= Advertises the PCI-E device as 2.5 GT/s capable at power-on<br />
1= Advertises the PCI-E device as 5.0 GT/s capable at power-on 0<br />
5.0 GT/s capability will be controlled <strong>by</strong> software<br />
Internal use only. THIS PAD HAS AN INTERNAL<br />
PULL-DOWN AND MUST BE 0 V AT RESET. The<br />
pad may be left unconnected<br />
@ R111 1 2<br />
@ R113 1 2<br />
VGA@ R115 1 2<br />
@ R116 1 2<br />
@ R117 1 2<br />
@ R118 1 2<br />
@ R119 1 2<br />
Location<br />
VRAM_ID3 VRAM_ID2 VRAM_ID1 VRAM_ID0<br />
VRAM<br />
64MX16 <br />
Samsung O 1 O O<br />
<br />
Hynix<br />
1 1<br />
O O<br />
<br />
AMD 1 1<br />
1 O<br />
<br />
Hynix(128MbX16) 1 1<br />
O<br />
1<br />
<br />
Location<br />
VRAM_ID3 VRAM_ID2 VRAM_ID1 VRAM_ID0<br />
VRAM<br />
Madsion<br />
64MX16<br />
(Pro)<br />
Samsung<br />
O<br />
O<br />
<br />
O<br />
O<br />
Hynix<br />
1 O<br />
O O<br />
<br />
AMD<br />
1<br />
O<br />
1<br />
O<br />
<br />
Hynix(128MbX16) 1 O O<br />
1<br />
<br />
C262<br />
VGA@<br />
18P_0402_50V8J<br />
@ R110 1 2<br />
R123<br />
10K_0402_5%<br />
@<br />
R128<br />
10K_0402_5%<br />
@<br />
R124<br />
10K_0402_5%<br />
@<br />
R129<br />
10K_0402_5%<br />
@<br />
1M_0603_5%<br />
For VGA boot unstable issue<br />
VGA@<br />
R125<br />
10K_0402_5%<br />
@<br />
R130<br />
10K_0402_5%<br />
@<br />
1 VGAOPT@ 2<br />
R147<br />
10K_0402_5%<br />
1 VGAOPT@ 2<br />
R420<br />
10K_0402_5%<br />
1 VGAOPT@ 2<br />
R421<br />
10K_0402_5%<br />
R148<br />
Y1<br />
VGA@<br />
2 1<br />
27MHZ_16PF_X5H027000FG1H<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
3K_0402_5%<br />
10K_0402_5%<br />
R126<br />
10K_0402_5%<br />
@<br />
R131<br />
10K_0402_5%<br />
@<br />
C263<br />
VGA@<br />
18P_0402_50V8J<br />
Internal PD<br />
PD-Reset<br />
2<br />
VGA@<br />
0<br />
0<br />
1<br />
1<br />
001<br />
0<br />
+3VSG<br />
C252<br />
10U_0603_6.3V6M<br />
+1.8VSG<br />
L23<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
VGA@ 1<br />
1<br />
R135<br />
4<br />
2<br />
VGA@<br />
R105<br />
R108<br />
2 1<br />
R120<br />
VGA@<br />
10K_0402_5%<br />
R133<br />
2<br />
VGA@<br />
C258<br />
10U_0603_6.3V6M<br />
1 VGA@ 2<br />
1 VGA@ 2<br />
C249<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
VGA@<br />
2<br />
VGA@<br />
1 VGA@ 2<br />
1 VGA@ 2<br />
VGA_LCD_CLK<br />
VGA_LCD_DAT<br />
VGA_GPIO0<br />
VGA_GPIO1<br />
VGA_GPIO2<br />
VGA_ENBKL<br />
SOUT_GPIO8<br />
SIN_GPIO9<br />
VGA_GPIO11<br />
VGA_GPIO12<br />
VGA_GPIO13<br />
GPU_VID0<br />
THM_ALERT#<br />
GPU_VID1<br />
GENERICC<br />
VGA_HDMI_DET<br />
1<br />
+DPLL_VDDC<br />
1<br />
+TSVDD<br />
1<br />
C259<br />
1U_0402_6.3V4Z<br />
T12<br />
T14<br />
T17<br />
NC on Park<br />
VRAM_ID0<br />
VRAM_ID1<br />
VRAM_ID2<br />
VRAM_ID3<br />
NC on Park<br />
4.7K_0402_5%<br />
4.7K_0402_5%<br />
VGA_AC_DET<br />
<strong>ROM</strong>SE_GPIO22<br />
TRSTB<br />
TCK<br />
TMS<br />
Park NC pins<br />
499_0402_1%<br />
249_0402_1%<br />
1 2<br />
VGA@<br />
C245<br />
0.1U_0402_16V4Z<br />
1<br />
2<br />
VGA@<br />
C253<br />
0.1U_0402_16V4Z<br />
T11<br />
C250<br />
0.1U_0402_16V4Z<br />
2<br />
VGA@<br />
2<br />
VGA@<br />
1<br />
2<br />
VGA@<br />
C256<br />
1U_0402_6.3V4Z<br />
C260<br />
0.1U_0402_16V4Z<br />
+VGA_VREF<br />
+DPLL_PVDD<br />
C251<br />
1U_0402_6.3V4Z<br />
120mA<br />
AM32<br />
AN32<br />
150mA<br />
AN31<br />
27MCLK<br />
XTALOUT<br />
AR8<br />
AU8<br />
AP8<br />
AW8<br />
AR3<br />
AR1<br />
AU1<br />
AU3<br />
AW3<br />
AP6<br />
AW5<br />
AU5<br />
AR6<br />
AW6<br />
AU6<br />
AT7<br />
AV7<br />
AN7<br />
AV9<br />
AT9<br />
AR10<br />
AW10<br />
AU10<br />
AP10<br />
AV11<br />
AT11<br />
AR12<br />
AW12<br />
AU12<br />
AP12<br />
AK26<br />
AJ26<br />
AH20<br />
AH18<br />
AN16<br />
AH23<br />
AJ23<br />
AH17<br />
AJ17<br />
AK17<br />
AJ13<br />
AH15<br />
AJ16<br />
AK16<br />
AL16<br />
AM16<br />
AM14<br />
AM13<br />
AK14<br />
AG30<br />
AN14<br />
AM17<br />
AL13<br />
AJ14<br />
AK13<br />
AN13<br />
AM23<br />
AN23<br />
AK23<br />
AL24<br />
AM24<br />
AJ19<br />
AK19<br />
AJ20<br />
AK20<br />
AJ24<br />
AH26<br />
AH24<br />
AK24<br />
AH13<br />
AV33<br />
AU34<br />
AF29<br />
AG29<br />
20mA AK32<br />
AJ32<br />
AJ33<br />
U5B<br />
MUTI GFX<br />
DVPCNTL_MVP_0<br />
DVPCNTL_MVP_1<br />
DVPCNTL_0<br />
DVPCNTL_1<br />
DVPCNTL_2<br />
DVPCLK<br />
DVPDATA_0<br />
DVPDATA_1<br />
DVPDATA_2<br />
DVPDATA_3<br />
DVPDATA_4<br />
DVPDATA_5<br />
DVPDATA_6<br />
DVPDATA_7<br />
DVPDATA_8<br />
DVPDATA_9<br />
DVPDATA_10<br />
DVPDATA_11<br />
DVPDATA_12<br />
DVPDATA_13<br />
DVPDATA_14<br />
DVPDATA_15<br />
DVPDATA_16<br />
DVPDATA_17<br />
DVPDATA_18<br />
DVPDATA_19<br />
DVPDATA_20<br />
DVPDATA_21<br />
DVPDATA_22<br />
DVPDATA_23<br />
SCL<br />
SDA<br />
I2C<br />
GENERAL PURPOSE I/O<br />
GPIO_0<br />
GPIO_1<br />
GPIO_2<br />
GPIO_3_SMBDATA<br />
GPIO_4_SMBCLK<br />
GPIO_5_AC_BATT<br />
GPIO_6<br />
GPIO_7_BLON<br />
GPIO_8_<strong>ROM</strong>SO<br />
GPIO_9_<strong>ROM</strong>SI<br />
GPIO_10_<strong>ROM</strong>SCK<br />
GPIO_11<br />
GPIO_12<br />
GPIO_13<br />
GPIO_14_HPD2<br />
GPIO_15_PWRCNTL_0<br />
GPIO_16_SSIN<br />
GPIO_17_THERMAL_INT<br />
GPIO_18_HPD3<br />
GPIO_19_CTF<br />
GPIO_20_PWRCNTL_1<br />
GPIO_21_BB_EN<br />
GPIO_22_<strong>ROM</strong>CSB<br />
GPIO_23_CLKREQB<br />
JTAG_TRSTB<br />
JTAG_TDI<br />
JTAG_TCK<br />
JTAG_TMS<br />
JTAG_TDO<br />
GENERICA<br />
GENERICB<br />
GENERICC<br />
GENERICD<br />
GENERICE_HPD4<br />
GENERICF<br />
GENERICG<br />
HPD1<br />
VREFG<br />
DPLL_PVDD<br />
DPLL_PVSS<br />
DPLL_VDDC<br />
XTALIN<br />
XTALOUT<br />
DPLUS<br />
DMINUS<br />
TS_FDO<br />
TSVDD<br />
TSVSS<br />
PLL/CLOCK<br />
THERMAL<br />
216-0729002 A12 M96_BGA962<br />
MAD@<br />
DPA<br />
DPB<br />
DPC<br />
DPD<br />
DAC1<br />
DAC2<br />
DDC/AUX<br />
3<br />
TXCAP_DPA3P<br />
TXCAM_DPA3N<br />
TX0P_DPA2P<br />
TX0M_DPA2N<br />
TX1P_DPA1P<br />
TX1M_DPA1N<br />
TX2P_DPA0P<br />
TX2M_DPA0N<br />
TXCBP_DPB3P<br />
TXCBM_DPB3N<br />
TX3P_DPB2P<br />
TX3M_DPB2N<br />
TX4P_DPB1P<br />
TX4M_DPB1N<br />
TX5P_DPB0P<br />
TX5M_DPB0N<br />
TXCCP_DPC3P<br />
TXCCM_DPC3N<br />
TX0P_DPC2P<br />
TX0M_DPC2N<br />
TX1P_DPC1P<br />
TX1M_DPC1N<br />
TX2P_DPC0P<br />
TX2M_DPC0N<br />
TXCDP_DPD3P<br />
TXCDM_DPD3N<br />
TX3P_DPD2P<br />
TX3M_DPD2N<br />
TX4P_DPD1P<br />
TX4M_DPD1N<br />
TX5P_DPD0P<br />
TX5M_DPD0N<br />
R<br />
RB<br />
G<br />
GB<br />
B<br />
BB<br />
HSYNC<br />
VSYNC<br />
RSET<br />
AVDD<br />
AVSSQ<br />
VDD1DI<br />
VSS1DI<br />
NC_DDCCLK_AUX7P<br />
NC_DDCDATA_AUX7N<br />
AC36<br />
AC38<br />
AC33<br />
AC34<br />
+VDD2DI<br />
+A2VDD<br />
+A2VDDQ<br />
VGA_HDMI_SCLK<br />
VGA_HDMI_SDATA<br />
VGA_CRT_CLK<br />
VGA_CRT_DATA<br />
VGA_HDMI_TXC+ <br />
VGA_HDMI_TXC- <br />
VGA_HDMI_TXD0+ <br />
VGA_HDMI_TXD0- <br />
VGA_HDMI_TXD1+ <br />
VGA_HDMI_TXD1- <br />
VGA_HDMI_TXD2+ <br />
VGA_HDMI_TXD2- <br />
VGA_CRT_R <br />
VGA_CRT_G <br />
VGA_CRT_B <br />
VGA_CRT_HSYNC <br />
VGA_CRT_VSYNC <br />
GPU_THERM_D+<br />
GPU_THERM_D-<br />
GPU_THERM_D+<br />
2200P_0402_50V7K<br />
VGA@ 1 2<br />
C233<br />
GPU_THERM_D-<br />
VGA_SMB_CK2<br />
VGA_SMB_DA2<br />
V2SYNC<br />
H2SYNC<br />
VGA_CRT_VSYNC<br />
VGA_CRT_HSYNC<br />
VGA_SMB_CK2<br />
VGA_SMB_DA2<br />
EC_SMB_CK2<br />
THM_ALERT#<br />
EC_SMB_CK2 <br />
EC_SMB_DA2 <br />
2 2 2<br />
R2<br />
AC30<br />
VGA@<br />
VGA@<br />
VGA@<br />
L17<br />
+3VALW<br />
R2B<br />
AC31<br />
Check If needed?<br />
BLM18AG121SN1D_0603<br />
G2<br />
AD30<br />
2<br />
1 +1.8VSG<br />
VGA@<br />
G2B<br />
AD31<br />
U7<br />
ACIN<br />
ACIN <br />
1 1 1<br />
ACIN_BUF<br />
B 2<br />
B2<br />
AF30<br />
4<br />
B2B<br />
AF31<br />
Y<br />
A 1<br />
@<br />
NC7SZ08P5X_NL_SC70-5<br />
2 2 2<br />
C<br />
AC32<br />
VGA@<br />
VGA@<br />
VGA@<br />
L18<br />
Y AD32 BLM18AG121SN1D_0603<br />
COMP<br />
AF32<br />
1 2<br />
2<br />
1 +1.8VSG<br />
R127<br />
0_0402_5%<br />
VGA@<br />
VGA@<br />
H2SYNC<br />
H2SYNC<br />
AD29<br />
V2SYNC<br />
V2SYNC<br />
AC29<br />
1 1 1<br />
B<br />
VDD2DI<br />
VSS2DI<br />
A2VDD<br />
A2VDDQ<br />
A2VSSQ<br />
R2SET<br />
DDC1CLK<br />
DDC1DATA<br />
AUX1P<br />
AUX1N<br />
DDC2CLK<br />
DDC2DATA<br />
AUX2P<br />
AUX2N<br />
DDCCLK_AUX3P<br />
DDCDATA_AUX3N<br />
DDCCLK_AUX4P<br />
DDCDATA_AUX4N<br />
DDCCLK_AUX5P<br />
DDCDATA_AUX5N<br />
DDC6CLK<br />
DDC6DATA<br />
AU24<br />
AV23<br />
AT25<br />
AR24<br />
AU26<br />
AV25<br />
AT27<br />
AR26<br />
AR30<br />
AT29<br />
AV31<br />
AU30<br />
AR32<br />
AT31<br />
AT33<br />
AU32<br />
AU14<br />
AV13<br />
AT15<br />
AR14<br />
AU16<br />
AV15<br />
AT17<br />
AR16<br />
AU20<br />
AT19<br />
AT21<br />
AR20<br />
AU22<br />
AV21<br />
AT23<br />
AR22<br />
AD39<br />
AD37<br />
AE36<br />
AD35<br />
AF37<br />
AE38<br />
AB34<br />
AD34<br />
AE34<br />
AG31<br />
AG32<br />
AG33<br />
AD33<br />
AF33<br />
AA29<br />
AM26<br />
AN26<br />
AM27<br />
AL27<br />
AM19<br />
AL19<br />
AN20<br />
AM20<br />
AL30<br />
AM30<br />
AL29<br />
AM29<br />
AN21<br />
AM21<br />
AJ30<br />
AJ31<br />
AK30<br />
AK29<br />
Security Classification<br />
Issued Date<br />
Not share via for other GND<br />
R122 1 VGA@ 2<br />
70mA<br />
+AVDD<br />
45mA<br />
+VDD1DI<br />
R140<br />
715_0402_1%<br />
1 2<br />
VGA@<br />
NC on Park<br />
50mA<br />
130mA<br />
20mA<br />
NC on Park<br />
NC on Park<br />
499_0402_1%<br />
www.mycomp.su<br />
1<br />
2<br />
VGA@<br />
C236<br />
1U_0402_6.3V4Z<br />
C240<br />
1U_0402_6.3V4Z<br />
C242<br />
1U_0402_6.3V4Z<br />
1<br />
1<br />
C246<br />
1U_0402_6.3V4Z<br />
C237<br />
0.1U_0402_16V4Z<br />
C239<br />
0.1U_0402_16V4Z<br />
1<br />
2 VGA_HDMI_SCLK<br />
VGA@ R138 1 2<br />
10K_0402_5%<br />
VGA_HDMI_SDATA<br />
VGA@ R139 1 2<br />
10K_0402_5%<br />
2 2 2<br />
VGA_CRT_CLK<br />
VGA@ R141 1 2<br />
10K_0402_5%<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA_CRT_DATA<br />
VGA@ R142 1 2<br />
10K_0402_5%<br />
VGA_CRT_R<br />
VGA@ R143 1 2<br />
150_0402_1%<br />
VGA_CRT_G<br />
VGA@ R144 1 2<br />
150_0402_1%<br />
VGA_HDMI_SCLK <br />
HDMI<br />
VGA_CRT_B<br />
VGA@ R145 1 2<br />
150_0402_1%<br />
VGA_HDMI_SDATA <br />
BLM18AG121SN1D_0603<br />
VGA@<br />
VGA@ 1 +1.8VSG<br />
L22<br />
1 1 1<br />
VGA@<br />
VGA@<br />
2 2 2<br />
C254<br />
1U_0402_6.3V4Z<br />
2<br />
VGA@<br />
C243<br />
0.1U_0402_16V4Z<br />
C255<br />
0.1U_0402_16V4Z<br />
VGA_CRT_CLK <br />
VGA_CRT_DATA <br />
1<br />
2<br />
VGA@<br />
C247<br />
0.1U_0402_16V4Z<br />
C241<br />
10U_0603_6.3V6M<br />
C257<br />
10U_0603_6.3V6M<br />
CRT<br />
C232<br />
VGA@<br />
+3VSG<br />
L19<br />
BLM18AG121SN1D_0603<br />
1 +3VSG<br />
VGA@<br />
+3VSG<br />
<strong>Compal</strong> Secret Data<br />
2009/7/14 Deciphered Date<br />
2010/03/12<br />
2<br />
C238<br />
22U_0805_6.3V6M<br />
C244<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
External VGA Thermal Sensor<br />
Address 1001 101X b<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
401827<br />
C<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Tuesday, September 14, 2010<br />
Date: Sheet of<br />
16 55<br />
2<br />
1<br />
1<br />
2<br />
R102<br />
4.7K_0402_5%<br />
VGA@<br />
L16<br />
BLM18AG121SN1D_0603<br />
1 +1.8VSG<br />
VGA@<br />
C248<br />
10U_0603_6.3V6M<br />
0.1U_0402_16V4Z<br />
1 2<br />
1<br />
2<br />
3<br />
4<br />
1 2<br />
Strap<br />
U6<br />
VGA@<br />
VDD SCLK 8<br />
D+ SDATA 7<br />
D- ALERT#<br />
6<br />
THERM# GND 5<br />
ADM1032ARMZ-2REEL_MSOP8<br />
R103<br />
4.7K_0402_5%<br />
VGA@<br />
1<br />
Title<br />
4<br />
Q5A<br />
+3VSG<br />
2 1<br />
R597<br />
0_0402_5%<br />
VGA@<br />
Q5B<br />
VGA@<br />
DMN66D0LDW-7_SOT363-6<br />
3<br />
6 EC_SMB_DA2<br />
VGA@<br />
DMN66D0LDW-7_SOT363-6<br />
P 5<br />
G<br />
@ R132 1 2<br />
@ R134 1 2<br />
VGA@ R136 1 2<br />
VGA@ R137 1 2<br />
1 2<br />
R101<br />
4.7K_0402_5%<br />
VGA@<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
10K_0402_5%<br />
FLASH <strong>ROM</strong><br />
A 1-Mbit serial EEP<strong>ROM</strong> is<br />
required on GDDR5 designs<br />
DDR3 can be removed<br />
+3VSG<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
+3VSG<br />
D<br />
C<br />
A
5<br />
4<br />
3<br />
2<br />
1<br />
Park only support single channel<br />
memory (channel B only)<br />
U5C<br />
U5D<br />
D<br />
C<br />
B<br />
A<br />
MAA[0..12]<br />
MDA[0..63]<br />
MAA[0..12] <br />
MDA[0..63]<br />
MDB[0..63]<br />
MDA0 C37<br />
MAA0<br />
MDA1<br />
DQA_0<br />
MAA_0<br />
G24<br />
C35<br />
MAA1<br />
MDA2<br />
DQA_1<br />
MAA_1<br />
J23<br />
A35<br />
MAA2<br />
MDA3<br />
DQA_2<br />
MAA_2<br />
H24<br />
E34<br />
MAA3<br />
MDA4<br />
DQA_3<br />
MAA_3<br />
J24<br />
G32<br />
MAA4<br />
MDA5<br />
DQA_4<br />
MAA_4<br />
H26<br />
D33<br />
MAA5<br />
MDA6<br />
DQA_5<br />
MAA_5<br />
J26<br />
F32<br />
MAA6<br />
MDA7<br />
DQA_6<br />
MAA_6<br />
H21<br />
E32<br />
MAA7<br />
MDA8<br />
DQA_7<br />
MAA_7<br />
G21<br />
D31<br />
MAA8<br />
MDA9<br />
DQA_8<br />
MAA_8<br />
H19<br />
F30<br />
MAA9<br />
MDA10<br />
DQA_9<br />
MAA_9<br />
H20<br />
C30<br />
MAA10<br />
MDA11<br />
DQA_10<br />
MAA_10<br />
L13<br />
A30<br />
MAA11<br />
MDA12<br />
DQA_11<br />
MAA_11<br />
G16<br />
F28<br />
MAA12<br />
A_BA[0..2]<br />
MDA13<br />
DQA_12<br />
MAA_12<br />
J16<br />
A_BA[0..2] <br />
C28<br />
A_BA2<br />
MDA14<br />
DQA_13<br />
MAA_13/BA2<br />
H16<br />
A28<br />
A_BA0<br />
MDA15<br />
DQA_14<br />
MAA_14/BA0<br />
J17<br />
E28<br />
A_BA1<br />
MDA16<br />
DQA_15<br />
MAA_15/BA1<br />
H17<br />
D27<br />
DQMA#[0..7]<br />
MDA17<br />
DQA_16<br />
DQMA#[0..7] <br />
F26<br />
DQMA#0<br />
MDA18<br />
DQA_17<br />
DQMA_0<br />
A32<br />
C26<br />
DQMA#1<br />
MDA19<br />
DQA_18<br />
DQMA_1<br />
C32<br />
A26<br />
DQMA#2<br />
MDA20<br />
DQA_19<br />
DQMA_2<br />
D23<br />
F24<br />
DQMA#3<br />
MDA21<br />
DQA_20<br />
DQMA_3<br />
E22<br />
C24<br />
DQMA#4<br />
MDA22<br />
DQA_21<br />
DQMA_4<br />
C14<br />
A24<br />
DQMA#5<br />
MDA23<br />
DQA_22<br />
DQMA_5<br />
A14<br />
E24<br />
DQMA#6<br />
MDA24<br />
DQA_23<br />
DQMA_6<br />
E10<br />
C22<br />
DQMA#7<br />
MDA25<br />
DQA_24<br />
DQMA_7<br />
D9<br />
A22<br />
QSA[0..7]<br />
QSA[0..7] <br />
MDA26<br />
DQA_25<br />
F22<br />
QSA0<br />
MDA27<br />
DQA_26<br />
QSA_0/RDQSA_0<br />
C34<br />
D21<br />
QSA1<br />
MDA28<br />
DQA_27<br />
QSA_1/RDQSA_1<br />
D29<br />
A20<br />
QSA2<br />
MDA29<br />
DQA_28<br />
QSA_2/RDQSA_2<br />
D25<br />
F20<br />
QSA3<br />
MDA30<br />
DQA_29<br />
QSA_3/RDQSA_3<br />
E20<br />
D19<br />
QSA4<br />
MDA31<br />
DQA_30<br />
QSA_4/RDQSA_4<br />
E16<br />
E18<br />
QSA5<br />
MDA32<br />
DQA_31<br />
QSA_5/RDQSA_5<br />
E12<br />
C18<br />
QSA6<br />
MDA33<br />
DQA_32<br />
QSA_6/RDQSA_6<br />
J10<br />
A18<br />
QSA7<br />
MDA34<br />
DQA_33<br />
QSA_7/RDQSA_7<br />
D7<br />
F18<br />
QSA#[0..7]<br />
QSA#[0..7] <br />
MDA35<br />
DQA_34<br />
D17<br />
QSA#0<br />
MDA36<br />
DQA_35<br />
QSA_0B/WDQSA_0<br />
A34<br />
A16<br />
QSA#1<br />
MDA37<br />
DQA_36<br />
QSA_1B/WDQSA_1<br />
E30<br />
F16<br />
QSA#2<br />
MDA38<br />
DQA_37<br />
QSA_2B/WDQSA_2<br />
E26<br />
D15<br />
QSA#3<br />
MDA39<br />
DQA_38<br />
QSA_3B/WDQSA_3<br />
C20<br />
E14<br />
QSA#4<br />
MDA40<br />
DQA_39<br />
QSA_4B/WDQSA_4<br />
C16<br />
F14<br />
QSA#5<br />
MDA41<br />
DQA_40<br />
QSA_5B/WDQSA_5<br />
C12<br />
D13<br />
QSA#6<br />
MDA42<br />
DQA_41<br />
QSA_6B/WDQSA_6<br />
J11<br />
F12<br />
QSA#7<br />
+1.5VSG<br />
MDA43<br />
DQA_42<br />
QSA_7B/WDQSA_7<br />
F8<br />
A12<br />
+1.5VSG<br />
MDA44<br />
DQA_43<br />
D11<br />
ODTA0<br />
ODTA0 <br />
MDA45<br />
DQA_44<br />
ODTA0<br />
J21<br />
F10<br />
ODTA1<br />
ODTA1 <br />
MDA46<br />
DQA_45<br />
ODTA1<br />
G19<br />
A10<br />
MDA47<br />
DQA_46<br />
C10<br />
CLKA0<br />
R151<br />
CLKA0 <br />
MDA48<br />
DQA_47<br />
CLKA0<br />
H27<br />
G13<br />
CLKA0#<br />
VGA@<br />
CLKA0# <br />
R152<br />
MDA49<br />
DQA_48<br />
CLKA0B<br />
G27<br />
H13<br />
40.2_0402_1%<br />
VGA@<br />
MDA50<br />
DQA_49<br />
J13<br />
CLKA1<br />
CLKA1 <br />
MDA51<br />
DQA_50<br />
CLKA1<br />
J14<br />
40.2_0402_1%<br />
H11<br />
CLKA1#<br />
MVREFDB<br />
CLKA1# <br />
MDA52<br />
DQA_51<br />
CLKA1B<br />
H14<br />
G10<br />
MVREFDA<br />
MDA53<br />
DQA_52<br />
G8<br />
RASA0#<br />
RASA0# <br />
MDA54<br />
DQA_53<br />
RASA0B<br />
K23<br />
K9<br />
RASA1#<br />
RASA1# <br />
MDA55<br />
DQA_54<br />
RASA1B<br />
K19<br />
R153<br />
1<br />
1<br />
K10<br />
VGA@<br />
C265<br />
R154<br />
C264<br />
MDA56<br />
DQA_55<br />
G9<br />
CASA0#<br />
CASA0# <br />
MDA57<br />
DQA_56<br />
CASA0B<br />
K20<br />
100_0402_1%<br />
VGA@<br />
A8<br />
CASA1#<br />
CASA1# <br />
MDA58<br />
DQA_57<br />
CASA1B<br />
K17<br />
VGA@<br />
100_0402_1%<br />
VGA@<br />
2<br />
C8<br />
2<br />
MDA59<br />
DQA_58<br />
E8<br />
CSA0#_0<br />
CSA0#_0 <br />
MDA60<br />
DQA_59<br />
CSA0B_0<br />
K24<br />
A6<br />
MDA61<br />
DQA_60<br />
CSA0B_1<br />
K27<br />
C6<br />
MDA62<br />
DQA_61<br />
E6<br />
CSA1#_0<br />
CSA1#_0 <br />
MDA63<br />
DQA_62<br />
CSA1B_0<br />
M13<br />
A5<br />
+1.5VSG<br />
DQA_63<br />
CSA1B_1<br />
K16<br />
1<br />
2<br />
1<br />
2<br />
+1.5VSG<br />
1<br />
R157<br />
VGA@<br />
40.2_0402_1%<br />
2<br />
1<br />
R167<br />
VGA@<br />
100_0402_1%<br />
2<br />
0.1U_0402_16V4Z<br />
MVREFSA<br />
1<br />
2<br />
C266<br />
0.1U_0402_16V4Z<br />
VGA@<br />
R155<br />
R158<br />
R159<br />
R160<br />
R162<br />
R164<br />
+1.5VSG<br />
If use M96 upper resistor will<br />
change to 100ohm for<br />
MVREFDA/B and MVREFSA/B<br />
Mahatten upper resistor use 40.2ohm<br />
MVREFDA L18<br />
MVREFSA L20<br />
MVREFDA<br />
MVREFSA<br />
MEMORY INTERFACE A<br />
1 VGA@ 2<br />
L27<br />
NC_MEM_CALRN0<br />
1 VGA@ 2<br />
240_0402_1% N12<br />
1 VGA@<br />
NC_MEM_CALRN1<br />
2<br />
240_0402_1% AG12<br />
240_0402_1%<br />
NC_MEM_CALRN2<br />
1 VGA@ 2<br />
M12<br />
MEM_CALRP1<br />
1 VGA@ 2<br />
240_0402_1% M27<br />
1 VGA@<br />
NC_MEM_CALRP0<br />
2<br />
240_0402_1% AH12<br />
240_0402_1%<br />
NC_MEM_CALRP2<br />
216-0729002 A12 M96_BGA962<br />
MAD@<br />
CKEA0<br />
K21<br />
CKEA1<br />
J20<br />
WEA0B<br />
K26<br />
WEA1B<br />
L15<br />
RSVD#1<br />
AF28<br />
RSVD#2<br />
AG28<br />
RSVD#3<br />
AL31<br />
RSVD#5<br />
H23<br />
RSVD#6<br />
J19<br />
RSVD#9<br />
T8<br />
RSVD#11<br />
W8<br />
In M97, Medison and Park, AF28 is<br />
FB_VDDC, AG28 is FB_VDDCI, AH29 is<br />
FB_GND. GCORE_SEN and FB_GND<br />
should route as differential pair Same<br />
as VDDCI_SEN and FB_GND<br />
CKEA0<br />
CKEA1<br />
WEA0#<br />
WEA1#<br />
GCORE_SEN<br />
M96 no support<br />
CKEA0 <br />
CKEA1 <br />
WEA0# <br />
WEA1# <br />
GCORE_SEN <br />
MAA13 <br />
MAB13 <br />
1<br />
2<br />
1<br />
2<br />
1<br />
R156<br />
VGA@<br />
40.2_0402_1%<br />
2<br />
1<br />
R165<br />
VGA@<br />
100_0402_1%<br />
2<br />
0.1U_0402_16V4Z<br />
If use M96 upper resistor will<br />
change to 100ohm for<br />
MVREFDA/B and MVREFSA/B<br />
Mahatten upper resistor use<br />
40.2ohm<br />
MAB[0..12]<br />
MDB[0..63]<br />
MAB[0..12] <br />
MDB0 C5<br />
MAB0<br />
MDB1<br />
DQB_0<br />
MAB_0<br />
P8<br />
C3<br />
MAB1<br />
MDB2<br />
DQB_1<br />
MAB_1<br />
T9<br />
E3<br />
MAB2<br />
MDB3<br />
DQB_2<br />
MAB_2<br />
P9<br />
E1<br />
MAB3<br />
MDB4<br />
DQB_3<br />
MAB_3<br />
N7<br />
F1<br />
MAB4<br />
MDB5<br />
DQB_4<br />
MAB_4<br />
N8<br />
F3<br />
MAB5<br />
MDB6<br />
DQB_5<br />
MAB_5<br />
N9<br />
F5<br />
MAB6<br />
MDB7<br />
DQB_6<br />
MAB_6<br />
U9<br />
G4<br />
MAB7<br />
MDB8<br />
DQB_7<br />
MAB_7<br />
U8<br />
H5<br />
MAB8<br />
MDB9<br />
DQB_8<br />
MAB_8<br />
Y9<br />
H6<br />
MAB9<br />
MDB10<br />
DQB_9<br />
MAB_9<br />
W9<br />
J4<br />
MAB10<br />
MDB11<br />
DQB_10<br />
MAB_10<br />
AC8<br />
K6<br />
MAB11<br />
MDB12<br />
DQB_11<br />
MAB_11<br />
AC9<br />
K5<br />
MAB12<br />
B_BA[0..2]<br />
MDB13<br />
DQB_12<br />
MAB_12<br />
AA7<br />
B_BA[0..2] <br />
L4<br />
B_BA2<br />
MDB14<br />
DQB_13<br />
MAB_13/BA2<br />
AA8<br />
M6<br />
B_BA0<br />
MDB15<br />
DQB_14<br />
MAB_14/BA0<br />
Y8<br />
M1<br />
B_BA1<br />
MDB16<br />
DQB_15<br />
MAB_15/BA1<br />
AA9<br />
M3<br />
DQMB#[0..7]<br />
MDB17<br />
DQB_16<br />
DQMB#[0..7] <br />
M5<br />
DQMB#0<br />
MDB18<br />
DQB_17<br />
DQMB_0<br />
H3<br />
N4<br />
DQMB#1<br />
MDB19<br />
DQB_18<br />
DQMB_1<br />
H1<br />
P6<br />
DQMB#2<br />
MDB20<br />
DQB_19<br />
DQMB_2<br />
T3<br />
P5<br />
DQMB#3<br />
MDB21<br />
DQB_20<br />
DQMB_3<br />
T5<br />
R4<br />
DQMB#4<br />
MDB22<br />
DQB_21<br />
DQMB_4<br />
AE4<br />
T6<br />
DQMB#5<br />
MDB23<br />
DQB_22<br />
DQMB_5<br />
AF5<br />
T1<br />
DQMB#6<br />
MDB24<br />
DQB_23<br />
DQMB_6<br />
AK6<br />
U4<br />
DQMB#7<br />
MDB25<br />
DQB_24<br />
DQMB_7<br />
AK5<br />
V6<br />
QSB[0..7]<br />
QSB[0..7] <br />
MDB26<br />
DQB_25<br />
V1<br />
QSB0<br />
MDB27<br />
DQB_26<br />
QSB_0/RDQSB_0<br />
F6<br />
V3<br />
QSB1<br />
MDB28<br />
DQB_27<br />
QSB_1/RDQSB_1<br />
K3<br />
Y6<br />
QSB2<br />
MDB29<br />
DQB_28<br />
QSB_2/RDQSB_2<br />
P3<br />
Y1<br />
QSB3<br />
MDB30<br />
DQB_29<br />
QSB_3/RDQSB_3<br />
V5<br />
Y3<br />
QSB4<br />
MDB31<br />
DQB_30<br />
QSB_4/RDQSB_4<br />
AB5<br />
Y5<br />
QSB5<br />
MDB32<br />
DQB_31<br />
QSB_5/RDQSB_5<br />
AH1<br />
AA4<br />
QSB6<br />
MDB33<br />
DQB_32<br />
QSB_6/RDQSB_6<br />
AJ9<br />
AB6<br />
QSB7<br />
MDB34<br />
DQB_33<br />
QSB_7/RDQSB_7<br />
AM5<br />
AB1<br />
QSB#[0..7]<br />
QSB#[0..7] <br />
MDB35<br />
DQB_34<br />
AB3<br />
QSB#0<br />
MDB36<br />
DQB_35<br />
QSB_0B/WDQSB_0<br />
G7<br />
AD6<br />
QSB#1<br />
MDB37<br />
DQB_36<br />
QSB_1B/WDQSB_1<br />
K1<br />
AD1<br />
QSB#2<br />
MDB38<br />
DQB_37<br />
QSB_2B/WDQSB_2<br />
P1<br />
AD3<br />
QSB#3<br />
MDB39<br />
DQB_38<br />
QSB_3B/WDQSB_3<br />
W4<br />
AD5<br />
QSB#4<br />
MDB40<br />
DQB_39<br />
QSB_4B/WDQSB_4<br />
AC4<br />
AF1<br />
QSB#5<br />
MDB41<br />
DQB_40<br />
QSB_5B/WDQSB_5<br />
AH3<br />
AF3<br />
QSB#6<br />
MDB42<br />
DQB_41<br />
QSB_6B/WDQSB_6<br />
AJ8<br />
AF6<br />
QSB#7<br />
MDB43<br />
DQB_42<br />
QSB_7B/WDQSB_7<br />
AM3<br />
AG4<br />
MDB44<br />
DQB_43<br />
AH5<br />
ODTB0<br />
ODTB0 <br />
MDB45<br />
DQB_44<br />
ODTB0<br />
T7<br />
AH6<br />
ODTB1<br />
ODTB1 <br />
MDB46<br />
DQB_45<br />
ODTB1<br />
W7<br />
AJ4<br />
MDB47<br />
DQB_46<br />
AK3<br />
CLKB0<br />
CLKB0 <br />
MDB48<br />
DQB_47<br />
CLKB0<br />
L9<br />
AF8<br />
CLKB0#<br />
CLKB0# <br />
MDB49<br />
DQB_48<br />
CLKB0B<br />
L8<br />
AF9<br />
MDB50<br />
DQB_49<br />
AG8<br />
CLKB1<br />
CLKB1 <br />
MDB51<br />
DQB_50<br />
CLKB1<br />
AD8<br />
AG7<br />
CLKB1#<br />
CLKB1# <br />
MDB52<br />
DQB_51<br />
CLKB1B<br />
AD7<br />
AK9<br />
MDB53<br />
DQB_52<br />
AL7<br />
RASB0#<br />
RASB0# <br />
MDB54<br />
DQB_53<br />
RASB0B<br />
T10<br />
AM8<br />
RASB1#<br />
RASB1# <br />
MDB55<br />
DQB_54<br />
RASB1B<br />
Y10<br />
AM7<br />
MDB56<br />
DQB_55<br />
AK1<br />
CASB0#<br />
CASB0# <br />
MDB57<br />
DQB_56<br />
CASB0B<br />
W10<br />
AL4<br />
CASB1#<br />
CASB1# <br />
MDB58<br />
DQB_57<br />
CASB1B<br />
AA10<br />
AM6<br />
MDB59<br />
DQB_58<br />
AM1<br />
CSB0#_0<br />
CSB0#_0 <br />
MDB60<br />
DQB_59<br />
CSB0B_0<br />
P10<br />
AN4<br />
MDB61<br />
DQB_60<br />
CSB0B_1<br />
L10<br />
AP3<br />
MDB62<br />
DQB_61<br />
AP1<br />
CSB1#_0<br />
CSB1#_0 <br />
MDB63<br />
DQB_62<br />
CSB1B_0<br />
AD10<br />
AP5<br />
DQB_63<br />
CSB1B_1<br />
AC10<br />
CKEB0<br />
CKEB0 <br />
MVREFDB<br />
CKEB0<br />
U10<br />
Y12<br />
CKEB1<br />
CKEB1 <br />
MVREFSB<br />
MVREFDB<br />
CKEB1<br />
AA11<br />
AA12<br />
MVREFSB<br />
WEB0#<br />
WEB0B<br />
N10<br />
WEB0# <br />
WEB1#<br />
TESTEN<br />
WEB1B<br />
AB11<br />
WEB1# <br />
R163<br />
MVREFSB 1 2<br />
TESTEN AD28<br />
@4.7K_0402_5%<br />
R161<br />
10K_0402_5%<br />
TESTEN<br />
R166<br />
VGA@ 1 2 +1.5VSG<br />
1<br />
TEST_MCLK AK10<br />
51.1_0402_1%<br />
C267<br />
TEST_YCLK<br />
CLKTESTA<br />
AL10<br />
CLKTESTB<br />
DRAM_RST<br />
AH11 1 2<br />
VRAM_RST# <br />
VGA@<br />
2<br />
2 2<br />
1<br />
C270<br />
R168<br />
VGA@<br />
VGA@<br />
www.mycomp.su<br />
0.1U_0402_16V4Z<br />
C268<br />
VGA@<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
R169<br />
VGA@<br />
51.1_0402_1%<br />
2<br />
1<br />
2<br />
1<br />
C269<br />
VGA@<br />
0.1U_0402_16V4Z<br />
M96 use 4.7K to<br />
PD directly.<br />
R170<br />
VGA@<br />
51.1_0402_1%<br />
MEMORY INTERFACE B<br />
216-0729002 A12 M96_BGA962<br />
MAD@<br />
1 2<br />
68P_0402_50V8J<br />
10K_0402_5%<br />
2<br />
Modify for ATI suggestion<br />
R168<br />
R166<br />
R163<br />
C270<br />
M96<br />
4.7k Ohm<br />
SD028470180<br />
0 Ohm<br />
SD028000080<br />
4.7k Ohm<br />
SD028470180<br />
1000 pF<br />
SE074102K80<br />
Broadway<br />
10k Ohm<br />
SD028100280<br />
680 Ohm<br />
SD028680080<br />
DNI<br />
68 pF<br />
SE071680J80<br />
D<br />
C<br />
B<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2009/7/14 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 17 of<br />
55<br />
3<br />
2<br />
1
5<br />
5<br />
4<br />
4<br />
3<br />
3<br />
U5E<br />
+1.5VSG<br />
BLM18AG601SN1D_2P<br />
2<br />
1 +1.8VSG<br />
1 1 1<br />
L24<br />
VGA@<br />
1<br />
2 2 2 2<br />
+1.0VSG<br />
1 1 1 1<br />
2 2 2 2<br />
+VGA_CORE<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
+ C340<br />
+ C693<br />
+ C347<br />
VGA@<br />
@<br />
VGA@<br />
2<br />
2<br />
2<br />
2<br />
330U_D2_2V_Y<br />
330U_D2_2V_Y<br />
330U_D2_2V_Y<br />
2<br />
2<br />
2<br />
Reserve for PWR test<br />
+VGA_CORE<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
2<br />
+VGA_CORE<br />
L97<br />
VGA@<br />
1<br />
2900mA<br />
MEM I/O<br />
1 1 1 1 1 1 1 1<br />
PCIE<br />
400mA<br />
C274<br />
+<br />
TBD AC7<br />
+PCIE_VDDR<br />
PCIE_VDDR#1<br />
AA31<br />
VGA@<br />
VDDR1#1<br />
AD11<br />
PCIE_VDDR#2<br />
AA32<br />
330U_D2_2V_Y<br />
VDDR1#2<br />
AF7<br />
2 2 2 2 2 2 2 2<br />
1 1 1 1 PCIE_VDDR#3<br />
AA33<br />
2<br />
VDDR1#3<br />
AG10<br />
VDDR1#4<br />
PCIE_VDDR#4<br />
AA34<br />
AJ7<br />
VDDR1#5<br />
PCIE_VDDR#5<br />
V28<br />
AK8<br />
VDDR1#6<br />
PCIE_VDDR#6<br />
W29<br />
2 2 2 2 AL9<br />
VDDR1#7<br />
PCIE_VDDR#7<br />
W30<br />
G11<br />
VDDR1#8<br />
PCIE_VDDR#8<br />
Y31<br />
1 1 1 1 1 1 1 1<br />
G14<br />
VDDR1#9<br />
G17<br />
VDDR1#10<br />
2A<br />
D D<br />
G20<br />
VDDR1#11<br />
PCIE_VDDC#1<br />
G30<br />
2 2 2 2 2 2<br />
2<br />
2<br />
G23<br />
VDDR1#12<br />
PCIE_VDDC#2<br />
G31<br />
G26<br />
VDDR1#13<br />
PCIE_VDDC#3<br />
H29<br />
1 1 1 1 G29<br />
VDDR1#14<br />
PCIE_VDDC#4<br />
H30<br />
H10<br />
VDDR1#15<br />
PCIE_VDDC#5<br />
J29<br />
J7<br />
VDDR1#16<br />
PCIE_VDDC#6<br />
J30<br />
2 2 2 2 J9<br />
VDDR1#17<br />
PCIE_VDDC#7<br />
L28<br />
1 1 1 1 1 1 1 1 1<br />
K11<br />
VDDR1#18<br />
PCIE_VDDC#8<br />
M28<br />
K13<br />
VDDR1#19<br />
PCIE_VDDC#9<br />
N28<br />
K8<br />
VDDR1#20<br />
PCIE_VDDC#10<br />
R28<br />
2 2 2 2 2 2 2<br />
2<br />
2<br />
L12<br />
VDDR1#21<br />
PCIE_VDDC#11<br />
T28<br />
L16<br />
VDDR1#22<br />
PCIE_VDDC#12<br />
U28<br />
L21<br />
VDDR1#23<br />
L23<br />
VDDR1#24<br />
34.6A<br />
L26<br />
VDDR1#25<br />
CORE VDDC#1<br />
AA15<br />
+1.8VSG L7<br />
VDDR1#26<br />
VDDC#2<br />
AA17<br />
1<br />
1<br />
1<br />
L25<br />
VGA@ 1<br />
1<br />
1 1 1<br />
M11<br />
VDDR1#27<br />
VDDC#3<br />
AA20<br />
BLM18AG121SN1D_0603<br />
N11<br />
VDDR1#28<br />
VDDC#4<br />
AA22<br />
P7<br />
VDDR1#29<br />
VDDC#5<br />
AA24<br />
2<br />
2<br />
2<br />
2 2 2<br />
R11<br />
VDDR1#30<br />
VDDC#6<br />
AA27<br />
U11<br />
VDDR1#31<br />
VDDC#7<br />
AB13<br />
U7<br />
VDDR1#32<br />
VDDC#8<br />
AB16<br />
Y11<br />
VDDR1#33<br />
VDDC#9<br />
AB18<br />
Y7<br />
VDDR1#34<br />
VDDC#10<br />
AB21<br />
VDDC#11<br />
AB23<br />
1<br />
1<br />
1<br />
+3VSG<br />
L26<br />
VGA@ 1<br />
VDDC#12<br />
AB26<br />
1 1 1<br />
BLM18AG121SN1D_0603<br />
VDDC#13<br />
AB28<br />
LEVEL<br />
VDDC#14<br />
AC12<br />
TRANSLATION<br />
VDDC#15<br />
AC15<br />
2 2 2<br />
136mA<br />
+VDD_CT<br />
VDDC#16<br />
AC17<br />
AF26<br />
VDD_CT#1<br />
VDDC#17<br />
AC20<br />
2<br />
2<br />
2<br />
AF27<br />
VDD_CT#2<br />
VDDC#18<br />
AC22<br />
C C<br />
AG26<br />
VDD_CT#3<br />
VDDC#19<br />
AC24<br />
1<br />
1<br />
1<br />
L27<br />
VGA@<br />
AG27<br />
VDD_CT#4<br />
VDDC#20<br />
AC27<br />
VDDC#21<br />
AD13<br />
+1.8VSG<br />
2<br />
1<br />
I/O<br />
VDDC#22<br />
AD16<br />
2<br />
2<br />
2<br />
60mA<br />
BLM18AG601SN1D_2P<br />
1<br />
+VDDR3<br />
VDDC#23<br />
AD18<br />
1 1<br />
AF23<br />
VDDR3#1<br />
VDDC#24<br />
AD21<br />
AF24<br />
VDDR3#2<br />
VDDC#25<br />
AD23<br />
AG23<br />
VDDR3#3<br />
VDDC#26<br />
AD26<br />
2<br />
2 2<br />
AG24<br />
VDDR3#4<br />
VDDC#27<br />
AF17<br />
VDDC#28<br />
AF20<br />
170mA<br />
+VDDR4_5<br />
VDDC#29<br />
AF22<br />
AF13<br />
VDDR5#1<br />
VDDC#30<br />
AG16<br />
AF15<br />
VDDR5#2<br />
VDDC#31<br />
AG18<br />
AG13<br />
VDDR5#3<br />
VDDC#32<br />
AG21<br />
AG15<br />
VDDR5#4<br />
VDDC#33<br />
AH22<br />
VDDC#34<br />
M16<br />
170mA<br />
VDDC#35<br />
M18<br />
AD12<br />
VDDR4#1<br />
VDDC#36<br />
M23<br />
AF11<br />
VDDR4#2<br />
VDDC#37<br />
M26<br />
AF12<br />
VDDR4#3<br />
VDDC#38<br />
N15<br />
AG11<br />
VDDR4#4<br />
VDDC#39<br />
N17<br />
VDDC#40<br />
N20<br />
+1.8VSG L31<br />
VGA@ 1<br />
VDDC#41<br />
N22<br />
VGA@<br />
BLM18AG121SN1D_0603 1 1 1<br />
MEM CLK<br />
VDDC#42<br />
N24<br />
VDDC#43<br />
N27<br />
2 1<br />
M20<br />
R569 0_0603_5%<br />
VDDRHA<br />
VDDC#44<br />
R13<br />
M21<br />
VSSRHA<br />
VDDC#45<br />
R16<br />
2 2 2<br />
VDDC#46<br />
R18<br />
BIF_VDDCI (T27,N27) need<br />
+1.8VSG<br />
BLM18AG121SN1D_0603<br />
L32<br />
VDDC#47<br />
R21<br />
V12<br />
isolate VGA_CORE<br />
*Confirm with AMD<br />
VGA@ 1<br />
VDDRHB<br />
VDDC#48<br />
R23<br />
U12<br />
VSSRHB<br />
VDDC#49<br />
R26<br />
VDDC#50<br />
T15<br />
1 1 1 1 1<br />
For M96 only,<br />
VDDC#51<br />
T17<br />
B B<br />
Manhattan are NC pin<br />
VDDC#52<br />
T20<br />
PLL<br />
VDDC#53<br />
T22<br />
MPV18 For<br />
2<br />
2<br />
2<br />
68mA<br />
+PCIE_PVDD<br />
VDDC#54<br />
T24<br />
2<br />
2<br />
AB37<br />
Mahattan only<br />
PCIE_PVDD<br />
VDDC#55<br />
T27<br />
VDDC#56<br />
U16<br />
150mA H7<br />
M97 and Mahattan VDDC and<br />
+MPV_18<br />
NC_MPV18#1<br />
VDDC#57<br />
U18<br />
H8<br />
NC_MPV18#2<br />
VDDC#58<br />
U21<br />
VDDCI ball assignments are<br />
VDDC#59<br />
U23<br />
50mA<br />
different from M96, If M96 is<br />
+SPV_18<br />
VDDC#60<br />
U26<br />
AM10<br />
NC_SPV18<br />
VDDC#61<br />
V15<br />
populated on this<br />
+1.0VSG<br />
+SPV10 136mA<br />
design,VDDC and VDDCI<br />
L34<br />
VGA@ 1<br />
VDDC#62<br />
V17<br />
AN9<br />
SPV10<br />
VDDC#63<br />
V20<br />
BLM18AG121SN1D_0603<br />
VDDC#64<br />
V22<br />
1 1 1<br />
AN10<br />
shoudl be shorted.<br />
SPVSS<br />
VDDC#65<br />
V24<br />
VDDC#66<br />
V27<br />
For M96 SPV10=+GPU_CORE<br />
VDDC#67<br />
Y16<br />
BLM18AG121SN1D_0603<br />
For M97,Nahattan SPV10=+1.0VS 2 2 2<br />
VDDC#68<br />
Y18<br />
1<br />
1<br />
1<br />
+1.8VSG BACK BIAS<br />
VDDC#69<br />
Y21<br />
L35<br />
VGA@ 1<br />
VDDC#70<br />
Y23<br />
1 1 1<br />
32mA<br />
VDDC#71<br />
Y26<br />
2<br />
2<br />
2<br />
AA13<br />
BBP#1<br />
VDDC#72<br />
Y28<br />
Y13<br />
BBP#2<br />
VDDC#73<br />
AH27<br />
2 2 2<br />
1 1<br />
VDDC#74<br />
AH28<br />
5A<br />
2 2<br />
+VDDCI<br />
ISOLATED VDDCI#1<br />
M15<br />
CORE I/O VDDCI#2<br />
N13<br />
1 1<br />
VDDCI#3<br />
R12<br />
1<br />
2<br />
1<br />
FBMA-L11-201209-221LMA30T_0805<br />
L96<br />
VGA@<br />
VDDCI#4<br />
T12<br />
2<br />
1<br />
FBMA-L11-201209-221LMA30T_0805<br />
SPV18 For<br />
2<br />
2 2<br />
A A<br />
Mahattan only 216-0729002 A12 M96_BGA962<br />
MAD@<br />
Confirm ATI, for<br />
2<br />
2<br />
1<br />
1<br />
C289<br />
VGA@<br />
10U_0805_6.3V6M<br />
C288<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C287<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C286<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C285<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C284<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C283<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C282<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C281<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C280<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C279<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C278<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C277<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C276<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C271<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C275<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C297VGA@<br />
1U_0402_6.3V4Z<br />
C296VGA@<br />
1U_0402_6.3V4Z<br />
C295VGA@<br />
1U_0402_6.3V4Z<br />
C294VGA@<br />
1U_0402_6.3V4Z<br />
C293VGA@<br />
1U_0402_6.3V4Z<br />
C292VGA@<br />
1U_0402_6.3V4Z<br />
C291VGA@<br />
1U_0402_6.3V4Z<br />
C290VGA@<br />
1U_0402_6.3V4Z<br />
C304<br />
VGA@<br />
10U_0805_6.3V6M<br />
C303<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C302<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C272<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C301<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C300<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C299<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C298<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C312<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C311<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C310<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C273<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C309<br />
VGA@<br />
10U_0805_6.3V6M<br />
C308<br />
VGA@<br />
10U_0805_6.3V6M<br />
C307<br />
VGA@<br />
10U_0805_6.3V6M<br />
C306<br />
VGA@<br />
10U_0603_6.3V6M<br />
C305<br />
MAD@<br />
10U_0603_6.3V6M<br />
C325<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C324<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C323<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C322<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C321<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C320<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C319<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C318<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C317<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C316<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C315<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C314<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C313<br />
VGA@<br />
10U_0603_6.3V6M<br />
C335<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C334<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C333<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C332<br />
VGA@<br />
C339<br />
VGA@<br />
1U_0402_6.3V4Z<br />
10U_0805_6.3V6M<br />
C331<br />
VGA@<br />
C346<br />
VGA@<br />
1U_0402_6.3V4Z<br />
10U_0805_6.3V6M<br />
C330<br />
VGA@<br />
C345<br />
VGA@<br />
1U_0402_6.3V4Z<br />
10U_0805_6.3V6M<br />
C329<br />
VGA@<br />
C344<br />
VGA@<br />
1U_0402_6.3V4Z<br />
10U_0805_6.3V6M<br />
C328<br />
VGA@<br />
C343<br />
VGA@<br />
1U_0402_6.3V4Z<br />
10U_0805_6.3V6M<br />
C327<br />
VGA@<br />
C342<br />
VGA@<br />
1U_0402_6.3V4Z<br />
10U_0805_6.3V6M<br />
www.mycomp.su<br />
C326<br />
VGA@<br />
C341<br />
VGA@<br />
1U_0402_6.3V4Z<br />
10U_0805_6.3V6M<br />
POWER<br />
C338<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C337<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C336<br />
VGA@<br />
10U_0603_6.3V6M<br />
C350<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C349<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C348<br />
VGA@<br />
10U_0603_6.3V6M<br />
C358<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C357<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C356<br />
VGA@<br />
10U_0603_6.3V6M<br />
C363<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C362<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C361<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C360<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C359<br />
VGA@<br />
10U_0603_6.3V6M<br />
C376<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C375<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C374<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C373<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C372<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C371<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C370<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C369<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C368<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C367<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C365<br />
VGA@<br />
0.1U_0402_16V4Z<br />
Mahattan, it could be<br />
connected to VGA_CORE<br />
<strong>Compal</strong> Electronics, Inc.<br />
Title<br />
Security Classification <strong>Compal</strong> Secret Data<br />
Issued Date 2009/7/14 Deciphered Date<br />
2010/03/12<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
Custom<br />
401827<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 18 of<br />
55<br />
D<br />
C364<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C366<br />
VGA@<br />
10U_0603_6.3V6M<br />
C384<br />
VGA@<br />
10U_0805_6.3V6M<br />
C383<br />
VGA@<br />
10U_0805_6.3V6M<br />
C381<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C380<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C379<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C378<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C377<br />
VGA@<br />
10U_0603_6.3V6M<br />
C382<br />
VGA@<br />
10U_0805_6.3V6M
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
C<br />
B<br />
A<br />
U5F<br />
AB39<br />
PCIE_VSS#1<br />
GND#1<br />
E39<br />
PCIE_VSS#2<br />
GND#2<br />
F34<br />
PCIE_VSS#3<br />
GND#3<br />
F39<br />
PCIE_VSS#4<br />
GND#4<br />
G33<br />
PCIE_VSS#5<br />
GND#5<br />
G34<br />
PCIE_VSS#6<br />
GND#6<br />
H31<br />
PCIE_VSS#7<br />
GND#7<br />
H34<br />
PCIE_VSS#8<br />
GND#8<br />
H39<br />
PCIE_VSS#9<br />
GND#9<br />
J31<br />
PCIE_VSS#10<br />
GND#10<br />
J34<br />
PCIE_VSS#11<br />
GND#11<br />
K31<br />
PCIE_VSS#12<br />
GND#12<br />
K34<br />
PCIE_VSS#13<br />
GND#13<br />
K39<br />
PCIE_VSS#14<br />
GND#14<br />
L31<br />
PCIE_VSS#15<br />
GND#15<br />
L34<br />
PCIE_VSS#16<br />
GND#16<br />
M34<br />
PCIE_VSS#17<br />
GND#17<br />
M39<br />
PCIE_VSS#18<br />
GND#18<br />
N31<br />
PCIE_VSS#19<br />
GND#19<br />
N34<br />
PCIE_VSS#20<br />
GND#20<br />
P31<br />
PCIE_VSS#21<br />
GND#21<br />
P34<br />
PCIE_VSS#22<br />
GND#22<br />
P39<br />
PCIE_VSS#23<br />
GND#23<br />
R34<br />
PCIE_VSS#24<br />
GND#24<br />
T31<br />
PCIE_VSS#25<br />
GND#25<br />
T34<br />
PCIE_VSS#26<br />
GND#26<br />
T39<br />
PCIE_VSS#27<br />
GND#27<br />
U31<br />
PCIE_VSS#28<br />
GND#28<br />
U34<br />
PCIE_VSS#29<br />
GND#29<br />
V34<br />
PCIE_VSS#30<br />
GND#30<br />
V39<br />
PCIE_VSS#31<br />
GND#31<br />
W31<br />
PCIE_VSS#32<br />
GND#32<br />
W34<br />
PCIE_VSS#33<br />
GND#33<br />
Y34<br />
PCIE_VSS#34<br />
GND#34<br />
Y39<br />
PCIE_VSS#35<br />
GND#35<br />
GND#36<br />
GND#37<br />
GND#38<br />
GND#39<br />
GND#40<br />
GND GND#41<br />
F15<br />
GND#101<br />
GND#42<br />
F17<br />
GND#102<br />
GND#43<br />
F19<br />
GND#103<br />
GND#44<br />
F21<br />
GND#104<br />
GND#45<br />
F23<br />
GND#105<br />
GND#46<br />
F25<br />
GND#106<br />
GND#47<br />
F27<br />
GND#107<br />
GND#48<br />
F29<br />
GND#108<br />
GND#49<br />
F31<br />
GND#109<br />
GND#50<br />
F33<br />
GND#110<br />
GND#51<br />
F7<br />
GND#111<br />
GND#52<br />
F9<br />
GND#112<br />
GND#53<br />
G2<br />
GND#113<br />
GND#54<br />
G6<br />
GND#114<br />
GND#55<br />
H9<br />
GND#115<br />
GND#56<br />
J2<br />
GND#116<br />
GND#57<br />
J27<br />
GND#117<br />
GND#58<br />
J6<br />
GND#118<br />
GND#59<br />
J8<br />
GND#119<br />
GND#60<br />
K14<br />
GND#120<br />
GND#61<br />
K7<br />
GND#121<br />
GND#62<br />
L11<br />
GND#122<br />
GND#63<br />
L17<br />
GND#123<br />
GND#64<br />
L2<br />
GND#124<br />
GND#65<br />
L22<br />
GND#125<br />
GND#66<br />
L24<br />
GND#126<br />
GND#67<br />
L6<br />
GND#127<br />
GND#68<br />
M17<br />
GND#128<br />
GND#69<br />
M22<br />
GND#129<br />
GND#70<br />
M24<br />
GND#130<br />
GND#71<br />
N16<br />
GND#131<br />
GND#72<br />
N18<br />
GND#132<br />
GND#73<br />
N2<br />
GND#133<br />
GND#74<br />
N21<br />
GND#134<br />
GND#75<br />
N23<br />
GND#135<br />
GND#76<br />
N26<br />
GND#136<br />
GND#77<br />
N6<br />
GND#137<br />
GND#78<br />
R15<br />
GND#138<br />
GND#79<br />
R17<br />
GND#139<br />
GND#80<br />
R2<br />
GND#140<br />
GND#81<br />
R20<br />
GND#141<br />
GND#82<br />
R22<br />
GND#142<br />
GND#83<br />
R24<br />
GND#143<br />
GND#84<br />
R27<br />
GND#144<br />
GND#85<br />
R6<br />
GND#145<br />
GND#86<br />
T11<br />
GND#146<br />
GND#87<br />
T13<br />
GND#147<br />
GND#88<br />
T16<br />
GND#148<br />
GND#89<br />
T18<br />
GND#149<br />
GND#90<br />
T21<br />
GND#150<br />
GND#91<br />
T23<br />
GND#151<br />
GND#92<br />
T26<br />
GND#152<br />
GND#93<br />
U15<br />
GND#153<br />
GND#94<br />
U17<br />
GND#154<br />
GND#95<br />
U2<br />
GND#155<br />
GND#96<br />
U20<br />
GND#156<br />
GND#97<br />
U22<br />
GND#157<br />
GND#98<br />
U24<br />
GND#158<br />
GND#99<br />
U27<br />
GND#159<br />
GND#100<br />
U6<br />
GND#160<br />
V11<br />
GND#161<br />
V16<br />
GND#162<br />
V18<br />
GND#163<br />
V21<br />
GND#164<br />
V23<br />
GND#165<br />
V26<br />
GND#166<br />
W2<br />
GND#167<br />
W6<br />
GND#168<br />
Y15<br />
GND#169<br />
Y17<br />
GND#170<br />
Y20<br />
GND#171<br />
Y22<br />
GND#172<br />
VSS_MECH#1<br />
Y24<br />
GND#173<br />
VSS_MECH#2<br />
Y27<br />
GND#174<br />
VSS_MECH#3<br />
U13<br />
GND#175<br />
V13<br />
GND#176<br />
216-0729002 A12 M96_BGA962<br />
MAD@<br />
5<br />
A3<br />
A37<br />
AA16<br />
AA18<br />
AA2<br />
AA21<br />
AA23<br />
AA26<br />
AA28<br />
AA6<br />
AB12<br />
AB15<br />
AB17<br />
AB20<br />
AB22<br />
AB24<br />
AB27<br />
AC11<br />
AC13<br />
AC16<br />
AC18<br />
AC2<br />
AC21<br />
AC23<br />
AC26<br />
AC28<br />
AC6<br />
AD15<br />
AD17<br />
AD20<br />
AD22<br />
AD24<br />
AD27<br />
AD9<br />
AE2<br />
AE6<br />
AF10<br />
AF16<br />
AF18<br />
AF21<br />
AG17<br />
AG2<br />
AG20<br />
AG22<br />
AG6<br />
AG9<br />
AH21<br />
AH29<br />
AJ10<br />
AJ11<br />
AJ2<br />
AJ28<br />
AJ6<br />
AK11<br />
AK31<br />
AK7<br />
AL11<br />
AL14<br />
AL17<br />
AL2<br />
AL20<br />
AL21<br />
AL23<br />
AL26<br />
AL32<br />
AL6<br />
AL8<br />
AM11<br />
AM31<br />
AM9<br />
AN11<br />
AN2<br />
AN30<br />
AN6<br />
AN8<br />
AP11<br />
AP7<br />
AP9<br />
AR5<br />
AW34<br />
B11<br />
B13<br />
B15<br />
B17<br />
B19<br />
B21<br />
B23<br />
B25<br />
B27<br />
B29<br />
B31<br />
B33<br />
B7<br />
B9<br />
C1<br />
C39<br />
E35<br />
E5<br />
F11<br />
F13<br />
A39<br />
AW1<br />
AW39<br />
FB_GND<br />
+1.8VSG<br />
+1.0VSG<br />
+1.8VSG<br />
+1.0VSG<br />
+1.8VSG<br />
+1.0VSG<br />
+1.8VSG<br />
For PX, leave NC when<br />
SBIOS control PWR on/off<br />
1 @ 2<br />
R402<br />
0_0402_5%<br />
+1.0VSG<br />
Ball AW34 and AW35<br />
are GND ball in M96,<br />
but have another ball<br />
name in Broadway,<br />
that is XO_IN and<br />
X0_IN2.<br />
1<br />
@<br />
R178<br />
0_0402_5%<br />
2<br />
1<br />
2<br />
VGA@<br />
R174<br />
0_0402_5%<br />
For M96 are NC pins<br />
For M96 are NC pins<br />
4<br />
L36<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L39<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L47<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
1<br />
2<br />
1<br />
2<br />
C433<br />
VGA@<br />
10U_0603_6.3V6M<br />
C385<br />
VGA@<br />
10U_0603_6.3V6M<br />
L40<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1 1<br />
2<br />
C394<br />
VGA@<br />
10U_0603_6.3V6M<br />
L45<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L50<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L52<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C427<br />
VGA@<br />
10U_0603_6.3V6M<br />
C391<br />
VGA@<br />
10U_0603_6.3V6M<br />
L42<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
1<br />
2<br />
C403<br />
VGA@<br />
10U_0603_6.3V6M<br />
C409<br />
VGA@<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C418<br />
VGA@<br />
10U_0603_6.3V6M<br />
C428<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C434<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C386<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C392<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C398<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C404<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C410<br />
VGA@<br />
0.1U_0402_16V4Z<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C419<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C429<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C435<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C387<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C393<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C399<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C405<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C411<br />
VGA@<br />
1U_0402_6.3V4Z<br />
1<br />
2<br />
C420<br />
VGA@<br />
1U_0402_6.3V4Z<br />
+DPC_VDD18<br />
+DPC_VDD10<br />
1 @ 2<br />
R177<br />
0_0402_5%<br />
Security Classification<br />
Issued Date<br />
U5H<br />
DP C/D POWER<br />
130mA<br />
AP20<br />
NC_DPC_VDD18#1<br />
AP21<br />
NC_DPC_VDD18#2<br />
200mA<br />
AP13<br />
DPC_VDD10#1<br />
AT13<br />
DPC_VDD10#2<br />
AN17<br />
DPC_VSSR#1<br />
AP16<br />
DPC_VSSR#2<br />
AP17<br />
DPC_VSSR#3<br />
AW14<br />
DPC_VSSR#4<br />
AW16<br />
DPC_VSSR#5<br />
130mA<br />
AP22<br />
+DPD_VDD18<br />
NC_DPD_VDD18#1<br />
AP23<br />
NC_DPD_VDD18#2<br />
200mA<br />
+DPD_VDD10 AP14<br />
DPD_VDD10#1<br />
AP15<br />
DPD_VDD10#2<br />
AN19<br />
DPD_VSSR#1<br />
AP18<br />
DPD_VSSR#2<br />
AP19<br />
DPD_VSSR#3<br />
AW20<br />
DPD_VSSR#4<br />
AW22<br />
DPD_VSSR#5<br />
R175<br />
150_0402_1%<br />
2 1 AW18<br />
DPCD_CALR<br />
200mA<br />
DP E/F POWER<br />
+DPE_VDD18<br />
AH34<br />
DPE_VDD18#1<br />
AJ34<br />
DPE_VDD18#2<br />
120mA<br />
+DPE_VDD10<br />
AL33<br />
DPE_VDD10#1<br />
AM33<br />
DPE_VDD10#2<br />
AN34<br />
DPE_VSSR#1<br />
AP39<br />
DPE_VSSR#2<br />
AR39<br />
DPE_VSSR#3<br />
AU37<br />
DPE_VSSR#4<br />
AW35<br />
DPE_VSSR#5<br />
200mA<br />
AF34<br />
+DPF_VDD18<br />
DPF_VDD18#1<br />
AG34<br />
DPF_VDD18#2<br />
120mA<br />
AK33<br />
+DPF_VDD10<br />
DPF_VDD10#1<br />
AK34<br />
DPF_VDD10#2<br />
AF39<br />
DPF_VSSR#1<br />
AH39<br />
DPF_VSSR#2<br />
AK39<br />
DPF_VSSR#3<br />
AL34<br />
DPF_VSSR#4<br />
AM34<br />
DPF_VSSR#5<br />
1 AM39<br />
DPEF_CALR<br />
216-0729002 A12 M96_BGA962<br />
MAD@<br />
DP A/B POWER 130mA<br />
NC_DPA_VDD18#1<br />
AN24<br />
+DPA_VDD18<br />
NC_DPA_VDD18#2<br />
AP24<br />
200mA<br />
DPA_VDD10#1<br />
AP31<br />
+DPA_VDD10<br />
DPA_VDD10#2<br />
AP32<br />
DPA_VSSR#1<br />
AN27<br />
DPA_VSSR#2<br />
AP27<br />
DPA_VSSR#3<br />
AP28<br />
DPA_VSSR#4<br />
AW24<br />
DPA_VSSR#5<br />
AW26<br />
130mA<br />
NC_DPB_VDD18#1<br />
AP25<br />
+DPB_VDD18<br />
NC_DPB_VDD18#2<br />
AP26<br />
200mA<br />
DPB_VDD10#1<br />
AN33<br />
+DPB_VDD10<br />
DPB_VDD10#2<br />
AP33<br />
DPB_VSSR#1<br />
AN29<br />
DPB_VSSR#2<br />
AP29<br />
DPB_VSSR#3<br />
AP30<br />
DPB_VSSR#4<br />
AW30<br />
DPB_VSSR#5<br />
AW32<br />
R176<br />
150_0402_1%<br />
DPAB_CALR<br />
AW28 1 2<br />
20mA<br />
DP PLL POWER<br />
DPA_PVDD<br />
AU28 +DPA_PVDD<br />
DPA_PVSS<br />
AV27<br />
20mA<br />
DPB_PVDD<br />
AV29 +DPB_PVDD<br />
DPB_PVSS<br />
AR28<br />
20mA<br />
DPC_PVDD<br />
AU18 +DPC_PVDD<br />
DPC_PVSS<br />
AV17<br />
20mA<br />
DPD_PVDD<br />
DPD_PVSS<br />
AV19<br />
AR18<br />
+DPD_PVDD<br />
20mA<br />
DPE_PVDD<br />
AM37 +DPE_PVDD<br />
DPE_PVSS<br />
AN38<br />
20mA<br />
NC_DPF_PVDD<br />
AL38 +DPF_PVDD<br />
NC_DPF_PVSS<br />
AM35<br />
www.mycomp.su<br />
R179<br />
2<br />
150_0402_1%<br />
<strong>Compal</strong> Secret Data<br />
2009/7/14 Deciphered Date<br />
2010/03/12<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 19 of<br />
55<br />
3<br />
2<br />
1<br />
Title<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C388<br />
VGA@<br />
10U_0603_6.3V6M<br />
C395<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C400<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C406<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C412<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C415<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C421<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C424<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C430<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C436<br />
VGA@<br />
0.1U_0402_16V4Z<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C389<br />
VGA@<br />
0.1U_0402_16V4Z<br />
C396<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C401<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C407<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C413<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C416<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C422<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C425<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C431<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C437<br />
VGA@<br />
1U_0402_6.3V4Z<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
L37<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
C390<br />
VGA@<br />
1U_0402_6.3V4Z<br />
C397<br />
VGA@<br />
10U_0603_6.3V6M<br />
C402<br />
VGA@<br />
10U_0603_6.3V6M<br />
C408<br />
VGA@<br />
10U_0603_6.3V6M<br />
C414<br />
VGA@<br />
10U_0603_6.3V6M<br />
C417<br />
VGA@<br />
10U_0603_6.3V6M<br />
C423<br />
VGA@<br />
10U_0603_6.3V6M<br />
C426<br />
VGA@<br />
10U_0603_6.3V6M<br />
C432<br />
VGA@<br />
10U_0603_6.3V6M<br />
C438<br />
VGA@<br />
10U_0603_6.3V6M<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
+1.8VSG<br />
For M96 are NC pins<br />
L38<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
+1.0VSG<br />
L41<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
+1.8VSG<br />
For M96 are NC pins<br />
L43<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L44<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L46<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L48<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L49<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L51<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
L53<br />
VGA@<br />
BLM18AG121SN1D_0603<br />
2<br />
1<br />
+1.0VSG<br />
+1.8VSG<br />
+1.8VSG<br />
+1.8VSG<br />
+1.8VSG<br />
+1.8VSG<br />
+1.8VSG<br />
For M96 are NC pins<br />
D<br />
C<br />
B<br />
A
5<br />
4<br />
3<br />
2<br />
1<br />
U9<br />
U10<br />
U11<br />
U12<br />
D<br />
VREFCA_A1 M8<br />
MDA22<br />
VREFCA_A2<br />
MDA25<br />
VREFCA_A3<br />
MDA35<br />
VREFCA_A4<br />
VREFDA_Q1<br />
VREFCA DQL0<br />
E3<br />
M8<br />
MDA19<br />
VREFDA_Q2<br />
VREFCA DQL0<br />
E3<br />
M8<br />
MDA30<br />
VREFDA_Q3<br />
VREFCA DQL0<br />
E3<br />
H1<br />
MDA32<br />
VREFDA_Q4<br />
VREFDQ DQL1<br />
F7<br />
H1<br />
MDA21<br />
VREFDQ DQL1<br />
F7<br />
H1<br />
MDA24<br />
VREFDQ DQL1<br />
F7<br />
MDA38<br />
MAA0<br />
DQL2<br />
F2<br />
MDA18<br />
MAA0<br />
DQL2<br />
F2<br />
MDA29<br />
MAA0<br />
DQL2<br />
F2<br />
N3<br />
MDA34<br />
MAA0<br />
MAA1<br />
A0<br />
DQL3<br />
F8<br />
N3<br />
MDA23<br />
MAA1<br />
A0<br />
DQL3<br />
F8<br />
N3<br />
MDA26<br />
MAA1<br />
A0<br />
DQL3<br />
F8<br />
P7<br />
MDA37<br />
MAA1<br />
MAA2<br />
A1<br />
DQL4<br />
H3<br />
P7<br />
MDA16<br />
MAA2<br />
A1<br />
DQL4<br />
H3<br />
P7<br />
MDA31<br />
MAA2<br />
A1<br />
DQL4<br />
H3<br />
P3<br />
MDA36<br />
MAA2<br />
MAA3<br />
A2<br />
DQL5<br />
H8<br />
P3<br />
MDA20<br />
MAA3<br />
A2<br />
DQL5<br />
H8<br />
P3<br />
MDA27<br />
MAA3<br />
A2<br />
DQL5<br />
H8<br />
N2<br />
MDA39<br />
MAA3<br />
MAA4<br />
A3<br />
DQL6<br />
G2<br />
N2<br />
MDA17<br />
MAA4<br />
A3<br />
DQL6<br />
G2<br />
N2<br />
P8<br />
MDA28<br />
MAA4<br />
A3<br />
DQL6<br />
G2<br />
MDA33<br />
MAA4<br />
MAA5<br />
A4<br />
DQL7<br />
H7<br />
P8<br />
P2<br />
MAA5<br />
A4<br />
DQL7<br />
H7<br />
P8<br />
MAA5<br />
A4<br />
DQL7<br />
H7<br />
MAA5<br />
MAA6<br />
A5<br />
P2<br />
R8<br />
MAA6<br />
A5<br />
P2<br />
MAA6<br />
A5<br />
MAA6<br />
MAA7<br />
A6<br />
R8<br />
R2<br />
MDA0<br />
MAA7<br />
A6<br />
R8<br />
MDA15<br />
MAA7<br />
A6<br />
MDA43<br />
MAA7<br />
MAA8<br />
A7<br />
DQU0<br />
D7<br />
R2<br />
T8<br />
MDA5<br />
MAA8<br />
A7<br />
DQU0<br />
D7<br />
R2<br />
MDA11<br />
MAA8<br />
A7<br />
DQU0<br />
D7<br />
MDA44<br />
MAA8<br />
MAA9<br />
A8<br />
DQU1<br />
C3<br />
T8<br />
T8<br />
R3<br />
MDA1<br />
MAA9<br />
A8<br />
DQU1<br />
C3<br />
MDA14<br />
MAA9<br />
A8<br />
DQU1<br />
C3<br />
MDA40<br />
MAA9<br />
MAA10<br />
A9<br />
DQU2<br />
C8<br />
R3<br />
R3<br />
L7<br />
MDA7<br />
MAA10<br />
A9<br />
DQU2<br />
C8<br />
MDA10<br />
MAA10<br />
A9<br />
DQU2<br />
C8<br />
MDA45<br />
MAA10<br />
MAA11<br />
A10/AP DQU3<br />
C2<br />
L7<br />
L7<br />
R7<br />
MDA3<br />
MAA11<br />
A10/AP DQU3<br />
C2<br />
MDA13<br />
MAA11<br />
A10/AP DQU3<br />
C2<br />
MDA42<br />
MAA11<br />
MAA12<br />
A11<br />
DQU4<br />
A7<br />
R7<br />
R7<br />
N7<br />
MDA4<br />
MAA12<br />
A11<br />
DQU4<br />
A7<br />
MDA9<br />
MAA12<br />
A11<br />
DQU4<br />
A7<br />
MDA46<br />
MAA12<br />
MAA13<br />
A12<br />
DQU5<br />
A2<br />
N7<br />
N7<br />
T3<br />
MDA2<br />
MAA13<br />
A12<br />
DQU5<br />
A2<br />
MDA12<br />
MAA13<br />
A12<br />
DQU5<br />
A2<br />
MDA41<br />
MAA13<br />
A13<br />
DQU6<br />
B8<br />
T3<br />
T3<br />
T7<br />
MDA6<br />
A13<br />
DQU6<br />
B8<br />
MDA8<br />
A13<br />
DQU6<br />
B8<br />
MDA47<br />
A14<br />
DQU7<br />
A3<br />
T7<br />
A14<br />
DQU7<br />
A3<br />
T7<br />
A14<br />
DQU7<br />
A3<br />
M7<br />
A15/BA3<br />
M7<br />
M7<br />
+1.5VSG<br />
A15/BA3<br />
+1.5VSG<br />
A15/BA3<br />
+1.5VSG<br />
M8<br />
H1<br />
N3<br />
P7<br />
P3<br />
N2<br />
P8<br />
P2<br />
R8<br />
R2<br />
T8<br />
R3<br />
L7<br />
R7<br />
N7<br />
T3<br />
T7<br />
M7<br />
VREFCA<br />
VREFDQ<br />
A0<br />
A1<br />
A2<br />
A3<br />
A4<br />
A5<br />
A6<br />
A7<br />
A8<br />
A9<br />
A10/AP<br />
A11<br />
A12<br />
A13<br />
A14<br />
A15/BA3<br />
DQL0<br />
DQL1<br />
DQL2<br />
DQL3<br />
DQL4<br />
DQL5<br />
DQL6<br />
DQL7<br />
DQU0<br />
DQU1<br />
DQU2<br />
DQU3<br />
DQU4<br />
DQU5<br />
DQU6<br />
DQU7<br />
E3<br />
F7<br />
F2<br />
F8<br />
H3<br />
H8<br />
G2<br />
H7<br />
D7<br />
C3<br />
C8<br />
C2<br />
A7<br />
A2<br />
B8<br />
A3<br />
MDA48<br />
MDA51<br />
MDA55<br />
MDA54<br />
MDA50<br />
MDA52<br />
MDA49<br />
MDA53<br />
MDA63<br />
MDA58<br />
MDA60<br />
MDA59<br />
MDA61<br />
MDA56<br />
MDA62<br />
MDA57<br />
+1.5VSG<br />
D<br />
C<br />
B<br />
MDA[0..63]<br />
MDA[0..63]<br />
<br />
<br />
<br />
<br />
A_BA0<br />
A_BA1<br />
A_BA2<br />
CKEA0<br />
CLKA0<br />
CLKA0#<br />
+1.5VSG<br />
A_BA0<br />
A_BA1<br />
A_BA2<br />
CLKA0<br />
CLKA0#<br />
CKEA0<br />
ODTA0_1<br />
ODTA0_1<br />
ODTA1_1<br />
ODTA1_1<br />
MAA[13..0]<br />
K1<br />
ODT/ODT0 VDDQ<br />
A1<br />
K1<br />
CSA0#_0<br />
CSA1#_0<br />
CSA0#_0<br />
L2<br />
CS/CS0 VDDQ<br />
A8<br />
ODT/ODT0 VDDQ<br />
A1<br />
K1<br />
ODT/ODT0 VDDQ<br />
A1<br />
K1<br />
CSA1#_0<br />
L2<br />
RASA0#<br />
RASA1#<br />
RASA0#<br />
J3<br />
RAS<br />
VDDQ<br />
C1<br />
CS/CS0 VDDQ<br />
A8<br />
ODT/ODT0 VDDQ<br />
A1<br />
L2<br />
CS/CS0 VDDQ<br />
A8<br />
L2<br />
RASA1#<br />
J3<br />
CASA0#<br />
CASA1#<br />
CASA0#<br />
K3<br />
CAS<br />
VDDQ<br />
C9<br />
RAS<br />
VDDQ<br />
C1<br />
CS/CS0 VDDQ<br />
A8<br />
J3<br />
RAS<br />
VDDQ<br />
C1<br />
J3<br />
CASA1#<br />
K3<br />
WEA0#<br />
WEA1#<br />
WEA0#<br />
L3<br />
WE<br />
VDDQ<br />
D2<br />
CAS<br />
VDDQ<br />
C9<br />
RAS<br />
VDDQ<br />
C1<br />
K3<br />
CAS<br />
VDDQ<br />
C9<br />
K3<br />
WEA1#<br />
L3<br />
WE<br />
VDDQ D2 CAS<br />
VDDQ<br />
C9<br />
L3<br />
WE<br />
VDDQ D2 L3<br />
WE<br />
VDDQ<br />
D2<br />
DQMA#[7..0]<br />
VDDQ<br />
E9<br />
VDDQ<br />
E9<br />
VDDQ<br />
E9<br />
VDDQ<br />
E9<br />
QSA2<br />
VDDQ<br />
F1<br />
F3<br />
QSA3<br />
QSA4<br />
QSA6<br />
QSA0<br />
DQSL<br />
VDDQ<br />
H2<br />
VDDQ<br />
F1<br />
VDDQ<br />
F1<br />
F3<br />
C7<br />
QSA1<br />
QSA5<br />
QSA7<br />
DQSU<br />
VDDQ<br />
H9<br />
DQSL<br />
VDDQ<br />
H2<br />
VDDQ<br />
F1<br />
F3<br />
DQSL<br />
VDDQ<br />
H2<br />
F3<br />
C7<br />
DQSU<br />
VDDQ<br />
H9<br />
DQSL<br />
VDDQ<br />
H2<br />
C7<br />
DQSU<br />
VDDQ<br />
H9<br />
C7<br />
DQSU<br />
VDDQ<br />
H9<br />
QSA[7..0]<br />
DQMA#2 E7<br />
DQMA#3<br />
DQMA#4<br />
DQMA#6<br />
DQMA#0<br />
DML<br />
VSS<br />
A9<br />
E7<br />
DQMA#1<br />
DQMA#5<br />
DQMA#7<br />
VSS<br />
B3<br />
DML<br />
VSS<br />
A9<br />
E7<br />
DML<br />
VSS<br />
A9<br />
E7<br />
D3<br />
DMU<br />
VSS<br />
B3<br />
DML<br />
VSS<br />
A9<br />
D3<br />
DMU<br />
VSS<br />
B3<br />
D3<br />
DMU<br />
D3<br />
DMU<br />
VSS<br />
B3<br />
VSS<br />
E1<br />
VSS<br />
E1<br />
VSS<br />
E1<br />
VSS<br />
E1<br />
QSA#[7..0]<br />
QSA#2<br />
VSS<br />
G8<br />
G3<br />
QSA#3<br />
QSA#4<br />
QSA#6<br />
QSA#0<br />
DQSL<br />
VSS<br />
J2<br />
VSS<br />
G8<br />
VSS<br />
G8<br />
G3<br />
B7<br />
QSA#1<br />
QSA#5<br />
QSA#7<br />
DQSU<br />
VSS<br />
J8<br />
DQSL<br />
VSS<br />
J2<br />
VSS<br />
G8<br />
G3<br />
DQSL<br />
VSS<br />
J2<br />
G3<br />
B7<br />
DQSU<br />
VSS<br />
J8<br />
DQSL<br />
VSS<br />
J2<br />
B7<br />
DQSU<br />
VSS<br />
J8<br />
B7<br />
DQSU<br />
VSS<br />
J8<br />
VSS<br />
M1<br />
VSS<br />
M1<br />
VSS<br />
M1<br />
VSS<br />
M1<br />
VSS<br />
M9<br />
VSS<br />
M9<br />
VSS<br />
M9<br />
VSS<br />
M9<br />
VRAM_RST#<br />
VSS<br />
P1<br />
VRAM_RST#<br />
VRAM_RST#<br />
VRAM_RST#<br />
VRAM_RST#<br />
T2<br />
RESET<br />
VSS<br />
P9<br />
VSS<br />
P1<br />
VSS<br />
P1<br />
T2<br />
RESET<br />
VSS<br />
P9<br />
VSS<br />
P1<br />
T2<br />
RESET<br />
VSS<br />
P9<br />
T2<br />
RESET<br />
VSS<br />
P9<br />
L8<br />
VSS<br />
T1<br />
ZQ/ZQ0<br />
VSS<br />
T9<br />
VSS<br />
T1<br />
VSS<br />
T1<br />
L8<br />
ZQ/ZQ0<br />
VSS<br />
T9<br />
VSS<br />
T1<br />
L8<br />
ZQ/ZQ0<br />
VSS<br />
T9<br />
L8<br />
ZQ/ZQ0<br />
VSS<br />
T9<br />
J1<br />
R180 VGA@<br />
NC/ODT1 VSSQ<br />
B1<br />
J1<br />
J1<br />
L1<br />
R182<br />
VGA@<br />
R183<br />
VGA@<br />
NC/CS1 VSSQ<br />
B9<br />
R181<br />
VGA@<br />
NC/ODT1 VSSQ<br />
B1<br />
NC/ODT1 VSSQ<br />
B1<br />
J1<br />
L1<br />
243_0402_1%<br />
J9<br />
NC/CE1 VSSQ<br />
D1<br />
NC/CS1 VSSQ<br />
B9<br />
NC/ODT1 VSSQ<br />
B1<br />
L1<br />
NC/CS1 VSSQ<br />
B9<br />
L1<br />
243_0402_1%<br />
243_0402_1%<br />
J9<br />
243_0402_1%<br />
L9<br />
NCZQ1 VSSQ<br />
D8<br />
NC/CE1 VSSQ<br />
D1<br />
NC/CS1 VSSQ<br />
B9<br />
J9<br />
NC/CE1 VSSQ<br />
D1<br />
J9<br />
L9<br />
NCZQ1 VSSQ<br />
D8<br />
NC/CE1 VSSQ<br />
D1<br />
L9<br />
NCZQ1 VSSQ<br />
D8<br />
L9<br />
NCZQ1 VSSQ<br />
D8<br />
VSSQ<br />
E2<br />
VSSQ<br />
E2<br />
VSSQ<br />
E2<br />
VSSQ<br />
E2<br />
VSSQ<br />
E8<br />
VSSQ<br />
E8<br />
VSSQ<br />
E8<br />
VSSQ<br />
E8<br />
VSSQ<br />
F9<br />
VSSQ<br />
F9<br />
VSSQ<br />
F9<br />
VSSQ<br />
F9<br />
VSSQ<br />
G1<br />
VSSQ<br />
G1<br />
VSSQ<br />
G1<br />
VSSQ<br />
G1<br />
VSSQ<br />
G9<br />
VSSQ<br />
G9<br />
VSSQ<br />
G9<br />
VSSQ<br />
G9<br />
96-BALL<br />
96-BALL<br />
96-BALL<br />
96-BALL<br />
SDRAM DDR3<br />
SDRAM DDR3<br />
SDRAM DDR3<br />
SDRAM DDR3<br />
K4B1G1646E-HC12_FBGA96<br />
K4B1G1646E-HC12_FBGA96<br />
K4B1G1646E-HC12_FBGA96<br />
K4B1G1646E-HC12_FBGA96<br />
+1.5VSG<br />
X76@<br />
X76@<br />
X76@<br />
X76@<br />
Pull high for Madison and Park...<br />
+1.5VSG<br />
+1.5VSG<br />
+1.5VSG<br />
+1.5VSG<br />
+1.5VSG<br />
+1.5VSG<br />
+1.5VSG<br />
+1.5VSG<br />
ODTA0_1<br />
R184<br />
R185<br />
R186<br />
R187<br />
R188<br />
R189<br />
VGA@<br />
VGA@<br />
4.99K_0402_1%<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@<br />
R191<br />
R193<br />
ODTA0<br />
ODTA0 2 1 1 2<br />
VGA@<br />
4.99K_0402_1%<br />
4.99K_0402_1%<br />
4.99K_0402_1%<br />
4.99K_0402_1%<br />
4.99K_0402_1%<br />
VGA@<br />
VGA@<br />
R192<br />
0_0402_5%<br />
R190<br />
56_0402_1%<br />
4.99K_0402_1%<br />
4.99K_0402_1%<br />
VREFCA_A1 VREFDA_Q1 VREFCA_A2<br />
VREFDA_Q2<br />
VREFCA_A3<br />
VREFDA_Q3<br />
VGA@<br />
VGA@<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
VREFCA_A4<br />
VREFDA_Q4<br />
ODTA1<br />
ODTA1 2 1 1 2<br />
R194<br />
0_0402_5%<br />
R195<br />
56_0402_1%<br />
R196<br />
C439<br />
R197<br />
C440<br />
R198<br />
C441<br />
R199<br />
C442<br />
R200<br />
C443<br />
R201<br />
C444<br />
1<br />
1<br />
4.99K_0402_1%<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@<br />
R202<br />
C445<br />
R203<br />
C446<br />
ODTA1_1<br />
VGA@<br />
2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1% 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
VGA@<br />
VGA@<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
1<br />
2<br />
+1.5VSG<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
1<br />
2<br />
1<br />
2<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
0.1U_0402_16V4Z<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
0.1U_0402_16V4Z<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
+1.5VSG<br />
1<br />
2<br />
1<br />
2<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
0.1U_0402_16V4Z<br />
+1.5VSG <br />
1<br />
2<br />
1<br />
2<br />
CKEA1<br />
1<br />
2<br />
A_BA0<br />
A_BA1<br />
A_BA2<br />
CLKA1<br />
CLKA1#<br />
0.1U_0402_16V4Z<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
+1.5VSG<br />
1<br />
2<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
www.mycomp.su<br />
1<br />
2<br />
0.1U_0402_16V4Z<br />
+1.5VSG<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
A_BA0<br />
A_BA1<br />
A_BA2<br />
CLKA1<br />
CLKA1#<br />
CKEA1<br />
0.1U_0402_16V4Z<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
+1.5VSG<br />
1<br />
2<br />
1<br />
2<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
0.1U_0402_16V4Z<br />
1<br />
2<br />
1<br />
2<br />
+1.5VSG<br />
0.1U_0402_16V4Z<br />
C<br />
B<br />
A<br />
<br />
<br />
<br />
<br />
CLKA0<br />
CLKA0#<br />
CLKA1<br />
CLKA1#<br />
R204<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
R205<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
R206<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
R207<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
5<br />
1<br />
2<br />
1<br />
2<br />
C467<br />
VGA@<br />
0.01U_0402_25V7K<br />
C476<br />
VGA@<br />
0.01U_0402_25V7K<br />
1<br />
2<br />
C447<br />
VGA@<br />
1U_0402_6.3V6K<br />
+1.5VSG<br />
1<br />
2<br />
1<br />
2<br />
C468<br />
VGA@<br />
10U_0603_6.3V6M<br />
C448<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
1<br />
2<br />
C469<br />
VGA@<br />
10U_0603_6.3V6M<br />
C449<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
1<br />
2<br />
C470<br />
VGA@<br />
10U_0603_6.3V6M<br />
C450<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
1<br />
2<br />
C471<br />
VGA@<br />
10U_0603_6.3V6M<br />
C451<br />
VGA@<br />
1U_0402_6.3V6K<br />
4<br />
1<br />
2<br />
C452<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C453<br />
VGA@<br />
1U_0402_6.3V6K<br />
C454<br />
VGA@<br />
1U_0402_6.3V6K<br />
C455<br />
VGA@<br />
1U_0402_6.3V6K<br />
VRAM P/N :<br />
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)<br />
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C456<br />
VGA@<br />
1U_0402_6.3V6K<br />
Security Classification<br />
Issued Date<br />
+1.5VSG<br />
1<br />
2<br />
1<br />
2<br />
C457<br />
VGA@<br />
1U_0402_6.3V6K<br />
C472<br />
VGA@<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
1<br />
2<br />
C458<br />
VGA@<br />
1U_0402_6.3V6K<br />
C473<br />
VGA@<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
1<br />
2<br />
C459<br />
VGA@<br />
1U_0402_6.3V6K<br />
C474<br />
VGA@<br />
10U_0603_6.3V6M<br />
C475<br />
VGA@<br />
10U_0603_6.3V6M<br />
C461<br />
VGA@<br />
1U_0402_6.3V6K<br />
<strong>Compal</strong> Secret Data<br />
2009/7/14 Deciphered Date<br />
2010/03/12<br />
1<br />
2<br />
1<br />
2<br />
C460<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 20 of<br />
55<br />
3<br />
2<br />
1<br />
1<br />
2<br />
C462<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
Title<br />
C463<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C464<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C465<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C466<br />
VGA@<br />
1U_0402_6.3V6K<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
A
5<br />
4<br />
3<br />
2<br />
1<br />
U13<br />
U14<br />
U15<br />
U16<br />
D<br />
VREFCB_A1 M8<br />
MDB26<br />
VREFCB_A2<br />
MDB22<br />
VREFCB_A3<br />
MDB35<br />
VREFCB_A4<br />
VREFDB_Q1<br />
VREFCA DQL0<br />
E3<br />
M8<br />
MDB28<br />
VREFDB_Q2<br />
VREFCA DQL0<br />
E3<br />
M8<br />
MDB20<br />
VREFDB_Q3<br />
VREFCA DQL0<br />
E3<br />
M8<br />
H1<br />
MDB37<br />
VREFDB_Q4<br />
VREFDQ DQL1<br />
F7<br />
H1<br />
MDB27<br />
VREFDQ DQL1<br />
F7<br />
H1<br />
MDB21<br />
VREFDQ DQL1<br />
F7<br />
H1<br />
MDB34<br />
MAB0<br />
DQL2<br />
F2<br />
MDB31<br />
MAB0<br />
DQL2<br />
F2<br />
MDB18<br />
MAB0<br />
DQL2<br />
F2<br />
N3<br />
MDB39<br />
MAB0<br />
MAB1<br />
A0<br />
DQL3<br />
F8<br />
N3<br />
MDB25<br />
MAB1<br />
A0<br />
DQL3<br />
F8<br />
N3<br />
MDB19<br />
MAB1<br />
A0<br />
DQL3<br />
F8<br />
N3<br />
P7<br />
MDB33<br />
MAB1<br />
MAB2<br />
A1<br />
DQL4<br />
H3<br />
P7<br />
MDB30<br />
MAB2<br />
A1<br />
DQL4<br />
H3<br />
P7<br />
MDB17<br />
MAB2<br />
A1<br />
DQL4<br />
H3<br />
P7<br />
P3<br />
MDB38<br />
MAB2<br />
MAB3<br />
A2<br />
DQL5<br />
H8<br />
P3<br />
MDB24<br />
MAB3<br />
A2<br />
DQL5<br />
H8<br />
P3<br />
MDB23<br />
MAB3<br />
A2<br />
DQL5<br />
H8<br />
P3<br />
N2<br />
MDB32<br />
MAB3 N2<br />
MAB4<br />
A3<br />
DQL6<br />
G2<br />
N2<br />
MDB29<br />
MAB4<br />
A3<br />
DQL6<br />
G2<br />
N2<br />
MDB16<br />
MAB4<br />
A3<br />
DQL6<br />
G2<br />
P8<br />
P8<br />
MDB36<br />
MAB4 P8<br />
MAB5<br />
A4<br />
DQL7<br />
H7<br />
MAB5<br />
A4<br />
DQL7<br />
H7<br />
P8<br />
P2<br />
MAB5<br />
A4<br />
DQL7<br />
H7<br />
P2<br />
MAB5 P2<br />
MAB6<br />
A5<br />
MAB6<br />
A5<br />
P2<br />
R8<br />
MAB6<br />
A5<br />
R8<br />
MAB6 R8<br />
MAB7<br />
A6<br />
MDB15<br />
MAB7<br />
A6<br />
R8<br />
R2<br />
MDB1<br />
MAB7<br />
A6<br />
R2<br />
MDB44<br />
MAB7 R2<br />
MAB8<br />
A7<br />
DQU0<br />
D7<br />
MDB10<br />
MAB8<br />
A7<br />
DQU0<br />
D7<br />
R2<br />
T8<br />
MDB6<br />
MAB8<br />
A7<br />
DQU0<br />
D7<br />
T8<br />
MDB43<br />
MAB8 T8<br />
MAB9<br />
A8<br />
DQU1<br />
C3<br />
MDB12<br />
MAB9<br />
A8<br />
DQU1<br />
C3<br />
T8<br />
R3<br />
MDB0<br />
MAB9<br />
A8<br />
DQU1<br />
C3<br />
R3<br />
MDB47<br />
MAB9 R3<br />
MAB10<br />
A9<br />
DQU2<br />
C8<br />
MDB11<br />
MAB10<br />
A9<br />
DQU2<br />
C8<br />
R3<br />
L7<br />
L7<br />
MDB4<br />
MAB10<br />
A9<br />
DQU2<br />
C8<br />
MDB41<br />
MAB10 L7<br />
MAB11<br />
A10/AP DQU3<br />
C2<br />
MDB13<br />
MAB11<br />
A10/AP DQU3<br />
C2<br />
L7<br />
R7<br />
R7<br />
MDB3<br />
MAB11<br />
A10/AP DQU3<br />
C2<br />
MDB45<br />
MAB11 R7<br />
MAB12<br />
A11<br />
DQU4<br />
A7<br />
MDB9<br />
MAB12<br />
A11<br />
DQU4<br />
A7<br />
R7<br />
N7<br />
N7<br />
MDB7<br />
MAB12<br />
A11<br />
DQU4<br />
A7<br />
MDB40<br />
MAB12 N7<br />
MAB13<br />
A12<br />
DQU5<br />
A2<br />
MDB14<br />
MAB13<br />
A12<br />
DQU5<br />
A2<br />
N7<br />
T3<br />
T3<br />
MDB2<br />
MAB13<br />
A12<br />
DQU5<br />
A2<br />
MDB46<br />
MAB13<br />
A13<br />
DQU6<br />
B8<br />
T3<br />
MDB8<br />
A13<br />
DQU6<br />
B8<br />
T3<br />
T7<br />
T7<br />
MDB5<br />
A13<br />
DQU6<br />
B8<br />
MDB42<br />
A14<br />
DQU7<br />
A3<br />
A14<br />
DQU7<br />
A3<br />
T7<br />
A14<br />
DQU7<br />
A3<br />
T7<br />
M7<br />
A15/BA3<br />
M7<br />
M7<br />
+1.5VSG<br />
A15/BA3<br />
M7<br />
+1.5VSG<br />
A15/BA3<br />
+1.5VSG<br />
VREFCA<br />
VREFDQ<br />
A0<br />
A1<br />
A2<br />
A3<br />
A4<br />
A5<br />
A6<br />
A7<br />
A8<br />
A9<br />
A10/AP<br />
A11<br />
A12<br />
A13<br />
A14<br />
A15/BA3<br />
DQL0<br />
DQL1<br />
DQL2<br />
DQL3<br />
DQL4<br />
DQL5<br />
DQL6<br />
DQL7<br />
DQU0<br />
DQU1<br />
DQU2<br />
DQU3<br />
DQU4<br />
DQU5<br />
DQU6<br />
DQU7<br />
E3<br />
F7<br />
F2<br />
F8<br />
H3<br />
H8<br />
G2<br />
H7<br />
D7<br />
C3<br />
C8<br />
C2<br />
A7<br />
A2<br />
B8<br />
A3<br />
MDB55<br />
MDB49<br />
MDB52<br />
MDB50<br />
MDB53<br />
MDB48<br />
MDB54<br />
MDB51<br />
MDB56<br />
MDB59<br />
MDB63<br />
MDB62<br />
MDB57<br />
MDB61<br />
MDB58<br />
MDB60<br />
+1.5VSG<br />
D<br />
C<br />
B<br />
A<br />
<br />
<br />
<br />
<br />
MDB[0..63]<br />
<br />
<br />
MAB[13..0]<br />
DQMB#[7..0]<br />
<br />
<br />
ODTB0<br />
ODTB1<br />
CLKB0<br />
CLKB0#<br />
CLKB1<br />
CLKB1#<br />
QSB[7..0]<br />
QSB#[7..0]<br />
VGA@<br />
ODTB0<br />
R220<br />
MDB[0..63]<br />
VRAM_RST#<br />
VGA@<br />
ODTB1<br />
R222<br />
0_0402_5%<br />
5<br />
<br />
<br />
<br />
<br />
<br />
<br />
<br />
<br />
ODTB0_1<br />
ODTB1_1<br />
B_BA0<br />
B_BA1<br />
B_BA2<br />
CKEB0<br />
Pull high for Madison and Park...<br />
0_0402_5%<br />
R232<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
R233<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
R234<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
R235<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
CSB0#_0<br />
RASB0#<br />
CASB0#<br />
WEB0#<br />
R208<br />
VGA@<br />
243_0402_1%<br />
1<br />
2<br />
CLKB0<br />
CLKB0#<br />
ODTB0_1<br />
QSB3<br />
QSB1<br />
DQMB#3<br />
DQMB#1<br />
QSB#3<br />
QSB#1<br />
VRAM_RST#<br />
1<br />
2<br />
C506<br />
VGA@<br />
0.01U_0402_25V7K<br />
+1.5VSG<br />
R221<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
R223<br />
VGA@<br />
56_0402_1%<br />
1 2<br />
1<br />
2<br />
C485<br />
VGA@<br />
0.01U_0402_25V7K<br />
+1.5VSG<br />
1<br />
2<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
K1<br />
ODT/ODT0<br />
L2<br />
CS/CS0<br />
J3<br />
RAS<br />
K3<br />
CAS<br />
L3<br />
WE<br />
F3<br />
DQSL<br />
C7<br />
DQSU<br />
E7<br />
DML<br />
D3<br />
DMU<br />
G3<br />
DQSL<br />
B7<br />
DQSU<br />
T2<br />
L8<br />
+1.5VSG<br />
RESET<br />
ZQ/ZQ0<br />
J1<br />
NC/ODT1<br />
L1<br />
NC/CS1<br />
J9<br />
NC/CE1<br />
L9<br />
NCZQ1<br />
1<br />
2<br />
96-BALL<br />
SDRAM DDR3<br />
K4B1G1646E-HC12_FBGA96<br />
X76@<br />
+1.5VSG<br />
1<br />
R212<br />
VGA@<br />
4.99K_0402_1%<br />
2<br />
1<br />
R224<br />
VGA@<br />
4.99K_0402_1%<br />
C486<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C507<br />
VGA@<br />
10U_0603_6.3V6M<br />
C487<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
2<br />
1<br />
2<br />
C508<br />
VGA@<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
VDDQ<br />
A1<br />
VDDQ<br />
A8<br />
VDDQ<br />
C1<br />
VDDQ<br />
C9<br />
VDDQ<br />
D2<br />
VDDQ<br />
E9<br />
VDDQ<br />
F1<br />
VDDQ<br />
H2<br />
VDDQ<br />
H9<br />
VSS<br />
A9<br />
VSS<br />
B3<br />
VSS<br />
E1<br />
VSS<br />
G8<br />
VSS<br />
J2<br />
VSS<br />
J8<br />
VSS<br />
M1<br />
VSS<br />
M9<br />
VSS<br />
P1<br />
VSS<br />
P9<br />
VSS<br />
T1<br />
VSS<br />
T9<br />
VSSQ<br />
B1<br />
VSSQ<br />
B9<br />
VSSQ<br />
D1<br />
VSSQ<br />
D8<br />
VSSQ<br />
E2<br />
VSSQ<br />
E8<br />
VSSQ<br />
F9<br />
VSSQ<br />
G1<br />
VSSQ<br />
G9<br />
4<br />
+1.5VSG<br />
+1.5VSG<br />
B_BA0<br />
B_BA1<br />
B_BA2<br />
CLKB0<br />
CLKB0#<br />
CKEB0<br />
QSB2<br />
QSB0<br />
DQMB#2<br />
DQMB#0<br />
QSB#2<br />
QSB#0<br />
96-BALL<br />
SDRAM DDR3<br />
K4B1G1646E-HC12_FBGA96<br />
X76@<br />
+1.5VSG<br />
+1.5VSG<br />
+1.5VSG<br />
VREFCB_A1 VREFDB_Q1<br />
VREFCB_A2 VREFDB_Q2<br />
1<br />
1<br />
1<br />
1<br />
C477<br />
R225<br />
C478<br />
R226<br />
C479<br />
R227<br />
C480<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
C488<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C509<br />
VGA@<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
0.1U_0402_16V4Z<br />
C489<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C510<br />
VGA@<br />
10U_0603_6.3V6M<br />
R213<br />
VGA@<br />
4.99K_0402_1%<br />
C490<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
1<br />
2<br />
1<br />
R209<br />
VGA@<br />
243_0402_1%<br />
2<br />
ODTB0_1 K1<br />
CSB0#_0 L2<br />
RASB0# J3<br />
CASB0# K3<br />
WEB0# L3<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
+1.5VSG<br />
ODT/ODT0<br />
CS/CS0<br />
RAS<br />
CAS<br />
WE<br />
F3<br />
DQSL<br />
C7<br />
DQSU<br />
E7<br />
DML<br />
D3<br />
DMU<br />
G3<br />
DQSL<br />
B7<br />
DQSU<br />
VRAM_RST# T2<br />
RESET<br />
L8<br />
ZQ/ZQ0<br />
0.1U_0402_16V4Z<br />
J1<br />
NC/ODT1<br />
L1<br />
NC/CS1<br />
J9<br />
NC/CE1<br />
L9<br />
NCZQ1<br />
1<br />
2<br />
R214<br />
VGA@<br />
4.99K_0402_1%<br />
C491<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C492<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
VDDQ<br />
A1<br />
VDDQ<br />
A8<br />
VDDQ<br />
C1<br />
VDDQ<br />
C9<br />
VDDQ<br />
D2<br />
VDDQ<br />
E9<br />
VDDQ<br />
F1<br />
VDDQ<br />
H2<br />
VDDQ<br />
H9<br />
VSS<br />
A9<br />
VSS<br />
B3<br />
VSS<br />
E1<br />
VSS<br />
G8<br />
VSS<br />
J2<br />
VSS<br />
J8<br />
VSS<br />
M1<br />
VSS<br />
M9<br />
VSS<br />
P1<br />
VSS<br />
P9<br />
VSS<br />
T1<br />
VSS<br />
T9<br />
VSSQ<br />
B1<br />
VSSQ<br />
B9<br />
VSSQ<br />
D1<br />
VSSQ<br />
D8<br />
VSSQ<br />
E2<br />
VSSQ<br />
E8<br />
VSSQ<br />
F9<br />
VSSQ<br />
G1<br />
VSSQ<br />
G9<br />
C493<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
0.1U_0402_16V4Z<br />
C494<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
R215<br />
VGA@<br />
4.99K_0402_1%<br />
2<br />
1<br />
2<br />
Security Classification<br />
Issued Date<br />
<br />
<br />
<br />
<br />
<br />
CKEB1<br />
CSB1#_0<br />
RASB1#<br />
CASB1#<br />
WEB1#<br />
1<br />
R210<br />
VGA@<br />
243_0402_1%<br />
0.1U_0402_16V4Z<br />
2<br />
B_BA0<br />
B_BA1<br />
B_BA2<br />
CLKB1<br />
CLKB1#<br />
ODTB1_1<br />
QSB4<br />
QSB5<br />
DQMB#4<br />
DQMB#5<br />
QSB#4<br />
QSB#5<br />
VRAM_RST#<br />
+1.5VSG<br />
1<br />
2<br />
+1.5VSG<br />
1<br />
2<br />
1<br />
2<br />
+1.5VSG<br />
B_BA0<br />
B_BA1<br />
B_BA2<br />
CLKB1<br />
CLKB1#<br />
CKEB1<br />
ODTB1_1<br />
CSB1#_0<br />
RASB1#<br />
CASB1#<br />
WEB1#<br />
QSB6<br />
QSB7<br />
DQMB#6<br />
DQMB#7<br />
QSB#6<br />
QSB#7<br />
VRAM_RST#<br />
+1.5VSG +1.5VSG +1.5VSG<br />
+1.5VSG<br />
R216<br />
VGA@<br />
4.99K_0402_1%<br />
C496<br />
VGA@<br />
1U_0402_6.3V6K<br />
C512<br />
VGA@<br />
10U_0603_6.3V6M<br />
1<br />
2<br />
1<br />
R228<br />
VGA@<br />
4.99K_0402_1%<br />
C511<br />
VGA@<br />
10U_0603_6.3V6M<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
K1<br />
ODT/ODT0<br />
L2<br />
CS/CS0<br />
J3<br />
RAS<br />
K3<br />
CAS<br />
L3<br />
WE<br />
F3<br />
DQSL<br />
C7<br />
DQSU<br />
E7<br />
DML<br />
D3<br />
DMU<br />
G3<br />
DQSL<br />
B7<br />
DQSU<br />
T2<br />
L8<br />
RESET<br />
ZQ/ZQ0<br />
J1<br />
NC/ODT1 VSSQ<br />
B1<br />
L1<br />
NC/CS1 VSSQ<br />
B9<br />
J9<br />
NC/CE1 VSSQ<br />
D1<br />
L9<br />
NCZQ1 VSSQ<br />
D8<br />
VSSQ<br />
E2<br />
VSSQ<br />
E8<br />
VSSQ<br />
F9<br />
VSSQ<br />
G1<br />
VSSQ<br />
G9<br />
96-BALL<br />
SDRAM DDR3<br />
K4B1G1646E-HC12_FBGA96<br />
X76@<br />
2<br />
1<br />
2<br />
1<br />
2<br />
+1.5VSG<br />
VREFCB_A3 VREFDB_Q3<br />
VREFCB_A4 VREFDB_Q4<br />
1<br />
1<br />
1<br />
1<br />
C481<br />
R229<br />
C482<br />
R230<br />
C483<br />
R231<br />
C484<br />
VGA@<br />
VGA@<br />
VGA@<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
4.99K_0402_1%<br />
VGA@ 2<br />
C498<br />
VGA@<br />
1U_0402_6.3V6K<br />
C513<br />
VGA@<br />
10U_0603_6.3V6M<br />
C514<br />
VGA@<br />
10U_0603_6.3V6M<br />
C500<br />
VGA@<br />
1U_0402_6.3V6K<br />
<strong>Compal</strong> Secret Data<br />
2009/7/14 Deciphered Date<br />
2010/03/12<br />
1<br />
2<br />
1<br />
2<br />
0.1U_0402_16V4Z<br />
C499<br />
VGA@<br />
1U_0402_6.3V6K<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
VDDQ<br />
A1<br />
VDDQ<br />
A8<br />
VDDQ<br />
C1<br />
VDDQ<br />
C9<br />
VDDQ<br />
D2<br />
VDDQ<br />
E9<br />
VDDQ<br />
F1<br />
VDDQ<br />
H2<br />
VDDQ<br />
H9<br />
VSS<br />
A9<br />
VSS<br />
B3<br />
VSS<br />
E1<br />
VSS<br />
G8<br />
VSS<br />
J2<br />
VSS<br />
J8<br />
VSS<br />
M1<br />
VSS<br />
M9<br />
VSS<br />
P1<br />
VSS<br />
P9<br />
VSS<br />
T1<br />
VSS<br />
T9<br />
www.mycomp.su<br />
1<br />
2<br />
C495<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
C497<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
1<br />
R217<br />
VGA@<br />
4.99K_0402_1%<br />
2<br />
1<br />
2<br />
R211<br />
VGA@<br />
243_0402_1%<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 21 of<br />
55<br />
3<br />
2<br />
1<br />
0.1U_0402_16V4Z<br />
1<br />
2<br />
R218<br />
VGA@<br />
4.99K_0402_1%<br />
+1.5VSG<br />
1<br />
2<br />
C501<br />
VGA@<br />
1U_0402_6.3V6K<br />
Title<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
C502<br />
VGA@<br />
1U_0402_6.3V6K<br />
M2<br />
BA0<br />
N8<br />
BA1<br />
M3<br />
BA2<br />
J7<br />
CK<br />
K7<br />
CK<br />
K9<br />
CKE/CKE0<br />
K1<br />
ODT/ODT0<br />
L2<br />
CS/CS0<br />
J3<br />
RAS<br />
K3<br />
CAS<br />
L3<br />
WE<br />
F3<br />
DQSL<br />
C7<br />
DQSU<br />
E7<br />
DML<br />
D3<br />
DMU<br />
G3<br />
DQSL<br />
B7<br />
DQSU<br />
T2<br />
L8<br />
RESET<br />
ZQ/ZQ0<br />
J1<br />
NC/ODT1 VSSQ<br />
B1<br />
L1<br />
NC/CS1 VSSQ<br />
B9<br />
J9<br />
NC/CE1 VSSQ<br />
D1<br />
L9<br />
NCZQ1 VSSQ<br />
D8<br />
VSSQ<br />
E2<br />
VSSQ<br />
E8<br />
VSSQ<br />
F9<br />
VSSQ<br />
G1<br />
VSSQ<br />
G9<br />
96-BALL<br />
SDRAM DDR3<br />
K4B1G1646E-HC12_FBGA96<br />
X76@<br />
1<br />
2<br />
C503<br />
VGA@<br />
1U_0402_6.3V6K<br />
0.1U_0402_16V4Z<br />
1<br />
2<br />
C504<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
VDD<br />
B2<br />
VDD<br />
D9<br />
VDD<br />
G7<br />
VDD<br />
K2<br />
VDD<br />
K8<br />
VDD<br />
N1<br />
VDD<br />
N9<br />
VDD<br />
R1<br />
VDD<br />
R9<br />
VDDQ<br />
A1<br />
VDDQ<br />
A8<br />
VDDQ<br />
C1<br />
VDDQ<br />
C9<br />
VDDQ<br />
D2<br />
VDDQ<br />
E9<br />
VDDQ<br />
F1<br />
VDDQ<br />
H2<br />
VDDQ<br />
H9<br />
VSS<br />
A9<br />
VSS<br />
B3<br />
VSS<br />
E1<br />
VSS<br />
G8<br />
VSS<br />
J2<br />
VSS<br />
J8<br />
VSS<br />
M1<br />
VSS<br />
M9<br />
VSS<br />
P1<br />
VSS<br />
P9<br />
VSS<br />
T1<br />
VSS<br />
T9<br />
R219<br />
VGA@<br />
4.99K_0402_1%<br />
C505<br />
VGA@<br />
1U_0402_6.3V6K<br />
1<br />
2<br />
1<br />
2<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
0.1U_0402_16V4Z<br />
C<br />
B<br />
A
5<br />
4<br />
3<br />
2<br />
1<br />
+VDDCLK_IO<br />
UMAO@<br />
L54<br />
+1.1VS 1 2<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
FBMA-L11-201209-221LMA30T_0805<br />
C515<br />
C516<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
C517<br />
C518<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
C519<br />
C520<br />
+3VS_CLK<br />
L55<br />
0.1U_0402_16V4Z<br />
+3VS 1 2<br />
1<br />
1<br />
C521<br />
FBMA-L11-201209-221LMA30T_0805<br />
C522<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
C523<br />
C524<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
C525<br />
C526<br />
1<br />
C527<br />
0.1U_0402_16V4Z<br />
1<br />
C528<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
C529<br />
C530<br />
1<br />
C531<br />
1<br />
C532<br />
D<br />
EXT@<br />
EXT@<br />
EXT@<br />
2<br />
2<br />
2<br />
22U_0805_6.3V6M<br />
0.1U_0402_16V4Z<br />
EXT@<br />
EXT@<br />
2<br />
2<br />
0.1U_0402_16V4Z<br />
EXT@<br />
2<br />
EXT@<br />
2<br />
22U_0805_6.3V6M<br />
EXT@<br />
2<br />
EXT@<br />
2<br />
0.1U_0402_16V4Z<br />
EXT@<br />
EXT@<br />
2<br />
2<br />
0.1U_0402_16V4Z<br />
EXT@<br />
2<br />
EXT@<br />
2<br />
0.1U_0402_16V4Z<br />
EXT@<br />
EXT@<br />
2<br />
2<br />
0.1U_0402_16V4Z<br />
EXT@<br />
2<br />
EXT@<br />
2<br />
0.1U_0402_16V4Z<br />
1U_0402_6.3V4Z<br />
2<br />
EXT@<br />
D<br />
1U CLOSE PIN 69<br />
C<br />
B<br />
A<br />
EXT@<br />
L56<br />
+3VS 1 2 +3VS_CLKVDDA<br />
FBMA-L11-201209-221LMA30T_0805<br />
1 1<br />
C533<br />
C534<br />
22U_0805_6.3V6M<br />
0.1U_0402_16V4Z<br />
EXT@<br />
EXT@<br />
2 2<br />
SB_SMCLK0 <br />
SB_SMDAT0 <br />
+3VS_CLK<br />
62<br />
SRC_SLOW<br />
SRC_SLOW<br />
EXT@<br />
VDDREF<br />
SB_SRC_SLOW#<br />
41<br />
66<br />
INT@<br />
GNDREF<br />
1 2<br />
CPU_HT_CLKP <br />
2 1<br />
R429 1 INT@<br />
0_0402_5% 2<br />
CPU_HT_CLKN <br />
C535<br />
0.1U_0402_16V4Z<br />
R430<br />
0_0402_5%<br />
+VDDCLK_IO<br />
12<br />
CPUCK<br />
EXT@<br />
R237<br />
VDDSRC_IO<br />
CPUKG0T_LPRS<br />
56<br />
1 2<br />
CLK_CPU_BCLK <br />
18<br />
CPUCK#<br />
R539 1 EXT@<br />
0_0402_5% 2<br />
CLK_CPU_BCLK# CPU<br />
@<br />
VDDSRC_IO<br />
CPUKG0C_LPRS 55<br />
8.2K_0402_5%<br />
28<br />
R538<br />
0_0402_5%<br />
VDDATIG_IO<br />
37<br />
VDDSB_SRC_IO<br />
53<br />
VDDCPU_IO<br />
HTT0T_LPRS / 66 M 60<br />
CLK_NBHT <br />
+3VS_CLK<br />
HTT0C_LPRS / 66 M 59<br />
CLK_NBHT# NB HT<br />
+3VS_CLK<br />
3<br />
INT@<br />
VDDDOT<br />
1 2<br />
NB_HT_CLKP <br />
17<br />
R432<br />
INT@<br />
0_0402_5%<br />
VDDSRC<br />
SB_SRC0T_LPRS<br />
40<br />
1 2<br />
NB_HT_CLKN <br />
29<br />
R431<br />
0_0402_5%<br />
VDDATIG<br />
SB_SRC0C_LPRS 39<br />
+3VS_CLK<br />
38<br />
VDDSB_SRC<br />
44<br />
VDDSATA<br />
54<br />
SB_SRC1T_LPRS<br />
35<br />
L57<br />
VDDCPU<br />
61<br />
VDDHTT<br />
SB_SRC1C_LPRS 34<br />
1 2 69<br />
BLM18AG601SN1D_2P<br />
VDD48<br />
EXT@<br />
ATIG0T_LPRS<br />
33<br />
CLK_NBGFX <br />
CLK_NBGFX# NB GFX<br />
R240<br />
R241<br />
ATIG0C_LPRS<br />
32<br />
8.2K_0402_5%<br />
8.2K_0402_5%<br />
LAN<br />
ATIG1<br />
LAN_CLKREQ#<br />
24<br />
1 EXT@ 2<br />
@<br />
EXT@<br />
CLKREQ0 #<br />
CLK_PEG_VGA <br />
ATIG1#<br />
R534 1 EXT@<br />
0_0402_5%<br />
ATIG1T_LPRS<br />
31<br />
2<br />
CLK_PEG_VGA# <br />
Mini Card1 MINI1_CLKREQ#<br />
51<br />
R535<br />
0_0402_5%<br />
CLKREQ1#<br />
ATIG1C_LPRS<br />
30<br />
VGA<br />
1 INT@ 2<br />
VGA_CLKP <br />
SEL_SATA<br />
50<br />
R438<br />
0_0402_5%<br />
CLKREQ2#<br />
1 INT@ 2<br />
VGA_CLKN <br />
27M_SEL<br />
ATIG2T_LPRS<br />
26<br />
R437<br />
0_0402_5%<br />
43<br />
INT@<br />
CLKREQ3#<br />
ATIG2C_LPRS<br />
25<br />
1 2<br />
GPP_CLK1P <br />
R436 1 INT@<br />
0_0402_5% 2<br />
GPP_CLK1N <br />
R242<br />
42<br />
R433<br />
0_0402_5%<br />
CLKREQ4#<br />
8.2K_0402_5%<br />
EXT@<br />
SRC0T_LPRS<br />
23<br />
CLK_PCIE_LAN <br />
SRC0C_LPRS 22<br />
CLK_PCIE_LAN# GLAN<br />
VGA_ON<br />
S<br />
EXTPW@<br />
2 1 R263 2 SUSP <br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
1 @R150<br />
2<br />
2N7002_SOT23<br />
G<br />
0_0402_5%<br />
<strong>Compal</strong> Electronics, Inc.<br />
10K_0402_5% 2<br />
Q52<br />
S<br />
Issued Date<br />
2008/10/06 Title<br />
Deciphered Date 2010/03/12<br />
EXTPW@<br />
R255<br />
VGA_ON# <br />
C847<br />
EXTPW@<br />
@0_0402_5%<br />
SCHEMATIC, MB A5911<br />
27M_SEL 63<br />
REF2/SEL_27<br />
SRC1T_LPRS<br />
21<br />
CLK_PCIE_MINI1 <br />
1 2<br />
CLK_PCIE_MINI1# MiniCard_1<br />
R243<br />
90.9_0402_1%<br />
SEL_SATA<br />
SRC1C_LPRS 20<br />
64<br />
EXT@<br />
REF1/SEL_SATA<br />
1 INT@ 2<br />
GPP_CLK3P <br />
CLK_XTAL_OUT<br />
1 2 CLK_14.318M 65<br />
R435<br />
INT@<br />
0_0402_5%<br />
CLK_NB_14.318M<br />
GPP_CLK3N <br />
R244<br />
158_0402_1%<br />
REF0/SEL_HTT66<br />
SRC2T_LPRS<br />
16<br />
1 2<br />
R434<br />
0_0402_5%<br />
CLK_XTAL_IN<br />
SRC2C_LPRS 15<br />
71<br />
Change Y2 to<br />
EXT@<br />
48MHz_0<br />
SRC3T_LPRS<br />
14<br />
CLK_48M<br />
SRC3C_LPRS 13<br />
2 1<br />
70<br />
TXC-SJ100009R00<br />
CLK_48M_USB<br />
R246<br />
33_0402_5%<br />
48MHz_1<br />
Y2<br />
EXT@ <br />
SRC4T_LPRS<br />
10<br />
CLK_SBLINK_BCLK <br />
2 1<br />
CLK_SBLINK_BCLK# NB A LINK<br />
CLK_XTAL_IN<br />
SRC4C_LPRS 9<br />
67<br />
14.318MHZ_16PF_7A14300083<br />
X1<br />
2<br />
2<br />
CLK_XTAL_OUT 68<br />
C536<br />
C537<br />
X2<br />
SRC5T_LPRS<br />
8<br />
SRC5C_LPRS 7<br />
27P_0402_50V8J<br />
27P_0402_50V8J<br />
1<br />
EXT@ 1 EXT@<br />
6<br />
GNDDOT<br />
SRC6T/SATAT_LPRS<br />
46<br />
CLK_SBSRC_BCLK <br />
11<br />
GNDSRC<br />
SRC6C/SATAC_LPRS<br />
45<br />
CLK_SBSRC_BCLK# SB RCLK<br />
Routing the trace at least 10mil<br />
19<br />
GNDSRC<br />
27<br />
GNDATIG<br />
36<br />
GNDSB_SRC SRC7T_LPRS/27MHz_SS<br />
5<br />
47<br />
CLK_SRC7C<br />
GNDSATA<br />
SRC7C_LPRS/27MHz_NS<br />
4<br />
1 EXT@ 2<br />
1 VGAOPT@ 2<br />
27M_NSSC VGA option solution<br />
52<br />
R540<br />
0_0402_5%<br />
R248<br />
0_0402_5%<br />
CLK_NB_14.318M<br />
+1.1VS_CLK<br />
GNDCPU<br />
58<br />
GNDHTT<br />
72<br />
INT@<br />
GND48<br />
1 2<br />
VGA_DBCLK <br />
RS780 1.1V 158R/90.0R<br />
73<br />
EXT@<br />
+3VS_CLK<br />
R245<br />
0_0402_5%<br />
Q50<br />
EXTPW@<br />
GNDPAD<br />
PD#<br />
57 2 1<br />
Close to CLK_GEN<br />
R249<br />
8.2K_0402_5%<br />
+1.1VALW<br />
SI2301CDS-T1-GE3_SOT23-3<br />
+VDDCLK_IO<br />
L98<br />
1 * NON SPREAD 27M and SPREAD 27M output<br />
3<br />
1<br />
1 2<br />
SLG8SP626VTR_QFN72_10x10<br />
27M_SEL<br />
FBMA-L11-201209-221LMA30T_0805<br />
EXT@<br />
1 INT@ 2 CLK_SBLINK_BCLK<br />
0 differential spread SRC_7 output<br />
EXTPW@<br />
R520<br />
0_0402_5%<br />
R601<br />
1st (SILEGO) : SA00001Z310 S IC SLG8SP626VTR QFN 72P CLK GEN<br />
1 INT@ 2 CLK_SBLINK_BCLK#<br />
R519<br />
0_0402_5%<br />
1 single-ended 66MHz HTT output<br />
100K_0402_5%<br />
2nd (ICS) : SA000023H10 S IC ICS9LPRS488CKLFT MLF 72P CLK GEN<br />
SEL_HTT66<br />
EXTPW@<br />
1 INT@ 2 CLK_SBSRC_BCLK#<br />
0* differential 100MHz HTT output<br />
EXTPW@<br />
R497<br />
0_0402_5%<br />
R599<br />
1 INT@ 2 CLK_SBSRC_BCLK<br />
1* NON SPREAD 100M SATA SRC6 output<br />
Q54<br />
470_0603_5%<br />
R518<br />
0_0402_5%<br />
SEL_SATA<br />
R600<br />
EXTPW@<br />
D<br />
0 SPREAD 100M SATA SRC6 output<br />
SUSP#<br />
2 1 2<br />
* default<br />
100K_0402_5%<br />
G<br />
D<br />
0.1U_0402_16V4Z<br />
2N7002_SOT23<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
1<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
Custom<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 22 of<br />
55<br />
5<br />
4<br />
3<br />
2<br />
1<br />
1 2<br />
S<br />
G<br />
2<br />
1<br />
3<br />
D<br />
R238 8.2K_0402_5%<br />
1 2<br />
1 2<br />
1<br />
3<br />
R239 8.2K_0402_5%<br />
1 2<br />
U17<br />
49<br />
VDDA<br />
48<br />
GNDA<br />
ICS 9LPRS488<br />
SMBCLK 1<br />
SMBDAT<br />
2<br />
www.mycomp.su<br />
CLK_SB<br />
CLK_SB#<br />
1 2<br />
1 2<br />
+3VS_CLK<br />
1 2<br />
1<br />
2<br />
1<br />
2<br />
R236<br />
8.2K_0402_5%<br />
EXT@<br />
C<br />
B<br />
A
5<br />
D<br />
C<br />
B<br />
A<br />
5<br />
4<br />
LCD POWER CIRCUIT<br />
VGA_TXCLK-<br />
VCC 10 1 1 1<br />
48<br />
VGA_TXCLK+<br />
0B1<br />
VCC 18<br />
47<br />
VGA_TXOUT2-<br />
1B1<br />
VCC 27<br />
43<br />
SG@<br />
SG@<br />
SG@<br />
VGA_TXOUT2+<br />
2B1<br />
VCC<br />
For DIS only<br />
VGA ONLY<br />
2 2 2<br />
42<br />
VGA_TXOUT1+<br />
3B1<br />
VCC 50<br />
37<br />
EC_INVT_PWM<br />
DISO@<br />
INVT_PWM<br />
VGA_TXOUT1-<br />
4B1<br />
VCC 56<br />
EC_INVT_PWM<br />
1 2<br />
36<br />
C1152<br />
C1153<br />
C1154<br />
TXCLK-<br />
2 3 VGA_TXCLK-<br />
R260<br />
0_0402_5%<br />
VGA_TXOUT0+<br />
5B1<br />
TXCLK-<br />
VGA_TXCLK- <br />
32<br />
TXCLK+<br />
VGA_TXCLK+<br />
VGA_TXOUT0-<br />
TXCLK+<br />
VGA_TXCLK+ <br />
DISO@RP2<br />
6B1<br />
A0<br />
2<br />
31<br />
0_0404_4P2R_5%<br />
VGA_PNL_PWM 1 @ 2<br />
R319<br />
VGA_LCD_DAT<br />
7B1<br />
A1<br />
3<br />
22<br />
TXOUT2-<br />
TXOUT2-<br />
VGA_TXOUT2-<br />
R261<br />
0_0402_5%<br />
VGA_LCD_CLK<br />
8B1<br />
A2<br />
7<br />
2 3<br />
TXOUT2+<br />
VGA_TXOUT2- <br />
10K_0402_5%<br />
23<br />
TXOUT2+<br />
VGA_TXOUT2+<br />
TXOUT1+<br />
VGA_TXOUT2+ <br />
DISO@RP4<br />
9B1<br />
A3<br />
8<br />
0_0404_4P2R_5%<br />
GMCH_INVT_PWM<br />
@<br />
A4<br />
11<br />
1 2<br />
TXOUT1-<br />
TXOUT1+<br />
VGA_TXOUT1+<br />
R262<br />
0_0402_5%<br />
A5<br />
12<br />
2 3<br />
TXOUT0+<br />
VGA_TXOUT1+ <br />
TXOUT1-<br />
VGA_TXOUT1-<br />
TXOUT0-<br />
VGA_TXOUT1- <br />
DISO@RP6<br />
A6<br />
14<br />
0_0404_4P2R_5%<br />
GMCH_TXCLK-<br />
A7<br />
15<br />
46<br />
I2CC_SDA<br />
TXOUT0+<br />
VGA_TXOUT0+<br />
GMCH_TXCLK+<br />
0B2<br />
A8<br />
19<br />
2 3<br />
I2CC_SCL<br />
VGA_TXOUT0+ <br />
45<br />
TXOUT0-<br />
VGA_TXOUT0-<br />
PX & VB support<br />
GMCH_TXOUT2-<br />
VGA_TXOUT0- <br />
DISO@RP8<br />
1B2<br />
A9<br />
20<br />
41<br />
0_0404_4P2R_5%<br />
R533<br />
+5VS<br />
C681<br />
SG@<br />
GMCH_TXOUT2+<br />
2B2<br />
40<br />
BUS_SEL#<br />
EC_INVT_PWM<br />
0.1U_0402_16V4Z<br />
GMCH_TXOUT1+<br />
3B2<br />
SEL<br />
17<br />
1 2<br />
35<br />
I2CC_SCL<br />
0_0402_5% 2<br />
DISO@ 1<br />
R270 VGA_LCD_CLK<br />
VGA_LCD_CLK <br />
0_0402_5%<br />
GMCH_TXOUT1-<br />
4B2<br />
1 2<br />
34<br />
I2CC_SDA<br />
0_0402_5% R272 VGA_LCD_DAT<br />
U33<br />
GMCH_TXOUT0+<br />
VGA_LCD_DAT <br />
DISO@ 1<br />
5B2<br />
GND 1<br />
30<br />
@<br />
GMCH_TXOUT0-<br />
VGA_PNL_PWM<br />
2<br />
1A<br />
VCC<br />
GMCH_INVT_PWM<br />
INVT_PWM_L<br />
INVT_PWM<br />
GMCH_LCD_DATA<br />
UMA ONLY<br />
6B2<br />
GND 6<br />
1 2<br />
29<br />
R532<br />
0_0402_5%<br />
7B2<br />
GND 9<br />
5<br />
BUS_SEL#<br />
2A<br />
1B<br />
3<br />
1 2<br />
25<br />
1<br />
GMCH_LCD_CLK<br />
BUS_SEL<br />
1OE#<br />
2B<br />
6<br />
R316<br />
0_0402_5%<br />
8B2<br />
GND 13<br />
26<br />
TXCLK-<br />
GMCH_TXCLK-<br />
GND 4<br />
9B2<br />
GND 16<br />
7<br />
RP1<br />
2OE#<br />
BUS_SEL#<br />
GND<br />
GMCH_TXCLK- <br />
Pop for PX verify<br />
1 4<br />
54<br />
TXCLK+<br />
GMCH_TXCLK+<br />
SN74CBTD3306CPWR_TSSOP8<br />
SEL2<br />
GND<br />
GMCH_TXCLK+ <br />
<br />
2 3<br />
UMAO@<br />
0_0404_4P2R_5%<br />
SG@<br />
GND 28<br />
TXOUT2-<br />
1 4 GMCH_TXOUT2-<br />
GND 33<br />
GMCH_TXOUT2- <br />
52<br />
TXOUT2+<br />
2 3 GMCH_TXOUT2+<br />
NC<br />
GND<br />
GMCH_TXOUT2+ <br />
L B1 DIS<br />
5<br />
UMAO@<br />
RP3<br />
0_0404_4P2R_5%<br />
NC<br />
GND<br />
1OE#<br />
51<br />
TXOUT1+<br />
1 4 GMCH_TXOUT1+<br />
NC<br />
GND<br />
GMCH_TXOUT1+ <br />
H Z<br />
TXOUT1-<br />
2 3 GMCH_TXOUT1-<br />
GND 53<br />
GMCH_TXOUT1- <br />
57<br />
UMAO@<br />
RP5<br />
0_0404_4P2R_5%<br />
Thermal_GND GND<br />
L B1 UMA<br />
TXOUT0+<br />
1 4 GMCH_TXOUT0+<br />
GMCH_TXOUT0+ <br />
2OE#<br />
PI3LVD400ZFEX_TQFN56_11X5<br />
TXOUT0-<br />
2 3 GMCH_TXOUT0-<br />
GMCH_TXOUT0- <br />
H Z<br />
SG@<br />
UMAO@<br />
RP7<br />
0_0404_4P2R_5%<br />
JLVDS1<br />
+LCDVDD<br />
1<br />
1<br />
+INVPWR_B+<br />
41<br />
+3VALW<br />
+3VS<br />
G1 2<br />
2<br />
42<br />
G2 3<br />
3<br />
W=60mils<br />
43<br />
+LCDVDD_L<br />
2<br />
@<br />
G3 4<br />
4<br />
1<br />
+LCDVDD<br />
R250<br />
44<br />
+LCDVDD<br />
R522<br />
0_0603_5%<br />
G4 5<br />
5<br />
300_0603_5%<br />
45<br />
G5 6<br />
6<br />
1<br />
46<br />
G6 7<br />
7<br />
+3VS<br />
R251<br />
C538<br />
INVT_PWM<br />
8<br />
8<br />
100K_0402_5%<br />
DISPOFF#<br />
9<br />
9<br />
4.7U_0805_10V4Z<br />
I2CC_SCL<br />
10<br />
10<br />
2<br />
I2CC_SDA<br />
11<br />
11<br />
D<br />
12<br />
12<br />
DAC_BRIG <br />
TXOUT0-<br />
13<br />
13<br />
Q11<br />
2<br />
2 1<br />
2<br />
AO3413_SOT23-3<br />
TXOUT0+<br />
14<br />
14<br />
G<br />
R252<br />
1K_0402_5%<br />
Q13<br />
15<br />
15<br />
S<br />
1<br />
TXOUT1-<br />
+LCDVDD<br />
16<br />
16<br />
2N7002_SOT23<br />
C539<br />
TXOUT1+<br />
17<br />
17<br />
D<br />
W=60mils<br />
18<br />
18<br />
Q23<br />
0.047U_0402_16V7K<br />
TXOUT2-<br />
GMCH_ENVDD<br />
19<br />
19<br />
UMA@<br />
2<br />
TXOUT2+<br />
GMCH_ENVDD<br />
2<br />
<br />
20<br />
20<br />
G<br />
1<br />
1<br />
21<br />
21<br />
1 R507 2<br />
S<br />
2N7002_SOT23<br />
C540<br />
C541<br />
TXCLK-<br />
22<br />
22<br />
100K_0402_5%<br />
TXCLK+<br />
23<br />
23<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
24<br />
24<br />
2<br />
2<br />
25<br />
25<br />
26<br />
26<br />
D<br />
27<br />
27<br />
R525 2<br />
@ 1<br />
0_0402_5%<br />
LOCAL_DIM <br />
VGA_ENVDD<br />
28<br />
28<br />
Q29<br />
VGA_ENVDD<br />
2<br />
29<br />
29<br />
G<br />
VGA@<br />
30<br />
30<br />
R524 2<br />
@ 1<br />
0_0402_5%<br />
COLOR_ENG_EN <br />
1 R508 2<br />
S<br />
31<br />
31<br />
100K_0402_5%<br />
2N7002_SOT23<br />
32<br />
32<br />
+3VS<br />
33<br />
33<br />
+LCDVDD<br />
34<br />
34<br />
+INVPWR_B+ B+<br />
35<br />
35<br />
36<br />
36<br />
+3VS<br />
L58<br />
37<br />
37<br />
2<br />
1<br />
R121<br />
USB20_CMOS_N5<br />
USB20_N5 <br />
W=40mils<br />
FBMA-L11-201209-221LMA30T_0805<br />
38<br />
38<br />
R256 2 1<br />
0_0402_5%<br />
D9<br />
@<br />
USB20_CMOS_P5<br />
39<br />
39<br />
R257 2 1<br />
0_0402_5%<br />
USB20_P5 <br />
CH751H-40PT_SOD323-2<br />
4.7K_0402_5%<br />
1<br />
1<br />
40<br />
40<br />
L59 2<br />
1<br />
@<br />
C546<br />
C547<br />
FBMA-L11-201209-221LMA30T_0805<br />
BKOFF#<br />
DISPOFF#<br />
IPEX_20143-040E-20F<br />
BKOFF#<br />
1 2<br />
1 1<br />
10U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
CONN@<br />
C544<br />
C545<br />
R172 1 2<br />
0_0402_5%<br />
2<br />
2<br />
680P_0402_50V7K<br />
68P_0402_50V8J<br />
R171 1 2<br />
10K_0402_5%<br />
D14<br />
@<br />
2 2<br />
6<br />
CH3 CH2<br />
3 USB20_CMOS_N5<br />
DAC_BRIG<br />
@<br />
+3VS<br />
+3VS<br />
5<br />
Vp<br />
Vn<br />
2<br />
1 2<br />
C542<br />
220P_0402_50V7K<br />
INVT_PWM 1 2<br />
C543<br />
220P_0402_50V7K<br />
USB20_CMOS_P54<br />
DISPOFF# 1 2<br />
+3VS<br />
C687<br />
SG@<br />
R253<br />
CH4 CH1<br />
1<br />
C548<br />
220P_0402_50V7K<br />
0.1U_0402_16V4Z<br />
SG@<br />
CM1293-04SO_SOT23-6<br />
1 2<br />
4.7K_0402_5%<br />
BUS_SEL<br />
U42<br />
D<br />
PE_GPIO2<br />
2<br />
A Y<br />
4<br />
2<br />
Q61<br />
G<br />
SG@<br />
NC7SZ14P5X_NL_SC70-5<br />
S<br />
SG@<br />
2N7002_SOT23<br />
SEL1 L B1 DIS<br />
+3VS<br />
H B2 UMA<br />
BUS_SEL#<br />
BUS_SEL# <br />
SEL2 L B1 DIS<br />
R926<br />
0_0603_5%<br />
H B2 UMA<br />
SG@<br />
U68<br />
VCC 4 +3VS_SWITCH<br />
I2CC_SCL<br />
0_0402_5% 2<br />
UMAO@1<br />
R269 GMCH_LCD_CLK<br />
GMCH_LCD_CLK <br />
I2CC_SDA<br />
0_0402_5% R271 GMCH_LCD_DATA<br />
GMCH_LCD_DATA <br />
UMAO@ 1<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
1<br />
2<br />
1<br />
3<br />
1<br />
3<br />
1<br />
2<br />
1<br />
3<br />
4<br />
G<br />
1 3<br />
1<br />
2<br />
S<br />
D<br />
5<br />
P<br />
G<br />
3<br />
NC 1<br />
3<br />
1<br />
2<br />
1<br />
2<br />
1<br />
3<br />
LCD/LED PANEL Conn.<br />
www.mycomp.su<br />
2<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 23 of<br />
55<br />
3<br />
2<br />
1<br />
1<br />
1<br />
2<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
4.7U_0603_6.3V6K<br />
D<br />
C<br />
B<br />
A
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
C<br />
B<br />
+5VS<br />
VGA_HDMI_SCLK<br />
<br />
VGA_HDMI_SDATA<br />
+3VSG<br />
R274<br />
@<br />
+HDMI_5V_OUT<br />
W=40mils<br />
D3<br />
VGA@<br />
F1<br />
VGA@<br />
2 1+HDMI_5V_OUT_1<br />
1 2<br />
1<br />
RB491D_SC59-3<br />
1.1A_6VDC_FUSE<br />
C549<br />
0.1U_0402_16V4Z<br />
VGA@<br />
2<br />
1 2<br />
10K_0402_5%<br />
1 2<br />
10K_0402_5%<br />
R275<br />
@<br />
+3VSG<br />
Place closed to JHDMI1<br />
+HDMI_5V_OUT<br />
VGA_HDMI_DET<br />
Place closed to JHDMI1<br />
3<br />
S<br />
G<br />
2<br />
3<br />
S<br />
G<br />
2<br />
1<br />
D<br />
Q17<br />
VGA@<br />
BSH111 1N_SOT23-3<br />
Check 5V tolerant<br />
+HDMI_5V_OUT<br />
1<br />
2<br />
2<br />
@ 1<br />
R278<br />
0_0402_5%<br />
2<br />
@ 1<br />
R279<br />
0_0402_5%<br />
1<br />
D<br />
Q16<br />
VGA@<br />
BSH111 1N_SOT23-3<br />
R276<br />
2K_0402_5%<br />
VGA@<br />
1<br />
2<br />
2<br />
G<br />
R298<br />
VGA@<br />
100K_0402_5%<br />
R277<br />
2K_0402_5%<br />
VGA@<br />
1<br />
3<br />
D<br />
S<br />
HDMI_SCLK<br />
HDMI_SDATA<br />
2N7002_SOT23<br />
Q19<br />
VGA@<br />
+3VS<br />
1 2<br />
1<br />
2<br />
HDMI_R_CK-<br />
HDMI_C_CLK-<br />
HDMI_C_TX0-<br />
HDMI_C_TX1-<br />
R280<br />
0_0402_5%<br />
VGA@<br />
1<br />
L60<br />
1<br />
2<br />
2<br />
WCM2012F2SF-900T04_0805<br />
@<br />
4<br />
4<br />
3<br />
3<br />
HDMI_C_CLK+<br />
R288 1 2<br />
0_0402_5%<br />
VGA@<br />
1<br />
L61<br />
1<br />
2<br />
2<br />
WCM2012F2SF-900T04_0805<br />
@<br />
4<br />
4<br />
3<br />
3<br />
HDMI_C_TX0+<br />
R296 1 2<br />
0_0402_5%<br />
VGA@<br />
1<br />
L62<br />
1<br />
2<br />
2<br />
WCM2012F2SF-900T04_0805<br />
@<br />
4<br />
4<br />
3<br />
3<br />
HDMI_C_TX1+<br />
R299 1 2<br />
0_0402_5%<br />
VGA@<br />
+HDMI_5V_OUT<br />
C<br />
2 1 VGA@ 2 HDMI_HPD<br />
B<br />
R281<br />
150K_0402_5%<br />
E VGA@<br />
VGA_HDMI_DET 2<br />
VGA@ 1<br />
Q18<br />
R282<br />
0_0402_5%<br />
MMBT3904_NL_SOT23-3<br />
R283<br />
@<br />
365K_0402_1%<br />
R284<br />
VGA@<br />
10K_0402_5%<br />
3 1<br />
R285 1 VGA@ 2<br />
R291 1 VGA@ 2<br />
www.mycomp.su<br />
1<br />
2<br />
R297 1 VGA@ 2<br />
1<br />
2<br />
0_0402_5%<br />
0_0402_5%<br />
0_0402_5%<br />
HDMI_R_CK+<br />
HDMI_R_D0+<br />
C554<br />
VGA@ 2<br />
C555<br />
VGA@ 2<br />
C556<br />
VGA@ 2<br />
C557<br />
VGA@ 2<br />
1<br />
0.1U_0402_16V7K HDMI_C_TX0-<br />
R292 1<br />
1<br />
0.1U_0402_16V7K HDMI_C_TX0+<br />
R293 1<br />
1<br />
0.1U_0402_16V7K HDMI_C_CLK-<br />
R294 1<br />
1<br />
0.1U_0402_16V7K HDMI_C_CLK+<br />
R295 1<br />
2VGA@<br />
499_0402_1%<br />
2VGA@<br />
499_0402_1%<br />
2VGA@<br />
499_0402_1%<br />
2VGA@<br />
499_0402_1%<br />
C552<br />
VGA@ 2 1<br />
0.1U_0402_16V7K HDMI_C_TX1-<br />
R289 1 2VGA@<br />
499_0402_1%<br />
C553<br />
VGA@ 2 1<br />
0.1U_0402_16V7K HDMI_C_TX1+<br />
R290 1 2VGA@<br />
499_0402_1%<br />
C550<br />
VGA@ 2 1<br />
0.1U_0402_16V7K HDMI_C_TX2-<br />
R286 1 2VGA@<br />
499_0402_1%<br />
C551<br />
VGA@ 2 1<br />
0.1U_0402_16V7K HDMI_C_TX2+<br />
R287 1 2VGA@<br />
499_0402_1%<br />
HDMI_R_D0-<br />
HDMI_R_D1-<br />
HDMI_R_D1+<br />
HDMI_HPD<br />
HDMI_SDATA<br />
HDMI_SCLK<br />
HDMI_R_CK-<br />
HDMI_R_CK+<br />
HDMI_R_D0-<br />
HDMI_R_D1+<br />
HDMI_R_D2-<br />
HDMI_R_D0+<br />
HDMI_R_D1-<br />
HDMI_R_D2+<br />
VGA_HDMI_TXD2-<br />
VGA_HDMI_TXD2+<br />
VGA_HDMI_TXD1-<br />
VGA_HDMI_TXD1+<br />
VGA_HDMI_TXD0-<br />
VGA_HDMI_TXD0+<br />
VGA_HDMI_TXC-<br />
VGA_HDMI_TXC+<br />
JHDMI1<br />
19<br />
HP_DET<br />
18<br />
+5V<br />
17<br />
DDC/CEC_GND<br />
16<br />
SDA<br />
15<br />
SCL<br />
14<br />
Reserved<br />
13<br />
CEC<br />
12<br />
CK- GND 20<br />
11<br />
CK_shield GND 21<br />
10<br />
CK+ GND 22<br />
9<br />
D0- GND 23<br />
8<br />
D0_shield<br />
7<br />
D0+<br />
6<br />
D1-<br />
5<br />
D1_shield<br />
4<br />
D1+<br />
3<br />
D2-<br />
2<br />
D2_shield<br />
1<br />
D2+<br />
SUYIN_100042MR019S153ZL<br />
CONN@<br />
<br />
D<br />
C<br />
B<br />
HDMI_C_TX2-<br />
R300<br />
1 VGA@ 2<br />
0_0402_5%<br />
HDMI_R_D2-<br />
1<br />
L63<br />
1<br />
2<br />
2<br />
WCM2012F2SF-900T04_0805<br />
@<br />
4<br />
4<br />
3<br />
3<br />
HDMI_C_TX2+<br />
R301 1 2<br />
0_0402_5%<br />
VGA@<br />
HDMI_R_D2+<br />
A<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 24 of<br />
55<br />
3<br />
2<br />
1
A<br />
B<br />
C<br />
D<br />
E<br />
CRT Connector<br />
+5VS<br />
W=40mils<br />
+R_CRT_VCC<br />
+CRT_VCC<br />
3<br />
2<br />
W=40mils<br />
D4<br />
PJDLC05C_SOT23-3<br />
@<br />
1<br />
3<br />
1<br />
2<br />
D7<br />
2 1<br />
F2<br />
1<br />
2<br />
D5<br />
PJDLC05C_SOT23-3<br />
@<br />
RB491D_SC59-3<br />
1.1A_6VDC_FUSE<br />
1<br />
C558<br />
0.1U_0402_16V4Z<br />
2<br />
1 1<br />
CRT_R<br />
CRT_G<br />
CRT_B<br />
CRT_R_1<br />
CRT_G_1<br />
CRT_B_1<br />
CRT_HSYNC<br />
2<br />
CRT_HSYNC_1<br />
C566<br />
DSUB_15<br />
A Y<br />
4<br />
C567<br />
10P_0402_50V8J<br />
10P_0402_50V8J<br />
C568 2<br />
2 2<br />
68P_0402_50V8J 1<br />
2 2<br />
74AHCT1G125GW_SOT353-5<br />
C570<br />
+CRT_VCC<br />
+CRT_VCC<br />
68P_0402_50V8J<br />
2<br />
C571 1 2<br />
0.1U_0402_16V4Z<br />
CRT_VSYNC<br />
CRT_VSYNC_1<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
1<br />
1<br />
1<br />
1<br />
U69<br />
C1155<br />
C1156<br />
C1157<br />
C1158 4<br />
CRT_R<br />
SG@<br />
SG@<br />
SG@<br />
A0<br />
1<br />
SG@<br />
VDD<br />
16<br />
CRT_G<br />
+CRT_VCC<br />
VDD A1<br />
2<br />
23<br />
CRT_B<br />
For UMA Only<br />
2<br />
2<br />
2<br />
A2<br />
5<br />
2<br />
VDD<br />
29<br />
CRT_HSYNC<br />
GMCH_CRT_R<br />
R266<br />
CRT_R<br />
CRT_VSYNC<br />
GMCH_CRT_R<br />
2<br />
UMAO@1<br />
0_0402_5%<br />
0.1U_0402_16V4Z<br />
A3<br />
6<br />
0.1U_0402_16V4Z<br />
VDD<br />
32<br />
+3VS<br />
VDD A4<br />
7<br />
3 3<br />
GMCH_CRT_G<br />
R83<br />
CRT_G<br />
VGA_CRT_R<br />
GMCH_CRT_G<br />
2<br />
UMAO@1<br />
0_0402_5%<br />
27<br />
BUS_SEL# <br />
VGA_CRT_G<br />
0B1 SEL1<br />
8<br />
25<br />
GMCH_CRT_B<br />
R268<br />
0_0402_5% CRT_B<br />
VGA_CRT_B<br />
1B1<br />
R318<br />
GMCH_CRT_B<br />
2 UMAO@1<br />
22<br />
R317<br />
VGA_CRT_HSYNC<br />
2B1<br />
20<br />
CRT_CLK<br />
4.7K_0402_5%<br />
GMCH_CRT_HSYNC<br />
CRT_HSYNC<br />
VGA_CRT_VSYNC<br />
3B1 A5<br />
9<br />
4.7K_0402_5%<br />
R273<br />
CRT_DATA<br />
GMCH_CRT_HSYNC<br />
2<br />
UMAO@1<br />
0_0402_5%<br />
18<br />
VGA_CRT_CLK<br />
4B1 A6<br />
10<br />
12<br />
GMCH_CRT_VSYNC<br />
R267<br />
CRT_VSYNC<br />
VGA_CRT_DATA<br />
5B1<br />
BUS_SEL#<br />
GMCH_CRT_VSYNC<br />
2<br />
UMAO@1<br />
0_0402_5%<br />
14<br />
6B1 SEL2<br />
30<br />
GMCH_CRT_DATA<br />
R410<br />
CRT_DATA<br />
DSUB_12<br />
CRT_DATA<br />
GMCH_CRT_DATA<br />
2<br />
UMAO@1<br />
0_0402_5%<br />
1 3<br />
GMCH_CRT_R<br />
26<br />
GMCH_CRT_CLK<br />
GMCH_CRT_CLK<br />
R406 2<br />
UMAO@1<br />
0_0402_5% CRT_CLK<br />
GMCH_CRT_G<br />
0B2<br />
24<br />
Q53<br />
GMCH_CRT_B<br />
1B2<br />
21<br />
BSH111 1N_SOT23-3<br />
GMCH_CRT_HSYNC<br />
2B2 GND 3<br />
19<br />
GMCH_CRT_VSYNC<br />
3B2 GND 11<br />
17<br />
DSUB_15<br />
CRT_CLK<br />
GMCH_CRT_CLK<br />
4B2 GND<br />
13<br />
For VGA Only<br />
1 3<br />
GMCH_CRT_DATA<br />
5B2 GND 31<br />
15<br />
VGA_CRT_R<br />
R306<br />
DISO@ 0_0402_5% CRT_R<br />
6B2 GPAD 33<br />
Q65<br />
BSH111 1N_SOT23-3<br />
VGA_CRT_R<br />
2 1<br />
PI3V712-AZLEX_TQFN32_6X3~D<br />
VGA_CRT_G<br />
VGA_CRT_G<br />
R302 2<br />
DISO@ 1<br />
0_0402_5% CRT_G<br />
SG@<br />
2<br />
@ 1<br />
R321<br />
0_0402_5%<br />
VGA_CRT_B<br />
VGA_CRT_B<br />
R304 2<br />
DISO@ 1<br />
0_0402_5% CRT_B<br />
VGA_CRT_HSYNC<br />
VGA_CRT_VSYNC<br />
2<br />
R407<br />
2<br />
R408<br />
2<br />
R409<br />
VGA_CRT_HSYNC<br />
VGA_CRT_VSYNC<br />
1<br />
0_0402_5%<br />
1<br />
0_0402_5%<br />
1<br />
0_0402_5%<br />
C569 1 2<br />
0.1U_0402_16V4Z<br />
R303 2<br />
DISO@ 1<br />
0_0402_5%<br />
R309 2<br />
DISO@ 1<br />
0_0402_5%<br />
+CRT_VCC<br />
5<br />
P<br />
G<br />
3<br />
1<br />
R305<br />
2<br />
140_0402_1%<br />
1<br />
CRT_HSYNC<br />
CRT_VSYNC<br />
OE#<br />
R307<br />
U18<br />
1<br />
2<br />
150_0402_1%<br />
1<br />
2<br />
1<br />
1<br />
R308<br />
C559<br />
C560<br />
150_0402_1%<br />
2<br />
2<br />
10P_0402_50V8J<br />
2<br />
5<br />
P<br />
A<br />
G<br />
3<br />
R312 2<br />
1<br />
OE#<br />
U19<br />
Y<br />
4<br />
SEL1<br />
<br />
SEL2<br />
L<br />
10P_0402_50V8J<br />
1<br />
10K_0402_5%<br />
74AHCT1G125GW_SOT353-5<br />
B1<br />
1<br />
C561<br />
DIS<br />
H B2 UMA<br />
L B1 DIS<br />
2<br />
10P_0402_50V8J<br />
L64 1 2<br />
FCM2012CF-800T06_2P<br />
L65 1 2<br />
FCM2012CF-800T06_2P<br />
L66 1 2<br />
FCM2012CF-800T06_2P<br />
+3VS<br />
VGA_CRT_DATA<br />
R411<br />
CRT_DATA<br />
4 VGA_CRT_DATA<br />
2<br />
DISO@ 1<br />
0_0402_5%<br />
Check 5V tolerant for DISO state<br />
4<br />
H B2 UMA<br />
VGA_CRT_CLK<br />
VGA_CRT_CLK<br />
R412 2<br />
DISO@ 1<br />
0_0402_5% CRT_CLK<br />
1<br />
C562<br />
2<br />
10P_0402_50V8J<br />
1<br />
C563<br />
L67 1 2<br />
FCM2012CF-800T06_2P<br />
L68 1 2<br />
FCM2012CF-800T06_2P<br />
1<br />
C564<br />
CRT_R_2<br />
CRT_G_2<br />
CRT_B_2<br />
2<br />
2<br />
10P_0402_50V8J<br />
10P_0402_50V8J<br />
CRT_HSYNC_2<br />
CRT_VSYNC_2<br />
1 1<br />
www.mycomp.su<br />
1<br />
C565<br />
100P_0402_50V8J<br />
2<br />
1<br />
2<br />
1<br />
1<br />
2<br />
DSUB_12<br />
Close to Conn side<br />
D<br />
2<br />
G<br />
6<br />
11<br />
1<br />
7<br />
12<br />
2<br />
8<br />
13<br />
3<br />
9<br />
14<br />
4<br />
10<br />
15<br />
5<br />
2<br />
@ 1<br />
R323<br />
0_0402_5%<br />
S<br />
JCRT1<br />
G<br />
G<br />
C-H_13-12201513CP<br />
CONN@<br />
1 2<br />
D<br />
2<br />
G<br />
S<br />
<br />
16<br />
17<br />
R311<br />
100K_0402_5%<br />
CRT_DET# <br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 25 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
C572 1 2<br />
150P_0402_50V8J<br />
U20A<br />
Part 1 of 5<br />
R325<br />
33_0402_5%<br />
SB800<br />
A_RST#<br />
T4<br />
PAD<br />
P1<br />
PCIE_RST#<br />
PCICLK0<br />
W2<br />
A_RST#<br />
2 1<br />
L1<br />
A_RST#<br />
PCICLK1/GPO36<br />
W1<br />
PCI_CLK1 <br />
PCI_CLK2 <br />
C579<br />
0.1U_0402_16V7K SB_RX0P_C<br />
PCICLK2/GPO37<br />
W3<br />
SB_RX0P<br />
1 2<br />
AD26<br />
SB_RX0N_C<br />
A_TX0P<br />
PCICLK3/GPO38<br />
W4<br />
PCI_CLK3 <br />
C573<br />
SB_RX0N<br />
1 2<br />
0.1U_0402_16V7K<br />
AD27<br />
PCI_CLK4 <br />
C574<br />
0.1U_0402_16V7K SB_RX1P_C<br />
A_TX0N<br />
PCICLK4/14M_OSC/GPO39<br />
Y1<br />
SB_RX1P<br />
1 2<br />
AC28<br />
C575<br />
SB_RX1N_C<br />
A_TX1P<br />
SB_RX1N<br />
1 2<br />
0.1U_0402_16V7K<br />
AC29<br />
C576<br />
0.1U_0402_16V7K SB_RX2P_C<br />
A_TX1N<br />
PCIRST#<br />
V2<br />
SB_RX2P<br />
1 2<br />
AB29<br />
C580<br />
SB_RX2N_C<br />
A_TX2P<br />
SB_RX2N<br />
1 2<br />
0.1U_0402_16V7K<br />
AB28<br />
C577<br />
0.1U_0402_16V7K SB_RX3P_C<br />
A_TX2N<br />
SB_RX3P<br />
1 2<br />
AB26<br />
C578<br />
0.1U_0402_16V7K SB_RX3N_C<br />
A_TX3P<br />
AD0/GPIO0<br />
AA1<br />
SB_RX3N<br />
1 2<br />
AB27<br />
A_TX3N<br />
AD1/GPIO1<br />
AA4<br />
AD2/GPIO2<br />
AA3<br />
SB_TX0P<br />
AE24<br />
A_RX0P<br />
AD3/GPIO3<br />
AB1<br />
SB_TX0N<br />
AE23<br />
A_RX0N<br />
AD4/GPIO4<br />
AA5<br />
SB_TX1P<br />
AD25<br />
A_RX1P<br />
AD5/GPIO5<br />
AB2<br />
SG@<br />
SB_TX1N<br />
AD24<br />
A_RX1N<br />
AD6/GPIO6<br />
AB6<br />
1 2<br />
INT_VGA_EN# <br />
+3VALW<br />
SB_TX2P<br />
AC24<br />
A_RX2P<br />
AD7/GPIO7<br />
AB5<br />
R320<br />
0_0402_5%<br />
SB_TX2N<br />
AC25<br />
C581<br />
A_RX2N<br />
AD8/GPIO8<br />
AA6<br />
SB_TX3P<br />
AB25<br />
A_RX3P<br />
AD9/GPIO9<br />
AC2<br />
1 2<br />
SB_TX3N<br />
AB24<br />
A_RX3N<br />
AD10/GPIO10<br />
AC3<br />
AMD suggest add GPIO control gate<br />
0.1U_0402_16V4Z<br />
AD11/GPIO11<br />
AC4<br />
R326 2 1<br />
590_0402_1% AD29<br />
PCIE_CALRP<br />
AD12/GPIO12<br />
AC1<br />
SB_GPIO_A_RST#<br />
1 2<br />
+1.1VS_PCIE<br />
R327 2 1<br />
2K_0402_1% AD28<br />
PCIE_CALRN<br />
AD13/GPIO13<br />
AD1<br />
R427<br />
@<br />
0_0402_5%<br />
U21<br />
AD14/GPIO14<br />
AD2<br />
1 2<br />
2<br />
AA28<br />
PLT_RST#<br />
AD15/GPIO15<br />
AC6<br />
R425<br />
0_0402_5%<br />
B<br />
GPP_TX0P<br />
PLT_RST# <br />
A_RST#<br />
Y 4<br />
AA29<br />
GPP_TX0N<br />
AD16/GPIO16<br />
AE2<br />
1<br />
A<br />
Y29<br />
AD17/GPIO17<br />
AE1<br />
NC7SZ08P5X_NL_SC70-5<br />
GPP_TX1P<br />
Y28<br />
GPP_TX1N<br />
AD18/GPIO18<br />
AF8<br />
Y26<br />
R328<br />
GPP_TX2P<br />
AD19/GPIO19<br />
AE3<br />
Y27<br />
8.2K_0402_5%<br />
+3VS<br />
GPP_TX2N<br />
AD20/GPIO20<br />
AF1<br />
W28<br />
@<br />
+1.5VS<br />
GPP_TX3P<br />
AD21/GPIO21<br />
AG1<br />
W29<br />
GPP_TX3N<br />
AD22/GPIO22<br />
AF2<br />
PCI_AD23<br />
AD23/GPIO23<br />
AE9<br />
PCI_AD23 <br />
AA22<br />
PCI_AD24<br />
PCI_AD24 PCI_AD24 : VDDR Voltage SW<br />
R329<br />
GPP_RX0P<br />
AD24/GPIO24<br />
AD9<br />
Y21<br />
PCI_AD25<br />
GPP_RX0N<br />
AD25/GPIO25<br />
AC11<br />
PCI_AD25 <br />
4.7K_0402_5%<br />
AA25<br />
PCI_AD26<br />
GPP_RX1P<br />
AD26/GPIO26<br />
AF6<br />
PCI_AD26 <br />
AA24<br />
PCI_AD27<br />
GPP_RX1N<br />
AD27/GPIO27<br />
AF4<br />
PCI_AD27 <br />
W23<br />
PCI_AD28<br />
PCI_AD28 <br />
H_PWRGD<br />
GPP_RX2P<br />
AD28/GPIO28<br />
AF3<br />
3 1<br />
H_PWRGD_L <br />
V24<br />
PCI_AD29<br />
GPP_RX2N<br />
AD29/GPIO29<br />
AH2<br />
PCI_AD29 <br />
W24<br />
AD30/GPIO30<br />
AG2<br />
Q21<br />
GPP_RX3P<br />
W25<br />
AD31/GPIO31<br />
AH3<br />
FDV301N_NL_SOT23-3<br />
GPP_RX3N<br />
CBE0#<br />
AA8<br />
CBE1#<br />
AD5<br />
CBE2#<br />
AD8<br />
level shift to ISL6265<br />
CBE3#<br />
AA10<br />
FRAME#<br />
AE8<br />
DEVSEL#<br />
AB9<br />
ISL6265 PWROK input, TTL level: 0.8V~2.0V<br />
CLK_SBSRC_BCLK<br />
M23<br />
PCIE_RCLKP/NB_LNK_CLKP<br />
IRDY#<br />
AJ3<br />
CLK_SBSRC_BCLK#<br />
P23<br />
PCIE_RCLKN/NB_LNK_CLKN<br />
TRDY#<br />
AE7<br />
When this pin is high, the SVI interface is<br />
PAR<br />
AC5<br />
active and I2C protocol is running. While this<br />
NB_DISP_CLKP<br />
U29<br />
NB_DISP_CLKP<br />
STOP#<br />
AF5<br />
NB_DISP_CLKN<br />
U28<br />
NB_DISP_CLKN<br />
PERR#<br />
AE6<br />
pin is low, the SVC, SVD, and VFIXEN input<br />
SERR#<br />
AE4<br />
states determine the pre-PWROK metal VID or<br />
NB_HT_CLKP<br />
T26<br />
REQ0#<br />
AE11<br />
SG@<br />
NB_HT_CLKP<br />
NB_HT_CLKN<br />
T27<br />
NB_HT_CLKN<br />
REQ1#/GPIO40<br />
AH5<br />
1 2<br />
PX_EN# <br />
VFIX mode voltage. This pin must be low prior<br />
REQ2#/CLK_REQ8#/GPIO41<br />
AH4<br />
R322<br />
0_0402_5%<br />
Power Xpress Support<br />
CPU_HT_CLKP<br />
V21<br />
to the ISL6265 PGOOD output going high<br />
CPU_HT_CLKP<br />
REQ3#/CLK_REQ5#/GPIO42<br />
AC12<br />
CPU_HT_CLKN<br />
T21<br />
CPU_HT_CLKN<br />
GNT0#<br />
AD12<br />
PE_GPIO0 VGA RESET, H: Enable<br />
GNT1#/GPO44<br />
AJ5<br />
SG@<br />
VGA_CLKP<br />
V23<br />
SLT_GFX_CLKP<br />
GNT2#/GPO45<br />
AH6<br />
1 2<br />
PE_GPIO1 <br />
PE_GPIO1 VGA PWR Enable, H: Enable<br />
VGA_CLKN<br />
T23<br />
GNT3#/CLK_REQ7#/GPIO46<br />
AB12<br />
R259<br />
0_0402_5%<br />
SLT_GFX_CLKN<br />
CLKRUN#<br />
AB11<br />
PE_GPIO2 MODE Switch, H: VGA , L: NB<br />
L29<br />
GPP_CLK0P<br />
LOCK#<br />
AD7<br />
L28<br />
GPP_CLK0N<br />
INTE#/GPIO32<br />
AJ6<br />
GPP_CLK1P<br />
N29<br />
GPP_CLK1P<br />
INTF#/GPIO33<br />
AG6<br />
LAN GPP_CLK1N<br />
N28<br />
GPP_CLK1N<br />
INTG#/GPIO34<br />
AG4<br />
SG@<br />
INTH#/GPIO35<br />
AJ4<br />
1 2<br />
PE_GPIO0 <br />
M29<br />
R258<br />
0_0402_5%<br />
GPP_CLK2P<br />
M28<br />
GPP_CLK2N<br />
1 1<br />
2 2<br />
GPP_CLK3P<br />
T25<br />
GPP_CLK3P<br />
MINI1<br />
LPCCLK0<br />
LPC_CLK0_EC<br />
GPP_CLK3N<br />
V25<br />
GPP_CLK3N<br />
LPCCLK0<br />
H24<br />
1 2<br />
LPC_CLK0_EC <br />
LPCCLK1<br />
H25<br />
R330<br />
22_0402_5%<br />
LPC_CLK1 <br />
L24<br />
GPP_CLK4P<br />
LAD0<br />
J27<br />
LPC_AD0 <br />
L23<br />
GPP_CLK4N<br />
LAD1<br />
J26<br />
LPC_AD1 <br />
LAD2<br />
H29<br />
LPC_AD2 <br />
P25<br />
GPP_CLK5P<br />
LAD3<br />
H28<br />
LPC_AD3 <br />
M25<br />
GPP_CLK5N<br />
LFRAME#<br />
G28<br />
LPC_FRAME# <br />
LDRQ0#<br />
J25<br />
P29<br />
25M_CLK_X1<br />
GPP_CLK6P<br />
LDRQ1#/CLK_REQ6#/GPIO49<br />
AA18<br />
1 2<br />
P28<br />
GPP_CLK6N<br />
SERIRQ/GPIO48<br />
AB19<br />
SERIRQ <br />
C689<br />
3 3<br />
27P_0402_50V8J<br />
N26<br />
R426<br />
GPP_CLK7P<br />
N27<br />
Y6<br />
GPP_CLK7N<br />
1M_0603_5%<br />
ALLOW_LDTSTP/DMA_ACTIVE#<br />
G21<br />
ALLOW_LDTSTOP <br />
25MHZ_20PF_7A25000012<br />
T29<br />
GPP_CLK8P<br />
PROCHOT#<br />
H21<br />
H_PROCHOT_R# <br />
T28<br />
H_PWRGD <br />
25M_CLK_X2<br />
GPP_CLK8N<br />
LDT_PG<br />
K19<br />
1 2<br />
LDT_STP#<br />
G22<br />
LDT_STOP# <br />
C688<br />
LDT_RST#<br />
J24<br />
LDT_RST# <br />
27P_0402_50V8J<br />
L25<br />
14M_25M_48M_OSC<br />
+RTCBATT<br />
AMD suggest add Crystal for Internal CLK GEN<br />
32K_X1<br />
C1 SB_32KHI<br />
25M_CLK_X1 L26<br />
25M_X1<br />
32K_X2<br />
C2 SB_32KHO<br />
RTCCLK<br />
D2<br />
PAD<br />
T21<br />
R331<br />
25M_CLK_X2<br />
INTRUDER_ALERT#<br />
B2<br />
1K_0402_5%<br />
L27<br />
25M_X2<br />
VDDBT_RTC_G<br />
B1<br />
+RTCVCC<br />
@R332<br />
20M_0402_5%<br />
1 2<br />
SB820M_FCBGA605<br />
D8<br />
2 2<br />
1<br />
for Clear CMOS<br />
0_0603_5%<br />
R335<br />
OSC NC 2 2<br />
BAS40-04_SOT23-3<br />
Close to SB<br />
20M_0603_5%<br />
4<br />
OSC NC 3<br />
+CHGRTC<br />
1 2<br />
3<br />
C582<br />
R333<br />
510_0402_5%<br />
SB820 A12(SA00003IW10)<br />
C584 1 1<br />
C585 W=20mils<br />
1<br />
1 2<br />
SB_32KHI<br />
1<br />
R334<br />
C583<br />
2<br />
18P_0402_50V8J<br />
Y3<br />
@<br />
4 4<br />
C586<br />
32.768KHZ_12.5PF_Q13MC14610002<br />
1 2<br />
SB_32KHO<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
<strong>Compal</strong> Electronics, Inc.<br />
18P_0402_50V8J<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
S<br />
G<br />
2<br />
D<br />
A<br />
1<br />
2<br />
1<br />
2<br />
1 2<br />
B<br />
PCI EXPRESS INTERFACES<br />
CLOCK GENERATOR<br />
PCI CLKS<br />
CPU<br />
RTC<br />
PCI INTERFACE<br />
LPC<br />
www.mycomp.su<br />
0.1U_0402_16V4Z<br />
1U_0402_6.3V4Z<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 26 of<br />
55<br />
C<br />
D<br />
E<br />
1 2<br />
1<br />
2<br />
0.1U_0402_16V4Z<br />
5<br />
P<br />
G<br />
3<br />
1<br />
2
A<br />
B<br />
C<br />
D<br />
E<br />
+3VALW<br />
+3VALW<br />
@<br />
@<br />
R336<br />
R413<br />
1 2<br />
C587 1 2<br />
100P_0402_25V8K<br />
100K_0402_5%<br />
100K_0402_5%<br />
R337<br />
100_0402_5%<br />
SG@<br />
U20D<br />
EC_SWI#<br />
J2<br />
CRT_DET<br />
VGA_HDMI_DET#<br />
PCI_PME#/GEVENT4#<br />
USBCLK/14M_25M_48M_OSC<br />
A10<br />
CLK_48M_USB <br />
K1<br />
CRT_DET<br />
RI#/GEVENT22#<br />
USB_RCOMP<br />
D<br />
D<br />
D3<br />
SPI_CS3#/GBE_STAT1/GEVENT21#<br />
USB_RCOMP<br />
G19<br />
PM_SLP_S3#<br />
F1<br />
11.8K_0402_1% 1 R338<br />
2<br />
SLP_S3#<br />
CRT_DET#<br />
2<br />
VGA_HDMI_DET 2<br />
PM_SLP_S5#<br />
H1<br />
G<br />
Q22<br />
G<br />
Q64<br />
SLP_S5#<br />
PBTN_OUT#<br />
F2<br />
PWR_BTN#<br />
S<br />
S<br />
SG@<br />
1 SB_PWRGD<br />
H5<br />
2N7002_SOT23<br />
2N7002_SOT23<br />
SUS_STAT#<br />
PWR_GOOD<br />
SB800<br />
1<br />
SUS_STAT#<br />
G6<br />
SUS_STAT#<br />
USB_FSD1P/GPIO186<br />
J10<br />
HPD for PX<br />
T24<br />
PAD B3<br />
TEST0<br />
Part 4 of 5<br />
USB_FSD1N<br />
H11<br />
0 -> DGPU<br />
T22<br />
PAD C4<br />
TEST1/TMS<br />
OHCI4<br />
USB20_P14<br />
1 -> IGPU<br />
T23<br />
PAD F6<br />
TEST2<br />
USB_FSD0P/GPIO185<br />
H9<br />
USB20_P14 <br />
USB20_N14<br />
EC_GA20<br />
AD21<br />
GA20IN/GEVENT0#<br />
USB_FSD0N<br />
J8<br />
USB20_N14 BT<br />
EC_KBRST#<br />
AE21<br />
KBRST#/GEVENT1#<br />
EC_SCI#<br />
K2<br />
LPC_PME#/GEVENT3#<br />
USB_HSD13P<br />
B12<br />
EC_SMI#<br />
J29<br />
LPC_SMI#/GEVENT23#<br />
USB_HSD13N<br />
A12<br />
H2<br />
GEVENT5#<br />
J1<br />
SYS_RESET#/GEVENT19#<br />
USB_HSD12P<br />
F11<br />
SB_PCIE_WAKE#<br />
H6<br />
WAKE#/GEVENT8#<br />
USB_HSD12N<br />
E11<br />
EHCI13 / OHCI3<br />
F3<br />
H_THERMTRIP#<br />
IR_RX1/GEVENT20#<br />
H_THERMTRIP#<br />
J6<br />
NB_PWRGD<br />
THRMTRIP#/SMBALERT#/GEVENT2#<br />
USB_HSD11P<br />
E14<br />
NB_PWRGD<br />
AC19<br />
NB_PWRGD<br />
USB_HSD11N<br />
E12<br />
1 2<br />
1<br />
3<br />
EC_RSMRST#<br />
EC_RSMRST#<br />
G1<br />
RSMRST#<br />
USB_HSD10P<br />
J12<br />
8L_6L_UMA<br />
USB_HSD10N<br />
J14<br />
AD19<br />
R516<br />
INT@<br />
0_0402_5%<br />
CLK_REQ4#/SATA_IS0#/GPIO64<br />
USB20_P9<br />
MINI1_CLKREQ#<br />
1 2<br />
AA16<br />
+3VS<br />
SB_GPIO_A_RST#<br />
CLK_REQ3#/SATA_IS1#/GPIO63<br />
USB_HSD9P<br />
A13<br />
USB20_P9 <br />
SB_GPIO_A_RST#<br />
AB21<br />
USB20_N9<br />
SKU_ID<br />
SMARTVOLT1/SATA_IS2#/GPIO50<br />
USB_HSD9N<br />
B13<br />
USB20_N9 WWAN<br />
AC18<br />
MUXLESS_SEL<br />
CLK_REQ0#/SATA_IS3#/GPIO60<br />
AF20<br />
USB20_P8<br />
USB20_P8 <br />
R340<br />
SKU_ID SKU ID: 1-> VGA *<br />
PX_FN<br />
SATA_IS4#/FANOUT3/GPIO55<br />
USB_HSD8P<br />
D13<br />
1 VGA@ 2<br />
2.2K_0402_5%<br />
AE19<br />
USB20_N8<br />
0-> UMA<br />
SATA_IS5#/FANIN3/GPIO59<br />
USB_HSD8N<br />
C13<br />
USB20_N8 Mini1-WLAN<br />
SB_SPKR<br />
AF19<br />
EHCI2 / OHCI2<br />
R341<br />
100K_0402_5%<br />
SB_SMCLK0<br />
SB_SMCLK0<br />
SPKR/GPIO66<br />
1 2<br />
AD22<br />
USB20_P7<br />
USB20_P7 <br />
SB_SMDAT0<br />
SB_SMDAT0<br />
SCL0/GPIO43<br />
USB_HSD7P<br />
G12<br />
AE22<br />
USB20_N7<br />
USB20_N7 <br />
SB_SMCLK1<br />
SDA0/GPIO47<br />
USB_HSD7N<br />
Pop for PX verify<br />
G14<br />
For China WWAN Port7 and Port9 is disable for<br />
F5<br />
2009 AMD platform<br />
R416<br />
PX_FN PX Function: 1-> PX Enable<br />
Cinfigure to output or<br />
SB_SMDAT1<br />
SCL1/GPIO227<br />
1 SG@ 2<br />
2.2K_0402_5%<br />
F4<br />
USB20_P6<br />
0-> PX Disable *<br />
USB20_P6 <br />
Internal PU/PD<br />
VB_EN<br />
SDA1/GPIO228<br />
USB_HSD6P<br />
G16<br />
AH21<br />
USB20_N6<br />
USB20_N6 CardReader<br />
2 1<br />
R517<br />
INT@<br />
0_0402_5%<br />
CLK_REQ2#/FANIN4/GPIO62<br />
USB_HSD6N<br />
G18<br />
LAN_CLKREQ#<br />
1 2<br />
AB18<br />
R370<br />
100K_0402_5%<br />
CLK_REQ1#/FANOUT4/GPIO61<br />
E1<br />
USB20_P5<br />
IR_LED#/LLB#/GPIO184<br />
USB_HSD5P<br />
D16<br />
USB20_P5 <br />
AJ21<br />
USB20_N5<br />
2 USB20_N5 Camera<br />
R418<br />
VB@<br />
2.2K_0402_5% VB_EN VB Function: 1-> VB Enable<br />
SMARTVOLT2/SHUTDOWN#/GPIO51<br />
USB_HSD5N<br />
C16<br />
2<br />
1 2<br />
H4<br />
0-> VB Disable *<br />
DDR3_RST#/GEVENT7#<br />
D5<br />
GBE_LED0/GPIO183<br />
USB_HSD4P<br />
B14<br />
2 1<br />
D7<br />
R588<br />
100K_0402_5%<br />
GBE_LED1/GEVENT9#<br />
USB_HSD4N<br />
A14<br />
G5<br />
GBE_LED2/GEVENT10#<br />
K3<br />
R515<br />
8L_6L_UMA UMA 8L/6L SEL: 1-> 6L UMA<br />
GBE_STAT0/GEVENT11#<br />
USB_HSD3P<br />
E18<br />
1 @ 2<br />
2.2K_0402_5%<br />
AA20<br />
0-> 8L UMA<br />
CLK_REQG#/GPIO65/OSCIN<br />
USB_HSD3N<br />
E16<br />
EHCI1 / OHCI1<br />
2 1<br />
USB20_P2<br />
USB20_P2 <br />
R593<br />
100K_0402_5%<br />
USB_HSD2P<br />
J16<br />
H3<br />
USB20_N2<br />
USB20_N2 Ext USB3<br />
<br />
EC_LID_OUT#<br />
BLINK/USB_OC7#/GEVENT18#<br />
USB_HSD2N<br />
J18<br />
EC_LID_OUT#<br />
D1<br />
R521 1 @ 2<br />
2.2K_0402_5% MUXLESS_SEL MUXLESS SEL: 1->PX with Muxless<br />
USB_OC6#/IR_TX1/GEVENT6#<br />
E4<br />
USB20_P1<br />
0->PX with Mux<br />
USB20_P1 <br />
VGA_HDMI_DET#<br />
USB_OC5#/IR_TX0/GEVENT17#<br />
USB_HSD1P<br />
B17<br />
D4<br />
USB20_N1<br />
USB_OC4#/IR_RX0/GEVENT16#<br />
USB_HSD1N<br />
A17<br />
USB20_N1 Ext USB2<br />
2 1<br />
E8<br />
R612<br />
100K_0402_5%<br />
USB_OC#2<br />
USB_OC3#/AC_PRES/TDO/GEVENT15#<br />
USB20_P0<br />
USB_OC#2<br />
F7<br />
USB20_P0 <br />
USB_OC#1<br />
USB_OC2#/TCK/GEVENT14#<br />
USB_HSD0P<br />
A16<br />
USB20_N0<br />
USB_OC#1<br />
E7<br />
USB20_N0 Ext USB1<br />
USB_OC#0<br />
USB_OC1#/TDI/GEVENT13#<br />
USB_HSD0N<br />
B16<br />
USB_OC#0<br />
F8<br />
R345<br />
33_0402_5%<br />
USB_OC0#/TRST#/GEVENT12#<br />
HDA_BITCLK_AUDIO<br />
1 2<br />
HDA_SDOUT<br />
HDA_BITCLK<br />
M3<br />
Check SW:<br />
R346<br />
33_0402_5%<br />
HDA_SDOUT<br />
AZ_BITCLK<br />
SCL2/GPIO193<br />
D25<br />
HDA_SDOUT_AUDIO<br />
1 2<br />
N1<br />
Cinfigure to output or Internal PU/PD<br />
HDA_SDIN0<br />
AZ_SDOUT<br />
SDA2/GPIO194<br />
F23<br />
HDA_SDIN0<br />
L2<br />
Check SW:<br />
HDA_SDIN1<br />
AZ_SDIN0/GPIO167<br />
SCL3_LV/GPIO195<br />
B26<br />
SB_SIC <br />
M2<br />
Cinfigure to output or Internal PU/PD<br />
AZ_SDIN1/GPIO168<br />
SDA3_LV/GPIO196<br />
E26<br />
SB_SID <br />
M1<br />
AZ_SDIN2/GPIO169<br />
EC_PWM0/EC_TIMER0/GPIO197<br />
F25<br />
M4<br />
HDA_SYNC<br />
AZ_SDIN3/GPIO170<br />
EC_PWM1/EC_TIMER1/GPIO198<br />
E22<br />
R347<br />
HDA_SYNC_AUDIO<br />
1 2<br />
33_0402_5%<br />
N2<br />
AZ_SYNC<br />
EC_PWM2/EC_TIMER2/GPIO199<br />
F22<br />
GPIO199 <br />
P2<br />
GPIO200 STRAP PIN<br />
R348<br />
33_0402_5%<br />
HDA_RST#<br />
AZ_RST#<br />
EC_PWM3/EC_TIMER3/GPIO200<br />
E21<br />
HDA_RST_AUDIO#<br />
1 2<br />
GBE_COL<br />
KSI_0/GPIO201<br />
G24<br />
T1<br />
GBE_CRS<br />
GBE_COL<br />
KSI_1/GPIO202<br />
G25<br />
T4<br />
GBE_CRS<br />
KSI_2/GPIO203<br />
E28<br />
L6<br />
GBE_MDIO<br />
GBE_MDCK<br />
KSI_3/GPIO204<br />
E29<br />
L5<br />
GBE_MDIO<br />
KSI_4/GPIO205<br />
D29<br />
T9<br />
GBE_RXCLK<br />
KSI_5/GPIO206<br />
D28<br />
U1<br />
GBE_RXD3<br />
KSI_6/GPIO207<br />
C29<br />
U3<br />
GBE_RXD2<br />
KSI_7/GPIO208<br />
C28<br />
T2<br />
GBE_RXD1<br />
U2<br />
GBE_RXD0<br />
KSO_0/GPIO209<br />
B28<br />
T5<br />
+3VS<br />
GBE_RXERR<br />
GBE_RXCTL/RXDV<br />
KSO_1/GPIO210<br />
A27<br />
V5<br />
EC_RSMRST#<br />
GBE_RXERR<br />
KSO_2/GPIO211<br />
B27<br />
1 2<br />
P5<br />
R339<br />
2.2K_0402_5%<br />
GBE_TXCLK<br />
KSO_3/GPIO212<br />
D26<br />
M5<br />
@<br />
HDA_BITCLK<br />
R342<br />
2.2K_0402_5% SB_SMCLK0<br />
GBE_TXD3<br />
KSO_4/GPIO213<br />
A26<br />
1 2<br />
1 2<br />
P9<br />
R349<br />
10K_0402_5%<br />
GBE_TXD2<br />
KSO_5/GPIO214<br />
C26<br />
T7<br />
1 @ 2<br />
HDA_SDIN0<br />
SB_SMDAT0<br />
KSO_6/GPIO215<br />
A24<br />
R343<br />
GBE_TXD1<br />
1 2<br />
2.2K_0402_5%<br />
P7<br />
R350<br />
10K_0402_5%<br />
GBE_TXD0<br />
KSO_7/GPIO216<br />
B25<br />
M7<br />
1 @ 2<br />
HDA_SDIN1<br />
SUS_STAT#<br />
KSO_8/GPIO217<br />
A25<br />
R344<br />
GBE_TXCTL/TXEN<br />
1 2<br />
4.7K_0402_5%<br />
P4<br />
R351<br />
10K_0402_5%<br />
GBE_PHY_PD<br />
KSO_9/GPIO218<br />
D24<br />
M9<br />
GBE_PHY_INTR<br />
GBE_PHY_RST#<br />
KSO_10/GPIO219<br />
B24<br />
V7<br />
GBE_PHY_INTR<br />
KSO_11/GPIO220<br />
C24<br />
KSO_12/GPIO221<br />
B23<br />
E23<br />
PS2_DAT/SDA4/GPIO187<br />
KSO_13/GPIO222<br />
A23<br />
E24<br />
PS2_CLK/SCL4/GPIO188<br />
KSO_14/GPIO223<br />
D22<br />
F21<br />
SPI_CS2#/GBE_STAT2/GPIO166<br />
KSO_15/GPIO224<br />
C22<br />
G29<br />
FC_RST#/GPO160<br />
KSO_16/GPIO225<br />
A22<br />
+3VALW<br />
KSO_17/GPIO226<br />
B22<br />
D27<br />
+3VALW<br />
PS2KB_DAT/GPIO189<br />
F28<br />
PS2KB_CLK/GPIO190<br />
F29<br />
GBE_MDIO<br />
PS2M_DAT/GPIO191<br />
1 2<br />
E27<br />
R352<br />
10K_0402_5%<br />
PS2M_CLK/GPIO192<br />
3 3<br />
1 2 SB_PCIE_WAKE#<br />
1 2<br />
GBE_PHY_INTR<br />
R355<br />
10K_0402_5%<br />
R358<br />
10K_0402_5%<br />
SB820M_FCBGA605<br />
1 @ 2<br />
EC_LID_OUT#<br />
R357<br />
100K_0402_5%<br />
1 2<br />
GBE_COL<br />
1 2<br />
SB_SIC<br />
R353<br />
10K_0402_5%<br />
SB820 A12(SA00003IW10)<br />
4 4<br />
R359<br />
2.2K_0402_5%<br />
1 2<br />
GBE_CRS<br />
1 2<br />
SB_SID<br />
R354<br />
10K_0402_5%<br />
R360<br />
2.2K_0402_5%<br />
1 2<br />
GBE_RXERR<br />
1 2<br />
H_THERMTRIP#<br />
R356<br />
10K_0402_5%<br />
R361<br />
10K_0402_5%<br />
1 2<br />
SB_SMCLK1<br />
R362<br />
2.2K_0402_5%<br />
1 2<br />
SB_SMDAT1<br />
AMD recommend PD 10K<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
<strong>Compal</strong> Electronics, Inc.<br />
R363<br />
2.2K_0402_5%<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
A<br />
1 2<br />
1<br />
3<br />
B<br />
GBE LAN<br />
HD AUDIO<br />
EMBEDDED CTRL<br />
ACPI / WAKE UP EVENTS<br />
USB 1.1 USB MISC<br />
www.mycomp.su<br />
GPIO<br />
USB OC<br />
EMBEDDED CTRL<br />
USB 2.0<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 27 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
U20B<br />
SB800<br />
1 SATA_STX_DRX_P0<br />
AH9<br />
SATA_TX0P<br />
FC_CLK<br />
AH28<br />
1<br />
SATA_STX_DRX_N0<br />
AJ9<br />
SATA_TX0N<br />
Part 2 of 5<br />
FC_FBCLKOUT<br />
AG28<br />
HDD<br />
FC_FBCLKIN<br />
AF26<br />
SATA_DTX_C_SRX_N0<br />
AJ8<br />
SATA_RX0N<br />
SATA_DTX_C_SRX_P0<br />
AH8<br />
SATA_RX0P<br />
FC_OE#/GPIOD145<br />
AF28<br />
FC_AVD#/GPIOD146<br />
AG29<br />
SATA_STX_DRX_P1<br />
AH10<br />
SATA_TX1P<br />
FC_WE#/GPIOD148<br />
AG26<br />
SATA_STX_DRX_N1<br />
AJ10<br />
SATA_TX1N<br />
FC_CE1#/GPIOD149<br />
AF27<br />
ODD<br />
FC_CE2#/GPIOD150<br />
AE29<br />
SATA_DTX_C_SRX_N1<br />
AG10<br />
SATA_RX1N<br />
FC_INT1/GPIOD144<br />
AF29<br />
SATA_DTX_C_SRX_P1<br />
AF10<br />
SATA_RX1P<br />
FC_INT2/GPIOD147<br />
AH27<br />
AG12<br />
SATA_TX2P<br />
AF12<br />
SATA_TX2N<br />
AJ12<br />
SATA_RX2N<br />
AH12<br />
SATA_RX2P<br />
AH14<br />
SATA_TX3P<br />
AJ14<br />
SATA_TX3N<br />
AG14<br />
SATA_RX3N<br />
AF14<br />
SATA_RX3P<br />
AG17<br />
SATA_TX4P<br />
AF17<br />
SATA_TX4N<br />
AJ17<br />
SATA_RX4N<br />
AH17<br />
SATA_RX4P<br />
SERIAL ATA<br />
AJ18<br />
SATA_TX5P<br />
AH18<br />
SATA_TX5N<br />
FANOUT0/GPIO52<br />
W5<br />
2 FANOUT1/GPIO53<br />
W6<br />
2<br />
AH19<br />
SATA_RX5N<br />
FANOUT2/GPIO54<br />
Y9<br />
AJ19<br />
SATA_RX5P<br />
FANIN0/GPIO56<br />
W7<br />
R364<br />
1K_0402_1%<br />
SATA_CALRP<br />
FANIN1/GPIO57<br />
V9<br />
2 1<br />
AB14<br />
+1.1VS_SATA 2 1 SATA_CALRN<br />
SATA_CALRP<br />
FANIN2/GPIO58<br />
W8<br />
AA14<br />
R365<br />
931_0402_1%<br />
SATA_CALRN<br />
TEMPIN0/GPIO171<br />
B6<br />
TEMPIN1/GPIO172<br />
A6<br />
SATA_LED#<br />
AD11<br />
SATA_ACT#/GPIO67<br />
TEMPIN2/GPIO173<br />
A5 @R366<br />
TEMPIN3/TALERT#/GPIO174<br />
B5 1 2<br />
EC_THERM# <br />
TEMP_COMM<br />
C7<br />
0_0402_5%<br />
+3VS<br />
R367 1 2<br />
10K_0402_5%<br />
Check SW:<br />
Cinfigure to output or Internal PU/PD<br />
VIN0/GPIO175<br />
A3<br />
T13 PAD<br />
AD16<br />
SATA_X1<br />
VIN1/GPIO176<br />
B4<br />
VIN2/GPIO177<br />
A4<br />
VIN3/GPIO178<br />
C5<br />
MEM_1V5<br />
VIN4/GPIO179<br />
A7<br />
VIN5/GPIO180<br />
B7<br />
VIN6/GBE_STAT3/GPIO181<br />
B8<br />
T15 PAD<br />
AC16<br />
SATA_X2<br />
VIN7/GBE_LED3/GPIO182<br />
A8<br />
J5<br />
SPI_DI/GPIO164<br />
E2<br />
SPI_DO/GPIO163<br />
K4<br />
SPI_CLK/GPIO162<br />
K9<br />
SPI_CS1#/GPIO165<br />
G2<br />
<strong>ROM</strong>_RST#/GPIO161<br />
SPI <strong>ROM</strong><br />
HW MONITOR<br />
SB820M_FCBGA605<br />
3 3<br />
SB820 A12(SA00003IW10)<br />
MEM_1V5 is for gating the<br />
glitch on PCI_AD24<br />
+3VS<br />
C685<br />
2 1<br />
0.1U_0402_16V4Z<br />
U22<br />
MEM_1V5<br />
2<br />
B<br />
Y 4<br />
1 2<br />
PCI_AD24<br />
1 2<br />
1<br />
R424<br />
33_0402_5%<br />
R422<br />
0_0402_5%<br />
A<br />
2<br />
VDDR_SW <br />
NC7SZ08P5X_NL_SC70-5<br />
C686<br />
150P_0402_50V8J<br />
@<br />
1<br />
1 2<br />
PCI_AD24<br />
R423<br />
0_0402_5%<br />
1 : VDDR=1.05V<br />
0 : VDDR=0.9V<br />
For VDDR Voltage Switch, AMD suggest<br />
4 4<br />
FLASH<br />
FC_ADQ0/GPIOD128<br />
AJ27<br />
FC_ADQ1/GPIOD129<br />
AJ26<br />
FC_ADQ2/GPIOD130<br />
AH25<br />
FC_ADQ3/GPIOD131<br />
AH24<br />
FC_ADQ4/GPIOD132<br />
AG23<br />
FC_ADQ5/GPIOD133<br />
AH23<br />
FC_ADQ6/GPIOD134<br />
AJ22<br />
FC_ADQ7/GPIOD135<br />
AG21<br />
FC_ADQ8/GPIOD136<br />
AF21<br />
FC_ADQ9/GPIOD137<br />
AH22<br />
FC_ADQ10/GPIOD138<br />
AJ23<br />
FC_ADQ11/GPIOD139<br />
AF23<br />
FC_ADQ12/GPIOD140<br />
AJ24<br />
FC_ADQ13/GPIOD141<br />
AJ25<br />
FC_ADQ14/GPIOD142<br />
AG25<br />
FC_ADQ15/GPIOD143<br />
AH26<br />
NC1<br />
G27<br />
NC2<br />
Y2<br />
www.mycomp.su<br />
5<br />
P<br />
G<br />
3<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 28 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
+1.1VS_VDDC<br />
1 2<br />
+1.1VS<br />
Y14<br />
VSS_1<br />
AJ2<br />
U20C<br />
R369<br />
0_0805_5%<br />
VSSIO_SATA_1<br />
Y16<br />
VSSIO_SATA_2<br />
VSS_2<br />
A28<br />
131mA<br />
SB800<br />
Part 3 of 5<br />
AB16<br />
+3VS<br />
10U_0805_10V4Z C590<br />
VSSIO_SATA_3<br />
VSS_3<br />
A2<br />
AH1<br />
VDDIO_33_PCIGP_1<br />
VDDCR_11_1<br />
N13<br />
1 2<br />
AC14<br />
VSSIO_SATA_4<br />
VSS_4<br />
E5<br />
V6<br />
VDDIO_33_PCIGP_2<br />
VDDCR_11_2<br />
R15<br />
AE12<br />
1U_0402_6.3V4Z C596<br />
VSSIO_SATA_5<br />
VSS_5<br />
D23<br />
1 2<br />
Y19<br />
VDDIO_33_PCIGP_3<br />
VDDCR_11_3<br />
N17<br />
2 1<br />
AE14<br />
VSSIO_SATA_6<br />
VSS_6<br />
E25<br />
C591<br />
22U_0805_6.3V6M<br />
AE5<br />
1U_0402_6.3V4Z C594<br />
VDDIO_33_PCIGP_4<br />
VDDCR_11_4<br />
U13<br />
2 1<br />
AF9<br />
0.1U_0402_16V4Z C597<br />
VSSIO_SATA_7<br />
VSS_7<br />
E6<br />
C592 1 2<br />
0.1U_0402_16V4Z<br />
AC21<br />
C593 1 2<br />
0.1U_0402_16V4Z<br />
VDDIO_33_PCIGP_5<br />
VDDCR_11_5<br />
U17<br />
2 1<br />
AF11<br />
VSSIO_SATA_8<br />
VSS_8<br />
F24<br />
AA2<br />
0.1U_0402_16V4Z C598<br />
VDDIO_33_PCIGP_6<br />
VDDCR_11_6<br />
V12<br />
2 1<br />
AF13<br />
VSS_9<br />
N15<br />
C599<br />
VSSIO_SATA_9<br />
1 2<br />
0.1U_0402_16V4Z<br />
AB4<br />
VDDIO_33_PCIGP_7<br />
VDDCR_11_7<br />
V18<br />
AF16<br />
VSSIO_SATA_10<br />
VSS_10<br />
R13<br />
AC8<br />
VDDIO_33_PCIGP_8<br />
VDDCR_11_8<br />
W12<br />
AG8<br />
VSSIO_SATA_11<br />
VSS_11<br />
R17<br />
AA7<br />
VDDIO_33_PCIGP_9<br />
VDDCR_11_9<br />
W18<br />
AH7<br />
VSSIO_SATA_12<br />
VSS_12<br />
T10<br />
AA9<br />
VDDIO_33_PCIGP_10<br />
AH11<br />
+1.1VS_CKVDD<br />
VSSIO_SATA_13<br />
VSS_13<br />
P10<br />
AF7<br />
400mA<br />
L69<br />
VDDIO_33_PCIGP_11<br />
AH13<br />
VSSIO_SATA_14<br />
VSS_14<br />
V11<br />
AA19<br />
VDDIO_33_PCIGP_12<br />
VDDAN_11_CLK_1<br />
K28<br />
2<br />
1<br />
+1.1VS<br />
AH16<br />
VSSIO_SATA_15<br />
VSS_15<br />
U15<br />
VDDAN_11_CLK_2<br />
K29<br />
FBMA-L11-201209-221LMA30T_0805<br />
AJ7<br />
VSSIO_SATA_16<br />
VSS_16<br />
M18<br />
VDDAN_11_CLK_3<br />
J28<br />
External Clock, connect to +1.1VS<br />
AJ11<br />
VSS_17<br />
V19<br />
22U_0805_6.3V6M C595<br />
VSSIO_SATA_17<br />
VDDAN_11_CLK_4<br />
K26<br />
1 2<br />
AJ13<br />
71mA<br />
directly, no need thick trace<br />
VSSIO_SATA_18<br />
VSS_18<br />
M11<br />
VDDAN_11_CLK_5<br />
J21<br />
AJ16<br />
VSSIO_SATA_19<br />
VSS_19<br />
L12<br />
AF22<br />
VDDIO_18_FC_1<br />
VDDAN_11_CLK_6<br />
J20<br />
1U_0402_6.3V4Z 2 1<br />
C600<br />
VSS_20<br />
L18<br />
AE25<br />
VDDIO_18_FC_2<br />
VDDAN_11_CLK_7<br />
K21<br />
1U_0402_6.3V4Z 2 1<br />
C601 check can be removed?<br />
A9<br />
VSSIO_USB_1<br />
VSS_21<br />
J7<br />
AF24<br />
VDDIO_18_FC_3<br />
VDDAN_11_CLK_8<br />
J22<br />
0.1U_0402_16V4Z 2 1<br />
C602<br />
B10<br />
VSSIO_USB_2<br />
VSS_22<br />
P3<br />
1 2 AC22<br />
0.1U_0402_16V4Z<br />
VDDIO_18_FC_4<br />
2 1<br />
C603<br />
K11<br />
VSSIO_USB_3<br />
VSS_23<br />
V4<br />
R371<br />
0_0402_5%<br />
B9<br />
VSSIO_USB_4<br />
VSS_24<br />
AD6<br />
VDDRF_GBE_S<br />
D10<br />
VSSIO_USB_5<br />
VSS_25<br />
AD4<br />
D12<br />
VSSIO_USB_6<br />
VSS_26<br />
AB7<br />
POWER<br />
1 2<br />
R372<br />
0_0402_5%<br />
VDDIO_33_GBE_S<br />
M10<br />
1 2<br />
D14<br />
VSSIO_USB_7<br />
VSS_27<br />
AC9<br />
43mA<br />
R373<br />
0_0402_5%<br />
D17<br />
VSSIO_USB_8<br />
VSS_28<br />
V8<br />
+VDDPL_3V_PCIE<br />
AE28<br />
VDDPL_33_PCIE<br />
E9<br />
VSSIO_USB_9<br />
VSS_29<br />
W9<br />
F9<br />
+1.1VS_PCIE<br />
VSSIO_USB_10<br />
VSS_30<br />
W10<br />
L70<br />
600mA<br />
F12<br />
VSSIO_USB_11<br />
VSS_31<br />
AJ28<br />
+1.1VS<br />
2<br />
1<br />
U26<br />
VDDAN_11_PCIE_1<br />
VDDCR_11_GBE_S_1<br />
L7<br />
1 2<br />
F14<br />
R374<br />
0_0402_5%<br />
VSSIO_USB_12<br />
VSS_32<br />
B29<br />
FBMA-L11-201209-221LMA30T_0805<br />
V22<br />
VDDAN_11_PCIE_2<br />
VDDCR_11_GBE_S_2<br />
L9<br />
F16<br />
VSSIO_USB_13<br />
VSS_33<br />
U4<br />
V26<br />
C9<br />
VSS_34<br />
Y18<br />
C604<br />
VDDAN_11_PCIE_3<br />
VSSIO_USB_14<br />
1 2<br />
22U_0805_6.3V6M<br />
V27<br />
G11<br />
VSSIO_USB_15<br />
VSS_35<br />
Y10<br />
C605<br />
VDDAN_11_PCIE_4<br />
1 2<br />
1U_0402_6.3V4Z<br />
V28<br />
VDDAN_11_PCIE_5<br />
VDDIO_GBE_S_1<br />
M6<br />
1 2<br />
F18<br />
VSSIO_USB_16<br />
VSS_36<br />
Y12<br />
C606 1 2<br />
0.1U_0402_16V4Z<br />
V29<br />
D9<br />
VSSIO_USB_17<br />
VSS_37<br />
Y11<br />
C607<br />
0.1U_0402_16V4Z<br />
VDDAN_11_PCIE_6<br />
VDDIO_GBE_S_2<br />
P8<br />
R375<br />
0_0402_5%<br />
1 2<br />
W22<br />
VDDAN_11_PCIE_7<br />
H12<br />
VSSIO_USB_18<br />
VSS_38<br />
AA11<br />
W26<br />
VDDAN_11_PCIE_8<br />
H14<br />
VSSIO_USB_19<br />
VSS_39<br />
AA12<br />
H16<br />
VSSIO_USB_20<br />
VSS_40<br />
G4<br />
+VDDPL_3V_SATA<br />
H18<br />
+3VALW<br />
VSSIO_USB_21<br />
VSS_41<br />
J4<br />
93mA<br />
J11<br />
VSSIO_USB_22<br />
VSS_42<br />
G8<br />
AD14<br />
+1.1VS_SATA<br />
32mA<br />
J19<br />
VSSIO_USB_23<br />
VSS_43<br />
G9<br />
L71<br />
VDDPL_33_SATA<br />
VDDIO_33_S_1<br />
A21<br />
K12<br />
VSSIO_USB_24<br />
VSS_44<br />
M12<br />
+1.1VS<br />
2<br />
1<br />
AJ20<br />
VDDIO_33_S_2<br />
D21<br />
K14<br />
VSSIO_USB_25<br />
VSS_45<br />
AF25<br />
FBMA-L11-201209-221LMA30T_0805<br />
VDDAN_11_SATA_1<br />
567mA AF18<br />
VDDIO_33_S_3<br />
B21<br />
2.2U_0603_6.3V4Z<br />
VDDAN_11_SATA_4<br />
1 2<br />
C608<br />
K16<br />
VSSIO_USB_26<br />
VSS_46<br />
H7<br />
AH20<br />
2.2U_0603_6.3V4Z 1 2<br />
C609<br />
VDDIO_33_S_4<br />
K10<br />
K18<br />
VSSIO_USB_27<br />
VSS_47<br />
AH29<br />
C610<br />
VDDAN_11_SATA_2<br />
1 2<br />
22U_0805_6.3V6M<br />
AG19<br />
VDDIO_33_S_5<br />
L10<br />
H19<br />
VSSIO_USB_28<br />
VSS_48<br />
V10<br />
C611<br />
VDDAN_11_SATA_3<br />
1 2<br />
1U_0402_6.3V4Z<br />
AE18<br />
+1.1VALW<br />
VSS_49<br />
P6<br />
C612 1 2<br />
1U_0402_6.3V4Z<br />
VDDAN_11_SATA_5<br />
VDDIO_33_S_6<br />
J9<br />
AD18<br />
C613 1 2<br />
0.1U_0402_16V4Z<br />
VDDAN_11_SATA_6<br />
VDDIO_33_S_7<br />
T6<br />
VSS_50<br />
N4<br />
AE16<br />
VDDAN_11_SATA_7<br />
VDDIO_33_S_8<br />
T8<br />
Y4<br />
EFUSE<br />
VSS_51<br />
L4<br />
C614 1 2<br />
0.1U_0402_16V4Z<br />
VSS_52<br />
L8<br />
D8<br />
check 220ohm bead<br />
+AVDD_USB<br />
113mA<br />
C615 2 1<br />
1U_0402_6.3V4Z<br />
VSSAN_HWM<br />
L72<br />
658mA<br />
C616 2 1<br />
1U_0402_6.3V4Z<br />
VDDCR_11_S_1<br />
F26<br />
M19<br />
VSSXL<br />
VSSPL_SYS<br />
M20<br />
+3VALW<br />
2<br />
1<br />
A18<br />
FBMA-L11-201209-221LMA30T_0805<br />
VDDAN_33_USB_S_1<br />
VDDCR_11_S_2<br />
G26<br />
A19<br />
VDDAN_33_USB_S_2<br />
TBD<br />
A20<br />
+VDDIO_AZ<br />
P21<br />
C617 1 2<br />
10U_0805_10V4Z<br />
VDDAN_33_USB_S_3<br />
VDDIO_AZ_S<br />
M8<br />
+1.1VALW<br />
VSSIO_PCIECLK_1 VSSIO_PCIECLK_14<br />
H23<br />
B18<br />
VDDAN_33_USB_S_4<br />
P20<br />
+VDDCR_USB<br />
VSSIO_PCIECLK_2 VSSIO_PCIECLK_15<br />
H26<br />
C618 1 2<br />
10U_0805_10V4Z<br />
B19<br />
VDDAN_33_USB_S_5<br />
VDDCR_11_USB_S_1<br />
A11 197mA<br />
M22<br />
VSSIO_PCIECLK_3 VSSIO_PCIECLK_16<br />
AA21<br />
C619 1 2<br />
1U_0402_6.3V4Z<br />
B20<br />
VDDAN_33_USB_S_6<br />
VDDCR_11_USB_S_2<br />
B11<br />
2<br />
1<br />
M24<br />
VSSIO_PCIECLK_4 VSSIO_PCIECLK_17<br />
AA23<br />
C620 1 2<br />
1U_0402_6.3V4Z<br />
C18<br />
L73 FBMA-L11-160808-221LMT 0603<br />
VDDAN_33_USB_S_7<br />
M26<br />
VSSIO_PCIECLK_5 VSSIO_PCIECLK_18<br />
AB23<br />
C621 1 2<br />
0.1U_0402_16V4Z<br />
C20<br />
VDDAN_33_USB_S_8<br />
47mA<br />
C622 1 2<br />
10U_0805_10V4Z<br />
P22<br />
VSSIO_PCIECLK_6 VSSIO_PCIECLK_19<br />
AD23<br />
D18<br />
VDDAN_33_USB_S_9<br />
VDDPL_33_SYS<br />
M21<br />
+VDDPL_3V<br />
P24<br />
VSSIO_PCIECLK_7 VSSIO_PCIECLK_20<br />
AA26<br />
D19<br />
VDDAN_33_USB_S_10<br />
62mA<br />
C623 2 1<br />
0.1U_0402_16V4Z<br />
P26<br />
VSSIO_PCIECLK_8 VSSIO_PCIECLK_21<br />
AC26<br />
D20<br />
VDDAN_33_USB_S_11<br />
VDDPL_11_SYS_S<br />
L22<br />
+VDDPL_11V<br />
C624 2 1<br />
0.1U_0402_16V4Z<br />
T20<br />
VSSIO_PCIECLK_9 VSSIO_PCIECLK_22<br />
Y20<br />
E19<br />
VDDAN_33_USB_S_12<br />
17mA<br />
T22<br />
VSSIO_PCIECLK_10 VSSIO_PCIECLK_23<br />
W21<br />
+1.1V_USB<br />
VDDPL_33_USB_S<br />
+VDDPL_3V_USB<br />
T24<br />
VSSIO_PCIECLK_11 VSSIO_PCIECLK_24<br />
W20<br />
L74<br />
200mA<br />
5mA<br />
V20<br />
+3VALW<br />
VSSIO_PCIECLK_12 VSSIO_PCIECLK_25<br />
AE26<br />
+1.1VALW<br />
2<br />
1<br />
C11<br />
VDDAN_11_USB_S_1<br />
VDDAN_33_HWM_S<br />
D6<br />
+3V_HWM<br />
J23<br />
+VDDLX_3V<br />
VSSIO_PCIECLK_13 VSSIO_PCIECLK_26<br />
L21<br />
FBMA-L11-160808-221LMT 0603<br />
D11<br />
VDDAN_11_USB_S_2<br />
197mA<br />
VSSIO_PCIECLK_27<br />
K20<br />
VDDXL_33_S<br />
L20<br />
2<br />
1<br />
C625 2 1<br />
2.2U_0603_6.3V4Z<br />
L75 FBMA-L11-160808-221LMT 0603<br />
Part 5 of 5<br />
1 1<br />
2 2<br />
3 3<br />
C626 2 1<br />
0.1U_0402_16V4Z<br />
C627 1 2<br />
2.2U_0603_6.3V4Z<br />
SB820M_FCBGA605<br />
SB820M_FCBGA605<br />
+VDDPL_3V_PCIE<br />
C628<br />
1<br />
0.1U_0402_16V4Z<br />
2<br />
1<br />
C634<br />
2.2U_0603_6.3V4Z<br />
2<br />
+3VS<br />
L79<br />
2<br />
1<br />
FBMA-L11-160808-221LMT 0603<br />
+VDDPL_3V<br />
1<br />
C635<br />
2.2U_0603_6.3V4Z<br />
2<br />
SB820 A12(SA00003IW10)<br />
+3VS<br />
PCI/GPIO I/O<br />
L80<br />
2<br />
1<br />
FBMA-L11-160808-221LMT 0603<br />
CORE S0<br />
FLASH I/O<br />
SERIAL ATA<br />
PCI EXPRESS<br />
USB I/O<br />
PLL GBE LAN<br />
CLKGEN I/O<br />
CORE S5<br />
3.3V_S5 I/O<br />
510mA<br />
www.mycomp.su<br />
+VDDPL_11V +1.1VALW +VDDPL_3V_USB +3VALW +3V_HWM +3VALW<br />
L76<br />
2<br />
1<br />
FBMA-L11-160808-221LMT 0603<br />
1<br />
C629<br />
2.2U_0603_6.3V4Z<br />
2<br />
C630<br />
1<br />
0.1U_0402_16V4Z<br />
2<br />
L77<br />
2<br />
1<br />
FBMA-L11-160808-221LMT 0603<br />
1<br />
C631<br />
2.2U_0603_6.3V4Z<br />
2<br />
C632<br />
1<br />
0.1U_0402_16V4Z<br />
2<br />
L78<br />
2<br />
1<br />
FBMA-L11-160808-221LMT 0603<br />
1<br />
C633<br />
2.2U_0603_6.3V4Z<br />
2<br />
U20E<br />
SB800<br />
GROUND<br />
SB820 A12(SA00003IW10)<br />
+VDDPL_3V_SATA<br />
+3VS<br />
+VDDIO_AZ<br />
+3VALW<br />
L81<br />
2<br />
1<br />
1 2<br />
4 4<br />
FBMA-L11-160808-221LMT 0603<br />
R376<br />
0_0402_5%<br />
1<br />
C636<br />
0.1U_0402_16V4Z<br />
2<br />
1<br />
C637<br />
2.2U_0603_6.3V4Z<br />
2<br />
A<br />
1<br />
2<br />
C638<br />
2.2U_0603_6.3V4Z<br />
For 3V AZ device<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 29 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
REQUIRED STRAPS<br />
Check Internal PU/PD<br />
AZ_SDOUT<br />
PCI_CLK1<br />
PCI_CLK2<br />
PCI_CLK3<br />
PCI_CLK4<br />
LPC_CLK0<br />
LCP_CLK1<br />
GPIO200<br />
GPIO199<br />
PULL LOW POWER ALLOW PCIE WATCHDOG USE CPU/HT CLK EC CLOCKGEN<br />
HIGH MODE GEN2 TIMER<br />
DEBUG SEL<br />
ENABLE ENABLE<br />
H,H = Reserved<br />
ENABLE STRAP Enable<br />
H,L = SPI <strong>ROM</strong><br />
1 1<br />
PULL<br />
LOW<br />
Performance<br />
MODE<br />
FORCE PCIE<br />
GEN1<br />
WATCHDOG<br />
TIMER<br />
DISABLE<br />
IGNORE<br />
DEBUG<br />
STRAP<br />
CPU/HT CLK<br />
SEL<br />
Disable<br />
EC<br />
DISABLE<br />
CLOCKGEN<br />
DISABLE<br />
L,H = LPC <strong>ROM</strong> (Default L,NC)<br />
L,L = FWH <strong>ROM</strong><br />
DEFAULT<br />
DEFAULT<br />
DEFAULT<br />
DEFAULT<br />
DEFAULT<br />
DEFAULT<br />
DEFAULT<br />
+VDDIO_AZ +3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW<br />
HDA_SDOUT<br />
PCI_CLK1<br />
PCI_CLK2<br />
PCI_CLK3<br />
PCI_CLK4<br />
LPC_CLK0_EC<br />
LPC_CLK1<br />
GPIO200<br />
GPIO199<br />
2 2<br />
DEBUG STRAPS<br />
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]<br />
PCI_AD25<br />
PCI_AD24<br />
3 3<br />
PULL<br />
HIGH<br />
PULL<br />
LOW<br />
PCI_AD27<br />
USE PCI<br />
PLL<br />
DEFAULT<br />
BYPASS<br />
PCI PLL<br />
Check AD29,AD28 strap function<br />
PCI_AD26<br />
DISABLE ILA<br />
AUTORUN<br />
DEFAULT<br />
ENABLE ILA<br />
AUTORUN<br />
R377<br />
10K_0402_5%<br />
@<br />
R386<br />
10K_0402_5%<br />
USE FC PLL<br />
DEFAULT<br />
BYPASS<br />
FC PLL<br />
1<br />
2<br />
1<br />
2<br />
check default<br />
USE DEFAULT<br />
PCIE STRAPS<br />
DEFAULT<br />
R378<br />
10K_0402_5%<br />
@<br />
R387<br />
10K_0402_5%<br />
1<br />
2<br />
1<br />
2<br />
USE EEP<strong>ROM</strong><br />
PCIE STRAPS<br />
R379<br />
10K_0402_5%<br />
@<br />
R388<br />
10K_0402_5%<br />
1<br />
2<br />
1<br />
2<br />
PCI_AD23<br />
DISABLE PCI<br />
MEM BOOT<br />
DEFAULT<br />
ENABLE PCI<br />
MEM BOOT<br />
R380<br />
10K_0402_5%<br />
@<br />
R389<br />
10K_0402_5%<br />
1<br />
2<br />
1<br />
2<br />
R381<br />
10K_0402_5%<br />
R390<br />
10K_0402_5%<br />
1<br />
2<br />
1<br />
2<br />
INT@<br />
EXT@<br />
R382<br />
10K_0402_5%<br />
@<br />
R391<br />
10K_0402_5%<br />
PCI_AD29<br />
PCI_AD28<br />
PCI_AD27<br />
PCI_AD26<br />
PCI_AD25<br />
PCI_AD24<br />
PCI_AD23<br />
1<br />
2<br />
R383<br />
10K_0402_5%<br />
R392<br />
10K_0402_5%<br />
1<br />
2<br />
INT@<br />
EXT@<br />
www.mycomp.su<br />
1<br />
2<br />
R395<br />
10K_0402_5%<br />
1<br />
2<br />
+3VS<br />
1<br />
2<br />
R396<br />
10K_0402_5%<br />
+3VS<br />
1<br />
2<br />
R384<br />
10K_0402_5%<br />
@<br />
R393<br />
2.2K_0402_5%<br />
1<br />
2<br />
1<br />
2<br />
R397<br />
2.2K_0402_5%<br />
@<br />
1<br />
2<br />
R385<br />
2.2K_0402_5%<br />
R394<br />
2.2K_0402_5%<br />
1<br />
2<br />
1<br />
2<br />
R398<br />
2.2K_0402_5%<br />
@<br />
@<br />
1<br />
2<br />
R399<br />
2.2K_0402_5%<br />
@<br />
1<br />
2<br />
R400<br />
2.2K_0402_5%<br />
@<br />
1<br />
2<br />
R401<br />
2.2K_0402_5%<br />
@<br />
1<br />
2<br />
4 4<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
Custom<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 30 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
F<br />
G<br />
H<br />
SATA HDD Conn.<br />
1 1<br />
SATA_STX_DRX_P0<br />
SATA_STX_DRX_N0<br />
SATA_DTX_C_SRX_N0<br />
SATA_DTX_C_SRX_P0<br />
+5VS<br />
+5VS_HDD<br />
SATA_STX_C_DRX_P0<br />
SATA_STX_C_DRX_N0<br />
SATA_DTX_SRX_N0<br />
SATA_DTX_SRX_P0<br />
2<br />
2<br />
2<br />
2<br />
SANTA_192301-1<br />
CONN@<br />
2 2<br />
1U_0402_6.3V4Z<br />
1000P_0402_50V7K<br />
SATA_STX_DRX_P1<br />
SATA_STX_DRX_N1<br />
SATA_DTX_C_SRX_N1<br />
SATA_DTX_C_SRX_P1<br />
R405 1 2<br />
0_0805_5%<br />
C656 1 2<br />
0.01U_0402_16V7K<br />
C658 1 2<br />
0.01U_0402_16V7K<br />
C657 1 2<br />
0.01U_0402_16V7K<br />
C659 1 2<br />
0.01U_0402_16V7K<br />
10U_0805_10V4Z<br />
1<br />
C660<br />
1<br />
C661<br />
C648 1 2<br />
0.01U_0402_16V7K<br />
C649 1 2<br />
0.01U_0402_16V7K<br />
C650 1 2<br />
0.01U_0402_16V7K<br />
C651 1 2<br />
0.01U_0402_16V7K<br />
1<br />
C663<br />
SATA_STX_C_DRX_P1<br />
SATA_STX_C_DRX_N1<br />
SATA_DTX_SRX_N1<br />
SATA_DTX_SRX_P1<br />
SATA ODD Conn.<br />
+5VS<br />
R403 1 @ 2<br />
1K_0402_1%<br />
8<br />
DP<br />
9<br />
R404<br />
0_0805_5% +5VS_ODD<br />
+5V<br />
1 2<br />
10<br />
+5V GND 17<br />
11<br />
MD GND 16<br />
12<br />
GND NC 15<br />
13<br />
GND NC 14<br />
3 3<br />
10U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
OCTEK_SLS-13SB1G_RV<br />
1<br />
1<br />
1<br />
1<br />
CONN@<br />
C652<br />
C653<br />
C654<br />
C655<br />
2<br />
+3VS<br />
+3VS<br />
1<br />
C639<br />
0.1U_0402_16V4Z<br />
2<br />
2<br />
1U_0402_6.3V4Z<br />
0.1U_0402_16V4Z<br />
1<br />
C662<br />
2<br />
JHDD1<br />
1<br />
GND<br />
2<br />
A+<br />
3<br />
A-<br />
4<br />
GND<br />
5<br />
B-<br />
6<br />
B+<br />
7<br />
GND<br />
8<br />
V33<br />
9<br />
V33<br />
10<br />
V33<br />
11<br />
GND<br />
12<br />
GND<br />
13<br />
GND<br />
14<br />
V5<br />
15<br />
V5<br />
16<br />
V5<br />
17<br />
GND<br />
18<br />
Reserved<br />
19<br />
GND<br />
20<br />
V12<br />
21<br />
V12 GND 24<br />
22<br />
V12 GND 23<br />
<br />
JODD1<br />
1<br />
GND<br />
2<br />
A+<br />
3<br />
A-<br />
4<br />
GND<br />
5<br />
B-<br />
6<br />
B+<br />
7<br />
GND<br />
www.mycomp.su<br />
2<br />
1000P_0402_50V7K<br />
4 4<br />
A<br />
B<br />
C<br />
D<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 31 of<br />
55<br />
E<br />
F<br />
G<br />
H
A<br />
A<br />
B<br />
1 1<br />
2 2<br />
3 3<br />
4 4<br />
B<br />
C<br />
C<br />
D<br />
D<br />
+3VALW<br />
R800<br />
60mil<br />
1 2<br />
+3V_LAN<br />
0_1206_5%<br />
1<br />
C901<br />
1<br />
C902<br />
U70<br />
+3V_LAN 42<br />
VDDC<br />
BIASVDDH 25<br />
4.7U_0603_6.3V6K<br />
2<br />
2<br />
0.1U_0402_16V4Z<br />
+LAN_BIASVDDH<br />
+1.2V_LAN<br />
1<br />
C900<br />
4.7U_0603_6.3V6K<br />
2<br />
0.1U_0402_16V4Z<br />
1 1 1<br />
C903<br />
C904<br />
C905<br />
2 2 2<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
+LAN_AVDDL<br />
6<br />
15<br />
41<br />
27<br />
33<br />
39<br />
VDDC<br />
VDDC<br />
VDDC<br />
AVDDL<br />
AVDDL<br />
AVDDL<br />
XTALVDDH 14<br />
AVDDH 30<br />
AVDDH 36<br />
TRD3_N 37<br />
TRD3_P<br />
38<br />
+LAN_XTALVDDH<br />
+LAN_AVDDH<br />
LAN_MIDI3-<br />
LAN_MIDI3+<br />
LAN_MIDI3- <br />
LAN_MIDI3+ <br />
On chip<br />
AT24C02<br />
SP<strong>ROM</strong>_CLK<br />
(EECLK)<br />
1<br />
SP<strong>ROM</strong>_DOUT<br />
(EEDATA)<br />
0<br />
1 1<br />
PCIE_PTX_C_IRX_P0<br />
PCIE_PTX_C_IRX_N0<br />
PCIE_ITX_C_PRX_P0<br />
PCIE_ITX_C_PRX_N0<br />
SB_PCIE_WAKE#<br />
EC_PME#<br />
+3V_LAN<br />
PLT_RST#<br />
CLK_PCIE_LAN<br />
CLK_PCIE_LAN#<br />
+LAN_GPHYPLLVDDL<br />
+LAN_PCIEPLLVDD<br />
C9071 2<br />
0.1U_0402_16V7K PCIE_PTX_IRX_P0 17<br />
C9081 2<br />
0.1U_0402_16V7K PCIE_PTX_IRX_N016<br />
22<br />
23<br />
LAN_PME# 4<br />
LAN_RESET# 2<br />
20<br />
R806 1 @ 2<br />
0_0402_5%<br />
19<br />
R807 1 2<br />
0_0402_5%<br />
R808 1 2<br />
4.7K_0402_5%<br />
R809 1 2<br />
0_0402_5%<br />
+3VS<br />
R810 1 2<br />
1K_0402_5%<br />
R813 1 2<br />
10K_0402_5%<br />
LAN_XTALO_R<br />
LAN_XTALI<br />
R814<br />
1 2<br />
LAN_CLKREQ#<br />
1.24K_0402_1%<br />
LAN_RDAC<br />
24<br />
18<br />
PCIE_PLLVDDL<br />
21<br />
PCIE_PLLVDDL<br />
40<br />
VMAIN_PRSINT<br />
1<br />
LOW_PWR<br />
26<br />
3<br />
GPHY_PLLVDDL<br />
PCIE_TXD_P<br />
PCIE_TXD_N<br />
PCIE_RXD_P<br />
PCIE_RXD_N<br />
WAKE#<br />
REST#<br />
PCIE_REFCLK_P<br />
PCIE_REFCLK_N<br />
13<br />
XTALO<br />
12<br />
XTALI<br />
RDAC<br />
CLKREQ#<br />
TRD2_N 35<br />
TRD2_P<br />
34<br />
TRD1_N 31<br />
TRD1_P<br />
32<br />
TRD0_N 29<br />
TRD0_P<br />
28<br />
LINKLED#<br />
48<br />
SPD100LED#<br />
47<br />
SPD1000LED#<br />
46<br />
TRAFFICLED#<br />
45<br />
MODE 5<br />
EEDATA<br />
43<br />
EECLK<br />
44<br />
SR_LX 11<br />
SR_VFB<br />
8<br />
SR_VDDP<br />
10<br />
SR_VDD 9<br />
NC 7<br />
LAN_MIDI1-<br />
LAN_MIDI2-<br />
LAN_MIDI2+<br />
LAN_MIDI0-<br />
LAN_MIDI1+<br />
LAN_MIDI0+<br />
SP<strong>ROM</strong>_DOUT<br />
SP<strong>ROM</strong>_CLK<br />
2 1<br />
R801<br />
0_0402_5%<br />
2 1<br />
R805<br />
0_0402_5%<br />
L103<br />
+1.2V_LAN_OUT 1 2<br />
4.7UH_PG031B-4R7MS_1.1A_20%<br />
LAN_MIDI2- <br />
LAN_MIDI2+ <br />
LAN_MIDI1- <br />
LAN_MIDI1+ <br />
LAN_MIDI0- <br />
LAN_MIDI0+ <br />
1<br />
C917<br />
LAN_LINK# <br />
LAN_ACTIVITY# <br />
1<br />
C913<br />
0.1U_0402_16V4Z<br />
1<br />
C918<br />
2<br />
2<br />
4.7U_0603_6.3V6K<br />
0.1U_0402_16V4Z<br />
+1.2V_LAN<br />
1<br />
C914<br />
10U_0805_10V4Z<br />
2<br />
+3V_LAN<br />
www.mycomp.su<br />
2<br />
SP<strong>ROM</strong>_CLK<br />
SP<strong>ROM</strong>_DOUT<br />
+3V_LAN<br />
1 2<br />
1 2<br />
R802<br />
1K_0402_1%<br />
@<br />
R811<br />
1K_0402_1%<br />
20mil<br />
L100<br />
+LAN_XTALVDDH 1<br />
1 2<br />
C909<br />
BLM18AG601SN1D_2P<br />
0.1U_0402_16V4Z<br />
20mil<br />
2<br />
L101<br />
+LAN_BIASVDDH 1<br />
1 2<br />
C910<br />
BLM18AG601SN1D_2P<br />
0.1U_0402_16V4Z<br />
20mil<br />
2<br />
L102<br />
+LAN_AVDDH 1 1<br />
1 2<br />
C911<br />
C912<br />
BLM18AG601SN1D_2P<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
2 2<br />
20mil<br />
1 2<br />
1 2<br />
R803<br />
1K_0402_1%<br />
R812<br />
1K_0402_1%<br />
@<br />
+LAN_PCIEPLLVDD<br />
1<br />
C915<br />
0.1U_0402_16V4Z<br />
2<br />
C906 1 2<br />
0.1U_0402_16V4Z<br />
@<br />
U71<br />
@<br />
8<br />
VCC<br />
7<br />
WP<br />
6<br />
SCL<br />
5<br />
SDA<br />
A0<br />
1<br />
A1<br />
2<br />
NC 3<br />
GND 4<br />
AT24C02_SO8<br />
L104<br />
1 2<br />
1<br />
BLM18AG601SN1D_2P<br />
C916<br />
4.7U_0603_6.3V6K<br />
2<br />
20mil<br />
L105<br />
+LAN_GPHYPLLVDDL 1 2<br />
1 1<br />
BLM18AG601SN1D_2P<br />
C919<br />
C920<br />
+3V_LAN<br />
+1.2V_LAN<br />
+1.2V_LAN<br />
PAD<br />
0.1U_0402_16V4Z<br />
2<br />
4.7U_0603_6.3V6K<br />
2<br />
BCM57780A0KMLG_QFN48_7X7<br />
49<br />
20mil<br />
+LAN_AVDDL<br />
1<br />
C921<br />
L106<br />
1 2<br />
1<br />
BLM18AG601SN1D_2P<br />
C922<br />
+1.2V_LAN<br />
LAN_XTALI<br />
LAN_XTALO_R<br />
0.1U_0402_16V4Z<br />
2<br />
4.7U_0603_6.3V6K<br />
2<br />
1<br />
R815<br />
200_0402_1%<br />
Y5<br />
2<br />
1 2 LAN_XTALO<br />
1<br />
25MHZ_20PF_7A250000121<br />
C923<br />
C924<br />
33P_0402_50V8J<br />
33P_0402_50V8J<br />
2<br />
2<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/04/16 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 32 of<br />
55
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
D<br />
BH GS5009-D<br />
<br />
T25<br />
LAN_ACTIVITY#<br />
LAN Connector<br />
JRJ45<br />
12<br />
Yellow LED-<br />
C<br />
B<br />
<br />
<br />
<br />
<br />
<br />
<br />
<br />
<br />
LAN_MIDI0+<br />
LAN_MIDI0-<br />
RJ45_MIDI1+<br />
RJ45_MIDI1-<br />
LAN_MIDI1+<br />
LAN_MIDI1-<br />
LAN_MIDI2+<br />
LAN_MIDI2-<br />
1<br />
C928<br />
1<br />
C929<br />
1<br />
C930<br />
Place close to TCT pin<br />
LAN_MIDI0+<br />
LAN_MIDI0-<br />
LAN_MIDI1+<br />
LAN_MIDI1-<br />
LAN_MIDI2+<br />
LAN_MIDI2-<br />
LAN_MIDI3+<br />
LAN_MIDI3-<br />
1<br />
TCT1 MCT1<br />
24<br />
2<br />
TD1+ MX1+<br />
23<br />
3<br />
TD1- MX1-<br />
22<br />
4<br />
TCT2 MCT2<br />
21<br />
5<br />
TD2+ MX2+<br />
20<br />
6<br />
TD2- MX2-<br />
19<br />
7<br />
TCT3 MCT3<br />
18<br />
8<br />
TD3+ MX3+<br />
17<br />
9<br />
TD3- MX3-<br />
16<br />
10<br />
TCT4 MCT4<br />
15<br />
11<br />
TD4+ MX4+<br />
14<br />
12<br />
TD4- MX4-<br />
13<br />
1<br />
C931<br />
350UH_IH-037-2<br />
1<br />
R819<br />
75_0402_1%<br />
2<br />
1<br />
2<br />
R820<br />
75_0402_1%<br />
RJ45_MIDI3+<br />
RJ45_MIDI3-<br />
RJ45_MIDI0+<br />
RJ45_MIDI0-<br />
RJ45_MIDI2+<br />
RJ45_MIDI2-<br />
LAN_MIDI3+<br />
LAN_MIDI3-<br />
RJ45_GND<br />
40mil<br />
+3V_LAN<br />
+3V_LAN<br />
LAN_ACTIVITY#<br />
LAN_LINK#<br />
3<br />
1<br />
2<br />
2 1<br />
R823<br />
1K_0402_5%<br />
1 2<br />
C938<br />
220P_0402_50V7K<br />
LAN_LINK#<br />
2 1<br />
R824<br />
1K_0402_5%<br />
2<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
1 2<br />
2 2 2<br />
C942<br />
220P_0402_50V7K<br />
R821<br />
R822<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
75_0402_1%<br />
75_0402_1%<br />
RJ45_GND<br />
1<br />
2<br />
1<br />
2<br />
D40<br />
PJDLC05C_SOT23-3<br />
@<br />
www.mycomp.su<br />
11<br />
Yellow LED+<br />
RJ45_MIDI3-<br />
RJ45_MIDI3+<br />
8<br />
7<br />
PR4-<br />
PR4+<br />
RJ45_MIDI1-<br />
RJ45_MIDI2-<br />
RJ45_MIDI2+<br />
RJ45_MIDI1+<br />
6<br />
5<br />
4<br />
3<br />
PR2-<br />
PR3-<br />
PR3+<br />
PR2+<br />
RJ45_MIDI0- 2<br />
PR1-<br />
RJ45_MIDI0+<br />
SHLD2<br />
13<br />
1<br />
PR1+<br />
SHLD1<br />
14<br />
10<br />
Green LED-<br />
9<br />
Green LED+<br />
SANTA_130451-K<br />
CONN@<br />
40mil<br />
1 2<br />
LANGND<br />
1<br />
1<br />
C940<br />
1000P_1206_2KV7K<br />
C941<br />
C939<br />
4.7U_0603_6.3V6K<br />
2<br />
2<br />
0.1U_0402_16V4Z<br />
LAN_ACTIVITY# 1 C943<br />
2<br />
220P_0402_50V7K<br />
LAN_LINK#<br />
1 2<br />
C944<br />
220P_0402_50V7K<br />
C<br />
B<br />
A<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
B<br />
D<br />
401827<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 33 of<br />
55<br />
3<br />
2<br />
1
A<br />
B<br />
C<br />
D<br />
E<br />
1 1<br />
Mini-Express Card for WLAN<br />
+3VS<br />
+1.5VS<br />
1<br />
C705<br />
1<br />
C706<br />
1<br />
C707<br />
1<br />
C708<br />
1<br />
C709<br />
1<br />
C710<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
2<br />
2<br />
0.1U_0402_16V4Z<br />
2<br />
4.7U_0805_10V4Z<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
2<br />
2<br />
2<br />
SB_PCIE_WAKE#<br />
SB_PCIE_WAKE#<br />
MINI1_CLKREQ#<br />
CLK_PCIE_MINI1#<br />
CLK_PCIE_MINI1<br />
JMINI1<br />
R440 1 @ 2<br />
0_0402_5% 1<br />
1<br />
3<br />
3<br />
5<br />
5<br />
7<br />
7<br />
9<br />
9<br />
11<br />
11<br />
13<br />
13<br />
15<br />
15<br />
2<br />
2<br />
4<br />
4<br />
6<br />
6<br />
8<br />
8<br />
10<br />
10<br />
12<br />
12<br />
14<br />
14<br />
16<br />
16<br />
17<br />
17 18<br />
18<br />
19<br />
WL_OFF#<br />
19 20<br />
20<br />
WL_OFF# <br />
+3V 330 250 250 (wake enable)<br />
21<br />
PLT_RST#<br />
21 22<br />
22<br />
PLT_RST# <br />
+3V_WLAN<br />
2 PCIE_PTX_C_IRX_N1<br />
23<br />
23 24<br />
24<br />
1 2<br />
+3VS<br />
+1.5VS 500 375 5 (Not wake enable)<br />
2<br />
PCIE_PTX_C_IRX_P1<br />
25<br />
25 26<br />
26<br />
R441 1 2<br />
0_0603_5%<br />
+3VALW<br />
27<br />
27 28<br />
28<br />
R442<br />
@<br />
0_0603_5%<br />
29<br />
MINI1_SMBCLK<br />
29 30<br />
30<br />
1 @ 2<br />
SB_SMDAT0 <br />
PCIE_ITX_C_PRX_N1<br />
31<br />
MINI1_SMBDAT<br />
31 32<br />
32<br />
R443 1 @<br />
0_0603_5% 2<br />
SB_SMCLK0 <br />
PCIE_ITX_C_PRX_P1<br />
33<br />
33 34<br />
34<br />
R444<br />
0_0603_5%<br />
35<br />
35 36<br />
36<br />
USB20_N8 <br />
37<br />
37 38<br />
38<br />
USB20_P8 <br />
+3VS<br />
39<br />
39 40<br />
40<br />
41<br />
WIMAX_LED#<br />
41 42<br />
42<br />
43<br />
WLAN_LED#_L<br />
43 44<br />
44<br />
45<br />
0_0402_5%<br />
45 46<br />
46<br />
47<br />
(9~16mA)<br />
R445<br />
E51TXD_P80DATA_R<br />
47 48<br />
48<br />
+3VS<br />
E51TXD_P80DATA<br />
1 2<br />
49<br />
E51RXD_P80CLK<br />
49 50<br />
50<br />
E51RXD_P80CLK<br />
51<br />
51 52<br />
52<br />
G1<br />
G2<br />
G3<br />
G3<br />
53<br />
54<br />
55<br />
56<br />
ACES_88910-5204<br />
CONN@<br />
<br />
Height : 4mm<br />
3 3<br />
WIMAX_LED#<br />
WLAN_LED#_L<br />
+3VS<br />
+1.5VS<br />
R530 2<br />
1<br />
0_0402_5%<br />
D47<br />
@<br />
2<br />
1<br />
3<br />
CHP202UPT_SOT323-3<br />
R531 2 1<br />
0_0402_5%<br />
www.mycomp.su<br />
Power<br />
+3VS<br />
1<br />
2<br />
R537<br />
100K_0402_5%<br />
Mini Card Power Rating<br />
Primary Power (mA) Auxiliary Power (mA)<br />
Peak Normal<br />
Normal<br />
1000 750<br />
MINI1_LED# <br />
4 4<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 34 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
+3VALW<br />
+USB_VCCA<br />
+USB_VCCA<br />
+5VALW<br />
+USB_VCCA<br />
SVPE, 4.4m, 17mohm<br />
+ C711<br />
1<br />
U24<br />
80mil<br />
R446<br />
C712<br />
1<br />
100K_0402_5%<br />
220U_6.3V_M<br />
GND VOUT<br />
8<br />
2<br />
2<br />
VIN VOUT<br />
7<br />
3<br />
470P_0402_50V7K<br />
VIN VOUT<br />
6<br />
1<br />
4<br />
R447<br />
10K_0402_5%<br />
USB_OC#0 <br />
C713<br />
EN FLG 5<br />
1 2<br />
1 1<br />
RT9715BGS_SO8<br />
1 2<br />
4.7U_0805_10V4Z<br />
1<br />
R448<br />
@<br />
0_0402_5%<br />
2<br />
C714<br />
0.1U_0402_16V4Z<br />
L83<br />
JUSB1<br />
2<br />
USB20_N0<br />
SYSON#<br />
USB20_N0<br />
1<br />
1<br />
2<br />
2<br />
1<br />
USB20_N0_R<br />
1<br />
2<br />
USB20_P0_R<br />
2<br />
3<br />
+3VALW<br />
USB20_P0<br />
3<br />
USB20_P0<br />
4<br />
4<br />
3<br />
3<br />
4<br />
4 <br />
5<br />
WCM2012F2SF-900T04_0805<br />
GND<br />
+5VALW<br />
6<br />
+USB_VCCB<br />
R449<br />
GND<br />
7<br />
U25<br />
80mil<br />
0_0402_5%<br />
GND<br />
8<br />
1<br />
GND VOUT<br />
8<br />
R450<br />
GND<br />
1 2<br />
USB_OC#2 <br />
1 2<br />
2<br />
VIN VOUT<br />
7<br />
100K_0402_5%<br />
R451<br />
@<br />
0_0402_5%<br />
SUYIN_020133MB004S580ZL-C<br />
3<br />
VIN VOUT<br />
6<br />
CONN@<br />
1<br />
4<br />
EN FLG 5<br />
1 2<br />
USB_OC#1 <br />
C715<br />
R452<br />
RT9715BGS_SO8<br />
10K_0402_5% 1<br />
4.7U_0805_10V4Z<br />
C716<br />
D10<br />
2<br />
0.1U_0402_16V4Z<br />
6<br />
CH3 CH2<br />
3 USB20_P0_R<br />
2<br />
SYSON#<br />
+USB_VCCA<br />
5<br />
Vp<br />
Vn<br />
2<br />
2 CM1293-04SO_SOT23-6<br />
2<br />
To USB/B Connector<br />
(Port 1,2)<br />
+USB_VCCB<br />
To CardReader/B Connector<br />
JUSB2<br />
JCR1<br />
+3VS<br />
C717<br />
1<br />
1<br />
GND 10<br />
4.7U_0805_10V4Z<br />
2<br />
2<br />
GND 9<br />
3<br />
3<br />
8<br />
8<br />
1 2<br />
4<br />
4<br />
7<br />
7<br />
5<br />
5<br />
USB20_N1<br />
6<br />
6<br />
5IN1_LED# <br />
Bluetooth Conn.<br />
6<br />
6<br />
USB20_N1 <br />
USB20_P1<br />
5<br />
5<br />
7<br />
7<br />
USB20_P1 <br />
4<br />
4<br />
USB20_N6<br />
8<br />
8<br />
USB20_N6 <br />
USB20_N2<br />
3<br />
3<br />
USB20_P6<br />
9<br />
9<br />
USB20_P2<br />
USB20_N2 <br />
2<br />
2<br />
USB20_P6 <br />
10<br />
10<br />
USB20_P2 <br />
1<br />
1<br />
13<br />
GND 11<br />
11<br />
14<br />
+3VALW<br />
+3VS<br />
GND 12<br />
12<br />
ACES_85201-08051<br />
CONN@<br />
ACES_85201-1205N<br />
CONN@<br />
<br />
1<br />
BT@<br />
C718<br />
C719<br />
<br />
BT@<br />
0.1U_0402_16V4Z<br />
BT@<br />
1U_0402_6.3V4Z<br />
Q24 2<br />
BT_ON#<br />
1 BT@ 2<br />
R453<br />
10K_0402_5%<br />
2<br />
3 3<br />
AO3413_SOT23-3<br />
C720<br />
W=40mils<br />
To 3G Module Connect<br />
BT@<br />
0.1U_0402_16V4Z<br />
+BT_VCC<br />
+3VS_WWAN<br />
1<br />
C721<br />
BT@<br />
C722<br />
BT@<br />
BT@<br />
R454<br />
+3VS_WWAN<br />
+BT_VCC<br />
4.7U_0805_10V4Z<br />
(Port 9)<br />
R457<br />
2<br />
0.1U_0402_16V4Z<br />
300_0603_5%<br />
JP4<br />
100K_0402_5%<br />
+3VS<br />
+3VS_WWAN<br />
JBT1<br />
1<br />
1<br />
Peak: 2.75A<br />
10<br />
GND 8<br />
8<br />
BT@<br />
2<br />
2<br />
WWAN_OFF#<br />
3G@<br />
Normal: 1.1A<br />
7<br />
7<br />
D<br />
3<br />
3<br />
WWAN_OFF# <br />
1 2<br />
USB20_P14 <br />
WWAN_LED# <br />
R455<br />
0_1206_5%<br />
6<br />
6<br />
Q25<br />
4<br />
4<br />
5<br />
5<br />
USB20_N14 <br />
2<br />
G<br />
2N7002_SOT23<br />
5<br />
5<br />
4<br />
4<br />
USB20_N9 <br />
S<br />
6<br />
6<br />
3<br />
3<br />
7<br />
7<br />
USB20_P9 <br />
1<br />
2<br />
2<br />
8<br />
8<br />
9<br />
+ C723<br />
GND 1<br />
1<br />
9<br />
9<br />
USB20_N7 <br />
change to SGA00002N80<br />
150U_B_6.3VM_R40M<br />
10<br />
10<br />
ACES_87213-0800G<br />
USB20_P7 <br />
3G@<br />
GND 11<br />
CONN@<br />
2<br />
GND 12<br />
ACES_87036-1001-CP<br />
Close to WWAN CONN<br />
<br />
CONN@<br />
<br />
1 2<br />
1<br />
2<br />
1<br />
2<br />
www.mycomp.su<br />
USB20_N0_R<br />
4<br />
CH4<br />
1<br />
2<br />
CH1<br />
G<br />
1<br />
1 3<br />
S<br />
D<br />
W=80mils<br />
1<br />
2<br />
1<br />
3<br />
4 4<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 35 of<br />
55<br />
C<br />
D<br />
E
D<br />
C<br />
B<br />
A<br />
OSC 1<br />
NC<br />
2<br />
5<br />
5<br />
OSC 4<br />
NC<br />
3<br />
EC Version control<br />
4<br />
4<br />
High : D3<br />
Low : E0<br />
ECAGND<br />
3<br />
<strong>Compal</strong> Secret Data<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
B<br />
D<br />
401827<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 36 of<br />
55<br />
3<br />
2<br />
1<br />
2<br />
For EC Tools<br />
+3VALW<br />
L84<br />
0.1U_0402_16V4Z<br />
0.1U_0402_16V4Z<br />
1 2+EC_VCCA<br />
+3VALW<br />
Place on MiniCard door<br />
1 1<br />
C725 1 1 2<br />
2<br />
BLM18AG601SN1D_2P<br />
JP7<br />
C724<br />
1<br />
C726<br />
C728<br />
1<br />
1<br />
C727<br />
C729<br />
E51RXD_P80CLK<br />
E51RXD_P80CLK <br />
1000P_0402_50V7K<br />
C730<br />
2<br />
2<br />
1000P_0402_50V7K<br />
E51TXD_P80DATA<br />
KSO[0..17]<br />
2 2<br />
1<br />
3<br />
3<br />
2<br />
2<br />
1<br />
E51TXD_P80DATA <br />
KSO[0..17] <br />
0.1U_0402_16V4Z<br />
2<br />
0.1U_0402_16V4Z<br />
4<br />
4<br />
0.1U_0402_16V4Z<br />
KSI[0..7]<br />
ACES_85205-0400<br />
KSI[0..7] <br />
@<br />
D<br />
+3VALW<br />
U26<br />
65W/90W# 2 1<br />
VGA_DBCLK<br />
R458<br />
100K_0402_5%<br />
VR_ON<br />
EC must program to 500KHZ output<br />
2 1<br />
R459<br />
100K_0402_5%<br />
Start and stop follow SUP high/Low<br />
3S/4S#<br />
1 2<br />
EC_GA20<br />
EC_GA20<br />
1<br />
R460<br />
4.7K_0402_5%<br />
EC_KBRST#<br />
GA20/GPIO00<br />
INVT_PWM/PWM1/GPIO0F 21<br />
VGA_DBCLK <br />
BEEP#<br />
EC_KBRST#<br />
2<br />
SERIRQ<br />
KBRST#/GPIO01<br />
BEEP#/PWM2/GPIO10<br />
23<br />
BEEP# <br />
SERIRQ<br />
3<br />
LPC_FRAME#<br />
SERIRQ#<br />
FANPWM1/GPIO12<br />
26<br />
ACOFF<br />
LPC_FRAME#<br />
4<br />
LPC_AD3<br />
LFRAME#<br />
ACOFF/FANPWM2/GPIO13<br />
27<br />
ACOFF <br />
C732<br />
ECAGND<br />
LPC_AD3<br />
5<br />
2 1<br />
@22P_0402_50V8J<br />
@<br />
LPC_AD2<br />
LAD3<br />
LPC_AD2<br />
7<br />
C731<br />
0.01U_0402_16V7K<br />
LPC_AD1<br />
LAD2<br />
PWM Output<br />
2 1<br />
2 1<br />
BATT_TEMP<br />
LPC_AD1<br />
8<br />
BATT_TEMP <br />
R461<br />
33_0402_5%<br />
LPC_AD0<br />
LAD1<br />
BATT_TEMP/AD0/GPIO38<br />
63<br />
BATT_OVP<br />
LPC_AD0<br />
10<br />
LAD0<br />
LPC & MISC<br />
BATT_OVP/AD1/GPIO39<br />
64<br />
BATT_OVP <br />
ADP_I<br />
LPC_CLK0_EC<br />
ADP_I/AD2/GPIO3A ADP_I <br />
AD_BID0<br />
LPC_CLK0_EC<br />
AD Input<br />
65<br />
12<br />
A_RST#<br />
PCICLK<br />
AD3/GPIO3B 66<br />
Analog Project ID definition<br />
AD_PID0<br />
A_RST#<br />
13<br />
PCIRST#/GPIO05<br />
AD4/GPIO42<br />
75<br />
37<br />
+3VALW<br />
EC_SCI#<br />
ECRST#<br />
SELIO2#/AD5/GPIO43<br />
76<br />
EC_SCI#<br />
20<br />
SCI#/GPIO0E<br />
+3VALW 2 1<br />
38<br />
R462<br />
47K_0402_5%<br />
@R428<br />
1 10K_0402_5%<br />
2<br />
CLKRUN#/GPIO1D<br />
DAC_BRIG<br />
DAC_BRIG/DA0/GPIO3C 68<br />
DAC_BRIG <br />
2 1<br />
EN_DFAN1<br />
EN_DFAN1/DA1/GPIO3D EN_DFAN1 <br />
Ra<br />
For PEW56 PID<br />
DA Output<br />
70<br />
R463<br />
C733<br />
0.1U_0402_16V4Z<br />
IREF<br />
IREF <br />
KSI0<br />
IREF/DA2/GPIO3E 71<br />
55<br />
CALIBRATE#<br />
56@<br />
R464<br />
CALIBRATE# <br />
+5VS<br />
KSI1<br />
KSI0/GPIO30<br />
DA3/GPIO3F<br />
72<br />
PEW@<br />
100K_0402_5%<br />
56<br />
KSI2<br />
KSI1/GPIO31<br />
57<br />
AD_PID0<br />
KSI3<br />
KSI2/GPIO32<br />
58<br />
EC_MUTE#<br />
18K_0402_5%<br />
EC_MUTE# <br />
TP_CLK<br />
KSI4<br />
KSI3/GPIO33<br />
PSCLK1/GPIO4A 83<br />
1 2<br />
59<br />
C<br />
KSI5<br />
KSI4/GPIO34<br />
PSDAT1/GPIO4B 84<br />
60<br />
WWAN_LED#<br />
WWAN_LED# <br />
Rb<br />
R464<br />
TP_DATA<br />
KSI6<br />
KSI5/GPIO35<br />
PSCLK2/GPIO4C<br />
1 2<br />
PS2 Interface<br />
85<br />
1<br />
R465<br />
4.7K_0402_5%<br />
C734<br />
61<br />
3G_LED#<br />
3G_LED# <br />
For NEW76/86/96 PID<br />
R466<br />
4.7K_0402_5%<br />
KSI7<br />
KSI6/GPIO36<br />
PSDAT2/GPIO4D 86<br />
62<br />
TP_CLK<br />
768696@<br />
8.2K_0402_5%<br />
TP_CLK <br />
KSO0<br />
KSI7/GPIO37<br />
TP_CLK/PSCLK3/GPIO4E 87<br />
0.1U_0402_16V4Z<br />
39<br />
TP_DATA<br />
TP_DATA For PEW76/86/96 PID<br />
NEW@<br />
R464<br />
100K_0402_5%<br />
KSO1<br />
KSO0/GPIO20<br />
TP_DATA/PSDAT3/GPIO4F 88<br />
2<br />
40<br />
KSO2<br />
KSO1/GPIO21<br />
41<br />
KSO3<br />
KSO2/GPIO22<br />
42<br />
3S/4S#<br />
3S/4S# <br />
+3VALW<br />
KSO4<br />
KSO3/GPIO23<br />
SDICS#/GPXOA00<br />
97<br />
1 2<br />
43<br />
65W/90W#<br />
65W/90W# <br />
KSO5<br />
KSO4/GPIO24<br />
SDICLK/GPXOA01<br />
98<br />
R541<br />
2.2K_0402_5%<br />
44<br />
VLDT_EN<br />
VLDT_EN <br />
+3VS<br />
1 @ 2 EC_SMB_CK2<br />
KSO6<br />
KSO5/GPIO25<br />
Int. K/B<br />
SDIDO/GPXOA02<br />
99<br />
45<br />
LID_SW#<br />
LID_SW# <br />
Analog Board ID definition<br />
R467<br />
2.2K_0402_5%<br />
KSO7<br />
KSO6/GPIO26<br />
Matrix<br />
SDIDI/GPXID0<br />
109<br />
46<br />
1 @ 2 EC_SMB_DA2<br />
KSO8<br />
KSO7/GPIO27<br />
SPI Device Interface<br />
47<br />
+3VALW<br />
R468<br />
2.2K_0402_5%<br />
KSO9<br />
KSO8/GPIO28<br />
48<br />
EC_SI_SPI_SO <br />
+3VALW<br />
KSO10<br />
KSO9/GPIO29<br />
SPIDI/RD#<br />
119<br />
1 2<br />
49<br />
EC_SO_SPI_SI <br />
R542<br />
2.2K_0402_5%<br />
KSO11<br />
KSO10/GPIO2A<br />
SPIDO/WR#<br />
120<br />
50<br />
EC_SPICLK_L<br />
For Capilano VGA identify<br />
KSO12<br />
KSO11/GPIO2B<br />
SPI Flash <strong>ROM</strong> SPICLK/GPIO58<br />
126<br />
51<br />
EC_SPICS#/FSEL# <br />
KSO13<br />
KSO12/GPIO2C<br />
SPICS#<br />
128<br />
R469<br />
52<br />
Ra<br />
CAP@<br />
R470<br />
KSO14<br />
KSO13/GPIO2D<br />
53<br />
100K_0402_5%<br />
KSO15<br />
KSO14/GPIO2E<br />
54<br />
WWAN_OFF#<br />
+3VALW<br />
WWAN_OFF# <br />
KSO16<br />
KSO15/GPIO2F<br />
CIR_RX/GPIO40<br />
73<br />
81<br />
AD_BID0<br />
18K_0402_5%<br />
KSO17<br />
KSO16/GPIO48<br />
CIR_RLC_TX/GPIO41<br />
74<br />
82<br />
FSTCHG <br />
1 2 EC_SMB_CK1<br />
KSO17/GPIO49<br />
FSTCHG/SELIO#/GPIO50<br />
89<br />
BATT_BLUE_LED#<br />
BATT_BLUE_LED# <br />
R471<br />
2.2K_0402_5%<br />
BATT_CHGI_LED#/GPIO52<br />
90<br />
INT_VGAPWR_ON<br />
Delay EC_PWROK 50ms<br />
1<br />
R470<br />
C735<br />
EC_SMB_DA1<br />
EC_SMB_CK1<br />
CAPS_LED#/GPIO53<br />
91<br />
BATT_AMB_LED#<br />
INT_VGAPWR_ON <br />
1 2<br />
for VGA criterial<br />
Rb<br />
EC_SMB_CK1<br />
77<br />
R472<br />
2.2K_0402_5%<br />
EC_SMB_DA1<br />
SCL1/GPIO44<br />
GPIO BATT_LOW_LED#/GPIO54<br />
92<br />
PWR_LED<br />
BATT_AMB_LED# <br />
EC_SMB_DA1<br />
78<br />
PWR_LED <br />
8.2K_0402_5%<br />
0.1U_0402_16V4Z<br />
KSO1<br />
EC_SMB_CK2<br />
SDA1/GPIO45<br />
SUSP_LED#/GPIO55<br />
93<br />
SYSON<br />
2<br />
1 2<br />
EC_SMB_CK2<br />
79<br />
SM Bus<br />
SYSON <br />
R473<br />
47K_0402_5%<br />
EC_SMB_DA2<br />
SCL2/GPIO46<br />
SYSON/GPIO56<br />
95<br />
VR_ON<br />
EC_SMB_DA2<br />
80<br />
VR_ON <br />
KSO2<br />
SDA2/GPIO47<br />
VR_ON/XCLK32K/GPIO57<br />
121<br />
1 2<br />
ACIN<br />
AC_IN/GPIO59<br />
127<br />
R474<br />
47K_0402_5%<br />
ACIN <br />
B<br />
2 1<br />
LID_SW#<br />
R475<br />
100K_0402_5%<br />
PM_SLP_S3#<br />
EC_RSMRST#<br />
PM_SLP_S3#<br />
6<br />
EC_PME#<br />
PM_SLP_S5#<br />
PM_SLP_S3#/GPIO04<br />
EC_RSMRST#/GPXO03<br />
100<br />
EC_LID_OUT#<br />
EC_RSMRST# <br />
EC_SPICLK <br />
1 @ 2<br />
PM_SLP_S5#<br />
14<br />
EC_LID_OUT# <br />
EC_SMI#<br />
PM_SLP_S5#/GPIO07<br />
EC_LID_OUT#/GPXO04<br />
101<br />
R476<br />
10K_0402_5%<br />
EC_ON<br />
EC_SPICLK_L<br />
@<br />
EC_SMI#<br />
15<br />
EC_ON <br />
ENBKL<br />
EC_SMI#/GPIO08<br />
EC_ON/GPXO05<br />
102<br />
1 2<br />
2 1<br />
16<br />
EC_SWI#<br />
C783<br />
33P_0402_50V8K<br />
EC_SWI# <br />
MINI1_LED#<br />
LID_SW#/GPIO0A<br />
EC_SWI#/GPXO06<br />
103<br />
R419<br />
0_0402_5%<br />
R488<br />
100K_0402_5%<br />
EC_PWROK<br />
MINI1_LED#<br />
17<br />
2 1 LOCAL_DIM<br />
LOCAL_DIM<br />
SUSP#/GPIO0B<br />
ICH_PWROK/GPXO06<br />
104<br />
BKOFF#<br />
LOCAL_DIM<br />
18<br />
GPO<br />
BKOFF# <br />
Reserve for EMI, close to EC<br />
R526<br />
100K_0402_5%<br />
COLOR_ENG_EN<br />
PBTN_OUT#/GPIO0C<br />
BKOFF#/GPXO08<br />
105<br />
WL_OFF#<br />
COLOR_ENG_EN<br />
19<br />
GPIO<br />
WL_OFF# <br />
COLOR_ENG_EN<br />
EC_INVT_PWM<br />
EC_PME#/GPIO0D<br />
WL_OFF#/GPXO09<br />
106<br />
2 1<br />
KB926_ID<br />
EC_INVT_PWM<br />
25<br />
FAN_SPEED1<br />
EC_THERM#/GPIO11<br />
GPXO10<br />
107<br />
R527<br />
100K_0402_5%<br />
FAN_SPEED1<br />
28<br />
VGA_ON Delay SUSP# 10ms<br />
BT_ON#<br />
FAN_SPEED1/FANFB1/GPIO14<br />
GPXO11<br />
108<br />
BT_ON#<br />
29<br />
For Low PWR panel use<br />
E51TXD_P80DATA<br />
FANFB2/GPIO15<br />
30<br />
E51RXD_P80CLK<br />
EC_TX/GPIO16<br />
31<br />
VGATE<br />
VGATE <br />
ON/OFF<br />
EC_RX/GPIO17<br />
PM_SLP_S4#/GPXID1<br />
110<br />
ENBKL<br />
ON/OFF<br />
32<br />
ENBKL <br />
PWR_SUSP_LED<br />
PWR_SUSP_LED<br />
ON_OFF/GPIO18<br />
ENBKL/GPXID2<br />
112<br />
34<br />
EAPD<br />
EAPD <br />
WLAN_LED#<br />
PWR_LED#/GPIO19<br />
GPXID3<br />
114<br />
EC_THERM#<br />
EC_PWROK<br />
WLAN_LED#<br />
36<br />
NUMLED#/GPIO1A<br />
GPI<br />
GPXID4<br />
115<br />
EC_THERM# <br />
1 2<br />
SB_PWRGD <br />
SUSP#<br />
R254<br />
0_0402_5%<br />
GPXID5<br />
116<br />
SUSP# <br />
PBTN_OUT#<br />
GPXID6<br />
117<br />
EC_PME#<br />
PBTN_OUT# <br />
EC_CRY1<br />
GPXID7<br />
118<br />
EC_PME# <br />
122<br />
EC_CRY2<br />
XCLK1<br />
123<br />
XCLK0<br />
V18R 124<br />
1<br />
C736<br />
EC_CRY1 EC_CRY2<br />
C737<br />
100P_0402_50V8J<br />
4.7U_0805_10V4Z<br />
BATT_TEMP 2 1<br />
2<br />
2<br />
2<br />
KB926QFD3_LQFP128_14X14<br />
C738<br />
100P_0402_50V8J<br />
C739<br />
C740<br />
20mil<br />
BATT_OVP 2 1<br />
C741<br />
100P_0402_50V8J<br />
A<br />
15P_0402_50V8J X1<br />
15P_0402_50V8J<br />
ECAGND 2<br />
L85 1<br />
ACIN<br />
2 1<br />
1 1<br />
+3VALW<br />
BLM18AG601SN1D_2P KB926 Rev:D3(SA00001J580)<br />
2 1<br />
KB926 Rev:E0(SA00001J5A0)<br />
R529<br />
100K_0402_5%<br />
32.768KHZ_12.5PF_Q13MC14610002<br />
1 2<br />
KB926_ID<br />
R528<br />
@<br />
100K_0402_5%<br />
Security Classification<br />
Issued Date<br />
Title<br />
VCC 9<br />
VCC 22<br />
VCC 33<br />
VCC 96<br />
VCC 111<br />
VCC 125<br />
GND<br />
GND<br />
GND<br />
GND<br />
GND<br />
11<br />
24<br />
35<br />
94<br />
113<br />
AVCC 67<br />
www.mycomp.su<br />
AGND<br />
69<br />
1 2<br />
1 2<br />
1 2<br />
1<br />
2<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
1<br />
2 1
+5VS<br />
+5VS<br />
+3VALW 1 2<br />
R479<br />
0_0603_5%<br />
EC_SPICS#/FSEL#<br />
EC_SPICS#/FSEL#<br />
R480 1 2<br />
4.7K_0402_5% SPI_WP#<br />
+3VALW<br />
R482 1 2<br />
4.7K_0402_5% SPI_HOLD#<br />
C742 1 2<br />
0.1U_0402_16V4Z<br />
+SPI_VCC<br />
U27<br />
1<br />
CS# VCC 8<br />
3<br />
WP# SCLK 6<br />
7<br />
HOLD# SI<br />
5<br />
4<br />
GND<br />
SO 2<br />
MX25L1605DM2I-12G SOP 8P<br />
SA00002TO00<br />
EC_SPICLK_R<br />
EC_SO_SPI_SI_R<br />
EC_SI_SPI_SO_R<br />
R481 1 2<br />
0_0402_5%<br />
R483 1 2<br />
0_0402_5%<br />
R484 1 2<br />
0_0402_5%<br />
EC_SPICLK <br />
EC_SO_SPI_SI <br />
EC_SI_SPI_SO <br />
LEFT_BTN#<br />
JTP1<br />
1<br />
1<br />
2<br />
2<br />
3<br />
3<br />
4<br />
4<br />
5<br />
5<br />
6<br />
6<br />
7<br />
GND<br />
8<br />
GND<br />
ACES_85201-0605N<br />
CONN@<br />
SW1<br />
SMT1-05-A_4P<br />
3<br />
1<br />
LEFT_BTN#<br />
RIGHT_BTN#<br />
RIGHT_BTN#<br />
SW2<br />
SMT1-05-A_4P<br />
3<br />
1<br />
TP_CLK <br />
TP_DATA <br />
C745<br />
0.1U_0402_16V4Z<br />
RIGHT_BTN#<br />
LEFT_BTN#<br />
D11<br />
3<br />
2<br />
TP_CLK<br />
TP_DATA<br />
3<br />
2<br />
D13<br />
4<br />
2<br />
4<br />
2<br />
(Left)<br />
(Right)<br />
KSO0<br />
KSO1<br />
KSO2<br />
KSO3<br />
KSO4<br />
KSO5<br />
KSO6<br />
KSO7<br />
KSO8<br />
KSO9<br />
KSO10<br />
KSO11<br />
KSO12<br />
KSO13<br />
KSO14<br />
KSO15<br />
KSO16<br />
KSO17<br />
KSI0<br />
KSI1<br />
KSI2<br />
KSI3<br />
KSI4<br />
KSI5<br />
KSI6<br />
KSI7<br />
KSO15<br />
KSO14<br />
KSO13<br />
KSO12<br />
KSI0<br />
KSO11<br />
JKB1<br />
26<br />
KSO0 G2<br />
28<br />
25<br />
KSO1 G1<br />
27<br />
24<br />
KSO2<br />
23<br />
KSO3<br />
22<br />
KSO4<br />
21<br />
KSO5<br />
20<br />
KSO6<br />
19<br />
KSO7<br />
18<br />
KSO8<br />
17<br />
KSO9<br />
16<br />
KSO10<br />
15<br />
KSO11<br />
14<br />
KSO12<br />
13<br />
KSO13<br />
12<br />
KSO14<br />
11<br />
KSO15<br />
10<br />
KSO16<br />
9<br />
KSO17<br />
8<br />
KSI0<br />
7<br />
KSI1<br />
6<br />
KSI2<br />
5<br />
KSI3<br />
4<br />
KSI4<br />
3<br />
KSI5<br />
2<br />
KSI6<br />
1<br />
KSI7<br />
ACES_88747-2601<br />
CONN@<br />
C749 1 2<br />
100P_0402_50V8J<br />
C751 1 2<br />
100P_0402_50V8J<br />
C753 1 2<br />
100P_0402_50V8J<br />
C755 1 2<br />
100P_0402_50V8J<br />
C757 1 2<br />
100P_0402_50V8J<br />
C759 1 2<br />
100P_0402_50V8J<br />
EC_SPICS#/FSEL#<br />
SPI_WP#<br />
SPI_HOLD#<br />
KSI[0..7]<br />
KSO[0..17]<br />
KSO16<br />
C747 1 2<br />
KSO17<br />
C748 1 2<br />
KSO7<br />
C750 1 2<br />
KSO6<br />
C752 1 2<br />
KSO5<br />
C754 1 2<br />
KSO4<br />
C756 1 2<br />
KSO3<br />
KSI4<br />
C758 1 2<br />
C760 1 2<br />
U28<br />
@<br />
1<br />
CE#<br />
3<br />
WP# SCK 6<br />
7<br />
HOLD# SI<br />
5<br />
4<br />
VSS<br />
SO 2<br />
MX25L1005AMC-12G_SOP8<br />
KSI[0..7] <br />
KSO[0..17] <br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
+SPI_VCC<br />
EC_SPICLK_R<br />
EC_SO_SPI_SI_R<br />
EC_SI_SPI_SO_R<br />
0_0402_5%<br />
33P_0402_50V8K<br />
1 2<br />
@<br />
R485<br />
@<br />
C746<br />
ACIN<br />
PWR_LED<br />
1 2<br />
R487<br />
100K_0402_5%<br />
2<br />
G<br />
2<br />
1<br />
3<br />
6<br />
1<br />
D<br />
ACIN_LED#<br />
Q71<br />
S<br />
2N7002_SOT23<br />
PWR_LED#<br />
DMN66D0LDW-7_SOT363-6<br />
Q26A<br />
PWR_SUSP_LED#<br />
JLED2<br />
1<br />
1<br />
2<br />
2<br />
3<br />
3<br />
4<br />
4<br />
5<br />
5<br />
6<br />
6<br />
7<br />
7<br />
8<br />
8<br />
9<br />
9<br />
10<br />
10<br />
GND 11<br />
GND 12<br />
+3VS<br />
Left side<br />
ACES_85201-1005N<br />
CONN@<br />
+3VALW<br />
LID_SW#<br />
ACIN_LED#<br />
3G_LED#<br />
WLAN_LED#<br />
MEDIA_LED#<br />
PWR_LED#<br />
ON/OFFBTN#<br />
www.mycomp.su<br />
5<br />
6<br />
+3VALW<br />
LID_SW# <br />
+3VS<br />
3G_LED# <br />
WLAN_LED# <br />
ON/OFFBTN# <br />
MEDIA_LED#<br />
+3VS<br />
JLED1<br />
1<br />
1<br />
2<br />
2<br />
3<br />
3<br />
4<br />
4<br />
5<br />
5<br />
6<br />
6<br />
7<br />
7<br />
8<br />
8<br />
9<br />
9<br />
10<br />
10<br />
GND 11<br />
GND 12<br />
PWR_SUSP_LED#<br />
Right side<br />
ACES_85201-1005N<br />
CONN@<br />
+3VS<br />
1 2<br />
LID_SW#<br />
ACIN_LED#<br />
3G_LED#<br />
WLAN_LED#<br />
MEDIA_LED#<br />
PWR_LED#<br />
ON/OFFBTN#<br />
R486<br />
100K_0402_5%<br />
1 7585@ 2 2 1 PWR_LED#<br />
R477<br />
2.2K_0402_5%<br />
B<br />
Change to SC591NB5A30 for BC bin<br />
1 7585@ 2 2 1<br />
R478<br />
3.9K_0402_5%<br />
A<br />
4<br />
5<br />
6<br />
Y<br />
LED1<br />
HT-191NB5_BLUE<br />
LED2<br />
HT-191UD5_AMBER<br />
5<br />
P<br />
G<br />
3<br />
U29<br />
B 2<br />
A 1<br />
1<br />
NC7SZ08P5X_NL_SC70-5<br />
PJDLC05C_SOT23-3<br />
1<br />
5IN1_LED# <br />
SATA_LED# <br />
+3VALW<br />
+3VS<br />
PJDLC05C_SOT23-3<br />
NEW95 LED Option<br />
2 95@<br />
1<br />
R477<br />
680_0402_5%<br />
2 95@<br />
1<br />
R478<br />
680_0402_5%<br />
2 95@<br />
1<br />
R499<br />
680_0402_5%<br />
2 95@<br />
1<br />
R498<br />
680_0402_5%<br />
VDD 8 R499 2.2K_0402_5%<br />
KSO10<br />
KSI1<br />
KSI2<br />
KSO9<br />
KSI3<br />
KSO8<br />
C761 1 2<br />
C763 1 2<br />
C765 1 2<br />
C767 1 2<br />
C769 1 2<br />
C771 1 2<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
KSO2<br />
KSO1<br />
KSO0<br />
KSI5<br />
KSI6<br />
KSI7<br />
C762 1 2<br />
C764 1 2<br />
C766 1 2<br />
C768 1 2<br />
C770 1 2<br />
C772 1 2<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
100P_0402_50V8J<br />
PWR_SUSP_LED<br />
1 2<br />
R490<br />
100K_0402_5%<br />
5<br />
3<br />
4<br />
DMN66D0LDW-7_SOT363-6<br />
Q26B<br />
+3VALW<br />
+3VALW<br />
LED3<br />
HT-191NB5_BLUE<br />
1 7585@ 2 2 1 BATT_BLUE_LED#<br />
BATT_BLUE_LED# <br />
R499 2.2K_0402_5%<br />
B<br />
Change to SC591NB5A30 for BC bin<br />
LED4<br />
HT-191UD5_AMBER<br />
1 7585@ 2 2 1<br />
R498<br />
3.9K_0402_5%<br />
A<br />
BATT_AMB_LED#<br />
BATT_AMB_LED# <br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 37 of<br />
55
A<br />
B<br />
C<br />
D<br />
E<br />
ON/OFF switch<br />
Power Button<br />
PX MODE SELECT CONTROL<br />
<br />
+3VS<br />
+3VALW<br />
+3VS<br />
+3VS<br />
TOP Side<br />
INT_VGA_EN# keeps HIGH if PX is enable<br />
SG@<br />
1 2<br />
D46<br />
RB751V_SOD323<br />
R493<br />
@<br />
10K_0603_5%<br />
INT_VGA_EN#<br />
1 2<br />
R500<br />
R502<br />
R324<br />
1 2<br />
R495<br />
1.8K_0402_5%<br />
R494<br />
@<br />
10K_0603_5%<br />
100K_0402_5%<br />
100K_0402_5%<br />
1 1<br />
100K_0402_5%<br />
@<br />
@<br />
Q74A<br />
@<br />
Q74B<br />
@<br />
EN1#<br />
DMN66D0LDW-7_SOT363-6<br />
DMN66D0LDW-7_SOT363-6<br />
Bottom Side<br />
@<br />
SW3<br />
D12<br />
AUX0N<br />
6 1 4<br />
3<br />
SG@<br />
SMT1-05-A_4P<br />
D<br />
1 2<br />
2<br />
R513<br />
0_0402_5%<br />
ON/OFF <br />
1<br />
3<br />
ON/OFFBTN#<br />
1<br />
EN1 2<br />
Q70<br />
PE_GPIO2 <br />
3<br />
G<br />
@<br />
51ON# <br />
2<br />
4<br />
S<br />
2N7002_SOT23<br />
EN1<br />
DAN202UT106_SC70-3<br />
Pop for PX verify<br />
EN1#<br />
2<br />
C773<br />
Q73A<br />
Q73B<br />
ON/OFFBTN# <br />
@<br />
PX_EN#<br />
2<br />
5<br />
@<br />
1000P_0402_50V7K<br />
1<br />
GMCH_LCD_DATA<br />
6 1 4<br />
3<br />
DMN66D0LDW-7_SOT363-6<br />
DMN66D0LDW-7_SOT363-6<br />
DMN66D0LDW-7_SOT363-6<br />
DMN66D0LDW-7_SOT363-6<br />
D<br />
Q75A<br />
@<br />
Q75B<br />
@<br />
EC_ON<br />
EC_ON<br />
2<br />
Q27<br />
G<br />
AUX0N 1 @ 2 PE_GPIO2 Verify only<br />
S<br />
2N7002_SOT23<br />
R514<br />
0_0402_5%<br />
R496<br />
2 2<br />
+3VALW<br />
+3VALW<br />
3 3<br />
Delay EC_PWROK 50ms<br />
SB_CLK<br />
for VGA criterial<br />
INT@<br />
INT_VGAPWR_ON<br />
1 2<br />
U30C<br />
U30D<br />
R512<br />
0_0402_5%<br />
SN74LVC14APWLE_TSSOP14<br />
SN74LVC14APWLE_TSSOP14<br />
VGA_ON<br />
6<br />
5<br />
1 2<br />
R501<br />
0_0402_5% 2<br />
EXT@<br />
C775<br />
0.1U_0402_16V4Z 1<br />
+3VS<br />
VGA Power ON Circuit<br />
+3VALW<br />
+3VALW<br />
GPIO1_DELAY<br />
+3VALW<br />
+3VALW<br />
VGA_PWR_ON_L<br />
IGP only mode<br />
VGA only mode<br />
PX (MUXED)<br />
PX (MUXLESS)<br />
For PX sequence, >1mS delay is required between<br />
PE_GPIO1 and VGA_PWR_ON<br />
1 2<br />
0.1U_0402_16V4Z<br />
R415<br />
PE_GPIO1<br />
31.6K_0402_1%<br />
U30E<br />
U30F<br />
For VGA Power on control<br />
R414<br />
SG@<br />
@<br />
SN74LVC14APWLE_TSSOP14<br />
SN74LVC14APWLE_TSSOP14<br />
>1ms<br />
10K_0402_1%<br />
PE_GPIO1 1 2<br />
11<br />
I O 10<br />
13<br />
I O 12<br />
1 SG@ 2<br />
R505<br />
0_0402_5%<br />
VGA_PWR_ON <br />
D<br />
Q66<br />
2<br />
C778<br />
Pop for PX verify<br />
2<br />
C777<br />
VGA_PWR_ON<br />
PE_GPIO1#<br />
2<br />
SG@<br />
0.1U_0402_16V4Z<br />
G<br />
0.1U_0402_16V4Z<br />
@<br />
2N7002_SOT23<br />
S<br />
1<br />
1<br />
4 4<br />
1<br />
3<br />
10K_0402_5%<br />
1<br />
2<br />
1 2<br />
1<br />
5<br />
I<br />
I<br />
14<br />
P<br />
G<br />
7<br />
14<br />
P<br />
G<br />
7<br />
14<br />
P<br />
G<br />
7<br />
1 2<br />
1<br />
3<br />
U30A<br />
SN74LVC14APWLE_TSSOP14<br />
O 2<br />
O 6<br />
C776<br />
3<br />
9<br />
I<br />
I<br />
14<br />
P<br />
G<br />
7<br />
14<br />
P<br />
G<br />
7<br />
14<br />
P<br />
G<br />
7<br />
U30B<br />
SN74LVC14APWLE_TSSOP14<br />
O 4<br />
O 8<br />
1 2<br />
R509<br />
0_0402_5%<br />
DISO@<br />
1 2<br />
6<br />
1<br />
PX_EN#<br />
1<br />
AUX0N<br />
EDP_DISABLED<br />
I2C_DATA<br />
EDP_ENABLED<br />
INT_VGA_EN#<br />
1 X<br />
X<br />
1<br />
0<br />
1 2<br />
3<br />
4<br />
X<br />
0 X<br />
X<br />
0<br />
X<br />
0/1 0/1<br />
www.mycomp.su<br />
1<br />
3<br />
SB_PWROK<br />
0<br />
1<br />
38ms<br />
DISPLAY OUTPUT<br />
IGP( LVDS,EDP,VGA,DP)<br />
VGA( LVDS,EDP,CRT,DP)<br />
VGA/IGP(CRT, LVDS, EDP); MXM(DP)<br />
IGP( LVDS,EDP,CRT,DP)<br />
For PX sequence and internal clock mode, VGA<br />
PWR need ramp up after SB_CLK oscillate<br />
VGAPWR_ON<br />
2<br />
2<br />
5<br />
5<br />
50ms<br />
1 2<br />
GPIO1_DELAY<br />
A<br />
D<br />
Q76<br />
2<br />
INT@<br />
G<br />
2N7002_SOT23<br />
S<br />
1<br />
3<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 38 of<br />
55<br />
C<br />
D<br />
E
A<br />
B<br />
C<br />
D<br />
E<br />
F<br />
G<br />
H<br />
+3VS<br />
+VDDA<br />
1 2<br />
R784<br />
0_0805_5%<br />
D38<br />
+5VS<br />
L87 1 2<br />
1<br />
R783<br />
IN<br />
OUT<br />
5<br />
20K_0402_1%<br />
FBMA-L11-201209-221LMA30T_0805<br />
2<br />
R789<br />
L88<br />
GND<br />
1 2<br />
1 1 1<br />
+VDDA 4.75V<br />
RB751V_SOD323<br />
10K_0402_5%<br />
3<br />
1 C936<br />
FBMA-L11-201209-221LMA30T_0805<br />
SHDN<br />
C949<br />
2<br />
1 1<br />
1 2<br />
MONO_IN<br />
@<br />
@G9191-475T1U_SOT23-5<br />
0.01U_0402_25V7K<br />
1U_0402_6.3V4Z<br />
2 2 2<br />
<br />
BEEP#<br />
C952<br />
1U_0402_6.3V4Z<br />
2 1<br />
R787<br />
1 2<br />
560_0402_5%<br />
1<br />
2<br />
2<br />
B<br />
1<br />
2<br />
C<br />
1<br />
Q72<br />
E<br />
2SC2411KT146_SOT23-3<br />
3<br />
1 2<br />
R786<br />
2.4K_0402_1%<br />
HD Audio Codec<br />
+5VAMP<br />
C678 22U_0805_6.3V6M<br />
C899 0.1U_0402_16V4Z<br />
C947 0.1U_0402_16V4Z<br />
60mil<br />
U81<br />
(output = 300 mA)<br />
40mil<br />
BYP 4 JP1<br />
1U_0402_6.3V4Z 1 2 L82<br />
SB_SPKR<br />
C946<br />
1U_0402_6.3V4Z 1 2 R788<br />
1 2<br />
560_0402_5%<br />
D37<br />
RB751V_SOD323<br />
L82<br />
BLM18AG601SN1D_2P<br />
10mil<br />
0.1U_0402_16V4Z<br />
+3VS_DVDD<br />
1 2 +3VS<br />
MIC2_VREFO<br />
1<br />
1<br />
1<br />
C933<br />
C953<br />
C926<br />
+AVDD_HDA<br />
10U_0805_10V4Z<br />
L86<br />
2<br />
2<br />
2<br />
R585<br />
40mil<br />
+VDDA 1 2<br />
0.1U_0402_16V4Z<br />
2.2K_0402_5%<br />
BLM18AG601SN1D_2P 1<br />
1<br />
1<br />
0.1U_0402_16V4Z<br />
C935<br />
C945<br />
C950<br />
10U_0805_10V4Z<br />
INT_MIC<br />
Close to Conn<br />
2 2<br />
2<br />
2<br />
2<br />
U82<br />
0.1U_0402_16V4Z<br />
1<br />
C808<br />
14<br />
220P_0402_50V7K<br />
AMP_LEFT<br />
2<br />
LINE2_L<br />
LOUT1_L<br />
35<br />
AMP_LEFT <br />
15<br />
LINE2_R<br />
LOUT_R 36 AMP_RIGHT<br />
AMP_RIGHT <br />
INT_MIC<br />
C794 1 2<br />
MIC2_C_L<br />
2 1INT_MIC_2<br />
4.7U_0805_10V4Z<br />
16<br />
MIC2_L<br />
LOUT2_L<br />
39<br />
JP1<br />
1 17<br />
INT_MIC<br />
4.7U_0805_10V4Z<br />
MIC2_R<br />
LOUT2_R 41<br />
1<br />
1<br />
15mil<br />
2<br />
2<br />
23<br />
LINE1_L<br />
SPDIFO2<br />
45<br />
R523<br />
1K_0402_1%<br />
C797 2<br />
MIC2_C_R<br />
24<br />
LINE1_R<br />
DMIC_CLK1/2<br />
46<br />
3<br />
D27<br />
G1<br />
4<br />
G2<br />
18<br />
LINE1_VREFO<br />
NC 43<br />
@<br />
ACES_88266-02001<br />
20<br />
1 2<br />
C948<br />
CONN@<br />
LINE2_VREFO DMIC_CLK3/4<br />
44<br />
1 2<br />
R792<br />
0_0402_5%<br />
22P_0402_50V8J For EMI<br />
PJDLC05C_SOT23-3<br />
MIC2_VREFO<br />
19<br />
MIC2_VREFO<br />
MIC1_L<br />
C934<br />
MIC1_C_L<br />
MIC1_L<br />
1 2<br />
21<br />
4.7U_0805_10V4Z<br />
MIC1_L<br />
BITCLK<br />
6<br />
HDA_BITCLK_AUDIO <br />
MIC1_R<br />
MIC1_R<br />
C932 1 2 MIC1_C_R 22<br />
4.7U_0805_10V4Z<br />
MIC1_R<br />
SDATA_IN 8<br />
1 2<br />
R793<br />
33_0402_5%<br />
HDA_SDIN0 <br />
MONO_IN 12<br />
PCBEEP_IN MONO_OUT<br />
37<br />
CBP 29<br />
2.2U_0402_6.3V6M<br />
HDA_RST_AUDIO#<br />
11<br />
RESET#<br />
C951<br />
CPVEE 31<br />
1 2<br />
HDA_SYNC_AUDIO<br />
10<br />
SYNC<br />
10mil<br />
1<br />
3 3<br />
MIC1_VREFO 28<br />
MIC1_VREFO<br />
HDA_SDOUT_AUDIO<br />
5<br />
C954<br />
HP_RIGHT<br />
SDATA_OUT<br />
HP_RIGHT <br />
HP_RIGHT<br />
HPOUT_R 32<br />
2.2U_0402_6.3V6M<br />
2<br />
2<br />
HP_LEFT<br />
GPIO0/DMIC_DATA1/2<br />
HP_LEFT <br />
3<br />
R794<br />
20K_0402_1% SENSE_A<br />
GPIO1/DMIC_DATA3/4 CBN 30<br />
MIC_PLUG#<br />
2 1<br />
13<br />
10mil<br />
R795<br />
5.11K_0402_1% SENSE_B<br />
SENSE A<br />
CODEC_VREF<br />
HP_PLUG#<br />
2 1<br />
34<br />
SENSE B<br />
VREF<br />
27<br />
1<br />
1<br />
EAPD<br />
1 R796<br />
2<br />
0_0402_5%<br />
47<br />
EAPD<br />
JDREF<br />
40<br />
48<br />
SPDIFO1<br />
HPOUT_L<br />
33 HP_LEFT<br />
2<br />
2<br />
4<br />
DVSS1<br />
AVSS1<br />
26<br />
7<br />
DVSS2<br />
AVSS2<br />
42<br />
ALC272-VA2-GR_LQFP48_7X7<br />
1 2<br />
1 2<br />
Change to ALC272X<br />
R798<br />
0_0805_5%<br />
R799<br />
0_0805_5%<br />
ALC272X<br />
Sense Pin Impedance Codec Signals<br />
39.2K PORT-A (PIN 39, 41)<br />
20K PORT-B (PIN 21, 22)<br />
SENSE A<br />
10K PORT-C (PIN 23, 24)<br />
5.1K PORT-D (PIN 35, 36)<br />
39.2K PORT-E (PIN 14, 15)<br />
20K PORT-F (PIN 16, 17)<br />
SENSE B<br />
10K<br />
LINE1<br />
4 4<br />
LOUT1<br />
A<br />
5.1K<br />
PORT-I (PIN 32, 33)<br />
B<br />
Function<br />
LOUT2<br />
MIC1<br />
LINE2<br />
MIC2<br />
HP<br />
2 1<br />
C<br />
DGND<br />
25<br />
AVDD1<br />
D<br />
38<br />
AVDD2<br />
DVDD 1<br />
DVDD_IO 9<br />
www.mycomp.su<br />
Security Classification<br />
Issued Date<br />
AGND<br />
R797<br />
1<br />
2<br />
20K_0402_1%<br />
C927<br />
10U_0805_10V4Z<br />
GND<br />
<strong>Compal</strong> Secret Data<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
C937<br />
0.1U_0402_16V4Z<br />
1 2<br />
R804<br />
0_0805_5%<br />
1 2<br />
R818<br />
0_0805_5%<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 39 of<br />
55<br />
E<br />
F<br />
G<br />
H<br />
GNDA<br />
Title<br />
3<br />
1<br />
2<br />
1<br />
2<br />
GND<br />
1 2<br />
R816<br />
0_0805_5%<br />
1 2<br />
R817<br />
0_0805_5%<br />
GNDA<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911
A<br />
B<br />
C<br />
D<br />
E<br />
GAIN0 GAIN1<br />
0 0<br />
0 1<br />
1 0<br />
1 1<br />
AV(inv)<br />
6dB<br />
10dB<br />
15.6dB<br />
21.6dB<br />
Ri<br />
90k<br />
70k<br />
45k<br />
25k<br />
+5VAMP<br />
C959<br />
C960<br />
10U_0805_10V4Z<br />
2<br />
2<br />
1 JSPK2<br />
1<br />
SPKL+<br />
R834 1 2<br />
0_0603_5% SPK_L+ 1<br />
10 dB<br />
SPKL-<br />
R833<br />
SPK_L-<br />
1<br />
1 2<br />
0_0603_5%<br />
2<br />
2<br />
+5VAMP<br />
20mil<br />
Left<br />
D39<br />
3<br />
U83<br />
R827<br />
@<br />
R829<br />
G1<br />
4<br />
100K_0402_5%<br />
100K_0402_5%<br />
@<br />
G2<br />
ACES_88266-02001<br />
PJDLC05C_SOT23-3<br />
CONN@<br />
SCA00001100<br />
C958 1 2<br />
0.47U_0603_10V7K 7<br />
GAIN0<br />
RIN+<br />
GAIN0<br />
2<br />
GAIN1<br />
GAIN1<br />
3<br />
C957<br />
AMP_C_RIGHT<br />
AMP_RIGHT<br />
1 2<br />
1 2<br />
17<br />
R830<br />
0_0603_5%<br />
RIN-<br />
SPKR+<br />
ROUT+<br />
18<br />
@<br />
R825<br />
R826<br />
0.47U_0603_10V7K<br />
100K_0402_5%<br />
100K_0402_5%<br />
JSPK1<br />
SPKR+<br />
R831 1 2<br />
0_0603_5% SPK_R+ 1<br />
SPKR-<br />
SPKR-<br />
SPK_R-<br />
C955 1 2<br />
0.47U_0603_10V7K<br />
ROUT-<br />
14<br />
R832 1 2<br />
0_0603_5%<br />
1<br />
2<br />
2<br />
9<br />
LIN+<br />
20mil<br />
SPKL+<br />
Right<br />
C971<br />
LOUT+<br />
4<br />
D41<br />
3<br />
G1<br />
4<br />
AMP_C_LEFT<br />
AMP_LEFT<br />
1 2<br />
1 2<br />
5<br />
@<br />
G2<br />
R828<br />
0_0603_5%<br />
LIN-<br />
SPKL-<br />
0.47U_0603_10V7K<br />
LOUT-<br />
8<br />
ACES_88266-02001<br />
PJDLC05C_SOT23-3<br />
CONN@<br />
SCA00001100<br />
2 2<br />
EC_MUTE#<br />
BYPASS 10<br />
EC_MUTE#<br />
19<br />
SHUTDOWN<br />
2<br />
C956<br />
0.47U_0603_10V7K<br />
1<br />
GND5<br />
GND1<br />
GND2<br />
GND3<br />
GND4<br />
21<br />
20<br />
13<br />
11<br />
VDD 16<br />
PVDD1<br />
15<br />
PVDD2<br />
6<br />
1<br />
TPA6017A2_TSSOP20<br />
HP_LEFT<br />
HP_RIGHT<br />
HPOUT_L_1 1 2 HPOUT_L_2<br />
L94<br />
FBMA-L11-160808-700LMT_2P<br />
HPOUT_R_1 1 2 HPOUT_R_2<br />
L93<br />
FBMA-L11-160808-700LMT_2P<br />
SINGA_2SJ-0960-C01<br />
3 CONN@<br />
3<br />
MIC_PLUG#<br />
<br />
<br />
1<br />
NC 12<br />
0.1U_0402_16V4Z<br />
MIC1_L<br />
MIC1_R<br />
1<br />
Keep 10 mil width<br />
1<br />
2<br />
1<br />
2<br />
R694 1 2 MIC1_L_1<br />
1K_0603_1%<br />
R695 1 2 MIC1_R_1<br />
1K_0603_1%<br />
R686 1 2<br />
56.2_0603_1%<br />
R685 1 2<br />
56.2_0603_1%<br />
MIC1_VREFO MIC1_VREFO<br />
C780<br />
C781<br />
MIC_PLUG#<br />
MIC_PLUG#<br />
220P_0402_50V7K<br />
220P_0402_50V7K<br />
5<br />
2 2<br />
@<br />
PJDLC05C_SOT23-3<br />
D29<br />
6<br />
SCA00001100<br />
4 4<br />
SINGA_2SJ-A960-C01<br />
CONN@<br />
1<br />
2<br />
1<br />
2<br />
www.mycomp.su<br />
2<br />
D43<br />
RB751V_SOD323<br />
1<br />
1<br />
R692<br />
4.7K_0402_5%<br />
L89 1 2<br />
FBMA-L11-160808-700LMT_2P<br />
L90 1 2<br />
FBMA-L11-160808-700LMT_2P<br />
2<br />
1<br />
2<br />
1<br />
1<br />
2<br />
1<br />
D42<br />
RB751V_SOD323<br />
R693<br />
4.7K_0402_5%<br />
MIC1_L_R<br />
MIC1_R_R<br />
2<br />
C779<br />
330P_0402_50V7K 1<br />
3<br />
1<br />
2<br />
Int. Speaker Conn.<br />
HP_PLUG#<br />
@<br />
3<br />
1<br />
2<br />
2<br />
C774<br />
330P_0402_50V7K<br />
1<br />
3<br />
HP_PLUG#<br />
D24<br />
3<br />
1<br />
1<br />
2<br />
2<br />
HP_PLUG#<br />
PJDLC05C_SOT23-3<br />
SCA00001100<br />
Headphone Out<br />
JHP1<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
JMIC1<br />
1<br />
2<br />
3<br />
4<br />
MIC JACK<br />
<br />
<br />
A<br />
B<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 40 of<br />
55<br />
C<br />
D<br />
E
FAN1 Conn<br />
+5VS<br />
+5VS<br />
C821<br />
10U_0805_10V4Z<br />
1 2<br />
D25<br />
@<br />
1SS355_SOD323-2<br />
R566<br />
0_0603_5%<br />
@<br />
U35<br />
@D26 BAS16_SOT23-3<br />
1<br />
EN GND 8<br />
1 2<br />
2<br />
+VCC_FAN1<br />
VIN GND 7<br />
3<br />
VOUT GND 6<br />
C823<br />
EN_DFAN1<br />
1 2<br />
4<br />
R567<br />
0_0402_5%<br />
VSET GND 5 1<br />
10U_0805_10V4Z<br />
C822<br />
APL5607KI-TRG_SO8<br />
1 2<br />
@<br />
0.01U_0402_25V4Z<br />
+3VS<br />
C824<br />
2<br />
1000P_0402_50V7K<br />
1 2<br />
R568<br />
10K_0402_5%<br />
40mil<br />
JFAN1<br />
+VCC_FAN1<br />
1<br />
FAN_SPEED1<br />
2<br />
3<br />
1<br />
C825<br />
CONN@<br />
1000P_0402_50V7K<br />
ACES_85205-03001<br />
2<br />
1 2<br />
1<br />
2<br />
1<br />
2<br />
LDO FAN<br />
H1<br />
H_3P0<br />
1<br />
H11<br />
H_3P0<br />
1<br />
H14<br />
H_4P0<br />
1<br />
FD1<br />
1<br />
H2<br />
H_3P0<br />
1<br />
H12<br />
H_3P0<br />
1<br />
H15<br />
H_4P0<br />
www.mycomp.su<br />
1<br />
FIDUCIAL_C40M80<br />
H19<br />
H_3P0<br />
H4<br />
H_3P0<br />
H24<br />
H_3P0<br />
H5<br />
H_3P0<br />
H6<br />
H_3P0<br />
H20<br />
H_4P2<br />
H7<br />
H_3P0<br />
H21<br />
H_4P2<br />
FD2<br />
FD3<br />
FIDUCIAL_C40M80<br />
FIDUCIAL_C40M80<br />
H8<br />
H_3P0<br />
1<br />
1<br />
1<br />
H9<br />
H_3P0<br />
H22<br />
H23<br />
H_4P2<br />
H_4P2<br />
H18<br />
H17<br />
H13<br />
H_3P4<br />
H_3P0X3P5N<br />
H_3P0N<br />
FD4<br />
FIDUCIAL_C40M80<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
H10<br />
H_3P0<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 41 of<br />
55
A<br />
A<br />
+5VALW TO +5VS<br />
B<br />
+5VALW<br />
+5VALW<br />
+5VALW<br />
+5VS<br />
U36<br />
+1.1VALW<br />
+1.1VS<br />
SI4800BDY-T1-GE3_SO8<br />
U38<br />
R570<br />
8<br />
1<br />
AO4430L_SO8<br />
R583<br />
100K_0402_5%<br />
7<br />
2<br />
8<br />
1<br />
100K_0402_5%<br />
6<br />
3<br />
1<br />
1<br />
7<br />
2<br />
1<br />
1 5<br />
C827<br />
R571<br />
6<br />
3<br />
1<br />
1<br />
C826<br />
C828<br />
470_0603_5%<br />
1 5<br />
C838<br />
R578<br />
VLDT_EN#<br />
SYSON#<br />
SYSON#<br />
10U_0805_10V4Z<br />
C829<br />
R577<br />
C837<br />
10U_0805_10V4Z<br />
2<br />
2<br />
1K_0402_5%<br />
10U_0805_10V4Z<br />
C839<br />
470_0603_5%<br />
D<br />
2<br />
10U_0805_10V4Z 2<br />
1U_0402_6.3V4Z<br />
2<br />
2<br />
D<br />
2<br />
SYSON<br />
2<br />
Q30<br />
1U_0402_6.3V4Z<br />
D<br />
VLDT_EN<br />
2<br />
Q40<br />
G<br />
2N7002_SOT23<br />
10U_0805_10V4Z<br />
G<br />
2N7002_SOT23<br />
S<br />
2 SUSP<br />
D<br />
S<br />
R573<br />
1 1<br />
G<br />
2VLDT_EN#<br />
100K_0402_5%<br />
+VSB 1 2<br />
5VS_GATE<br />
S<br />
Q31<br />
G<br />
R584<br />
R574<br />
100K_0402_5%<br />
2N7002_SOT23<br />
+VSB 1 2<br />
1.1VS_GATE<br />
S<br />
Q37<br />
10K_0402_5%<br />
R581<br />
47K_0402_5%<br />
D<br />
1<br />
2N7002_SOT23<br />
C834<br />
SUSP 2<br />
+5VALW<br />
Q33<br />
G<br />
0.1U_0603_25V7K<br />
D<br />
1<br />
C844<br />
+5VALW<br />
2N7002_SOT23<br />
S<br />
2<br />
VLDT_EN# 2<br />
Q39<br />
G<br />
0.1U_0603_25V7K<br />
2N7002_SOT23<br />
S<br />
2<br />
R576<br />
R587<br />
100K_0402_5%<br />
D<br />
100K_0402_5%<br />
ACIN<br />
ACIN 2<br />
Q48<br />
SUSP<br />
SUSP<br />
+3VALW TO +3VS<br />
G<br />
2N7002_SOT23<br />
VGA_ON#<br />
VGA_ON#<br />
+3VS<br />
S<br />
+3VALW<br />
D<br />
U39<br />
D<br />
SUSP#<br />
2<br />
Q35<br />
SI4800BDY-T1-GE3_SO8<br />
VGA_ON<br />
2<br />
Q42<br />
G<br />
2N7002_SOT23<br />
8<br />
1<br />
G<br />
2N7002_SOT23<br />
S<br />
7<br />
2<br />
S<br />
6<br />
3<br />
1<br />
1<br />
R580<br />
1<br />
1 5<br />
C842<br />
R579<br />
+1.5V to +1.5VSG<br />
R586<br />
10K_0402_5%<br />
C840<br />
C841<br />
470_0603_5%<br />
10K_0402_5%<br />
10U_0805_10V4Z<br />
C836<br />
+1.5V<br />
+1.5VSG<br />
10U_0805_10V4Z<br />
2<br />
2<br />
2<br />
10U_0805_10V4Z 2<br />
1U_0402_6.3V4Z<br />
U37<br />
VGA@<br />
D<br />
AO4430L_SO8<br />
2 SUSP<br />
8<br />
1<br />
+5VALW<br />
G<br />
7<br />
2<br />
+VSB 2 1<br />
3VS_GATE<br />
S<br />
Q36<br />
6<br />
3<br />
1<br />
1<br />
R582<br />
200K_0402_5%<br />
2N7002_SOT23<br />
1 1 5<br />
C832<br />
C833<br />
R572<br />
2 2<br />
C830<br />
C831<br />
VGA@<br />
VGA@<br />
VGA@<br />
R589<br />
D<br />
1<br />
VGA@<br />
10U_0805_10V4Z<br />
470_0603_5%<br />
100K_0402_5%<br />
SUSP<br />
C843<br />
2<br />
2<br />
VGA@<br />
1U_0402_6.3V4Z 2<br />
Q38<br />
G<br />
2 2<br />
2N7002_SOT23<br />
S<br />
0.1U_0603_25V7K<br />
2<br />
10U_0805_10V4Z<br />
10U_0805_10V4Z<br />
D<br />
PE_GPIO1#<br />
PE_GPIO1#<br />
2VGA_PWR_ON#<br />
G<br />
D<br />
+1.5VS<br />
+VSB 1 VGA@ 2 1.5VSG_GATE<br />
S<br />
Q32<br />
PE_GPIO1<br />
2<br />
Q67<br />
R575<br />
100K_0402_5%<br />
2N7002_SOT23<br />
G<br />
2N7002_SOT23<br />
VGA@<br />
S<br />
VGA@<br />
D<br />
1<br />
R609<br />
Q59<br />
C835<br />
100K_0402_5%<br />
+1.5V<br />
SI2301CDS-T1-GE3_SOT23-3 +1.5VS<br />
VGA_PWR_ON# 2<br />
VGA@ 1<br />
2<br />
VGA@<br />
R503<br />
47K_0402_5%<br />
G<br />
0.1U_0603_25V7K<br />
3<br />
1<br />
Q34<br />
S<br />
2<br />
1<br />
2N7002_SOT23<br />
C848<br />
1<br />
+5VALW<br />
R314<br />
C690<br />
R313<br />
VGA@<br />
470_0603_5%<br />
0.1U_0603_25V7K<br />
D<br />
100K_0402_5%<br />
10U_0805_6.3V6M<br />
2<br />
ACIN 2<br />
Q49<br />
2<br />
G<br />
VGA@<br />
R602<br />
S<br />
2N7002_SOT23<br />
100K_0402_5%<br />
D<br />
VGA_ON#<br />
VGA_PWR_ON#<br />
R511<br />
D<br />
2<br />
G<br />
VGA_ON 47K_0402_5%<br />
2<br />
Q9<br />
S<br />
Q10<br />
1<br />
G<br />
2N7002_SOT23<br />
D<br />
S<br />
VGA_PWR_ON<br />
2<br />
Q68<br />
C691<br />
SSM3K7002FU_SC70-3<br />
+1.8VS to +1.8VSG<br />
G<br />
2N7002_SOT23<br />
0.22U_0603_16V4Z2<br />
S<br />
R608<br />
3 3<br />
100K_0402_5%<br />
+1.8VS<br />
+1.8VSG<br />
U45<br />
VGA@<br />
SI4800BDY-T1-GE3_SO8<br />
8<br />
1<br />
7<br />
2<br />
6<br />
3<br />
1<br />
1<br />
+1.0VSG<br />
+VGA_CORE<br />
+1.8VS<br />
1 1 5<br />
C855<br />
R594<br />
C856<br />
C854<br />
VGA@<br />
VGA@<br />
10U_0805_10V4Z<br />
C853<br />
470_0603_5%<br />
VGA@<br />
VGA@<br />
2<br />
2<br />
VGA@<br />
2 2<br />
1U_0402_6.3V4Z<br />
Q58<br />
R598<br />
R603<br />
R592<br />
10U_0805_10V4Z<br />
10U_0805_10V4Z<br />
+3VSG +3VS<br />
SI2301CDS-T1-GE3_SOT23-3<br />
470_0603_5%<br />
470_0603_5%<br />
470_0603_5%<br />
D<br />
+3VSG<br />
VGA@<br />
VGA@<br />
2 VGA_PWR_ON#<br />
3<br />
1<br />
G<br />
D<br />
+VSB 2<br />
VGA@ 1 1.8VSG_GATE<br />
S<br />
Q43<br />
VGA@<br />
C849<br />
R510<br />
100K_0402_5%<br />
2N7002_SOT23<br />
VGA@ 1 R114<br />
VGA@ 1 C234<br />
R112<br />
D<br />
D<br />
VGA@<br />
470_0603_5%<br />
2 VGA_PWR_ON#<br />
2 VGA_PWR_ON#<br />
2 VGA_ON#<br />
VGA@<br />
G<br />
G<br />
D<br />
1<br />
0.1U_0603_25V7K<br />
100K_0402_5%<br />
10U_0805_6.3V6M<br />
G<br />
C852<br />
2<br />
2<br />
S<br />
Q51<br />
S<br />
Q55<br />
S<br />
Q46<br />
VGA_PWR_ON# 2<br />
VGA@ 1<br />
2<br />
VGA@<br />
3VSG_GATE 1 2<br />
2N7002_SOT23<br />
2N7002_SOT23<br />
2N7002_SOT23<br />
R489<br />
100K_0402_5%<br />
G<br />
0.1U_0603_25V7K<br />
R611<br />
33K_0402_5%<br />
VGA@<br />
VGA@<br />
1<br />
Q47<br />
S<br />
2<br />
D<br />
VGA@<br />
2N7002_SOT23<br />
2 VGA_PWR_ON#<br />
C692<br />
VGA@<br />
VGA@<br />
D<br />
VGA@<br />
G<br />
VGA@<br />
VGA_PWR_ON<br />
Q8<br />
S<br />
Q7<br />
0.1U_0603_25V7K2<br />
D<br />
1 2 2<br />
10K_0402_5%<br />
R607 1<br />
G<br />
2N7002_SOT23<br />
+1.5V<br />
+2.5VS<br />
+0.75VS<br />
+CPU_VDDR<br />
+NB_CORE<br />
ACIN 2<br />
Q60<br />
S<br />
G<br />
@<br />
C846<br />
SSM3K7002FU_SC70-3<br />
S<br />
2N7002_SOT23<br />
VGA@<br />
0.1U_0603_25V7K2<br />
4 4<br />
R605<br />
R590<br />
R591<br />
R604<br />
R610<br />
470_0603_5%<br />
470_0603_5%<br />
470_0603_5%<br />
470_0603_5%<br />
470_0603_5%<br />
1 2<br />
1<br />
3<br />
1 2<br />
D<br />
1<br />
S<br />
3<br />
2 SYSON#<br />
G<br />
Q57<br />
2N7002_SOT23<br />
1 2<br />
D<br />
1<br />
S<br />
3<br />
1 2<br />
1<br />
3<br />
1<br />
3<br />
1<br />
3<br />
1 2<br />
S<br />
4<br />
G<br />
2<br />
1<br />
3<br />
4<br />
2 SUSP<br />
G<br />
Q44<br />
2N7002_SOT23<br />
D<br />
1 2<br />
D<br />
1<br />
S<br />
3<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3<br />
2 SUSP<br />
G<br />
2N7002_SOT23<br />
Q45<br />
1 2<br />
D<br />
1<br />
S<br />
3<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3<br />
2 VLDT_EN#<br />
G<br />
Q56<br />
2N7002_SOT23<br />
B<br />
1 2<br />
D<br />
1<br />
S<br />
3<br />
2 VLDT_EN#<br />
G<br />
Q69<br />
2N7002_SOT23<br />
1<br />
2<br />
Security Classification<br />
Issued Date<br />
C<br />
+1.1VALW TO +1.1VS<br />
1<br />
3<br />
1<br />
3<br />
1<br />
3<br />
R595<br />
VGA@<br />
R596<br />
1<br />
2<br />
1<br />
3<br />
1<br />
2<br />
1<br />
3<br />
4<br />
4<br />
@<br />
R606<br />
300K_0402_5%<br />
510K_0402_5%<br />
www.mycomp.su<br />
1<br />
2<br />
1<br />
3<br />
4<br />
510K_0402_5%<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3<br />
<strong>Compal</strong> Secret Data<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
D<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF Document Number Rev<br />
R&D<br />
B<br />
401827<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 42 of<br />
55<br />
C<br />
D<br />
E<br />
1<br />
2<br />
1<br />
2<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3<br />
Title<br />
1 2<br />
S<br />
G<br />
2<br />
1<br />
3<br />
3VSG_GATE<br />
D<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
E<br />
1 2<br />
1<br />
3<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3<br />
1 2<br />
1<br />
3
A<br />
A<br />
B<br />
1 1<br />
2 2<br />
3 3<br />
4 4<br />
B<br />
C<br />
C<br />
D<br />
D<br />
VIN<br />
PR1<br />
1M_0402_1%<br />
1 2<br />
VS<br />
VIN<br />
SP02000GC00<br />
ACES_50305-00441-001<br />
DC_IN_S1<br />
1<br />
1<br />
2<br />
2<br />
3<br />
3<br />
4<br />
4<br />
GND 5<br />
PJP1<br />
2 1<br />
PC3<br />
1000P_0402_50V7K<br />
2<br />
PL1<br />
SMB3025500YA_2P<br />
1 2<br />
PC4<br />
100P_0402_50V8J<br />
2<br />
PC5<br />
100P_0402_50V8J<br />
VIN<br />
ACIN<br />
2<br />
PC6<br />
1000P_0402_50V7K<br />
PR2<br />
PR3<br />
10K_0402_5%<br />
84.5K_0402_1%<br />
PR4<br />
PR5<br />
PU1A<br />
22K_0402_5%<br />
10K_0402_1%<br />
1 2<br />
PACIN<br />
+<br />
3<br />
1 2<br />
1<br />
O<br />
<br />
-<br />
2<br />
PC1<br />
LM393DR_SO8<br />
PR7<br />
1000P_0402_50V7K<br />
PD1<br />
PC2<br />
20K_0402_1%<br />
PR8<br />
RLZ4.3B_LL34<br />
0.1U_0603_25V7K<br />
10K_0402_5%<br />
1<br />
2<br />
2 1<br />
8<br />
P<br />
G<br />
4<br />
1<br />
2<br />
1<br />
2<br />
1<br />
1<br />
2<br />
2<br />
1<br />
1<br />
1<br />
1<br />
2<br />
GND 6 PJ26<br />
+CHGRTC<br />
- PBJ1 +<br />
2<br />
BATT+<br />
51ON#<br />
PR16<br />
560_0603_5%<br />
1 2<br />
ML1220T13RE<br />
45@<br />
PR12<br />
200_0603_5%<br />
CHGRTCP 1 2<br />
PR17<br />
560_0603_5%<br />
1 2<br />
1<br />
PD3<br />
RLS4148_LL34-2<br />
2<br />
RTCVREF<br />
1<br />
2<br />
+RTCBATT<br />
+RTCBATT<br />
3.3V<br />
1<br />
1<br />
PR13<br />
100K_0402_1%<br />
PR14<br />
22K_0402_1%<br />
1 2<br />
2<br />
3<br />
PU2<br />
OUT<br />
1<br />
2<br />
N1<br />
PC13<br />
0.22U_0603_25V7K<br />
IN 2<br />
N2<br />
GND<br />
PC17<br />
G920AT24U_SOT89-3<br />
10U_0805_10V4Z 1<br />
3<br />
PQ1<br />
1<br />
2<br />
PR15<br />
200_0603_5%<br />
VIN<br />
1 2<br />
1<br />
PR10<br />
68_1206_5%<br />
TP0610K-T1-E3_SOT23-3<br />
1<br />
2<br />
2<br />
1<br />
PC18<br />
1U_0805_25V4Z<br />
2<br />
1<br />
2<br />
PD2<br />
RLS4148_LL34-2<br />
1<br />
2<br />
PR11<br />
68_1206_5%<br />
PC14<br />
0.1U_0603_25V7K<br />
VS<br />
+1.0VSGP<br />
@PC148<br />
0.1U_0402_16V7K<br />
+3VALWP<br />
@PC7<br />
0.1U_0402_16V7K<br />
+5VALWP<br />
+VSBP<br />
PC11<br />
0.1U_0402_25V6<br />
+NB_COREP<br />
@PC15<br />
0.1U_0402_16V7K<br />
PACIN<br />
1 2<br />
1 2<br />
1 2<br />
@PC9<br />
0.1U_0402_16V7K<br />
1 2<br />
PJ32<br />
2<br />
2 1<br />
1<br />
Min. Typ Max.<br />
H-->L 16.976V 17.525V 17.728V<br />
L-->H 17.430V 17.901V 18.384V<br />
+1.0VSG<br />
JUMP_43X118<br />
(3A,120mils ,Via NO.=6)<br />
PJ1<br />
2<br />
2 1<br />
1<br />
+3VALW<br />
JUMP_43X118<br />
(3.9A,160mils ,Via NO.= 8)<br />
PJ3<br />
2<br />
2 1<br />
1<br />
+5VALW<br />
JUMP_43X118<br />
(5A,200mils ,Via NO.= 10)<br />
PJ5<br />
2<br />
2 1<br />
1<br />
+VSB<br />
JUMP_43X39<br />
(120mA,40mils ,Via NO.= 2)<br />
+NB_CORE<br />
(5A,200mils ,Via NO.=10)<br />
Vin Dectector<br />
+1.8VSP2<br />
+1.8VSP1<br />
@PC71<br />
0.1U_0402_16V7K<br />
+1.1VALWP<br />
@PC8<br />
0.1U_0402_16V7K<br />
+0.75VSP<br />
+1.5VP<br />
@PC12<br />
0.1U_0402_16V7K<br />
+2.5VSP<br />
@PC16<br />
0.1U_0402_16V7K<br />
RTCVREF<br />
+1.8VS<br />
+1.8VS<br />
JUMP_43X118<br />
(3A,120mils ,Via NO.=6)<br />
+1.1VALW<br />
JUMP_43X118<br />
(5.2A,220mils ,Via NO.=11)<br />
+0.75VS<br />
JUMP_43X118<br />
(3A,120mils ,Via NO.=6)<br />
+2.5VS<br />
PJ21<br />
JUMP_43X39<br />
+VGA_COREP PJ20<br />
+CPU_VDDRP 1<br />
1 2<br />
2<br />
2<br />
2 1<br />
1<br />
+VGA_CORE PC70<br />
+CPU_VDDR<br />
@PC69<br />
JUMP_43X118<br />
0.1U_0402_25V6 (1.5A,60mils ,Via NO.= 3)<br />
0.1U_0402_16V7K<br />
PJ13<br />
2<br />
2 1<br />
1<br />
1 2<br />
PJ8<br />
2<br />
2<br />
1<br />
1<br />
JUMP_43X118<br />
www.mycomp.su<br />
1 2<br />
JUMP_43X118<br />
(25A,1000mils ,Via NO.=50)<br />
@PC130<br />
0.1U_0402_16V7K<br />
1 2<br />
1 2<br />
@PC10<br />
0.1U_0402_16V7K<br />
PR9<br />
10K_0402_5%<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
1 2<br />
PJ29<br />
2<br />
2 1<br />
1<br />
JUMP_43X118<br />
(3A,120mils ,Via NO.=6)<br />
PJ22<br />
2<br />
2 1<br />
1<br />
PJ26<br />
2<br />
2 1<br />
1<br />
PJ11<br />
2<br />
2 1<br />
1<br />
PJ6<br />
2<br />
2<br />
1<br />
1<br />
JUMP_43X118<br />
+1.5V<br />
(9.5A,400mils ,Via NO.=20)<br />
PJ9<br />
2<br />
PJ19<br />
2<br />
2 1<br />
1<br />
2<br />
JUMP_43X118<br />
1<br />
1<br />
JUMP_43X39<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/09/20 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 43 of<br />
55
A<br />
A<br />
B<br />
1 1<br />
2 2<br />
3 3<br />
4 4<br />
B<br />
C<br />
C<br />
D<br />
D<br />
PH1 under CPU botten side :<br />
CPU thermal protection at 92 degree C<br />
Recovery at 56 degree C<br />
VL<br />
10<br />
GND 9<br />
8<br />
8<br />
7<br />
7<br />
EC_SMDA<br />
6<br />
6<br />
5<br />
5<br />
TH<br />
4<br />
4<br />
PI<br />
3<br />
3<br />
2<br />
2<br />
1<br />
1 <br />
PJP2<br />
SUYIN_200275GR008G13GZR<br />
VMB<br />
CONN@<br />
PL2<br />
GND SMB3025500YA_2P<br />
BATT_S1<br />
1 2<br />
SPOK<br />
PR38<br />
100K_0402_1%<br />
VL<br />
1 2<br />
1<br />
2<br />
PC20<br />
1000P_0402_50V7K<br />
<br />
BATT+<br />
EC_SMCA<br />
PQ3 TP0610K-T1-E3_SOT23-3<br />
3<br />
1<br />
B+ +VSBP<br />
PR39<br />
0_0402_5%<br />
1 2<br />
1<br />
2<br />
PC27<br />
0.1U_0402_16V7K<br />
@<br />
2<br />
G<br />
1<br />
2<br />
1<br />
3<br />
D<br />
S<br />
PC19<br />
0.01U_0402_25V7K<br />
1<br />
PR34<br />
100K_0402_1%<br />
2<br />
1 2<br />
PR36<br />
22K_0402_1%<br />
1<br />
2<br />
1<br />
2<br />
PQ4<br />
2N7002W-T/R7_SOT323-3<br />
PR261<br />
1K_0402_5%<br />
PC24<br />
0.22U_0603_25V7K<br />
@<br />
1<br />
2<br />
PR32<br />
100_0402_1%<br />
PR24<br />
6.49K_0402_1%<br />
2 1<br />
PR33<br />
1K_0402_1%<br />
2<br />
1 2<br />
1 2<br />
1<br />
2<br />
PR29<br />
100_0402_1%<br />
PC25<br />
0.1U_0603_25V7K<br />
@<br />
EC_SMB_DA1 <br />
EC_SMB_CK1 <br />
+3VALWP<br />
BATT_TEMP <br />
PC21<br />
0.1U_0603_25V7K<br />
www.mycomp.su<br />
1<br />
2<br />
PR27<br />
10K_0402_1%<br />
PU3<br />
1<br />
VCC TMSNS1<br />
8<br />
2<br />
GND RHYST1<br />
7<br />
3<br />
OT1 TMSNS2<br />
6<br />
4<br />
OT2 RHYST2<br />
5<br />
G718TM1U_SOT23-8<br />
100K_0402_1%_NCP15WF104F03RC<br />
1 2<br />
1<br />
2<br />
1 2<br />
@PR169<br />
1<br />
2<br />
47K_0402_1%<br />
PH2 @<br />
1<br />
2<br />
1 2<br />
PR28<br />
21K_0402_1%<br />
PR30<br />
9.53K_0402_1%<br />
PH1<br />
100K_0402_1%_NCP15WF104F03RC<br />
VL<br />
1 2<br />
PR21<br />
@<br />
100K_0402_1%<br />
MAINPWON <br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/09/20 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 44 of<br />
55
5<br />
4<br />
3<br />
2<br />
1<br />
TPS51427_B+<br />
TPS51427_B+<br />
D<br />
C<br />
B<br />
PC122<br />
B+<br />
2200P_0402_25V7K<br />
1 2<br />
1 2<br />
PJ12<br />
2<br />
2 1<br />
1<br />
JUMP_43X118<br />
PC120<br />
2200P_0402_25V7K<br />
+3VALWP<br />
220U_6.3V_M<br />
PC39<br />
1<br />
+<br />
2<br />
@PR44<br />
10K_0402_1%<br />
PR41<br />
4.7_1206_5%<br />
+3.3VALWP Ipeak=5.9A ; Imax=4.1A;Iocp=6.6A<br />
Choke DCRmax=23m ohm,<br />
Rds(on)=18m ohm(max) ; Rds(on)=15m<br />
PD17<br />
ohm(typical)<br />
GLZ5.1B_LL34-2<br />
Vlimit=(5E-06 * 294K)/10=147mV<br />
1 2<br />
VS<br />
Ilimit=147mV/18m ~ 147mV/15m<br />
=8.17A ~ 9.8A<br />
Delta I=1.94A (Freq=300KHz)<br />
Iocp=Ilimit+Delta I/2<br />
=9.14A ~ 10.77A<br />
PD16<br />
1SS355_SOD323-2<br />
1<br />
2<br />
1 2<br />
PR42<br />
0_0402_5%<br />
PC31<br />
10U_1206_25V6M<br />
PL3<br />
4.7UH_SIL1045R-4R7PF_6.3A_30%<br />
1 2<br />
1<br />
2<br />
PC45<br />
2200P_0402_50V7K<br />
1<br />
2<br />
PC37<br />
680P_0402_50V7K<br />
1<br />
2<br />
1<br />
2<br />
MAINPWON<br />
2<br />
3 6<br />
PR46<br />
100K_0402_1%<br />
1 2<br />
8<br />
7<br />
1<br />
2<br />
3 6<br />
8<br />
7<br />
1<br />
2<br />
5<br />
5<br />
PR58<br />
200K_0402_5%<br />
1 2<br />
1 3<br />
PQ5<br />
AO4466_SO8<br />
4<br />
PQ7<br />
AO4712_SO8<br />
4<br />
1 2<br />
PR52<br />
806K_0603_1%<br />
VL<br />
1 2<br />
PR54<br />
0_0402_5%<br />
2 1<br />
1 2<br />
PC44<br />
0.22U_0603_25V7K<br />
1<br />
2<br />
PQ37<br />
TP0610K-T1-E3_SOT23-3<br />
PR50<br />
0_0805_5%<br />
1 2<br />
DH3<br />
PR40<br />
2<br />
BST3A<br />
2.2_0603_5% 1<br />
PC43<br />
0.1U_0603_25V7K<br />
@PR56<br />
0_0402_5%<br />
LX3<br />
DL3<br />
FB3<br />
VL<br />
2VREF_TPS51427<br />
1 2<br />
PR51<br />
0_0402_5%<br />
1 2<br />
2VREF_TPS51427<br />
33<br />
26<br />
24<br />
25<br />
23<br />
30<br />
32<br />
1 2<br />
1<br />
PC47<br />
0.22U_0603_10V7K<br />
@PR55<br />
47K_0402_5%<br />
1 2<br />
PC38<br />
0.047U_0402_16V7-K<br />
PC40<br />
0.1U_0603_25V7K<br />
1<br />
2<br />
8<br />
20<br />
4<br />
14<br />
27<br />
1 2<br />
PU4<br />
TP<br />
DRVH2<br />
VBST2<br />
LL2<br />
DRVL2<br />
VOUT2<br />
REFIN2<br />
LDOREFIN<br />
NC<br />
EN_LDO<br />
EN1<br />
EN2<br />
VIN 6<br />
VREF2<br />
VREF3<br />
5<br />
PC143<br />
1U_0603_10V6K<br />
1 2<br />
@PC46<br />
0.047U_0402_16V7K<br />
PC41<br />
1U_0603_10V6K<br />
1 2<br />
1<br />
2<br />
2VREF_TPS51427<br />
TONSE<br />
2<br />
3<br />
V5FILT<br />
LDO 7<br />
VL<br />
V5DRV<br />
VOUT1<br />
SKIPSEL<br />
PGOOD2<br />
PGOOD1<br />
GND<br />
21<br />
PC29<br />
4.7U_0603_6.3V6M<br />
DRVH1<br />
VBST1<br />
DRVL1<br />
TRIP2<br />
PR53<br />
0_0402_5%<br />
LL1<br />
19<br />
17<br />
18<br />
PGND 22<br />
FB1<br />
VSW 9<br />
TRIP1<br />
1<br />
2<br />
15<br />
16<br />
10<br />
11<br />
29<br />
28<br />
13<br />
12<br />
31<br />
DH5<br />
PR47<br />
2.2_0603_5%<br />
BST5A 2 1<br />
LX5<br />
DL5<br />
FB5<br />
ILIM2<br />
PC36<br />
1U_0603_10V6K<br />
1 2<br />
PC42<br />
0.1U_0603_25V7K<br />
@PR59<br />
2<br />
SN0806081RHBR_QFN32_5X5<br />
1 2<br />
0_0402_5%<br />
1<br />
PR45<br />
0_0402_5%<br />
1 2<br />
PQ6<br />
AO4466_SO8<br />
4<br />
PQ8<br />
AO4712_SO8<br />
PR60<br />
330K_0402_1%<br />
2 1<br />
2<br />
1<br />
PR57<br />
294K_0402_1%<br />
www.mycomp.su<br />
4<br />
5<br />
5<br />
3 6<br />
3 6<br />
VL<br />
7<br />
8<br />
2<br />
1<br />
7<br />
8<br />
2<br />
1<br />
PR43<br />
PC34<br />
1<br />
2<br />
1<br />
2<br />
SPOK <br />
+5VALWP Ipeak=7A ; Imax=5A;Iocp=8.4A<br />
Choke DCRmax=23m ohm<br />
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)<br />
Vlimit=(5E-06 * 330K)/10=165mV<br />
Ilimit=165mV/18m ~ 165mV/15m<br />
=9.167A ~ 11A<br />
Delta I=1.96A (Freq=400KHz)<br />
Iocp=Ilimit+Delta I/2<br />
=9.729A ~ 11.562A<br />
4.7_1206_5%<br />
PC28<br />
10U_1206_25V6M<br />
PC30<br />
2200P_0402_50V7K<br />
1<br />
2<br />
PL4<br />
4.7UH_SIL1045R-4R7PF_6.3A_30%<br />
2<br />
1<br />
680P_0402_50V7K<br />
PR49<br />
66.5K_0402_1%<br />
@<br />
1 2<br />
PR48<br />
0_0402_5%<br />
1 2<br />
+5VALWP<br />
1<br />
+ PC35<br />
220U_6.3V_M<br />
2<br />
D<br />
C<br />
B<br />
A<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/09/20 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 45 of<br />
55<br />
3<br />
2<br />
1
A<br />
A<br />
B<br />
1 1<br />
2 2<br />
3 3<br />
4 4<br />
B<br />
C<br />
C<br />
D<br />
D<br />
Iada=0~4.74A(90W/19V=4.736A)<br />
CP = 85%*Iada ; CP = 4.03A<br />
B+<br />
VIN<br />
P2 PQ15<br />
P3 B+ CHG_B+<br />
AO4407_SO8<br />
PJ23<br />
1<br />
8<br />
1<br />
4<br />
2<br />
1<br />
1<br />
2<br />
7<br />
PR61<br />
2<br />
3 6<br />
2<br />
3<br />
0.02_2512_1%<br />
JUMP_43X118 CSIN<br />
5<br />
3<br />
1 DCIN<br />
PD8<br />
PR62<br />
P3<br />
1SS355TE-17_SOD323-2<br />
47K_0402_1%<br />
PR65<br />
1 2<br />
ACOFF<br />
PR94<br />
PQ18<br />
10K_0402_1%<br />
200K_0402_1%<br />
PDTC115EU_SOT323<br />
PR67<br />
PD9<br />
200K_0402_1%<br />
PD10<br />
PR66<br />
2 FSTCHG<br />
2 1<br />
2 1<br />
FSTCHG <br />
1 2 VIN<br />
47K<br />
PQ19<br />
1SS355TE-17_SOD323-2<br />
3 SUSP#<br />
PD11<br />
PDTA144EU_SOT323-3<br />
1 2 6251VDD<br />
100K_0402_1%<br />
SUSP# <br />
PQ20<br />
1SS355TE-17_SOD323-2<br />
2<br />
47K<br />
BAS40CW_SOT323-3<br />
PDTC115EU_SOT323 2 1 2<br />
PR68<br />
10K_0402_5%<br />
wrong Value<br />
FSTCHG 2 1<br />
PU5<br />
PC127<br />
PQ21<br />
0.1U_0603_25V7K<br />
1 2<br />
1<br />
DCIN<br />
VDD DCIN 24<br />
D<br />
2 1<br />
PQ23<br />
PR70<br />
47K_0402_5%<br />
PC67<br />
2 PACIN<br />
6251VDD 1 2<br />
0.1U_0402_16V7K<br />
2N7002W-T/R7_SOT323-3<br />
G<br />
2<br />
PR69<br />
2<br />
150K_0402_1%<br />
ACSET ACPRN 23<br />
PR72<br />
S<br />
PQ24<br />
20_0402_5%<br />
PQ22<br />
D<br />
PDTC115EU_SOT323<br />
6251_EN 3<br />
EN CSON 22<br />
1 2<br />
2<br />
PC53<br />
CSON<br />
G<br />
3S/4S#<br />
2<br />
0.047U_0603_16V7K<br />
S<br />
4<br />
CELLS CSOP<br />
21<br />
1 2<br />
PR73<br />
CSOP<br />
PQ55<br />
PC54<br />
6800P_0402_25V7K<br />
20_0402_5%<br />
PQ56<br />
D<br />
1 2<br />
5<br />
ICOMP CSIN 20<br />
2 1<br />
2N7002W-T/R7_SOT323-3<br />
PR74<br />
4<br />
2<br />
PC129<br />
20_0402_5%<br />
G<br />
1 2 1 PR75 2<br />
10K_0402_1%<br />
6<br />
VCOMP CSIP<br />
19<br />
0.1U_0603_25V7K 1 S<br />
PR77<br />
2<br />
PR76<br />
PL5<br />
PC55<br />
1 2<br />
100_0402_1%<br />
2_0402_5%<br />
10UH_PCMB104T-100MS_6A_20%<br />
PR78<br />
0.02_1206_1%<br />
ACON<br />
ACON<br />
0.01U_0402_25V7K<br />
PC57 1 2<br />
7<br />
LX_CHG<br />
CHG<br />
ICM PHASE<br />
18<br />
1 2<br />
@100P_0402_50V8J<br />
1<br />
4<br />
ADP_I<br />
2<br />
3<br />
PR79<br />
PC58<br />
6251VREF 8<br />
DH_CHG<br />
VREF UGATE<br />
17<br />
22K_0402_5%<br />
PR81<br />
1 2<br />
PR82<br />
PC59<br />
PACIN<br />
0_0603_5%<br />
PQ57<br />
PACIN<br />
1 2<br />
80.6K_0402_1%<br />
0.1U_0603_25V7K<br />
2 1<br />
0.1U_0402_16V7K<br />
9<br />
BST_CHG<br />
BST_CHGA<br />
IREF<br />
CHLIM BOOT<br />
16<br />
1 2<br />
2 1<br />
4<br />
@<br />
PQ53<br />
PR84<br />
PD12<br />
PDTC115EU_SOT323<br />
PR83<br />
6251VREF 1 2<br />
6251aclim 10<br />
6251VDDP<br />
ACLIM VDDP<br />
15<br />
RB751V-40TE17_SOD323-2<br />
100K_0402_1%<br />
12.1K_0402_1%<br />
20K_0402_1%<br />
1 26251VDD<br />
ACOFF<br />
ACOFF 2<br />
PR87 11<br />
DL_CHG<br />
VADJ LGATE<br />
14<br />
PR86<br />
@<br />
4.7_0603_5%<br />
12<br />
GND PGND 13<br />
PC64<br />
4.7U_0805_6.3V6K<br />
PQ54<br />
D<br />
ISL6251AHAZ-T_QSOP24<br />
65W/90W#<br />
2<br />
G<br />
2N7002W-T/R7_SOT323-3<br />
S<br />
1<br />
2<br />
1<br />
3<br />
2N7002W-T/R7_SOT323-3<br />
1<br />
3<br />
Iada=0~4.74A(90W)<br />
Iada=0~3.42A(65W)<br />
BATT Type<br />
PDTC115EU_SOT323<br />
1 3<br />
Normal 3S LI-ON Cells<br />
PQ14<br />
AO4407_SO8<br />
8<br />
7<br />
6<br />
5<br />
CP= 85%*Iada; CP=4.03A<br />
CP= 85%*Iada; CP=2.91A<br />
CP mode<br />
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)<br />
where Vaclm=1.464V (90W), Iinput=4.03A<br />
PR84=12.1K;PR87=20K<br />
where Vaclm=0.391(65W), Iinput=2.91A<br />
PR84=12.1K;PR85=2.55K<br />
IREF=0.7224*Icharge<br />
ADP_I = 19.9*3.42*0.95*0.02=1.29V<br />
4<br />
Charging Voltage<br />
(0x15)<br />
-<br />
1<br />
3<br />
1<br />
2<br />
3<br />
1<br />
2<br />
12600mV<br />
PC62<br />
0.1U_0603_25V7K<br />
1<br />
2<br />
1<br />
2<br />
1<br />
3<br />
4<br />
CV mode<br />
12.60V<br />
PC56<br />
5600P_0402_25V7K<br />
1 2<br />
1<br />
2<br />
PC60<br />
0.01U_0402_25V7K<br />
1<br />
3<br />
1<br />
2<br />
PR64<br />
100K_0402_1%<br />
CALIBRATE#<br />
1<br />
2<br />
1<br />
2<br />
1<br />
3<br />
PR71<br />
PQ17<br />
TP0610K-T1-E3_SOT23-3<br />
1<br />
2<br />
PR85<br />
2.55K_0402_1%<br />
1<br />
2<br />
2<br />
100K_0402_1%<br />
PC49<br />
2.2U_0603_6.3V6K<br />
1<br />
2<br />
PR88<br />
15.4K_0402_1%<br />
1 2<br />
1 2<br />
PR90<br />
31.6K_0402_1%<br />
1<br />
3<br />
BATT_OVP<br />
1 2<br />
Security Classification<br />
Issued Date<br />
1 2<br />
1 2<br />
www.mycomp.su<br />
CSIP<br />
LI-3S :13.5V----BATT-OVP=1.5012V<br />
BATT-OVP=0.1112*VMB<br />
Per cell=4.5V<br />
1<br />
2<br />
PR92<br />
10K_0402_1%<br />
1 2<br />
PC50<br />
10U_1206_25V6M<br />
1<br />
2<br />
PU18B<br />
LM358DT_SO8<br />
7<br />
0<br />
PC51<br />
10U_1206_25V6M<br />
8<br />
PC48<br />
0.1U_0603_25V7K<br />
VS<br />
VMB <br />
<strong>Compal</strong> Secret Data<br />
2007/09/20 Deciphered Date<br />
2010/03/12<br />
1<br />
2<br />
P<br />
G<br />
4<br />
+<br />
-<br />
1<br />
2<br />
5<br />
6<br />
1<br />
2<br />
PC61<br />
2200P_0402_25V7K<br />
PC65<br />
0.01U_0402_25V7K<br />
1<br />
2<br />
5<br />
5<br />
3 6<br />
3 6<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
7<br />
8<br />
2<br />
1<br />
7<br />
8<br />
2<br />
1<br />
AO4466_SO8<br />
AO4466_SO8<br />
Title<br />
VIN<br />
<strong>Compal</strong> Electronics, Inc.<br />
<br />
BATT+<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
Document Number Rev<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
Custom<br />
D<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 46 of<br />
55<br />
1<br />
2<br />
1<br />
2<br />
PR89<br />
340K_0402_1%<br />
PR91<br />
499K_0402_1%<br />
PR93<br />
105K_0402_1%<br />
PR80<br />
4.7_1206_5%<br />
PC128<br />
680P_0402_50V7K<br />
1<br />
2<br />
PQ16<br />
AO4407_SO8<br />
1<br />
8<br />
2<br />
7<br />
3 6<br />
5<br />
PC66<br />
0.01U_0402_25V7K<br />
4<br />
1 2<br />
1<br />
3<br />
PR63<br />
47K_0402_1%<br />
1 2<br />
PC52<br />
0.1U_0603_25V7K<br />
1<br />
2<br />
1<br />
3<br />
PC68<br />
10U_1206_25V6M<br />
1<br />
2<br />
PC63<br />
10U_1206_25V6M<br />
1<br />
2
A<br />
A<br />
B<br />
1 1<br />
2 2<br />
3 3<br />
4 4<br />
B<br />
C<br />
C<br />
D<br />
D<br />
SPOK<br />
SYSON<br />
+5VALW<br />
VFB=0.75V<br />
V=0.75*(1+4.7K/10K)=1.1V<br />
Fsw=280KHz<br />
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.<br />
Ipeak=7.42A, Imax=5.2A, Iocp=8.9A<br />
Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A<br />
=>1/2Delta I=1.03A<br />
Vtripmax=Iocp*Rdson=8.9*5.6*1.3=0.065V<br />
Rcs=Vtrip/9uA=0.065V/9uA=7.2K<br />
choose Rcs=7.32K<br />
Iocpmax=((7.32K*11uA)/0.0045)+1.03A=19A<br />
Iocpmin=((7.32K*9uA)/(0.0056*1.3))+1.03A=10A<br />
Iocp=10A~19A<br />
+5VALW<br />
PR97<br />
0_0402_5%<br />
1 2<br />
1<br />
PR99<br />
30K_0402_5%<br />
@<br />
PR105 0_0402_5%<br />
1 2<br />
2<br />
PR101<br />
100_0603_1%<br />
1 2<br />
1<br />
2<br />
1<br />
2<br />
PC77<br />
4.7U_0603_6.3V6K<br />
1<br />
@PR109<br />
30K_0402_5%<br />
2<br />
PR111<br />
100_0603_1%<br />
1 2<br />
1<br />
PC87<br />
4.7U_0603_6.3V6K<br />
2<br />
1<br />
2<br />
PC74<br />
@0.1U_0402_16V7K<br />
1<br />
2<br />
@PC85<br />
0.1U_0402_16V7K<br />
PC79<br />
@47P_0402_50V8J<br />
1 2<br />
PR103<br />
4.7K_0402_1%<br />
1 2<br />
PR104<br />
8.45K_0402_1%<br />
PC89<br />
@47P_0402_50V8J<br />
1 2<br />
2<br />
3<br />
4<br />
5<br />
6<br />
2<br />
3<br />
4<br />
5<br />
6<br />
PU7<br />
TON<br />
PU6<br />
VOUT<br />
VDD<br />
FB<br />
TON<br />
VOUT<br />
VDD<br />
FB<br />
PGOOD<br />
PGOOD<br />
PR96<br />
255K_0402_1%<br />
1 2<br />
PR98<br />
0_0603_5%<br />
BST_1.1VALW 1 2<br />
EN/DEM 1<br />
GND<br />
7<br />
NC 15<br />
PGND<br />
8<br />
14<br />
BOOT<br />
UGATE<br />
PHASE<br />
CS<br />
VDDP<br />
LGATE<br />
13<br />
12<br />
11<br />
10<br />
PR106<br />
226K_0402_1%<br />
1 2<br />
PR108<br />
0_0603_5%<br />
BST_1.5V 1 2<br />
EN/DEM 1<br />
GND<br />
7<br />
NC 15<br />
PGND<br />
8<br />
14<br />
BOOT<br />
9<br />
DH_1.5V<br />
LX_1.5V<br />
DL_1.5V<br />
PC75<br />
BST_1.1VALW-11 2<br />
DH_1.1VALW<br />
0.1U_0603_25V7K<br />
LX_1.1VALW<br />
1 2<br />
PR102<br />
7.32K_0402_1%<br />
DL_1.1VALW<br />
RT8209BGQW_WQFN14_3P5X3P5<br />
UGATE<br />
PHASE<br />
CS<br />
VDDP<br />
LGATE<br />
13<br />
12<br />
11<br />
10<br />
9<br />
PC84<br />
0.1U_0603_25V7K<br />
BST_1.5V-1 1 2<br />
1 2<br />
PR112<br />
13K_0402_1%<br />
RT8209BGQW_WQFN14_3P5X3P5<br />
+5VALW<br />
1<br />
2<br />
+5VALW<br />
1<br />
2<br />
PQ25<br />
PC80<br />
4.7U_0805_10V6K<br />
PC90<br />
4.7U_0805_10V6K<br />
PQ28<br />
4<br />
4<br />
PQ27<br />
4<br />
5<br />
5<br />
3 6<br />
3 6<br />
5<br />
PQ26<br />
3 6<br />
7<br />
8<br />
2<br />
1<br />
7<br />
8<br />
2<br />
1<br />
7<br />
8<br />
2<br />
1<br />
1<br />
2<br />
AO4466_SO8<br />
1<br />
2<br />
AO4466_SO8<br />
AO4456_SO8<br />
1<br />
2<br />
PC139<br />
2200P_0402_50V7K<br />
1<br />
2<br />
PC81<br />
2200P_0402_50V7K<br />
1<br />
2<br />
1.1VALW_B+<br />
PR100<br />
4.7_1206_5%<br />
1<br />
2<br />
PC72<br />
10U_1206_25V6M<br />
DCR= 7.5 mohm<br />
PL6<br />
1UH_FDUE1040D-1R0M-P3_21.3A_20%<br />
1 2<br />
1.5V_B+<br />
PC82<br />
10U_1206_25V6M<br />
PL7<br />
1UH_MMD-10DZ-1R0M-X1A_18A_20%<br />
1 2<br />
1<br />
2<br />
1<br />
2<br />
AO4456_SO8<br />
www.mycomp.su<br />
4<br />
5<br />
3 6<br />
7<br />
8<br />
2<br />
1<br />
PC78<br />
680P_0603_50V7K<br />
PR110 @<br />
4.7_1206_5%<br />
PC88<br />
@<br />
680P_0603_50V7K<br />
PJ14<br />
2<br />
2 1<br />
1<br />
1<br />
+ PC76<br />
330U_6.3V_M<br />
2<br />
PJ15<br />
2<br />
2 1<br />
1<br />
JUMP_43X118<br />
1<br />
+ PC86<br />
330U_6.3V_M<br />
2<br />
JUMP_43X118<br />
+1.1VALWP<br />
+1.5VP<br />
B+<br />
B+<br />
VFB=0.75V<br />
Vo=0.75*(1+10K/10K)=1.5V<br />
Fsw=280KHz<br />
Cout ESR=17 mohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm<br />
Ipeak=13.5A, Imax=9.5A, Iocp=16.2A<br />
Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=3.9A<br />
=>1/2Delta I=1.95A<br />
Vtripmax=Iocp*Rdson=16.2*5.6*1.3=0.118V<br />
Rcs=Vtrip/9uA=0.118V/9uA=13.1K<br />
choose Rcs=13K<br />
Iocpmax=((13K*11uA)/0.0045)+1.95A=32A<br />
Iocpmin=((13K*9uA)/(0.0056*1.3))+1.95A=18A<br />
Iocp=18A~32A<br />
1<br />
2<br />
PR113<br />
10K_0402_1%<br />
1 2<br />
PR114<br />
10K_0402_1%<br />
Security Classification<br />
Issued Date<br />
<strong>Compal</strong> Secret Data<br />
2007/09/20 Deciphered Date<br />
2010/03/12<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 47 of<br />
55<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911
A<br />
A<br />
B<br />
1 1<br />
2 2<br />
3 3<br />
4 4<br />
B<br />
C<br />
C<br />
D<br />
D<br />
POWER_SEL<br />
VLDT_EN<br />
VDDR_SW<br />
POWER_SEL<br />
HIGH 0.95V<br />
LOW<br />
1.1V<br />
1 2<br />
PR157<br />
0_0402_5%<br />
PR131<br />
10K_0402_1%<br />
+5VALW<br />
+5VALW<br />
+5VALW<br />
VFB=0.75V<br />
V=0.75*(1+4.7K/10K)=1.1V<br />
Fsw=280KHz<br />
Cout ESR=15m ohm Rdson(max)=18m Rdson(typ)=15m<br />
Ipeak=7.6A, Imax=5.4A, Iocp=9.2A<br />
Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A<br />
=>1/2Delta I=1.03A<br />
Vtripmax=Iocp*Rdson=9.2*5.6*1.3=0.067V<br />
Rcs=Vtrip/9uA=0.067V/9uA=7.44K<br />
choose Rcs=7.5K<br />
Iocpmax=((7.5K*11uA)/0.0045)+1.03A=19.36A<br />
Iocpmin=((7.5K*9uA)/(0.018*1.3))+1.03A=10.3A<br />
Iocp=10.3A~19.36A<br />
PR155<br />
10K_0402_1%<br />
1 2<br />
PC121<br />
0.1U_0402_16V7K<br />
PC126<br />
0.01U_0402_25V7K<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
7<br />
8<br />
PR188<br />
@<br />
47K_0402_5%<br />
PQ43<br />
2<br />
G<br />
PU12<br />
POK<br />
EN<br />
1<br />
3<br />
6<br />
D<br />
S<br />
VCNTL<br />
GND<br />
1<br />
1<br />
@PR152<br />
10K_0402_1%<br />
2<br />
SSM3K7002F_SC59-3<br />
1<br />
2<br />
1<br />
2<br />
10K_0402_5%<br />
PR159<br />
1 2 2<br />
G<br />
PC125<br />
0.1U_0402_25V6<br />
1<br />
2<br />
VLDT_EN<br />
PC115<br />
1U_0402_6.3V6K<br />
VIN 5<br />
VOUT<br />
VOUT<br />
FB<br />
4<br />
3<br />
2<br />
VIN 9<br />
APL5915KAI-TRL_SO8<br />
+5VALW<br />
+1.5V<br />
1<br />
PR161<br />
165K_0402_1%<br />
2<br />
SSM3K7002F_SC59-3<br />
PQ58<br />
2<br />
G<br />
1<br />
1<br />
2<br />
FB1_NB_COREP<br />
1 2<br />
PR158<br />
11.8K_0402_1%<br />
PR116<br />
100K_0402_5%<br />
1 2<br />
@PR118<br />
30K_0402_5%<br />
PJ24<br />
@JUMP_43X79<br />
PC116<br />
4.7U_0805_6.3V6K<br />
1<br />
2<br />
PR120<br />
100_0603_1%<br />
1 2<br />
FB1_NB_COREP<br />
PC98<br />
@47P_0402_50V8J<br />
1 2<br />
PR122<br />
2.37K_0402_1%<br />
1 2<br />
1<br />
2<br />
PC119<br />
22U_0805_6.3V6M<br />
+CPU_VDDRP<br />
PR115<br />
255K_0402_1%<br />
1 2<br />
PR117<br />
0_0603_5%<br />
BST_NB_CORE 1 2<br />
VDDR_SW<br />
HIGH 1.05V<br />
LOW<br />
2<br />
3<br />
4<br />
5<br />
6<br />
PU8<br />
TON<br />
VOUT<br />
VDD<br />
FB<br />
PGOOD<br />
EN/DEM 1<br />
GND<br />
7<br />
0.9V<br />
NC 15<br />
PGND<br />
8<br />
14<br />
BOOT<br />
UGATE<br />
PHASE<br />
CS<br />
VDDP<br />
LGATE<br />
13<br />
12<br />
11<br />
10<br />
9<br />
+3VS<br />
PC93<br />
BST_NB_CORE-1 1 2<br />
DH_NB_CORE<br />
0.1U_0603_25V7K<br />
LX_NB_CORE<br />
1 2<br />
PR121<br />
7.5K_0402_1%<br />
DL_NB_CORE<br />
RT8209BGQW_WQFN14_3P5X3P5<br />
1<br />
2<br />
1<br />
2<br />
+5VALW<br />
PC114<br />
1U_0402_6.3V6K<br />
PC99<br />
4.7U_0805_10V6K<br />
PU16<br />
APL5508-25DC-TRL_SOT89-3<br />
2<br />
IN<br />
PQ29<br />
4<br />
PQ30<br />
4<br />
5<br />
5<br />
GND<br />
1<br />
3 6<br />
3 6<br />
OUT<br />
7<br />
8<br />
2<br />
1<br />
7<br />
8<br />
2<br />
1<br />
3<br />
1<br />
2<br />
PC140<br />
2200P_0402_50V7K<br />
AO4466_SO8<br />
AO4456_SO8<br />
1<br />
2<br />
PC113<br />
4.7U_0805_6.3V6K<br />
1<br />
2<br />
NB_CORE_B+<br />
PC91<br />
10U_1206_25V6M<br />
1<br />
2<br />
DCR= 7.5 mohm<br />
@PR153<br />
150_1206_5%<br />
PC218<br />
100U_25V_M<br />
1<br />
+<br />
2<br />
1<br />
+ PC95<br />
330U_6.3V_M<br />
2<br />
+2.5VSP<br />
B+<br />
+NB_COREP<br />
1<br />
3<br />
1<br />
1<br />
2<br />
2<br />
D<br />
S<br />
1<br />
3<br />
D<br />
S<br />
PQ44<br />
SSM3K7002F_SC59-3<br />
1<br />
PR154<br />
31.6K_0402_1%<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
PC96<br />
4.7U_0603_6.3V6K<br />
PC118<br />
1<br />
2<br />
2<br />
0.01U_0402_25V7K<br />
PR156<br />
249K_0402_1%<br />
PC94<br />
0.1U_0402_16V7K<br />
1<br />
2<br />
PR123<br />
8.87K_0402_1%<br />
www.mycomp.su<br />
PL8<br />
1UH_FDUE1040D-1R0M-P3_21.3A_20%<br />
1 2<br />
1<br />
2<br />
1<br />
2<br />
PR119 @<br />
4.7_1206_5%<br />
PC97<br />
@<br />
680P_0603_50V7K<br />
2<br />
PJ16<br />
2<br />
1<br />
1<br />
@JUMP_43X79<br />
PR160<br />
10K_0402_1%<br />
2<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/09/20 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 48 of<br />
55
5<br />
4<br />
3<br />
2<br />
1<br />
+1.5V<br />
PR124<br />
1K_1206_5%<br />
1 2<br />
D<br />
PC100<br />
4.7U_0805_6.3V6K<br />
1<br />
1<br />
2<br />
2<br />
1 2<br />
PJ17<br />
JUMP_43X79<br />
1<br />
PR130<br />
1K_0402_1%<br />
PU9<br />
1<br />
VIN<br />
2<br />
GND<br />
3<br />
VREF<br />
4<br />
VOUT<br />
VCNTL<br />
6<br />
NC 5<br />
NC 7<br />
NC 8<br />
2 1<br />
+3VALW<br />
PC101<br />
1U_0603_6.3V6M<br />
VIN<br />
PD13<br />
2 1<br />
LL4148_LL34-2<br />
PR125<br />
1K_1206_5%<br />
1 2<br />
PR126<br />
1K_1206_5%<br />
1 2<br />
PR127<br />
1K_1206_5%<br />
1 2<br />
PR128<br />
2 1<br />
100K_0402_5%<br />
PR129<br />
2 1<br />
PQ31<br />
TP0610K-T1-E3_SOT23-3<br />
3<br />
1<br />
100K_0402_5%<br />
2<br />
1<br />
B+<br />
D<br />
2<br />
TP<br />
9<br />
APL5336KAI-TRL SOP<br />
C<br />
B<br />
SUSP<br />
PR133<br />
300K_0402_5%<br />
1 2<br />
PC104<br />
0.22U_0402_10V4Z<br />
1<br />
2<br />
PQ32<br />
D<br />
2<br />
G<br />
S<br />
1<br />
3<br />
2N7002W-T/R7_SOT323-3<br />
1<br />
PR134<br />
2<br />
1K_0402_1%<br />
PC102<br />
0.1U_0402_16V7K<br />
1<br />
2<br />
1<br />
2<br />
Ipeak=1A, Imax=0.7A<br />
+0.75VSP<br />
PC103<br />
10U_0805_6.3V6M<br />
MAINPWON<br />
<br />
ACON<br />
PD14<br />
2<br />
3<br />
VL<br />
PR137<br />
100K_0402_1%<br />
BAS40CW_SOT323-3<br />
RTCVREF<br />
<br />
ACIN<br />
Precharge detector<br />
Min. typ. Max.<br />
H-->L 14.589V 14.84V 15.243V<br />
L-->H 15.562V 15.97V 16.388V<br />
1<br />
1<br />
2<br />
1<br />
2<br />
PC105<br />
0.1U_0603_25V7K<br />
www.mycomp.su<br />
7<br />
ACOFF<br />
2<br />
PR135<br />
2.2M_0402_5%<br />
2 1<br />
VS<br />
O<br />
8<br />
PU1B<br />
+<br />
5<br />
P<br />
G<br />
-<br />
6<br />
LM393DR_SO8<br />
4<br />
2 1<br />
PR140<br />
34K_0402_1%<br />
2 1<br />
PC106<br />
1000P_0402_50V7K<br />
2 1<br />
32.4<br />
PR142<br />
66.5K_0402_1%<br />
3<br />
1<br />
PRG++ 2 1<br />
@PR142<br />
D<br />
1<br />
S<br />
3<br />
PQ33<br />
DTC115EUA_SC70-3<br />
2<br />
3<br />
1<br />
3<br />
1 2<br />
PR138<br />
191K_0402_1%<br />
PR139<br />
PQ35<br />
2<br />
G<br />
SSM3K7002FU_SC70-3<br />
PR132<br />
100K_0402_5%<br />
PQ34<br />
DTC115EUA_SC70-3<br />
B+<br />
1<br />
499K_0402_1%<br />
PR136<br />
499K_0402_1%<br />
2 1<br />
2<br />
2 1<br />
PC107<br />
0.01U_0402_25V7K<br />
PR141<br />
47K_0402_5%<br />
2 1<br />
PACIN <br />
PQ36<br />
DTC115EUA_SC70-3<br />
2<br />
+5VALW<br />
C<br />
B<br />
A<br />
BATT ONLY<br />
Precharge detector<br />
Min. typ. Max.<br />
H-->L 6.138V 6.214V 6.359V<br />
L-->H 7.196V 7.349V 7.505V<br />
A<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/09/20 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
Custom<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 49 of<br />
55<br />
5<br />
4<br />
3<br />
2<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
PR144<br />
200K_0402_1%<br />
1 2<br />
VGA_ON <br />
D<br />
C<br />
B<br />
+3VALW<br />
2 1<br />
1<br />
2 1 2<br />
@PJ18<br />
JUMP_43X79<br />
@PC112<br />
4.7U_0603_6.3V6K<br />
PJ28<br />
+5VALW<br />
1<br />
1 2<br />
2<br />
JUMP_43X79<br />
+5VALW<br />
2 1<br />
PC109 @<br />
1U_0402_6.3V6K<br />
PU14<br />
6<br />
VCNTL<br />
5<br />
VIN VOUT<br />
3<br />
9<br />
VIN VOUT<br />
4<br />
8<br />
EN<br />
7<br />
POK<br />
GND<br />
1<br />
PR147<br />
402K_0402_1%<br />
+1.8VSP1 2 1<br />
1<br />
2<br />
PC157<br />
0.1U_0402_25V6<br />
2 1<br />
PC123<br />
10U_0805_10V4Z<br />
1 2<br />
@PR149<br />
FB<br />
2<br />
15K_0402_1%<br />
APL5913-KAC-TRL_SO8<br />
@<br />
+1.8VSP2<br />
1<br />
1<br />
1<br />
2<br />
1 2<br />
1 2<br />
PC153<br />
0.1U_0402_16V7K<br />
1 2<br />
1 2<br />
PR148<br />
0_0402_5%<br />
PC154<br />
10U_0805_10V4Z<br />
2<br />
316K_0402_1%<br />
PR145<br />
PU11<br />
1<br />
FB EN/SYNC 10<br />
PR150 @<br />
12K_0402_1%<br />
PC108 @<br />
0.01U_0402_25V7K<br />
2<br />
GND GND 9<br />
3<br />
SW SW 8<br />
4<br />
IN<br />
IN 7<br />
2<br />
5<br />
BS<br />
POK<br />
TP<br />
MP2121DQ-LF-Z_QFN10_3X3<br />
PC111 @<br />
22U_0805_6.3V6M<br />
6<br />
11<br />
2<br />
2 1<br />
PC156<br />
0.22U_0402_10V4Z<br />
PL9<br />
2.2UH_MSCDRI-74A-2R2M-E_6.5A_20%<br />
1 2<br />
+1.8VSP1<br />
PD15<br />
@<br />
B340A_SMA2<br />
1<br />
2<br />
+1.5V<br />
1<br />
1<br />
2<br />
1<br />
1<br />
2<br />
PR143<br />
4.7_1206_5%<br />
PC155<br />
680P_0603_50V7K<br />
PJ31<br />
JUMP_43X79<br />
VGA@<br />
PC142<br />
4.7U_0603_6.3V6K<br />
VGA@<br />
+3VALW<br />
www.mycomp.su<br />
1<br />
2<br />
1<br />
2<br />
PC117<br />
22U_0805_6.3V6M<br />
PC147<br />
1U_0402_6.3V6K<br />
VGA@<br />
PU10<br />
6<br />
VCNTL<br />
5<br />
VIN VOUT<br />
3<br />
9<br />
VIN VOUT<br />
4<br />
8<br />
FB=0.8V<br />
PR174<br />
EN<br />
7<br />
1.54K_0402_1%<br />
POK FB<br />
2<br />
VGA@<br />
VGA@<br />
2<br />
PC124<br />
22U_0805_6.3V6M<br />
1<br />
1<br />
GND<br />
1<br />
APL5913-KAC-TRL_SO8<br />
1<br />
1<br />
2<br />
2<br />
1<br />
1<br />
2<br />
2<br />
+1.0VSGP<br />
PC145<br />
PC144<br />
0.022U_0402_25V7K<br />
22U_0805_6.3V6M<br />
VGA@<br />
VGA@<br />
C<br />
B<br />
A<br />
VGA_ON<br />
@<br />
PR151<br />
200K_0402_1%<br />
1 2<br />
@PC150<br />
0.1U_0402_10V7K<br />
1<br />
2<br />
1<br />
2<br />
@<br />
PR146<br />
47K_0402_5%<br />
2<br />
VGA_PWR_ON<br />
VGA_PWR_ON<br />
VGA@<br />
PR173<br />
1 2<br />
10K_0402_5%<br />
VGA@<br />
PC146<br />
1U_0402_6.3V6K<br />
2 1<br />
1<br />
2<br />
@PR172<br />
22K_0402_5%<br />
2<br />
VGA@<br />
PR175<br />
6.04K_0402_1%<br />
Ien=10uA, Vth=0.3V, notice<br />
the res. and pull high<br />
voltage from HW<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/08/10 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 50 of<br />
55<br />
3<br />
2<br />
1
A<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
6<br />
7<br />
9<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
5<br />
5<br />
3<br />
2<br />
1<br />
7<br />
8<br />
2<br />
1<br />
1<br />
2<br />
1<br />
3<br />
5<br />
7<br />
8<br />
2<br />
1<br />
1<br />
2<br />
5<br />
3<br />
2<br />
1<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
3<br />
1<br />
3<br />
1<br />
2<br />
1<br />
3<br />
B<br />
C<br />
D<br />
E<br />
F<br />
G<br />
H<br />
1 1<br />
B+<br />
PL13<br />
HCB4532KF-800T90_1812<br />
VGA@<br />
1 2<br />
B+_core<br />
1VGA@<br />
PC164<br />
10U_1206_25V6M<br />
LX_VCORE<br />
VGA@<br />
DH_VCORE<br />
1 PR183 2<br />
PR184<br />
0_0603_5%<br />
BST_VCORE 1 2<br />
DH_VCORE-1<br />
VGA_CORE<br />
F=1/(75*e-12*33)=400K<br />
Ipeak=33A Imax=23.1A Iocp=39.6A<br />
Rsenmax=(5.6*1.3*39)/20=14.2 Kohm choose<br />
Rsen=14.3Kohm<br />
Iocpmin=(14.3*20)/(5.6*1.3)=39.3A<br />
0_0603_5%<br />
PC166<br />
VGA@<br />
+5VS<br />
VGA@<br />
0.1U_0603_25V7K<br />
VGA@<br />
NC<br />
TPCA8030-H_SOP-ADV8-5<br />
VGA@<br />
PQ38<br />
VGA@<br />
TPCA8030-H_SOP-ADV8-5<br />
PR185<br />
PQ45<br />
@<br />
0_0603_5%<br />
PU998<br />
1 PR1862<br />
7138_VCORE<br />
4<br />
4<br />
4.7_0603_5% VGA@<br />
3<br />
+3VS<br />
VIN<br />
PVCC 14<br />
1 2<br />
PC167<br />
DCR=2.2m OHM<br />
7138_VCORE<br />
2.2U_0603_6.3V6K<br />
VGA@<br />
PL14<br />
PC168<br />
4<br />
DL_VCORE<br />
2 2.2U_0603_6.3V6K<br />
VCC<br />
LG 13<br />
0.56U_PCMC104T-R56MN_25A_20%<br />
2<br />
VGA@<br />
1 2<br />
+VGA_COREP<br />
@<br />
PR187<br />
APW7138NITRL_SSOP16<br />
VGA@<br />
10K_0402_5%<br />
PGND 12<br />
PR191<br />
VGA@<br />
VGA@<br />
4.7_1206_5%<br />
PR298<br />
1<br />
PC169<br />
VGA@<br />
PR190<br />
PQ39<br />
PQ40<br />
VGA@<br />
0_0402_5%<br />
1 2<br />
5<br />
ISEN_VCORE<br />
+<br />
VGA_PWR_ON<br />
EN<br />
ISEN 11 1 2<br />
VGA@<br />
PR177<br />
20K_0402_1%<br />
4<br />
4<br />
PR297<br />
14.3K_0402_1%<br />
PC171<br />
VGA@<br />
VGA@<br />
VGA@<br />
GCORE_SEN<br />
2<br />
1 2<br />
GCORE_SEN <br />
680P_0603_50V7K<br />
VGA@<br />
10_0402_5%<br />
VFB=0.6V<br />
VGA@<br />
ESR=15 mohm<br />
VGA@<br />
PC170<br />
VGA@<br />
0.1U_0402_10V7K<br />
PR193<br />
Rds(TYP)=2.3mohm;<br />
MAD@<br />
PR197<br />
4.99K_0402_1%<br />
68.1K_0402_1%<br />
PR195<br />
VGA@<br />
Rds(max)=3.2mohm<br />
VGA@<br />
PC998<br />
+3VS<br />
22K_0402_1%<br />
0.01U_0402_25V7K<br />
VGA@<br />
@<br />
PAK@<br />
PR197<br />
VGA@<br />
43.2K_0402_1%<br />
PR211<br />
33K_0402_1%<br />
10K_0402_5%<br />
VGA@<br />
PAK@<br />
VGA@<br />
PR199<br />
MAD@<br />
PR198<br />
PQ41<br />
D<br />
10K_0402_5%<br />
9.53K_0402_1%<br />
PR198<br />
2 1 2<br />
G<br />
VGA@<br />
8.87K_0402_1%<br />
S<br />
PR200<br />
@<br />
10K_0402_1%<br />
PC175<br />
4700P_0402_25V7K<br />
3 3<br />
MAD@<br />
PR201<br />
VGA@<br />
31.6K_0402_1%<br />
GPU_VID0<br />
1 2<br />
PC165<br />
10U_1206_25V6M<br />
GPU_VID1<br />
PC172<br />
22P_0402_50V8J<br />
Park XT<br />
Core Voltage Level<br />
2200P_0402_25V7K<br />
PC174<br />
GND 8<br />
NC<br />
PGOOD 2<br />
FB<br />
GPU_VID0<br />
PHASE 1<br />
PR196<br />
FSET<br />
UG 16<br />
15<br />
BOOT<br />
VO<br />
10<br />
GPU_VID1<br />
Madison<br />
Core Voltage Level<br />
1 2<br />
3 6<br />
AO4456_SO8<br />
PAK@<br />
PR201<br />
25.5K_0402_1%<br />
www.mycomp.su<br />
PQ42<br />
2N7002W-T/R7_SOT323-3<br />
VGA@<br />
D<br />
S<br />
3 6<br />
2<br />
G<br />
AO4456_SO8<br />
VGA@<br />
PR202<br />
1 2<br />
10K_0402_5%<br />
VGA@<br />
PC177<br />
4700P_0402_25V7K<br />
+3VS<br />
1 2<br />
1 2<br />
PR210<br />
VGA@<br />
10K_0402_5%<br />
@PR204<br />
10K_0402_1%<br />
2N7002W-T/R7_SOT323-3<br />
1 2<br />
1 2<br />
1 2<br />
2N7002W-T/R7_SOT323-3<br />
VGA@<br />
PQ60<br />
D<br />
S<br />
VGA@<br />
PR203<br />
10K_0402_1%<br />
2 1 2<br />
G<br />
+3VS<br />
1 2<br />
1 2<br />
330U_6.3V_M<br />
@<br />
PR212<br />
10K_0402_5%<br />
GPU_VID1 <br />
PR205<br />
VGA@<br />
10K_0402_1%<br />
1 1<br />
0.93 V<br />
1 1<br />
0.9 V<br />
1 0<br />
1.0 V<br />
1 0<br />
0.95 V<br />
+3VS<br />
0 1<br />
1.05V<br />
0 1<br />
1.0V<br />
10K_0402_5%<br />
0 0<br />
1.12 V<br />
0 0<br />
1.05 V<br />
VGA@<br />
PR206<br />
D<br />
10K_0402_1%<br />
PQ61 2<br />
1 2<br />
4 2N7002W-T/R7_SOT323-3<br />
G<br />
GPU_VID0 <br />
4<br />
S<br />
VGA@<br />
PR207<br />
VGA@<br />
1 2<br />
1 2<br />
@<br />
PR213<br />
10K_0402_1%<br />
A<br />
B<br />
C<br />
D<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/12/18 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
401827<br />
C<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Tuesday, September 14, 2010<br />
Date: Sheet of<br />
51 55<br />
E<br />
F<br />
G<br />
H
A<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
5<br />
1<br />
2<br />
1<br />
2<br />
3<br />
2<br />
1<br />
5<br />
2<br />
1<br />
3<br />
2<br />
1<br />
2<br />
1<br />
1<br />
2<br />
1<br />
2<br />
2<br />
1<br />
2<br />
1<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
1<br />
2<br />
B<br />
C<br />
D<br />
E<br />
F<br />
G<br />
H<br />
PQ50<br />
+<br />
1 1<br />
2 1 2 1<br />
UGATE_NB<br />
8<br />
G2 D2<br />
1<br />
7<br />
PC184<br />
D2<br />
2<br />
PR214<br />
S2/D1<br />
2<br />
6<br />
1200P_0402_50V7K<br />
G1<br />
3<br />
44.2K_0402_1%<br />
S2/D1<br />
5<br />
PR215<br />
S2/D1 S1<br />
4<br />
2_0603_5%<br />
AO4932_SO8<br />
+5VS 1 2<br />
PC189<br />
PL16<br />
1000P_0402_50V7K<br />
3.3UH_SIQB74B-3R3PF_5.9A_20%<br />
2 1<br />
PHASE_NB<br />
1 2<br />
PR230<br />
PC190<br />
PR216<br />
0_0603_5%<br />
+CPU_CORE_NB<br />
0.1U_0603_16V7K<br />
22K_0402_1%<br />
BOOT_NB 1 2 1 2<br />
PR217<br />
2 1<br />
4.7_1206_5%<br />
1<br />
PR218<br />
PC191<br />
10_0402_5%<br />
0.22U_0603_10V7K<br />
+ PC192<br />
1 2 +CPU_CORE_NB<br />
220U_D2_4VM<br />
CPU_B+ 1 2<br />
PC193<br />
680P_0603_50V7K<br />
2<br />
+VDDNB<br />
PR219<br />
CPU_VDDNB_FB_H <br />
Design Current: 2.8A<br />
2_0603_5%<br />
PR221<br />
+3VS<br />
+5VS +3VS<br />
13.7K_0402_1%<br />
Max current: 4A<br />
2 1<br />
PHASE_NB<br />
PR220<br />
OCP_min:5A<br />
0_0402_5%<br />
LGATE_NB<br />
PC194<br />
CPU_B+<br />
0.1U_0603_16V7K<br />
PHASE_NB<br />
PR222<br />
PR223<br />
UGATE_NB<br />
0_0402_5%<br />
@ 105K_0402_1%<br />
2 1<br />
PQ46<br />
CPU_VDDNB_FB_L <br />
PR224<br />
0_0402_5%<br />
PR225<br />
PR227<br />
@ 10K_0402_1%<br />
PR226<br />
105K_0402_1%<br />
PR228<br />
10_0402_5%<br />
UGATE0<br />
4<br />
@ 105K_0402_1%<br />
PU15<br />
2 PHASE0<br />
2<br />
PR229<br />
PL17<br />
2.2_0603_1%<br />
0.36UH_PCMC104T-R36MN1R17_30A_20%<br />
VGATE<br />
1<br />
BOOT_NB BOOT0<br />
OFS/VFIXEN<br />
BOOT_NB 36<br />
1 2 1 2<br />
1 2<br />
+CPU_CORE<br />
PR237 0_0402_5%<br />
1 2<br />
2<br />
BOOT0<br />
H_PWRGD_L<br />
PGOOD<br />
BOOT0<br />
35<br />
PC199<br />
@<br />
1 2<br />
0.22U_0603_10V7K<br />
PQ47<br />
PR232<br />
PR231 0_0402_5% @<br />
3<br />
UGATE0<br />
PWROK<br />
UGATE0<br />
34<br />
PQ48<br />
16.2K_0402_1%<br />
PR233<br />
2 1<br />
4<br />
PHASE0<br />
4.7_1206_5%<br />
CPU_SVD<br />
SVD<br />
PHASE0<br />
33<br />
TPCA8028-H_SOP-ADVANCE8-5<br />
PR234<br />
0_0402_5%<br />
1 PR235 2<br />
5<br />
SVC<br />
PGND0<br />
32<br />
4<br />
4<br />
4.02K_0402_1%<br />
2 1<br />
+5VS<br />
CPU_SVC<br />
PR236<br />
0_0402_5%<br />
6<br />
LGATE0<br />
ENABLE<br />
LGATE0<br />
31<br />
PC200<br />
PC201<br />
680P_0603_50V7K<br />
2 1<br />
7<br />
RBIAS<br />
PVCC 30<br />
0.1U_0402_16V7K<br />
VR_ON<br />
8<br />
LGATE1<br />
OCSET<br />
ISL6265IRZ-T_QFN48_6X6~D<br />
LGATE1<br />
29<br />
PR238<br />
PR239<br />
PC202<br />
2 1<br />
9<br />
LGATE0<br />
VDIFF0<br />
PGND1<br />
28<br />
1U_0603_16V6K<br />
21.5K_0402_1% 2 1<br />
95.3K_0402_1%<br />
10<br />
PHASE1<br />
FB0<br />
PHASE1<br />
27<br />
11<br />
UGATE1<br />
COMP0<br />
UGATE1<br />
26<br />
CPU_B+<br />
12<br />
BOOT1<br />
VW0<br />
BOOT1<br />
25<br />
ISP0<br />
ISN0<br />
UGATE1<br />
4<br />
CPU_VDD0_FB_H<br />
VSEN0<br />
0_0402_5%<br />
PR241<br />
PR240<br />
+CPU_CORE<br />
PHASE1<br />
3 2<br />
3<br />
10_0402_5% 1 1 2<br />
PR243<br />
PL18<br />
2.2_0603_1%<br />
0.36UH_PCMC104T-R36MN1R17_30A_20%<br />
CPU_VDD0_FB_L<br />
RTN0<br />
BOOT1 1 2 1 2<br />
1 2<br />
+CPU_CORE<br />
PR245<br />
10_0402_5%<br />
2 1<br />
PC207<br />
@<br />
0.22U_0603_10V7K<br />
PQ52<br />
PR247<br />
RTN1<br />
16.2K_0402_1%<br />
CPU_VDD1_FB_L<br />
PR246 10K_0402_1%<br />
TPCA8028-H_SOP-ADVANCE8-5<br />
PR248<br />
2 1<br />
PQ49<br />
4.7_1206_5%<br />
1 PR249 2<br />
@<br />
PR252 1K_0402_1%<br />
4<br />
4<br />
4.02K_0402_1%<br />
+1.5VS 2 1<br />
PC208<br />
PC209<br />
CPU_VDD1_FB_H<br />
VSEN1<br />
680P_0603_50V7K<br />
2 1<br />
PR251<br />
+CPU_CORE 2<br />
10_0402_5% 1<br />
0.1U_0402_16V7K<br />
DIFF_0<br />
PR253<br />
PC210<br />
255_0402_1%<br />
4700P_0402_25V7K<br />
2 1 2 1<br />
FB_0<br />
2<br />
1<br />
COMP0<br />
VW0<br />
2<br />
1<br />
VIN 48<br />
ISP0<br />
13<br />
VCC 47<br />
ISN0<br />
14<br />
FB_NB 46<br />
VSEN0<br />
15<br />
PR242 0_0402_5%<br />
DIFF_1<br />
COMP_NB 45<br />
RTN0<br />
16<br />
FSET_NB 44<br />
RTN1<br />
17<br />
VSEN_NB 43<br />
VSEN1<br />
18<br />
0_0402_5%<br />
PR244<br />
0_0402_5%<br />
PR250<br />
PR254<br />
PC213<br />
255_0402_1%<br />
4700P_0402_25V7K<br />
2 1 2 1<br />
PC183<br />
33P_0402_50V8K<br />
2 1<br />
RTN_NB 42<br />
VDIFF1<br />
19<br />
FB_1<br />
OCSET_NB 41<br />
FB1<br />
20<br />
PGND_NB 40<br />
COMP1<br />
21<br />
2<br />
LGATE_NB 39<br />
VW1<br />
22<br />
1<br />
ISP1<br />
PHASE_NB 38<br />
ISP1<br />
23<br />
ISN1<br />
UGATE_NB 37<br />
ISN1<br />
24<br />
VW1<br />
COMP1<br />
TP<br />
49<br />
2<br />
1 2<br />
1<br />
LGATE_NB<br />
LGATE1<br />
3 5<br />
PC185<br />
10U_1206_25V6M<br />
PQ51<br />
CPU_B+<br />
TPCA8030-H_SOP-ADV8-5<br />
TPCA8030-H_SOP-ADV8-5<br />
PC186<br />
0.01U_0402_25V7K<br />
3 5<br />
3 5<br />
PC187<br />
2200P_0402_50V7K<br />
TPCA8028-H_SOP-ADVANCE8-5<br />
PC195<br />
10U_1206_25V6M<br />
PC203<br />
10U_1206_25V6M<br />
PL15<br />
HCB4532KF-800T90_1812<br />
1 2<br />
www.mycomp.su<br />
3 5<br />
TPCA8028-H_SOP-ADVANCE8-5<br />
PC196<br />
10U_1206_25V6M<br />
PC204<br />
10U_1206_25V6M<br />
PC197<br />
0.01U_0402_25V7K<br />
PC205<br />
0.01U_0402_25V7K<br />
PC188<br />
100U_25V_M<br />
PC198<br />
2200P_0402_50V7K<br />
PC206<br />
2200P_0402_50V7K<br />
1<br />
1 2<br />
ISP0<br />
1 2<br />
ISP1<br />
PC219<br />
1000P_0402_50V7K<br />
PC220<br />
1000P_0402_50V7K<br />
ISN0<br />
ISN1<br />
B+<br />
+CPU_CORE_0<br />
Design Current: 25A<br />
Max current: 35A<br />
OCP_min:42A<br />
PC211<br />
180P_0402_50V8J<br />
PC212<br />
1000P_0402_50V7K<br />
PC214<br />
180P_0402_50V8J<br />
PC215<br />
1000P_0402_50V7K<br />
PR255<br />
1K_0402_5%<br />
2 1<br />
2<br />
PR256<br />
1<br />
PC216<br />
2 1<br />
PR257<br />
6.81K_0402_1%<br />
2 1<br />
PR258<br />
1K_0402_5%<br />
2 1<br />
2<br />
PR259<br />
1<br />
PC217<br />
2 1<br />
PR260<br />
6.81K_0402_1%<br />
2 1<br />
54.9K_0402_1%<br />
1200P_0402_50V7K<br />
54.9K_0402_1%<br />
1200P_0402_50V7K<br />
PR262<br />
@<br />
1K_0402_5%<br />
PR263<br />
@<br />
1K_0402_5%<br />
4 4<br />
A<br />
B<br />
C<br />
D<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/04/16 Deciphered Date<br />
2010/03/12<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
401827<br />
C<br />
D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Tuesday, September 14, 2010<br />
Date: Sheet of<br />
52 55<br />
E<br />
F<br />
G<br />
H
5<br />
4<br />
3<br />
2<br />
1<br />
Item<br />
Version change list (P.I.R. List) Page 1 of 2<br />
for PWR<br />
Reason for change Rev. PG# Modify List Date Phase<br />
Fixed Issue<br />
D<br />
1<br />
ADD 2 switch mos and remove 2 pull<br />
high resistance to modify VGA_CORE<br />
switch level<br />
Before modify to fault, we recognize that<br />
VGAPWRSEL pin is open drain state. But after<br />
check with AMD AE regoer to clear the foul that<br />
VGAPWRSEL pin has driviing ability.so i take<br />
away 2 pull high resistance and add 2 switch<br />
mos to modify the switch level.<br />
0.1 52<br />
ADD PQ60 and PQ61 remove PR212(10K,0402) and<br />
PR213(10K.0402)<br />
2009/08/21<br />
EVT_NEW75<br />
D<br />
2<br />
change thermister , tune PH1<br />
thermister part number SL200000V00 and PR28<br />
protection and recovery set<br />
change thermister from 150K to 100K<br />
0.1 44 change to 21K, PR30 change to 9.53K<br />
2009/08/27<br />
point<br />
EVT_NEW75<br />
C<br />
B<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
9<br />
10<br />
11<br />
12<br />
Add GPU voltagr sence net<br />
Cause GPU have GCORE_SEN and FB_GND pin<br />
so power add receive net. 0.1 51<br />
ADD GCORE_SEN and FB_GND net, also add<br />
PR296(0_0402_1%), PR297(10_0402_5%) and<br />
PR298(0_0402_5%)<br />
2009/09/04<br />
change DC-IN connector part number to meet pin definition 0.1 43 change part number is SP020908120 2009/09/10<br />
change reistance PR81 value<br />
ADD switch circuit for 1.05V<br />
change resistance size<br />
Modify VGA_CORE mapping table.<br />
Change 1.0VSGP enable RC value<br />
Change lowside MOS of VGA_CORE<br />
Change 3/5Valw boost resistance<br />
value<br />
ADD two capacity<br />
Cause meet battery Ki value setting<br />
from 1.106 to 0.7224. change PR81<br />
from 154K(0402_1%) to 80.6K(0402_1%)<br />
Cause follow AMD electrcial sheet,<br />
VDDIO/ VDDR voltage setting procedure.<br />
AMD processor will switch between 1.05V<br />
and 0.9V <strong>by</strong> VDDIO and VDDR<br />
cause for component de-rating . Prevent the<br />
component break down when inrush current happen.<br />
cause ATI change power play voltage, so change the<br />
table value.<br />
0.1 46 change resistance PR81 value from 154K to 80.6K 2009/09/22<br />
0.1 48<br />
ADD PR161 (165K_0402_1%),<br />
PQ58,PR152(10K_0402_5%),PR160(10K_0402_5%),<br />
PC131(0.1U_25V6) , change PR161 value from 100K<br />
to 249K, and ADD enable net name -VDDR_SW<br />
2009/09/22<br />
0.1 46 change PR61 from (0.02_1206_1%) to (0.02_2512_1%) 2009/10/06<br />
0.1 51<br />
change PR198 from 9.76_0402_1% to 9.53_0402_1%,<br />
PR197 from 37.4_0402_1% to 64.9_0402_1% and<br />
PR201 from 17.8_0402_1% to 31.6_0402_1%<br />
Prevent LDO can't turn off when it should turn off 0.1 50 Change PR173 from 100K_0402_5% to 10K_0402_5%,<br />
PC146 from 0.1u_0402 to 1u_0402<br />
Cause light load efficiency result is fail,<br />
and we get result after discuss FAE. The<br />
reason is lowside mos Rdson too less and IC<br />
will detect not very sensitive<br />
For EMI request<br />
For EMI request<br />
0.1 51 Change PQ39 and PQ40 from TPCA8028(SB00000GL00)<br />
to AO4456(SB000009F80)<br />
0.1 45<br />
www.mycomp.su<br />
0.1 52<br />
EVT_NEW75<br />
EVT_NEW75<br />
EVT_NEW75<br />
EVT_NEW75<br />
EVT_NEW75<br />
2009/10/06 EVT_NEW75<br />
2009/10/15 EVT_NEW75<br />
2009/11/19 EVT_NEW75<br />
Change PR40 and PR47 from 0_0603_5% to<br />
2.2_0603_5%(SD013220B80) 2009/11/19 EVT_NEW75<br />
Add pc219 and pc220 are both S CER CAP<br />
1000P 50V K X7R 0402 2009/11/23 EVT_NEW75<br />
C<br />
B<br />
13<br />
ADD three resistance<br />
Cause madison and park need different voltage switch<br />
level so add different resistance value for the<br />
problem.<br />
0.1 51 Add PR197( 68.1K_0402_1%) , PR198 (<br />
9.53K_0402_1%) and PR201 ( 31.6K_0402_1%)<br />
2009/11/23 EVT_NEW75<br />
14<br />
Change chock Cause A phase put wrong chock 0.2 37,39,40 Change PL9 from SH00000FK00 to SH000009Q00 2009/11/23 EVT_NEW75<br />
A<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/09/20 Deciphered Date<br />
2008/09/20<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 53 of<br />
55<br />
3<br />
2<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
Version change list (P.I.R. List)<br />
D<br />
C<br />
B<br />
A<br />
DVT Stage<br />
1. remove Y4 related<br />
2. add a bead on +VDDA11PCIE ---ok (add L28)<br />
3. use 6mohm MOS on +1.1VS ---ok (U38,U37)<br />
4. +1.1VALW vlotage level --check PW rail<br />
5. check EC sequence (syson/vga_on) --ok<br />
6. VRAM ID --ok<br />
7. VRAM_RST circuit -- check slew rate<br />
8. 3G module circuit update --ok<br />
9. EC 500K circuit --ok<br />
10. MEMZN circuit (0ohm/10uF) --ok<br />
11. check GBE PU/PD --ok<br />
12. check capacitor size<br />
13. TXC crystal value --ok (change X1,Y2), Y5<br />
14. internal clock circuit --ok<br />
15. ADD VGAPWR_ON --ok, INT_VGAPWR_ON<br />
16. define PX_FN/CLK_MODE strap pin --ok<br />
17. define CLK_REQ for internal CLKREQ --ok<br />
18. change 4.7u_0805 type --ok<br />
19. BOM change for SG --ok<br />
20. add VGAPWR_ON for SG&int clock use --ok<br />
21. add PJ25 --ok<br />
22. LED1/3 680ohm, LED2/4 3.9Kohm --ok<br />
23. add MUXLESS strap --ok (R521,R612)<br />
24. add LPW planel feature --ok (LOCAL_DIM /<br />
COLOY_ENG_EN)<br />
25. EC version control--ok (R529,R528)<br />
26. WiMAX LED combine circuit --ok (R530,R531,D47)<br />
27. change INT_VGAPWR_ON to EC_pin91 --ok<br />
28. add VB function --ok (R533,R532)<br />
29. Add R534,R535,R536 for layout --ok<br />
30. change Y5 to 33p cap<br />
31. pop ESD diode --ok<br />
32. set T25 to BH for main --ok<br />
33. Define Board file ID for SW req. --ok<br />
For PEW change list<br />
1. Change Strap/PID/BID for SW<br />
2. Change EC version to E0<br />
3. Change thermal sensor to SB-TSI<br />
4. Define 8L_6L_UMA strap on SB<br />
5. Change EC version to D3 06/29<br />
5<br />
4<br />
PVT Stage<br />
1. un-pop D39,D41 p.40<br />
2. pop D27 p.39<br />
3. un-pop Q73,Q74,Q75,Q70,R500,R502 p.38<br />
4. Change R470 to 8.2K p.36<br />
5. Change R600,R510,R489 to 100K<br />
p.22/p.42<br />
6. Change C847 to 0.1u p.22<br />
7. Change C739,C740 to 15p p.36<br />
8. Change LED resistance R477,R499 change to 2.2K<br />
9. Change R611 to 33K<br />
p.37<br />
p.42<br />
10. Change HDMI_HPD PU from +3VSG to +3VS p.24<br />
11. Change C957,C971 to 0.47u_0603 p.40<br />
12. Remove VGA option solution<br />
unpop R147,R420,R421,R248 pop R161<br />
p.16/p.22/p.17<br />
13. Pop R595,R596,Q49,Q48 change R595 to 300k p.42<br />
14. Change LED1,LED3 to SC591NB5A30 p.37<br />
15. Change Q5,Q26 to SB00000DH00 p.16/p.37<br />
16. Change C468~C475 to MAD@ p.20<br />
17. Change C305,C306 to 0603 size p.18<br />
18. Change LED control circuit, Pop R537,R457 p.34/p.35<br />
19. Update AMP GAIN to 10dB p.40<br />
20. Change C11,C56,C723 to SGA00002N80 p.8/p.9/p.35<br />
21. Change TPC24 to TPC12 for layout<br />
MP Stage<br />
1. Add R541, R542 for TSI leakage current issue. (option) p.36<br />
2. Change C21 from 3300pF to 100pF<br />
3. Unpop C21<br />
4. Unpop SW3<br />
5. Change C305 to MAD@<br />
6. Change VGA to R3 P/N 0419<br />
7. Unpop ESD Diode D24 / D27 / D29 0512<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2008/10/06 Deciphered Date<br />
2010/03/12<br />
Title<br />
www.mycomp.su<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
B<br />
D<br />
401827<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Date: Tuesday, September 14, 2010<br />
Sheet 54 of<br />
55<br />
3<br />
2<br />
1<br />
D<br />
C<br />
B<br />
A
5<br />
4<br />
3<br />
2<br />
1<br />
Item<br />
Version change list (P.I.R. List) Page 1 of 2<br />
for PWR<br />
Reason for change Rev. PG# Modify List Date Phase<br />
Fixed Issue<br />
D<br />
15<br />
Change chock<br />
Cause NB_CORE and 1.1VALW efficiency measurement<br />
result fail. so change inductor from 1.8uH to 1.0<br />
uH, and change the tye from ferrite to moding<br />
0.2 47,48 Change PL6 and PL8 from SH000009680 to<br />
SH000009U00<br />
2009/12/01 EVT_NEW75<br />
D<br />
16<br />
Change resistance value<br />
Cause change low side MOS from TPCA8028 to<br />
AO4456. And there have different Rds(on). then<br />
OCP will different, so i need to change ocp<br />
setting resistance.<br />
0.2 51<br />
Change PR190 from SD000004100 (S RES 1/16W 8.2K<br />
+-1% 0402) to SD00000QM80 (S RES 1/16W 14.3K<br />
+-1% 0402)<br />
2009/12/01 EVT_NEW75<br />
17<br />
ADD sunbber<br />
Cause VGA_CORE phase ringing too strong, so add<br />
sunbber to reduce the ringing<br />
0.2 51 ADD PR191(SD001470B80 ,S RES 1/4W 4.7 +-5% 1206<br />
) and PC171(SE025681K80 S CER CAP 6,80P 50V K<br />
X7R 0603 )<br />
2009/12/01 EVT_NEW75<br />
C<br />
B<br />
18<br />
19<br />
Change resistance value<br />
change VGA_CORE switch frequency fromm 300K to<br />
400K, for solve efficiency fail issue<br />
0.2 51<br />
Change PR196 from 44.2K to 33K<br />
2009/12/01 EVT_NEW75<br />
Delete component PC73, PC83<br />
and PC92 Cause for design resinable 0.2 47,48 Delete PC73,PC83 and PC92 2009/12/01 EVT_NEW75<br />
www.mycomp.su<br />
C<br />
B<br />
A<br />
A<br />
5<br />
4<br />
Security Classification<br />
<strong>Compal</strong> Secret Data<br />
Issued Date<br />
2007/09/20 Deciphered Date<br />
2008/09/20<br />
Title<br />
<strong>Compal</strong> Electronics, Inc.<br />
SCHEMATIC, MB A5911<br />
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL<br />
Size Document Number Rev<br />
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F<strong>ROM</strong> THE CUSTODY OF THE COMPETENT DIVISION OF R&D<br />
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS<br />
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.<br />
Custom<br />
401827<br />
D<br />
Date: Tuesday, September 14, 2010<br />
Sheet 55 of<br />
55<br />
3<br />
2<br />
1
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