Debugging Embedded Systems

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SWJ-DP JTAG is selected by default, enabling legacy devices continue working as normal. SWD protocol is selected sending a specific sequence on TMS (switching protocol). 40
Debug Access Port accesses description DAP accesses – DAP bus has a single master (Debug Port) and one or more Slaves ( Access Ports) which are typically used to interface to the various onchip bus standards, or to provide dedicated debug features. – Each transaction sent from the external debugger is addressed to a single one of these components (the DP or an AP). AP accesses – Each AP provides up to 64 32-bit registers (arranged in 16 banks of 4). – One register identifies the particular AP type. – In a MEM-AP, a couple of registers are used for Address and Data. DP accesses – Registers in the DP are used to provide control and status of the external link (SWD). – The DP also has registers to select the current AP, and the register bank within that AP. Note: Sticky bits are used to signal when some error conditions occur. 41
Page 1 and 2: Debugging Embedded Systems Sergio S
Page 3 and 4: Debugging Embedded Systems What is
Page 5 and 6: Debuggers vs Front-Ends Debuggers:
Page 7 and 8: DDD Screenshot 7
Page 9 and 10: Insight Screenshot 9
Page 11 and 12: Debugger: Main Operations (Cont.) D
Page 13 and 14: GDB/MI Interface Command Line Inter
Page 15 and 16: GDB/MI Interface (Cont.) GDB/MI Out
Page 21 and 22: GDB/MI Interface (Cont.) GDB/MI Exa
Page 23 and 24: GDB Remote Serial Protocol GDB Remo
Page 25 and 26: GDB Remote Serial Protocol (Cont.)
Page 27 and 28: GDB Remote Serial Protocol (Cont.)
Page 29 and 30: Debugging Embedded Systems JTAG Ove
Page 31 and 32: IEEE 1149.1 (JTAG) Overview Origina
Page 33 and 34: JTAG TAP Controller State-Machine 3
Page 35 and 36: JTAG Shortcomings Not specifically
Page 37 and 38: ARM CoreSight Debug Architecture Ov
Page 39: Debug Access Port components AP (Ac
Page 43 and 44: Breakpoints: Hardware vs Software H
Page 45 and 46: Debugging Embedded Systems - Typica
Page 47 and 48: SWD Protocol - Header fields Header
Page 49 and 50: SWD Protocol - Timing relationship
Page 51 and 52: SWD - Transfer examples WAIT respon
Page 53 and 54: Connector Types - ETM Trace (legacy
Page 55 and 56: Connector Types - Cortex Debug+ETM
Page 57: Debugging Embedded Systems Debug Se

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