Chapter 6: Process Synchronization - Csl Mtu
Chapter 6: Process Synchronization - Csl Mtu
Chapter 6: Process Synchronization - Csl Mtu
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Algorithm I: 1/2<br />
process P i<br />
do {<br />
while (turn != i);<br />
turn = j;<br />
} while (1);<br />
if it is not my turn, I wait<br />
critical section<br />
exit<br />
enter<br />
I am done, it is your turn now<br />
Global variable<br />
turn controls who<br />
can enter the<br />
critical section.<br />
Since turn is either<br />
0 or 1, only one can<br />
enter.<br />
However, processes<br />
are forced to run in<br />
an alternating way.<br />
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