Chapter 6: Process Synchronization - Csl Mtu
Chapter 6: Process Synchronization - Csl Mtu
Chapter 6: Process Synchronization - Csl Mtu
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Algorithm III: Progress 3/4<br />
flag[i] = TRUE;<br />
turn = j;<br />
while (flag[j] && turn == j);<br />
process P i<br />
If P i is waiting to enter, it must be executing its<br />
while loop.<br />
Suppose P j is not in its critical section:<br />
If P j is not interested in entering, flag[j] was<br />
set to FALSE when P j exits. Thus, P i may enter.<br />
If P j wishes to enter and sets flag[j] to TRUE,<br />
it will set turn to i and P i may enter.<br />
In both cases, processes that are not waiting do not<br />
block the waiting processes from entering.<br />
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