Host Hi-Speed Electrical Test Procedure for Agilent - USB.org

Host Hi-Speed Electrical Test Procedure for Agilent Infiniium Revision 1.2 

Universal Serial Bus 

Implementers Forum 

Host Hi-Speed 

Electrical Test Procedure 

For Agilent Infiniium 

Revision 1.2 

August 6, 2003 

1


Revision History 

Rev Date Filename Comments 

0.9 (Beta) Nov-23-2001 Host HS Test for Agilent.DOC Primary version of Hi-Speed Test Procedure adapted to 

Agilent test equipment based on the test procedure created 

by USB-IF (version 0.9) 

1.0 Feb-5-2002 Host HS Test for Agilent.DOC Edit for final release. 

1.2 Aug-6-2003 Host HS Test for Agilent.DOC Edit to adapt test procedure for use with 5485x series 

Infiniium oscilloscope and 113xA InfiniiMax differential 

probes. 

Please send comments via electronic mail to techsup@usb.org 

USB-IF High-speed Electrical Test Procedure 

ª Copyright 2001, USB Implementers Forum, Inc. 

All rights reserved. 

2


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THIS SPECIFICATION IS PROVIDED “AS IS” AND WITH NO WARRANTIES OF ANY KIND, 

EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, NO WARRANTY OF 

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FOR A PARTICULAR PURPOSE, NO WARRANTY OF TITLE, AND NO WARRANTY ARISING OUT 

OF ANY PROPOSAL, SPECIFICATION, OR SAMPLE, ALL OF WHICH WARRANTIES ARE 

EXPRESSLY DISCLAIMED. 

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IS GRANTED HEREWITH. 

All product names are trademarks, registered trademarks, or servicemarks of their respective owners. 

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Table of Contents 

1 Introduction ...........................................................................................................5 

2 Purpose...................................................................................................................5 

3 Equipment Required ..............................................................................................5 

3.1 Equipment Setup.....................................................................................................6 

3.1.1 Infiniium 5485xA Digital Storage Oscilloscope..................................................6 

3.2 Operating Systems, Software, Drivers, and Setup Files.............................................8 

3.2.1 Operating Systems............................................................................................8 

3.3 Special Purpose Software.........................................................................................8 

3.3.1 Test Equipment Setup Files...............................................................................8 

4 Test Procedure........................................................................................................9 

4.1 Test Record .............................................................................................................9 

4.2 Vendor and Product Information.............................................................................9 

4.3 Legacy USB Compliance Tests.................................................................................9 

4.4 Host Hi-speed Signal Quality (EL_2, EL_3, EL_6, EL_7).........................................10 

4.5 Host Controller Packet Parameters (EL_21, EL_22, EL_23, EL_25, EL_55)...............17 

4.6 Host Disconnect Detect (EL_36, EL_37)..................................................................25 

4.7 Host CHIRP Timing (EL_33, EL_34, EL_35) ...........................................................30 

4.8 Host Suspend/Resume timing (EL_39, EL_41).......................................................34 

4.9 Host Test J/K, SE0_NAK (EL_8, EL_9)..................................................................38 

A.4 Host Hi-speed Electrical Test Data .......................................................................41 

A.4.2 Vendor and Product Information .......................................................................41 

A.4.3 Legacy USB Compliance Tests............................................................................42 

A.4.4 Host Hi-speed Signal Quality (EL_2, EL_3, EL_6, EL_7)......................................42 

A.4.5 Host Controller Packet Parameters (EL_21, EL_22, EL_23, EL_25, EL_55)............44 

A.4.6 Host Disconnect Detect (EL_36, EL_37) ..............................................................45 

A.4.7 Host CHIRP Timing (EL_33, EL_34, EL_35)........................................................46 

A.4.8 Host Suspend/Resume timing (EL_39, EL_41) ...................................................47 

A.4.9 Host Test J/K, SE0_NAK (EL_8, EL_9) ..............................................................48 

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1 Introduction 

The USB-IF Hi-speed Electrical Test Procedures are developed by the USB 2.0 Compliance Committee 

under the direction of USB-IF, Inc. There are three hi-speed electrical test procedures. The Host Hi-speed 

Electrical Test Procedure is for EHCI host controllers. The Hub Hi-speed Electrical Test Procedure is for 

hi-speed capable hubs. The Device Hi-speed Electrical Test Procedure is for hi-speed capable devices. 

The Hi-speed Electrical Compliance Test Procedures verify the electrical requirements of hi-speed USB 

operation of these devices designed to the USB 2.0 specification. In addition to passing the hi-speed test 

requirements, hi-speed capable products must also complete and pass the applicable legacy compliance 

tests identified in these documents in order to be posted on the USB-IF Integrators List and use the USB- 

IF logo in conjunction with the said product (if the vendor has signed the USB-IF Trademark License 

Agreement). These legacy compliance tests are identified in the Legacy USB Compliance Test section in 

this document. 

2 Purpose 

This USB-IF Hi-speed Electrical Test Procedure documents a series of tests used to evaluate USB 

peripherals and systems operating at hi-speed. These tests are also used to evaluate the hi-speed 

operation of USB silicon that has been incorporated in ready-to-ship products, reference designs, proofs 

of concept and one-of-a-kind prototypes of peripherals, add-in cards, motherboards, or systems. 

This test procedure makes reference to the test assertions in the USB-IF USB2.0 Electrical Test 

Specification, Version 1.00. 

This Host USB-IF Hi-speed Electrical Test Procedure is one of the three USB-IF Hi-speed Electrical 

Compliance Test Procedures. The other two are Hub USB-IF Hi-speed Electrical Test Procedure and 

Device USB-IF Hi-speed Electrical Test Procedure. The adoption of the individual procedures based on 

the device class makes it easier to use. 

3 Equipment Required 

The commercial test equipment listed here is based on the positive experience of USB-IF members in 

executing the USB hi-speed electrical tests. This test procedure is written with a set of specific models that 

were used to develop this procedure. In time, there will be other equivalent or better test equipment 

suitable for use. Some minor adaptation of the procedure will be required in those cases. 

• Digital Storage Oscilloscope: 

o 

o 

o 

Agilent 54853A, 54854A, or 54855A Infiniium oscilloscope 

Agilent E2683A USB Compliance Test Option 

Computer monitor (optional) 

o Agilent 1131A, 1133A, or 1134A InfiniiMax differential probe, qty = 1 

o 

Agilent E2669A differential connectivity kit, OR E2678A socketed head, qty=1 

5


o 

o 

Agilent header adapter(p/n 01131-68703), qty=1, included with E2669A and E2678A 

purchased after October, 2003. 

Agilent E2697A 1Mohm adapter with passive probe ,OR 1156A, 1157A, or 1158A active 

probe, qty = 2 

• 3 ½ Digital Multimeter – Agilent 972A or equivalent 

o 

Mini-clip DMM lead – one each of black and red color 

• Hi-speed USB Electrical Test Fixtures 

o 

o 

o 

Device hi-speed signal quality test fixture, qty=1 (Agilent P/N E2645-66501) 

Host hi-speed signal quality test fixture, qty = 1 (Agilent P/N E2645-66502) 

Host Disconnect test fixture, qty = 1, (Agilent P/N E2645-66506) 

o 5V test fixture power supply, qty = 1, (Agilent p/n 0950-2546) 

When using Agilent hi-speed test fixtures, the nomenclature of the test point will be different from 

Intel’s test fixtures. This test procedure is written with reference to Agilent’s test fixtures. Please use 

the following cross-reference chart when using Intel’s test fixture. 

Intel’s Fixtures Description of the test points Agilent’s Fixtures 

• Miscellaneous Cables and Devices 

TP2 Test Point TP2 

J5 Power Port J5 

J10 Ground TP5 

J11 Ground TP5 

o 5 m USB cable, qty = 1 

o 1.5m USB cable, qty = 1 

o Modular AC power cord, qty = 2 

o 

o 

Hi-Speed Hub 

Hi-Speed Device 

• Hi-speed USB Test Bed Computer 

The hi-speed test bed computer hosts a USB 2.0 compliance host controller for hi-speed hub or device 

electrical test, or serves as a test bed host for a USB 2.0 host controller under test. This OS on this 

computer is Windows 2000 Professional. Please refer to the Hi-speed Electrical Test Setup Instruction for 

steps to configure this computer. 

3.1 Equipment Setup 

3.1.1 Infiniium 5485xA Digital Storage Oscilloscope 

1. Connect keyboard and mouse to oscilloscope. 

2. Connect optional compute monitor to the VGA connector on the rear nearest the right side of the 

instrument. 

6


3. Attach the Agilent 113xA differential probe to Channel 1 of the oscilloscope. 

a. Attach the socketed probe head to the differential probe amp. 

b. Attach the header adapter to the socketed probe head (Figure 1). 

c. Handle the socketed probe head and header adapter carefully. 

d. For durability, epoxy can be used to strengthen the assembly. Only apply epoxy to back (noncomponent) 

side of probe head 

Figure 1. Differential Probe Setup 

4. Attach the E2697A adapters or 1156A probes to Channel 2 and 3. 

a. When using the E2697A adapter, connect the 10073C miniature passive probes to the E2697A 

adapter. 

NOTE 

These probe assignments will be used through out the entire test procedure. 

5. Turn on the oscilloscope to allow 30 minutes of warm up time prior to use. 

6. Configure the second monitor, if being used, while the oscilloscope is warming up. 

7. If the ambient temperature has changed more than 5 degrees from the previous calibration, perform 

the calibration procedure built into the Infiniium 5485xA (in the [Calibration… ] section of [Utilities] 

pull down menu) 

8. If the E2697A adapter is being used, compensate the passive probes (see probe instructions). 

9. Calibrate all the probes. 

In certain test situations, there may not be a ground connection between the DSO and the device under 

NOTE test. This may lead to the signal seen by the differential probe to be modulated up and down due to the 

mid-frequency switching power supply. Connecting the DSO ground to the DUT ground will be 

required to establish a common ground reference. 

7


3.2 Operating Systems, Software, Drivers, and Setup Files 

3.2.1 Operating Systems 

Microsoft Windows 2000 Professional is required on the Hi-speed Electrical Test Bed Computer. 

Microsoft Windows 2000 Professional is required on the Hi-speed Signal Quality Analysis Computer. 

Please refer to the Hi-speed Electrical Test Setup Instruction for steps to configure these computers. 

3.3 Special Purpose Software 

The following special purpose software is required. Please refer to the Hi-speed Electrical Test Setup 

Instruction for steps to configure these computers. 

• Hi-speed Electrical Test Tool Software – To be used in the Hi-speed Electrical Test Bed 

Computer. 

• Proprietary EHCI Driver Stack - The Hi-speed Electrical Test Tool software requires the use of 

a proprietary EHCI driver stack. The use of this proprietary EHCI driver stack facilitates the 

electrical testing that requires direct control of the command registers of the USB EHCI host 

controllers. The end result much more robust test bed environment. Since the proprietary 

EHCI driver stack is designed for debug and test validation purposes, this driver stack does 

not support the normal functionality as found in the EHCI drivers from Microsoft (or the 

device vendor). An automatic driver stack switching function has been implemented into the 

Hi-speed Electrical Test Tool for easy switching between the proprietary EHCI driver stack 

and that from Microsoft. Upon invocation of the HS Electrical Test Tool software, the driver 

stack will automatically switch to the Intel proprietary EHCI driver stack. Upon exit of the HS 

Electrical Test Tool software, the driver stack will automatically switch to the Microsoft EHCI 

driver stack. 

• Agilent Infiniium USB test option (E2683A) 

3.3.1 Test Equipment Setup Files 

This is 3½ inch floppy diskette that contains the setup files for the test equipment. Please refer to the Hispeed 

Electrical Test Setup Instruction for steps to configure these setup disks. No setup disk is needed 

for the Infiniium 5485xA if the Infiniium USB test option (E2683A) is installed. 

DSO Setup Disk – Contains setup files for Agilent Infiniium 5485xA (This disk is not needed for the 

Infiniium 5485xA with the Infiniium USB test option or E2683A). 

8


4 Test Procedure 

4.1 Test Record 

Appendix A contains the test result entry form for this test procedure. Please make copies of Appendix A 

for use as test record documentation for compliance test submission. All fields must be completed. Fields 

not applicable for the device under test should be indicated as N/A, with an appropriate note explaining 

the reason. The completed test result shall be retained for the compliance test submission. 

In addition to the hardcopy test record, the electronic files from the signal quality and power delivery 

(inrush, drop and droop) shall be retained for compliance test submission. 

4.2 Vendor and Product Information 

Collect the following information and enter into a copy of the test record in Appendix A before 

performing any tests. 

1. Test date 

2. Vendor name 

3. Vendor address and phone, and the contact name 

4. Test submission ID number 

5. Product name 

6. Product model and revision 

7. USB silicon vendor name 

8. USB silicon model 

9. USB silicon part marking 

10. USB silicon stepping 

11. Test conducted by 

4.3 Legacy USB Compliance Tests 

In addition to the hi-speed electrical tests prescribed in this document, the host controller under test must 

also pass the following compliance tests applicable to the EHCI Host Controller: 

• Low speed signal quality 

• Full speed signal quality 

• Drop/Droop 

• Interoperability 

Perform all these tests and record the measurements and summarized Pass/Fail status in Appendix A. 

9


4.4 Host Hi-speed Signal Quality (EL_2, EL_3, EL_6, EL_7) 

Equipment Used 

Item Description/Model Quantity 

Oscilloscope Agilent 5485xA 1 

Differential probe 

Agilent 113xA with E2669 or 

E2678A 

1 

Header adapter Agilent 01131-68703 1 

Host Test Bed Computer 

Any computer with hi-speed 

USB ports 

1 

Host Hi-Speed Signal 

Quality Test Fixture and 4" 

USB cable 

Agilent E2645-66502 1 

5V power supply 

Agilent 0950-2546 or 

equivalent 

1 

1. Setup the oscilloscope as described in section 3.1.1 

2. Recall HS_SQ_1.SET oscilloscope setup 

a. Select [Load] >> [Setup… ] from the [File] pull down menu. 

3. Attach the 5V power supply to J5 of the Host Hi-speed Signal Quality test fixture and verify the green 

Power LED (D1) is lit. 

a. Set the Test switch (S1) of the test fixture to TEST and verify the yellow TEST LED is lit. 

4. Attach the differential probe to TP2 of the test fixture, using the damped header adapter. 

a. Ensure the + polarity on the probe lines up with D+, which is the pin nearest the USB connector. 

(Figure 2). 

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Figure 2. Differential Probe Connection on Host Test Fixture 

5. Invoke the Hi-speed Electrical Test Tool software on the Hi-speed Electrical Test Bed computer. The 

main menu appears and shows the USB2.0 host controller. (Figure 3) 

Figure 3. Electrical Test Tool Main Menu 

6. Select Host Controller/System and click the [TEST] button to enter the Host Test menu (Figure 4) 

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Figure 4. Electrical Test Tool Host Test Menu 

7. Connect the [TEST PORT] of the Host Hi-speed Signal Quality test fixture into the port under test of 

the Host controller, using the 4" USB cable. 

8. Select TEST_PACKET from the Port Control drop down menu. Enter the port number of the port 

being tested and click [EXECUTE]. This forces the port under test to continuously transmit test 

packets (Figure 5) 

Figure 5. Electrical Test Tool with TEST_PACKET Port Control 

9. Using the oscilloscope, verify test packets are being transmitted from the port under test. 

a. Adjust the trigger level as necessary. 

b. If a steady trigger cannot be obtained by adjusting the trigger level, try a slight change to the 

“trigger holdoff”. The trigger holdoff can be adjusted by selecting the [Setup] pull down menu >> 

[Trigger… ] >> [Conditioning… ] button. 

10. Pause the oscilloscope acquisitions using the [STOP] button. 

11. On the oscilloscope display, place the two vertical markers around one test packet as shown in see 

Figure 6… 

a. The markers are easily moved by grabbing and dragging them with the mouse pointer. 

12


b. Place the left marker just (about four bit time) before the sync field. 

c. Place the right marker just (about four bit time) after the EOP (END OF PACKET). 

sync. 

4 bit times before the sync & 

Position Cursors as shown. 

eop. 

4 bit times after the EOP. 

Figure 6. Hi-speed Test Packet Captured with the Infiniium Oscilloscope 

12. From the Infiniium 5485xA [Analyze] pull down menu, select [USB Test] to invoke the USB test 

(Figure 7) 

13. Configure the USB test option as shown in Figure 7… 

a. Select Signal Integrity in [USB Test] section. 

b. Select Hi-speed Near End 

c. Leave the [Tier] setting to 6 

13


Figure 7. Infiniium USB Test Option Main Menu 

14. Enter a descriptive file name (e.g. TIDxxxxxxx port 1 HSNE.tsv) in the [Save Results - Data File] field . 

15. Click [Start Test] at the bottom, left of USB test option. 

16. The result will be displayed in a .html format using Internet Explorer. 

a. Verify that the Signal Eye, EOP Width, and Signaling Rate all pass. 

b. Verify that the signal is monotonic. 

c. The results displayed in the Internet Explorer are also recorded to an HTML report located in the 

directory specified in the “Data Path” (e.g. c:\scope\data) (Figure 8) 

14


17. Record the test result in EL_2, EL_3, and EL_7. 

18. Save all files created during the tests. 

Figure 8. Hi-speed Signal Quality HTML Report 

15


a. To save the results to a floppy disk, insert a floppy to the Infiniium’s floppy drive and click on 

[Copy Results] after closing the Internet Explorer. 

19. Using the Horizontal knob on the oscilloscope, zoom in and check that the rise and fall times are > 

500us, as shown in Figure 9. 

a. The measurements are shown at the bottom of the oscilloscope display 

b. Record results in EL_6 

Figure 9: Rise and fall time measurement 

20. Remove the Host Signal Quality test fixture from the port. 

21. Repeat steps 8 through 19 for all remaining ports. 

22. Close the Infiniium USB test option by clicking the [Exit] button. 

16


4.5 Host Controller Packet Parameters (EL_21, EL_22, EL_23, EL_25, EL_55) 





Agilent 113xA 113xA with 

E2669A or E2678A 

1 

Header adapter Agilent p/n 01131-68703 1 

5 meter USB2.0 hi-speed 

cable 

Any listed on USB-IF website 1 

Hi-Speed USB Hub Any listed on USB-IF website 1 




1 

Device Hi-Speed Signal 




1. Connect the Device Signal Quality test fixture ([TEST PORT]) into B receptacle of a known good hispeed 

hub, using the 4" USB cable. 

a. Apply power to the known good hub (referred to as a device herein). 

b. Do not apply 5V power to the test fixture. 

NOTE 

The use of the Device Hi-speed Signal Quality test fixture makes it possible to trigger on 

packets generated by the device because the differential probe is located closer to the device 

transmitter, hence the device packets are larger in amplitude. 

2. Attach the differential probe to TP2 of the test fixture, using a damped header adapter. 

a. Ensure the + polarity on the probe lines up with D+, which is the pin nearest the USB connector. 

(Figure 10). 

17


Figure 10: Differential Probe Connect on Device Test Fixture 

3. Recall the PACKPARA.SET oscilloscope setup by selecting [Load] >> [Setup… ] from the [File] pull 

down menu. 

4. Connect the Device Signal Quality test fixture ([INIT PORT]) into host controller port under test, 

using the 5 meter USB cable 

a. Click [Enumerate Bus] and verify that the device enumerates properly (Figure 11) 

Figure 11. Known, Good Device Enumerated 

5. Using the oscilloscope, verify SOFs (Start of Frame packets) are being transmitted by the port under 

test. You may need to lower the trigger level to somewhat below 400mV to obtain a trigger. 

6. Now raise the oscilloscope’s trigger level slowly just until it does not trigger on the SOFs (or any host 

traffic). 

18


a. Typically this is around or slightly below 400mV, depending on the device and the length of 

cable used on the fixture. 

b. Ensure the oscilloscope is “RUN”ing and in “Trig’d” mode. Use the [Sweep] button on the front 

panel to adjust the mode if oscilloscope is in any other mode. 

c. Press the [CLEAR DISPLAY] button on the oscilloscope. 

7. In the Host Test menu of the Hi-speed Electrical Test Tool software, ensure that the device is selected 

(highlighted). 

a. Select SINGLE STEP GET DEV DESC from the Downstream Device Control menu and click 

[EXECUTE] once (Figure 12) 

Figure 12. Single Step Get Descriptor 

8. The oscilloscope capture should appear as in Figure 13 

a. Press [STOP] on the oscilloscope to prevent a false trigger from random noise. 

b. If the oscilloscope doesn’t trigger on the device traffic, the trigger level is set too high. Lower the 

trigger level slightly (but not so low that it triggers on host SOFs) and repeat from step 6b. 

19


Figure 13. Packets Generated from Host and Device 

9. Measure the sync field length (number of bits) of the third (from device) packet on the oscilloscope 

and verify that it is 32 bits per EL_21 (Figure 13) 

a. Use [Horizontal] knobs to zoom in on the third packet, shown in the lower display. 

b. Note that Sync Field starts from the Hi-Speed idle transitions to a falling edge (due to the first 

zero). Count both rising and falling edges until the first two consecutive 1’s and include the first 

1. There must be 32 bits. 

c. It is advisable to use the markers to measure the number of bits, based on 2.08nS/bit (480Mbps), 

which is 66.6 nS for 32 bits. The markers are easily moved by grabbing them with mouse pointer. 

d. Record the number in EL_21 

10. Measure the EOP length (number of bits) of the second packet on the oscilloscope and verify that it is 

8 bits per EL_25 (Figure 14) 

a. It is advisable to use the markers to measure the EOP pulse width to determine the number of 

bits, based on 2.08nS/bit (480Mbps), which is 16.6 nS 

b. Record the result in EL_25. 

The EOP could appear as a negative going pulse, or a positive going pulse on differential 

NOTE 

measurement.. 

20


Figure 14. Host Packet EOP with Positive Pulse 

11. Measure the inter-packet gap between the first two packets shown on the oscilloscope by using the 

marker function of the oscilloscope, as shown in Figure 15. 

a. These are back-to-back packets from the host. 

b. Compute the bits by dividing the time measure by 2.08nS. The requirement is it must be between 

88 bits (183 nS) and 192 bits (399.4 nS).. (EL_23). 

c. Record the computed number of bits in EL_23. 

21


Figure 15. Inter-packet Gap – Between Packets from Host 

12. Ensure the oscilloscope is armed in “Trig’d” mode. 

a. Press the [RUN] Button 

b. Press the [CLEAR DISPLAY] Button 

13. On the Host Test menu click [EXECUTE] once. 

a. The oscilloscope capture should appear as in Figure 16. 

b. Press [STOP] on the oscilloscope to pause it from further trigger. 

22


Figure 16. Inter-packet Gap – Host Response to Device 

14. Measure the inter-packet gap between the second and the third packets shown on in Figure 16. 

a. The second (of higher amplitude) is a device packet and the third is the host response. 

b. Compute the number of bits by dividing the time measure by 2.08nS. The inter-packet gap must 

be between 8 bits (16.64 nS) and 192 bits (399.4 nS).. (EL_22). 

c. Record the computed number of bits in EL_22. 

15. Measure the EOP Width as shown in Figure 17… 

a. Press [ RUN] button. 

b. Adjust the trigger if necessary until the oscilloscope is continuously being triggered by the SOF 

packets. 

c. Press [STOP]. 

d. Measure the time period of the EOP width. Compute the number of bits by dividing the time 

measure by 2.08nS. The EOP width must be 40 bits, or 83.2 nS. 

e. Record the result in EL_55. 

23


Figure 17. EOP Width – SOF Packet 

16. Repeat step 4 through 15 for the remaining ports. 

17. Remove the Device Signal Quality test fixture and the known good device from the host controller 

port under test. 

24


4.6 Host Disconnect Detect (EL_36, EL_37) 





Agilent 113xA with E2669A 

or E2678A 

1 

Header Adapter Agilent p/n 01131-68703 1 




1 

Host Disconnect Test 

Fixture and 4" USB cable 




equivalent 

1 

This section uses the Disconnect test fixture to verify the disconnect thresholds of the port under test by 

simulated disconnect condition. 

NOTE 

When the TEST switch on the test fixture is in the Test position, the port under test is subjected to 

a threshold 625mV. The port should detect a 

disconnection. 

1. Attach the 5V power supply to the host disconnect test fixture (J5). 

2. Attach the differential probe to TP2, using the header adapter(Figure 18). 

a. Ensure the + tip on probe lines up with D+ on the fixture, located near the USB connector 

b. Recall the DISCDETE.SET oscilloscope setup by selecting [Load] >> [Setup… ] from the [File] pull 

down menu. 

25


Figure 18: Differential Probe Connection on Host Disconnect Test Fixture 

3. Set the TEST switch to the Test position. 

a. Verify the green Power LED (D1) is lit 

b. Verify the yellow Test LED (D2) is also lit. 

c. This sets the test fixture to emulate a must-not-disconnect threshold. 

4. Attach the [TEST PORT] of the test fixture to the port under test, using the 4" USB cable. 

a. In the Host Test menu of the Hi-speed Electrical Test Tool software select 

TEST_FORCE_ENABLE (Figure 19) from the Port Control window. 

b. Enter the port number and click [EXECUTE] once and ensure the operation is successful in the 

Status Window. 

Figure 19. Test Force Enable Port Control Command 

5. Click the Disconnect Notify check box to monitor the disconnect status in the Status Window (Figure 

20). 

26


Figure 20. Status Window 

6. Verify the SOF packets are being transmitted from the port under test (Figure 21) 

a. Press [CLEAR DISPLAY] on the oscilloscope, to reset the measurements. 

b. Using the oscilloscope measurements, verify that the differential amplitude should be less than 

+/- 525mV. 

c. Verify that the Status Window does not display Disconnect Event Detected. 

d. Record the pass/fail result in EL_37. 

27


Measurements 

Figure 21. SOF Packets Transmitted by Port Under Test 

7. Set the TEST switch of the Disconnect test fixture to the Normal position and verify the yellow TEST 

LED (D2) is not lit. 

8. Verify that the host disconnected… 

a. Press [CLEAR DISPLAY] on the oscilloscope, to reset the measurements. 

b. Using the oscilloscope measurements, verify that the differential amplitude is greater than +/- 

625mV. 

c. Verify that the Status Window now displays the Disconnect Event Detected (Figure 22) 

d. Record the pass/fail result in EL_36. 

28


Figure 22. Disconnect Event Detection 

9. Return the TEST switch on the fixture back to the TEST position. 

a. Verify the yellow TEST LED (D2) is lit. 

10. Repeat step 4 through 9 for all the remaining ports. 

11. Remove the Disconnect test fixture from the port under test before proceeding. 

29


4.7 Host CHIRP Timing (EL_33, EL_34, EL_35) 




Passive or active probes Agilent E2697A with 10073C, 

or 1156A 

2 


cable 





1 

Hi-Speed USB Device Any listed on USB-IF website 1 





1. Replace the Disconnect test fixture with the Host Hi-speed Signal Quality test fixture. 

2. Connect the scope probes to the fixture as shown in Figure 23… 

a. Connect the 10073C or 1156A probe on Channel 2 to the D- pin at TP2. 

b. Connect the 10073C or 1156A probe on Channel 3 to the D+ pin at TP2. D+ on TP2 is the pin 

closest to the USB connector. 

c. Connect both probe grounds leads to TP5. 

30


Figure 23. Probe Connection for CHIRP Testing 

3. Recall the HCHRP2&3.SET oscilloscope setup by selecting [Load] >> [Setup… ] from the [File] pull 

down menu. 

a. Press [CLEAR DISPLAY] on the oscilloscope. 

4. Connect a known, good HS device into the [INIT PORT] of the test fixture, using the 5-meter USB 

cable. 

5. Connect the [TEST PORT] on the fixture to the port under test, using the 4" USB cable. 

a. Apply power to the known, good HS device. 

6. Click [Enumerate Bus] and capture the CHIRP handshake as in Figure 24 

31


Host chirp response timing 

Host chirp J/K duration 

CHIRP 

Response 

CHIRP K 

Width 

CHIRP J 

Width 

Figure 24. Hi-speed Chirp 

7. Measure the host’s chirp response timing (T WTRSTFS)… 

a. This is the time between the device’s de-assertion of Chirp-K and the start of alternate Chirp-K 

and Chirp-J sent by the host. 

b. The scope automatically measures the chirp response time and displays is as shown in Figure 24 

c. If this measurement is in question, markers can be used to manually measure the response time. 

d. Verify this timing is T WTRSTFS ≤ 100uS. 

e. Record the result in EL_33. 

8. Measure and record the durations of the individual Chirp-K and Chirp-J states and verify both are 

between 40uS ≤ T DCHBIT ≤ 60uS (EL_31). 

a. The scope automatically measures the Chirp-K and Chirp-J duration as shown in Figure 24 

b. If these measurements are in question, markers can be used to manually measure the duration. 

c. Record the measurement in EL_34. 

9. Recall the SOFCHP2&3.SET oscilloscope setup by selecting [Load] >> [Setup… ] from the [File] pull 

down menu. 

10. Unplug the known good device and then reattach it. 

32


11. Ensure the oscilloscope trigger is armed… 

a. Press the [CLEAR DISPLAY] button. 

b. Press the [RUN] button 

12. Click [Enumerate Bus] once. 

a. The oscilloscope capture should appear as in Figure 25. 

Figure 25. Time between SOF and Last Chirp- (J or K) 

13. Use the markers to measure the time from the end of host Chirp-J/K to the first SOF sent out by the 

host. (Figure 25) 

a. Verify this time is 100uS ≤ T DCHSE0 ≤ 500uS. 

b. Record in EL_35. 

14. Repeat step 5 through 13 for the remaining downstream facing ports. 

33


4.8 Host Suspend/Resume timing (EL_39, EL_41) 




Passive or active probes Agilent E2697A with 10073C, 

or Agilent 1156A 

2 


cable 


Hi-Speed USB Device Any listed on USB-IF website 1 




1 





1. Connect a known good hi-speed device into the [INIT PORT] of the Host Hi-speed Signal Quality test 

fixture, using the 5 meter USB cable 

2. Connect the scope probes to the fixture… 

a. Connect the 10073C or 1156A probe on Channel 2 to the D- pin at TP2. 

b. Connect the 10073C or 1156A probe on Channel 3 to the D+ pin at TP2. D+ on TP2 is the pin 

closest to the USB connector. 

c. Connect both probe grounds leads to TP5. 

3. Recall the SUSP2&3.SET oscilloscope setup by selecting [Load] >> [Setup… ] from the [File] pull 

down menu. 

4. Attach the [TEST PORT] of the fixture into the port under test at the host controller, using the 4" USB 

cable. 

5. On the Host Test menu… 

a. Enumerate the Bus 

b. Select SUSPEND from the Port Control drop down menu and enter the port number (Figure 26) 

c. Click [EXECUTE] once to place the port into suspend. 

34


d. The captured suspend transition should appear as in Figure 27. 

Figure 26. Suspend Host Port Control 

Figure 27. Device Enters Suspend 

6. Observe the time interval from the end of last SOF packet issued by the host to when the device 

attached its full speed pull-up resistor on D+ (transition to full speed J-state). 

a. Measure the time with the markers. 

b. This time should be between 3.000ms and 3.125ms. 

35


c. No measurement is required as this sequence verifies that the host supports the suspend state 

d. Record the Pass/Fail result in EL_39. 

7. Recall the RESUM2&3.SET oscilloscope setup by selecting [Load] >> [Setup… ] from the [File] pull 

down menu. 

a. Press the [CLEAR DISPLAY] button on the oscilloscope. 

8. On the Host Test menu, select RESUME from the Port Control drop down menu and enter the port 

number. (Figure 28) 

a. Click [EXECUTE] once to resume the port. 

b. The captured suspend transition should appear as in Figure 29. 

Figure 28. Resume from Suspend Command 

36


Figure 29. Time to First EOP from Start of HS Idle 

9. Measure the time from the falling edge of D+ to the first SOF issued by the host (EL_41) as shown in 

Figure 29. 

a. Record the results in EL_41. 

NOTE 

Repeat the suspend and resume sequence a number of times and verify that the time from the falling 

edge of D+ to the first SOF issued by the host never exceeds 3ms. 

10. Repeat steps 4 through 9 for all remaining ports. 

11. Unplug the known good device from the test fixture. 

a. Click [Enumerate Bus] once before proceeding. 

b. Remove the probes from the test fixture. 

37


4.9 Host Test J/K, SE0_NAK (EL_8, EL_9) 



Digital Multimeter (DMM) Agilent 972A or equivalent 1 




1 







equivalent 

1 

1. Attach the 5V power supply to the Host Signal Quality test fixture (J5) 

a. Verify the green Power LED (D1) is lit. 

b. Place the TEST Switch (S1) in the Test position. 

c. Verify the yellow TEST LED is lit. 

2. Attach the [TEST PORT] of the Host Signal Quality test fixture into the port under test, using the 4" 

USB cable. 

3. Select TEST_J from the Port Control drop down menu. 

a. Enter the port number and click [EXECUTE] once to place the port under test into TEST_J test 

mode. 

38


Figure 25. Host Port TEST_J 

4. Using a DMM, measure the DC voltage on the D+ line at TP2 with respect to ground (pin TP5 is 

ground). 

a. Record the measurement in section EL_8. 

5. Using a DMM, measure the DC voltage on the D- line at TP2 with respect to ground. 


6. On the Host Test menu, select TEST_K from the Port Control drop down menu. (Figure 30) 

a. Enter the port number and click [EXECUTE] once to place the port under test into TEST_K test 

mode. 

Figure 30. Host Port TEST_K 

7. Using a DMM, measure the DC voltage on the D- line at TP2 with respect to ground (pin TP5 is 

ground). 


8. Using a DMM, measure the DC voltage on the D+ line at TP2 with respect to ground. 


39


9. On the Host Test menu, select TEST_SE0_NAK from the Port Control drop-down menu. (Figure 31) 

a. Enter the port number and click [EXECUTE] once to place the port under test into 

TEST_SE0_NAK test mode. 

Figure 31. Host Port TEST_SE0_NAK 

10. Using a DMM, measure the DC voltage on the D+ line at TP2 with respect to ground (pin TP5 is 

ground). 


11. Using a DMM, measure the DC voltage on the D- line at TP2 with respect to ground (pin TP5 is 

ground). 


12. Repeat steps 2 through 11 for the remaining ports. 

40


Appendix A 

A.4Host Hi-speed Electrical Test Data 

This section is for recording the actual test result. Please use a copy for each device to be tested. 

A.4.2 Vendor and Product Information 

Test Date 

Vendor Name 

Vendor Complete 

Address 

Vendor Phone Number 

Vendor Contact, Title 

Test ID Number 

Product Name 

Product Model and 

Revision 

USB Silicon Vendor 

Name 

USB Silicon Model 

USB Silicon Part Marking 

USB Silicon Stepping 

Tested By 

Please fill in all fields. Please contact your silicon supplier if you 

are unsure of the silicon information. 

41 

For Review and Discussion Only 

Draft Document Subject to Revision or Rejection 

Not For Publication or General Distribution


A.4.3 Legacy USB Compliance Tests 

Legacy USB Compliance Checklist 

Legacy 

Test 

LS SQ 

FS SQ 

Drop/ 

Droop 

Interop 

Downstream Ports 

P1 P2 P3 P4 P5 

Comments 

P = PASS 

F = FAIL 

N/A = Not applicable 

A.4.4 Host Hi-speed Signal Quality (EL_2, EL_3, EL_6, EL_7) 

EL_2 A USB 2.0 hi-speed transmitter data rate must be 480 Mb/s ±0.05%. 

Reference documents: USB 2.0 Specification, Section 7.1.2.2. 

Port P1 P2 P3 P4 P5 

PASS 

FAIL 

NA 

Overall Result: 

q Pass 

q Fail 

q N/A 

Comments: 

EL_3 A USB 2.0 downstream facing port must meet Template 1 transform waveform requirements 

measured at TP2 (each host downstream port). 

42




PASS 

FAIL 

NA 

Overall Result: 

q Pass 

q Fail 

q N/A 

Comments: 

EL_6 

A USB 2.0 HS driver must have 10% to 90% differential rise and fall times of greater than 500 ps. 



PASS 

FAIL 

NA 

q Pass 

q Fail 

q N/A 

Comments: 

EL_7 A USB 2.0 HS driver must have monotonic data transitions over the vertical openings specified in 

the appropriate eye pattern template. 



PASS 

FAIL 

NA 



Not For Publication or General Distribution 

43


q Pass 

q Fail 

q N/A 

Comments: 

A.4.5 Host Controller Packet Parameters (EL_21, EL_22, EL_23, EL_25, EL_55) 

EL_21 

field. 

The SYNC field for all transmitted packets (not repeated packets) must begin with a 32-bit SYNC 

Reference documents: USB 2.0 Specification, Section 8.2. 

SOF SYNC field 

q Pass 

q Fail 

q N/A 

Comments: 

Data Packet SYNC field 

q Pass 

q Fail 

q N/A 

Comments: 

EL_25 The EOP for all transmitted packets (except SOFs) must be an 8-bit NRZ byte of 01111111 without 

bit stuffing. (Note, that a longer EOP is waiverable) 

Reference documents: USB 2.0 Specification, Section 7.1.13.2 

q Pass 

q Fail 

q N/A 

Comments: 

EL_23 Hosts transmitting two packets in a row must have an inter-packet gap of at least 88 bit times and 

not more than 192 bit times. 


44


q Pass 

q Fail 

q N/A 

Comments: 

EL_22 When transmitting after receiving a packet, hosts and devices must provide an inter-packet gap 

of at least 8 bit times and not more than 192 bit times. 


q Pass 

q Fail 

q N/A 

Comments: 

EL_55 Hosts transmitting SOF packets must provide a 40-bit EOP without bit stuffing where the first 

symbol of the EOP is a transition from the last data symbol. 

Reference documents: USB 2.0 Specification, Section 7.1.13.2 

q Pass 

q Fail 

q N/A 

Comments: 

A.4.6 Host Disconnect Detect (EL _36, EL_37) 

EL_37 A USB 2.0 downstream facing port must not detect the hi-speed disconnect state when the 

amplitude of the differential signal at the downstream facing driver’s connector is


Overall: 

q Pass 

q Fail 

q N/A 

Comments: 

EL_36 A USB 2.0 downstream facing port must detect the hi-speed disconnect state when the amplitude 

of the differential signal at the downstream facing driver’s connector is ≥ 625 mV. 



PASS 

FAIL 

NA 

Overall: 

q Pass 

q Fail 

q N/A 

Comments: 

A.4.7 Host CHIRP Timing (EL_33, EL_34, EL_35) 

EL_33 Downstream ports start sending and alternating sequence of Chirp K’s and Chirp J’s within 

100us after the device Chirp K stops. 


q Pass 

q Fail 

q N/A 

Comments: 

EL_34 

Downstream port Chirp K and Chirp J durations must be between 40us and 60us duration. 

46



q Pass 

q Fail 

q N/A 

Comments: 

EL_35 Downstream ports begin sending SOFs within 500us and not sooner than 100us from 

transmission of the last Chirp (J or K). 


q Pass 

q Fail 

q N/A 

Comments: 

A.4.8 Host Suspend/Resume timing (EL_39, EL_41) 

EL_39 

A device must support the Suspend state. 


q Pass 

q Fail 

q N/A 

Comments: 

EL_41 

After resuming a port, the host must begin sending SOFs within 3ms of the start of the idle state. 


q Pass 

q Fail 

q N/A 

Comments: 

47 





A.4.9 Host Test J/K, SE0_NAK (EL_8, EL_9) 

EL_8 When either D+ or D- are driven high, the output voltage must be 400 mV ±10% when 

terminated with precision 45 Ω resistors to ground. 


Port 1 2 3 4 5 

Test D+ D- D+ D- D+ D- D+ D- D+ D- 

TEST_J 

TEST_K 

q Pass 

q Fail 

q N/A 

Comments: 

EL_9 When either D+ and D- are not being driven, the output voltage must be 0V ±10 mV when 

terminated with precision 45 Ω resistors to ground. 


Port 1 2 3 4 5 

Signal D+ D- D+ D- D+ D- D+ D- D+ D- 

Measure 

WRT 

Ground 

(mV) 

q Pass 

q Fail 

q N/A 

Comments: 

48


49

Host Hi-Speed Electrical Test Procedure for Agilent - USB.org

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