Product Selector Guide 2012 - Stretch Inc
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<strong>Product</strong> <strong>Selector</strong> <strong>Guide</strong> <strong>2012</strong><br />

Version 1.5

About <strong>Stretch</strong><br />

<strong>Stretch</strong> is the pioneer and world leader in the field of software configurable processors.<br />

Using the extreme processing performance of S7000 family processors, <strong>Stretch</strong> has<br />

designed a range of PCIe DVR add-in cards, cameras and standalone DVRs. These<br />

products set a new performance standard against which other designs are measured.<br />

Software Configurable Processors (SCP)<br />

Software configurable processors combine traditional RISC processors and programmable logic, extracting<br />

the benefits of both. Tight coupling of RISC processors to a programmable compute fabric embedded directly<br />

inside the processor’s data path provides unprecedented performance for embedded computing. <strong>Stretch</strong>’s<br />

patented Instruction Set Extension Fabric (ISEF) is a software configurable compute fabric that lets system<br />

designers extend the processor instruction set and define new instructions. These “extension instructions”<br />

are defined in C/C++ and then automatically synthesized, placed, and routed into the ISEF—providing computational<br />

acceleration for any algorithm that can be expressed in C/C++.<br />

<strong>Stretch</strong>’s third generation S7000 family devices deliver unprecedented compute capability to demanding<br />

video applications. In addition to a high performance software configurable engine, all S7000 family devices<br />

include a rich collection of I/O interfaces, peripherals, and an integrated ARM9 host processor. This reduces<br />

system component counts and reduces costs.<br />

<strong>Stretch</strong> S7000 family devices are available in a variety of package, speed grade, and temperature options to<br />

allow developers to choose the device best suited to their application.<br />

S7000 Family Devices<br />

Ordering<br />

Code<br />

Maximum Frequency<br />

DDR3<br />

(bits/speed)<br />

Data<br />

Ports<br />

PCI Express<br />

AIM<br />

Ethernet<br />

MAC<br />

Peripherals<br />

IP Camera<br />

Performance<br />

D1 DVR<br />

Channels<br />

1.225V 1.2V 1.075V 1.0V 1.225V 1.2V 1.075V 1.0V 1.225V 1.2V 1.075V 1.0V 1.2V 1.0V 1.2V 1.0V<br />

S7100PH-C4 400 383 267 200 32/1067 32/1067 32/800 32/667 4 10-bit 4 4 0 0 4 1G SD, USB 1080p60 1080p30+ 16 8<br />

S7100PH-HC4 400 383 267 200 32/1067 32/1067 32/800 32/667 4 10-bit 4 4 n/a n/a 4 1G SD, USB 1080p60 n/a 16 n/a<br />

S7100PH-C3<br />

S7100PH-I3<br />

n/a 333 n/a 167 n/a 32/800 n/a 32/400 4 10-bit 4 4 0 0 4 1G SD, USB 1080p60 1080p30+ 12 6<br />

S7100PH-HC3<br />

S7100PH-HI3<br />

n/a 333 n/a n/a n/a 32/800 n/a n/a 4 10-bit 4 4 n/a n/a 4 1G SD, USB 1080p60 n/a 12 n/a<br />

S7100PH-C2 n/a 267 n/a 133 n/a 32/800 n/a 32/400 4 10-bit 4 4 0 0 4 1G SD, USB 1080p30+ 1.3MP30 11 5<br />

S7100PH-HC2 n/a 267 n/a n/a n/a 32/800 n/a n/a 4 10-bit 4 4 n/a n/a 4 1G SD, USB 1080p30+ n/a 11 n/a<br />

S7110PB-C3 n/a 333 267 183 n/a 32/800 32/800 32/667 2 8-bit<br />

1 14-bit<br />

2 2 0 0 2 1G SD, USB 1080p60 1080p30+ 12 7<br />

S7110PB-HC3<br />

S7110PB-HE3<br />

S7110PB-C2<br />

S7110PB-I2<br />

S7110PB-HC2<br />

S7110PB-HI2<br />

S7120PB-C2<br />

S7120PB-I2<br />

n/a 333 267 183 n/a 32/800 32/800 32/667 2 8-bit<br />

1 14-bit<br />

n/a 267 n/a 133 n/a 32/667 32/800 32/400 2 8-bit<br />

1 14-bit<br />

n/a 267 n/a n/a n/a 32/667 n/a n/a 2 8-bit<br />

1 14-bit<br />

n/a 300 267 183 n/a 16/800 16/800 16/667 1 8-bit<br />

1 14-bit<br />

2 2 n/a n/a 2 1G SD, USB 1080p60 n/a 12 n/a<br />

2 2 0 0 2 1G SD 1080p30+ 1.3MP30 10 5<br />

2 2 n/a n/a 2 1G SD 1080p30+ n/a 10 n/a<br />

0 0 0 0 0 1G SD 1080p30+ 1080p30 6 6<br />

Operating Temperature: Commercial = T j<br />

0ºC – 100ºC, Industrial = T j<br />

-40ºC – 125º, Extended = T j<br />

0ºC – 125ºC<br />

Package: S7100 = 23x23 FCBGA 1.0mm Pitch, S7110 = 17x17 FBGA 0.8mm Pitch, S7120 = 14x14 FBGA 0.65mm Pitch

D<br />

C<br />

B<br />

A<br />

PE0_DDR_DQ0<br />

PE0_DDR_DQ1<br />

PE0_DDR_DQ2<br />

PE0_DDR_DQ3<br />

PE0_DDR_DQ4<br />

PE0_DDR_DQ5<br />

PE0_DDR_DQ6<br />

PE0_DDR_DQ7<br />

PE0_DDR_DQ8<br />

PE0_DDR_DQ9<br />

PE0_DDR_DQ10<br />

PE0_DDR_DQ11<br />

PE0_DDR_DQ12<br />

PE0_DDR_DQ13<br />

PE0_DDR_DQ14<br />

PE0_DDR_DQ15<br />

PE0_DDR_DQ16<br />

PE0_DDR_DQ17<br />

PE0_DDR_DQ18<br />

PE0_DDR_DQ19<br />

PE0_DDR_DQ20<br />

PE0_DDR_DQ21<br />

PE0_DDR_DQ22<br />

PE0_DDR_DQ23<br />

PE0_DDR_DQ24<br />

PE0_DDR_DQ25<br />

PE0_DDR_DQ26<br />

PE0_DDR_DQ27<br />

PE0_DDR_DQ28<br />

PE0_DDR_DQ29<br />

PE0_DDR_DQ30<br />

PE0_DDR_DQ31<br />

PE0_DDR_DM0<br />

PE0_DDR_DM1<br />

PE0_DDR_DM2<br />

PE0_DDR_DM3<br />

PE0_DDR_DQS0_P F1<br />

PE0_DDR_DQS0_M G1<br />

PE0_DDR_DQS1_P J1<br />

PE0_DDR_DQS1_M K1<br />

PE0_DDR_DQS2_P R1<br />

PE0_DDR_DQS2_M T1<br />

PE0_DDR_DQS3_P V1<br />

PE0_DDR_DQS3_M W1<br />

5<br />

5<br />

D2<br />

D1<br />

E1<br />

F3<br />

G2<br />

H4<br />

H3<br />

H1<br />

J3<br />

J2<br />

K4<br />

K2<br />

L4<br />

L3<br />

M3<br />

M2<br />

N3<br />

N4<br />

P1<br />

P2<br />

R3<br />

R4<br />

T3<br />

T4<br />

U1<br />

U2<br />

U3<br />

V2<br />

W2<br />

Y1<br />

Y2<br />

AA1<br />

F2<br />

J4<br />

P4<br />

V3<br />

DQ0<br />

DQ1<br />

DQ2<br />

DQ3<br />

DQ4<br />

DQ5<br />

DQ6<br />

DQ7<br />

DQ8<br />

DQ9<br />

DQ10<br />

DQ11<br />

DQ12<br />

DQ13<br />

DQ14<br />

DQ15<br />

DQ16<br />

DQ17<br />

DQ18<br />

DQ19<br />

DQ20<br />

DQ21<br />

DQ22<br />

DQ23<br />

DQ24<br />

DQ25<br />

DQ26<br />

DQ27<br />

DQ28<br />

DQ29<br />

DQ30<br />

DQ31<br />

DM0<br />

DM1<br />

DM2<br />

DM3<br />

DQS0_P<br />

DQS0_M<br />

DQS1_P<br />

DQS1_M<br />

DQS2_P<br />

DQS2_M<br />

DQS3_P<br />

DQS3_M<br />

U1A<br />

S7100PH-C4P<br />

CLKA_P<br />

CLKA_M<br />

CLKB_P<br />

CLKB_M<br />

CKE<br />

RAS_N<br />

CAS_N<br />

WE_N<br />

CS0_N<br />

CS1_N<br />

ODT0<br />

ODT1<br />

BA0<br />

BA1<br />

BA2<br />

A0<br />

A1<br />

A2<br />

A3<br />

A4<br />

A5<br />

A6<br />

A7<br />

A8<br />

A9<br />

A10<br />

A11<br />

A12<br />

A13<br />

A14<br />

A15<br />

FEEDBACK0<br />

FEEDBACK2<br />

DDR_CAL0<br />

DDR_CAL1<br />

N2<br />

N1<br />

L2<br />

L1<br />

E6<br />

G5<br />

F5<br />

E5<br />

E3<br />

D3<br />

F4<br />

E4<br />

C1<br />

D6<br />

D4<br />

C3<br />

A2<br />

B1<br />

C7<br />

C6<br />

C5<br />

A4<br />

A3<br />

A5<br />

B6<br />

D7<br />

B5<br />

B2<br />

B4<br />

A7<br />

C4<br />

G3<br />

R2<br />

L5<br />

M5<br />

PE0_DDR_CLKA_P<br />

PE0_DDR_CLKA_N<br />

PE0_DDR_CLKB_P<br />

PE0_DDR_CLKB_N<br />

PE0_DDR_CS0_N<br />

PE0_DDR_ODT0<br />

PE0_DDR_BA0<br />

PE0_DDR_BA1<br />

PE0_DDR_BA2<br />

PE0_DDR_A0<br />

PE0_DDR_A1<br />

PE0_DDR_A2<br />

PE0_DDR_A3<br />

PE0_DDR_A4<br />

PE0_DDR_A5<br />

PE0_DDR_A6<br />

PE0_DDR_A7<br />

PE0_DDR_A8<br />

PE0_DDR_A9<br />

PE0_DDR_A10<br />

PE0_DDR_A11<br />

PE0_DDR_A12<br />

PE0_DDR_A13<br />

PE0_DDR_A14<br />

PE0_DDR_A15<br />

4<br />

PE0_DDR_CKE<br />

PE0_DDR_RAS_N<br />

PE0_DDR_CAS_N<br />

PE0_DDR_WE_N<br />

R10 60.4<br />

PE0_DDR_RST_N<br />

4<br />

PE0_DDR_CLKA_P<br />

PE0_DDR_CLKA_N<br />

R6 100<br />

PE0_DDR_CKE<br />

PE0_DDR_RST_N<br />

PE0_DDR_CS0_N<br />

PE0_DDR_RAS_N<br />

PE0_DDR_CAS_N<br />

PE0_DDR_WE_N<br />

PE0_DDR_BA0<br />

PE0_DDR_BA1<br />

PE0_DDR_BA2<br />

PE0_DDR_A0<br />

PE0_DDR_A1<br />

PE0_DDR_A2<br />

PE0_DDR_A3<br />

PE0_DDR_A4<br />

PE0_DDR_A5<br />

PE0_DDR_A6<br />

PE0_DDR_A7<br />

PE0_DDR_A8<br />

PE0_DDR_A9<br />

PE0_DDR_A10<br />

PE0_DDR_A11<br />

PE0_DDR_A12<br />

PE0_DDR_A13<br />

PE0_DDR_A14<br />

PE0_DDR_A15<br />

J7<br />

K7<br />

K9<br />

T2<br />

L2<br />

J3<br />

K3<br />

L3<br />

M2<br />

N8<br />

M3<br />

N3<br />

P7<br />

P3<br />

N2<br />

P8<br />

P2<br />

R8<br />

R2<br />

T8<br />

R3<br />

L7<br />

R7<br />

N7<br />

T3<br />

T7<br />

M7<br />

E1<br />

M1<br />

P1<br />

T1<br />

J2<br />

B3<br />

G8<br />

J8<br />

A9<br />

M9<br />

P9<br />

T9<br />

B1<br />

D1<br />

G1<br />

E2<br />

D8<br />

E8<br />

B9<br />

F9<br />

G9<br />

VCC_DDR<br />

C6<br />

0.1uF<br />

VCC_DDR<br />

0.1uF<br />

U2<br />

CK<br />

CK_N<br />

CKE<br />

RESET_N<br />

CS_N<br />

RAS_N<br />

CAS_N<br />

WE_N<br />

BA0<br />

BA1<br />

BA2<br />

A0<br />

A1<br />

A2<br />

A3<br />

A4<br />

A5<br />

A6<br />

A7<br />

A8<br />

A9<br />

A10/AP<br />

A11<br />

A12/BC#<br />

NC/A13<br />

NC/A14<br />

NC/A15<br />

VSS0<br />

VSS1<br />

VSS2<br />

VSS3<br />

VSS4<br />

VSS5<br />

VSS6<br />

VSS7<br />

VSS8<br />

VSS9<br />

VSS10<br />

VSS11<br />

VSSQ0 VDDQ0<br />

VSSQ1 VDDQ1<br />

VSSQ2 VDDQ2<br />

VSSQ3 VDDQ3<br />

VSSQ4 VDDQ4<br />

VSSQ5 VDDQ5<br />

VSSQ6 VDDQ6<br />

VSSQ7 VDDQ7<br />

VSSQ8 VDDQ8<br />

MT41J128M16HA-187E<br />

C7<br />

0.1uF<br />

C25<br />

0.1uF<br />

C8<br />

0.1uF<br />

C26<br />

0.1uF<br />

3<br />

DQ0<br />

DQ1<br />

DQ2<br />

DQ3<br />

DQ4<br />

DQ5<br />

DQ6<br />

DQ7<br />

DQ8<br />

DQ9<br />

DQ10<br />

DQ11<br />

DQ12<br />

DQ13<br />

DQ14<br />

DQ15<br />

UDM<br />

LDM<br />

UDQS<br />

UDQS_N<br />

LDQS<br />

LDQS_N<br />

NC0<br />

NC1<br />

NC2<br />

NC3<br />

ODT<br />

VREFDQ<br />

VREFCA<br />

ZQ<br />

VDD0<br />

VDD1<br />

VDD2<br />

VDD3<br />

VDD4<br />

VDD5<br />

VDD6<br />

VDD7<br />

VDD8<br />

3<br />

E3<br />

F7<br />

F2<br />

F8<br />

H3<br />

H8<br />

G2<br />

H7<br />

D7<br />

C3<br />

C8<br />

C2<br />

A7<br />

A2<br />

B8<br />

A3<br />

D3<br />

E7<br />

C7<br />

B7<br />

F3<br />

G3<br />

J1<br />

L1<br />

J9<br />

L9<br />

K1<br />

H1<br />

M8<br />

L8<br />

N1<br />

R1<br />

B2<br />

K2<br />

G7<br />

K8<br />

D9<br />

N9<br />

R9<br />

A1<br />

C1<br />

F1<br />

D2<br />

H2<br />

A8<br />

C9<br />

E9<br />

H9<br />

C9<br />

0.1uF<br />

C27<br />

0.1uF<br />

PE0_DDR_DQ18<br />

PE0_DDR_DQ21<br />

PE0_DDR_DQ19<br />

PE0_DDR_DQ20<br />

PE0_DDR_DQ17<br />

PE0_DDR_DQ23<br />

PE0_DDR_DQ16<br />

PE0_DDR_DQ22<br />

PE0_DDR_DQ31<br />

PE0_DDR_DQ27<br />

PE0_DDR_DQ29<br />

PE0_DDR_DQ25<br />

PE0_DDR_DQ28<br />

PE0_DDR_DQ26<br />

PE0_DDR_DQ30<br />

PE0_DDR_DQ24<br />

PE0_DDR_DM3<br />

PE0_DDR_DM2<br />

PE0_DDR_DQS3_P<br />

PE0_DDR_DQS3_M<br />

PE0_DDR_DQS2_P<br />

PE0_DDR_DQS2_M<br />

PE0_DDR_ODT0<br />

R8 240<br />

VCC_DDR<br />

VCC_DDR<br />

C10<br />

0.1uF<br />

C28<br />

0.1uF<br />

C11<br />

0.1uF<br />

C29<br />

0.1uF<br />

C12<br />

0.1uF<br />

C30<br />

0.1uF<br />

DDR_VREF1<br />

C13<br />

0.1uF<br />

C31<br />

0.1uF<br />

C4<br />

0.1uF<br />

PE0_DDR_CLKB_P<br />

PE0_DDR_CLKB_N<br />

C14<br />

0.1uF<br />

C32<br />

0.1uF<br />

C5<br />

0.1uF<br />

C15<br />

0.1uF<br />

C33<br />

0.1uF<br />

R7 100<br />

PE0_DDR_CKE<br />

PE0_DDR_RST_N<br />

PE0_DDR_CS0_N<br />

PE0_DDR_RAS_N<br />

PE0_DDR_CAS_N<br />

PE0_DDR_WE_N<br />

PE0_DDR_BA0<br />

PE0_DDR_BA1<br />

PE0_DDR_BA2<br />

PE0_DDR_A0<br />

PE0_DDR_A1<br />

PE0_DDR_A2<br />

PE0_DDR_A3<br />

PE0_DDR_A4<br />

PE0_DDR_A5<br />

PE0_DDR_A6<br />

PE0_DDR_A7<br />

PE0_DDR_A8<br />

PE0_DDR_A9<br />

PE0_DDR_A10<br />

PE0_DDR_A11<br />

PE0_DDR_A12<br />

PE0_DDR_A13<br />

PE0_DDR_A14<br />

PE0_DDR_A15<br />

C16<br />

0.1uF<br />

C34<br />

0.1uF<br />

2<br />

C17<br />

0.1uF<br />

C35<br />

0.1uF<br />

2<br />

J7<br />

K7<br />

K9<br />

T2<br />

L2<br />

J3<br />

K3<br />

L3<br />

M2<br />

N8<br />

M3<br />

N3<br />

P7<br />

P3<br />

N2<br />

P8<br />

P2<br />

R8<br />

R2<br />

T8<br />

R3<br />

L7<br />

R7<br />

N7<br />

T3<br />

T7<br />

M7<br />

E1<br />

M1<br />

P1<br />

T1<br />

J2<br />

B3<br />

G8<br />

J8<br />

A9<br />

M9<br />

P9<br />

T9<br />

B1<br />

D1<br />

G1<br />

E2<br />

D8<br />

E8<br />

B9<br />

F9<br />

G9<br />

U3<br />

CK<br />

CK_N<br />

VSSQ0 VDDQ0<br />

VSSQ1 VDDQ1<br />

VSSQ2 VDDQ2<br />

VSSQ3 VDDQ3<br />

VSSQ4 VDDQ4<br />

VSSQ5 VDDQ5<br />

VSSQ6 VDDQ6<br />

VSSQ7 VDDQ7<br />

VSSQ8 VDDQ8<br />

MT41J128M16HA-187E<br />

C18<br />

0.1uF<br />

C36<br />

0.1uF<br />

CKE<br />

RESET_N<br />

CS_N<br />

RAS_N<br />

CAS_N<br />

WE_N<br />

BA0<br />

BA1<br />

BA2<br />

A0<br />

A1<br />

A2<br />

A3<br />

A4<br />

A5<br />

A6<br />

A7<br />

A8<br />

A9<br />

A10/AP<br />

A11<br />

A12/BC#<br />

NC/A13<br />

NC/A14<br />

NC/A15<br />

VSS0<br />

VSS1<br />

VSS2<br />

VSS3<br />

VSS4<br />

VSS5<br />

VSS6<br />

VSS7<br />

VSS8<br />

VSS9<br />

VSS10<br />

VSS11<br />

C19<br />

0.1uF<br />

C37<br />

0.1uF<br />

DQ0<br />

DQ1<br />

DQ2<br />

DQ3<br />

DQ4<br />

DQ5<br />

DQ6<br />

DQ7<br />

DQ8<br />

DQ9<br />

DQ10<br />

DQ11<br />

DQ12<br />

DQ13<br />

DQ14<br />

DQ15<br />

UDM<br />

LDM<br />

UDQS<br />

UDQS_N<br />

LDQS<br />

LDQS_N<br />

NC0<br />

NC1<br />

NC2<br />

NC3<br />

ODT<br />

VREFDQ<br />

VREFCA<br />

ZQ<br />

VDD0<br />

VDD1<br />

VDD2<br />

VDD3<br />

VDD4<br />

VDD5<br />

VDD6<br />

VDD7<br />

VDD8<br />

C20<br />

0.1uF<br />

C38<br />

0.1uF<br />

E3<br />

F7<br />

F2<br />

F8<br />

H3<br />

H8<br />

G2<br />

H7<br />

D7<br />

C3<br />

C8<br />

C2<br />

A7<br />

A2<br />

B8<br />

A3<br />

D3<br />

E7<br />

C7<br />

B7<br />

F3<br />

G3<br />

J1<br />

L1<br />

J9<br />

L9<br />

K1<br />

H1<br />

M8<br />

L8<br />

N1<br />

R1<br />

B2<br />

K2<br />

G7<br />

K8<br />

D9<br />

N9<br />

R9<br />

A1<br />

C1<br />

F1<br />

D2<br />

H2<br />

A8<br />

C9<br />

E9<br />

H9<br />

C21<br />

0.1uF<br />

C39<br />

0.1uF<br />

PE0_DDR_DQ3<br />

PE0_DDR_DQ4<br />

PE0_DDR_DQ2<br />

PE0_DDR_DQ7<br />

PE0_DDR_DQ1<br />

PE0_DDR_DQ5<br />

PE0_DDR_DQ0<br />

PE0_DDR_DQ6<br />

PE0_DDR_DQ15<br />

PE0_DDR_DQ11<br />

PE0_DDR_DQ14<br />

PE0_DDR_DQ8<br />

PE0_DDR_DQ13<br />

PE0_DDR_DQ10<br />

PE0_DDR_DQ12<br />

PE0_DDR_DQ9<br />

PE0_DDR_DM1<br />

PE0_DDR_DM0<br />

PE0_DDR_DQS1_P<br />

PE0_DDR_DQS1_M<br />

PE0_DDR_DQS0_P<br />

PE0_DDR_DQS0_M<br />

PE0_DDR_ODT0<br />

R9 240<br />

VCC_DDR<br />

VCC_DDR<br />

C22<br />

0.1uF<br />

C40<br />

0.1uF<br />

C23<br />

0.1uF<br />

C41<br />

0.1uF<br />

Title<br />

PE0 DDR3 I/F<br />

Size Document Number BOM Variant<br />

Internal Version<br />

Rev<br />

Custom<br />

<br />

MAIN<br />

N/A<br />

4A<br />

Date: Thursday, June 02, 2011<br />

Sheet 5 of<br />

19<br />

1<br />

1<br />

DDR_VREF1<br />

C2<br />

0.1uF<br />

Confidential and Proprietary © <strong>Stretch</strong>, <strong>Inc</strong>. All ri<br />

<strong>Stretch</strong> <strong>Inc</strong>.<br />

1322 Orleans Drive<br />

Sunnyvale, CA 94089<br />

C3<br />

0.1uF<br />

ghts reserved<br />

C428<br />

4.7uF<br />

VCC_DDR<br />

R227<br />

1.2K<br />

1%<br />

R228<br />

1.2K<br />

1%<br />

www.stretchinc.com<br />

Phone:<br />

408-543-2700<br />

Fax:<br />

408-747-5736<br />

D<br />

C<br />

B<br />

A<br />

Reference Designs<br />

... complete solutions for fast time to market<br />

<strong>Stretch</strong> reference designs leverage the capabilities of S7000 family of software configurable processors to achieve<br />

unprecedented performance. Designs are available for PCIe DVR add-in cards, HDcctv and IP cameras, and for<br />

hybrid standalone DVRs.<br />

Reference designs are available as production-ready OEM units, as Evaluation Reference Design Kits (EVK), or<br />

as Full Reference Designs Kits (RDK). A Software Development Kit (SDK), common across all <strong>Stretch</strong> reference<br />

designs, makes porting of application code quick and straight forward, speeding time to market.<br />

OEM <strong>Product</strong>ion Ready Units<br />

<strong>Product</strong>ion ready units, simply supply your own<br />

application software<br />

Complete firmware load for the <strong>Stretch</strong> product and the<br />

<strong>Stretch</strong> Software Development Kit (SDK) for easy<br />

porting of host application software.<br />

VRC7016L<br />

EVK Evaluation Kits<br />

Evaluate video quality, performance, and ease<br />

of integration<br />

Complete firmware load (with source code) for the reference<br />

design, 1 demonstration applications, and a complete<br />

SDK for customer evaluations.<br />

IPCAM7120<br />

RDK Reference Design Kits<br />

Everything you need to design your own highly<br />

differentiated product<br />

The complete EVK kit, plus the hardware design files<br />

needed to build derivative products. RDKs also include a<br />

distribution license for the <strong>Stretch</strong> Intelligent Encoder.<br />

DDR3_RST_N A6 C24<br />

1 Intelligent Encoder is supplied as object code<br />

VRM7016

S7000 PCIe Add-in Cards<br />

... surveillance industry’s best video quality<br />

VRC7000 Series Encoding Cards<br />

VRC7000 cards are available in channel densities from<br />

4 to 32 channels and at resolutions ranging from standard<br />

definition up to high definition HDcctv. These<br />

cards feature the <strong>Stretch</strong> Intelligent Encoder and have<br />

multi-stream, multi-CODEC capability, including <strong>Stretch</strong><br />

H.264 Scalable Video CODEC (SVC) and <strong>Stretch</strong> H.264<br />

High Profile CODEC. These CODECs produce the surveillance<br />

industry’s best video quality, its lowest bit rates,<br />

and produce streams that can be managed with unprecedented<br />

ease.<br />

VDC7000 Series Decode and Display Cards<br />

VDC7000 series cards provide a high performance and<br />

versatile video decode and display sub-system. They<br />

have universal decode capability, decoding streams from<br />

any video source including IP Cameras and standalone<br />

DVRs. Output video interface options include high definition<br />

HDMI, HDcctv, and standard definition CVBS.<br />

Extensive video post processing, scaling, and captioning<br />

allow multiple streams of decoded or raw video to be<br />

displayed in user-defined configurations.<br />

VRC7016L<br />

VDC7002LHDMI<br />

<strong>Stretch</strong> VRC7000 and VDC7000 series cards feature the <strong>Stretch</strong> eAIM interface to allow cards within a system to<br />

communicate without host processor intervention. This high bandwidth interface reduces host processing requirements<br />

and reduces system costs.<br />

Ordering Codes Form Factor S7 Devices Encoding /Decoding Display eAIM Connectivity<br />

EVK-VRC7032<br />

RDK-VRC7032<br />

EVK-VRC7016LX<br />

RDK-VRC7016LX<br />

EVK-VRC7016L<br />

RDK-VRC7016L<br />

EVK-VRC7008L<br />

RDK-VRC7008L<br />

EVK-VRC7004HD<br />

RDK-VRC7004HD<br />

EVK-VDC7002LHDMI<br />

RDK-VDC7002LHDMI<br />

EVK-VDC7002LHDCCTV<br />

RDK-VDC7002LHDCCTV<br />

EVK-VDC7004L<br />

RDK-VDC7004L<br />

Full Height<br />

Short Form<br />

Low Profile<br />

Short Form<br />

Low Profile<br />

Short Form<br />

Low Profile<br />

Short Form<br />

Full Height<br />

Short Form<br />

Low Profile<br />

Short Form<br />

Low Profile<br />

Short Form<br />

Low Profile<br />

Short Form<br />

3 S7100 32 D1 Encode 2 CVBS 2 Port BNC breakout adapter cable, Embedded I/O headers<br />

2 S7110 16 D1 Encode 2 CVBS 1 Port BNC breakout adapter cable, Embedded I/O headers<br />

1 S7100 16 D1 Encode None 1 Port BNC breakout adapter cable, Embedded I/O headers<br />

1 S7100 8 D1 Encode 1 CVBS 1 Port BNC breakout adapter cable, Embedded I/O headers<br />

2 S7100 4 1080P30 Encode None 2 Port BNC connector on back panel<br />

1 S7100 16 D1 Decode 2 HDMI 2 Port HDMI<br />

1 S7100 2 1080p30 Decode or<br />

16 D1 Decode<br />

2 HDcctv 2 Port BNC connectors on back panel<br />

1 S7100 16 D1 Decode 4 CVBS 2 Port BNC breakout adapter cable

VRM7000 Standalone DVR Reference Designs<br />

... true hybrid capability<br />

<strong>Stretch</strong> VRM7000 Series designs are available in channel<br />

densities from 8 to 16 channels and with resolutions<br />

ranging from standard definition to high definition<br />

HDcctv. They use the power and flexibility of the S7000<br />

family of processors to provide full duplex operation,<br />

and universal decode ensures true hybrid capability for<br />

compatibility with any IP camera. All VRM7000 Series<br />

designs are compatible with the full range of <strong>Stretch</strong><br />

CODECs, including the H.264 High Profile and Scalable<br />

Video CODECs (SVC), and use the rich API standard in<br />

all <strong>Stretch</strong> products.<br />

VRM7000 Series reference designs feature spot monitor<br />

video outputs as well the ability to send stored video<br />

via a network to remote monitoring clients. The flexibility<br />

and scalability built into these reference designs<br />

ensure that derivative products can be easily designed in<br />

a range of channel densities and with a wide variety of<br />

features.<br />

VRM7016<br />

High levels of integration afforded by the S7000 family of software configurable processors ensure very low system<br />

material costs. Host application software can be easily ported to run under Linux on the ARM processor present in<br />

each S7000 family device.<br />

Ordering Codes S7 Devices Encode Capability Input Video Output Video Storage<br />

EVK-VRM7016<br />

RDK-VRM7016<br />

EVK-VRM7008<br />

OEM-VRM7008<br />

EVK-VRM7008HD<br />

RDK-VRM7008HD<br />

2 S7100 H.264 High Profile and H.264 SVC 16 Channels D1 HDMI, CVBS, VGA Up to 10 SATA Ports<br />

1 S7110 H.264 High Profile and H.264 SVC 8 Channels D1 CVBS, VGA 1 SATA Port<br />

5 S7100 H.264 High Profile and H.264 SVC 8 Channels HDcctv HDMI, VGA, HDcctv Up to 9 SATA Ports

S7000 Cameras<br />

... flexible image signal processing<br />

S7000 Series Camera Reference Design Kits<br />

<strong>Stretch</strong> S7000 series camera reference design kits feature<br />

<strong>Stretch</strong> software configurable processors and are available in<br />

a selection of resolution and output options. These singlechip<br />

designs feature state-of-the-art technology for ultimate<br />

video quality and are available with either Internet Protocol<br />

(IP) or HDcctv outputs.<br />

<strong>Stretch</strong> S7000 series camera kits use an integrated Image<br />

Signal Processing (ISP) engine to process raw image data<br />

from the sensor and to perform a wide array of algorithms<br />

including Color Filter Array (CFA) interpolation, defective<br />

pixel and black level correction, Wide Dynamic Range (WDR)<br />

tone mapping, color and gamma correction, and image<br />

enhancement. To optimize camera settings for the best possible<br />

image, the ISP also provides control for automatic exposure,<br />

focus, and white balance. ISP parameters are controlled<br />

through a rich API, and elements can be replaced with<br />

customer-specific algorithms when required. The <strong>Stretch</strong> ISP<br />

removes the need for a separate ISP device, so total system<br />

costs are reduced.<br />

IPCAM7100<br />

Using <strong>Stretch</strong>’s H.264 High Provide CODEC combined with<br />

the advanced image processing of the <strong>Stretch</strong> ISP provides<br />

the industry’s best image quality and lowest compressed bit<br />

rate. <strong>Stretch</strong> IPCAM7100 and IPCAM7120 reference designs<br />

can also perform video compression using the <strong>Stretch</strong> H.264<br />

IPCAM7120<br />

Scalable Video CODEC (SVC) to provide ultimate scalability<br />

and stream management capabilities. The <strong>Stretch</strong> HDCCTVCAM outputs pristine quality high definition 1920 x<br />

1080 progressive scan video at 30 frames per second over an HDcctv-compatible interface. The result is low latency,<br />

high quality video in a platform that is easy to deploy using existing installed infrastructure.<br />

<strong>Stretch</strong> IP cameras feature a PSIA server running on the S7000 family processor’s embedded ARM9 processor. This<br />

makes the designs easy to install and configure using industry standard PSIA clients.<br />

Ordering Codes<br />

EVK-IPCAM7100<br />

RDK-IPCAM7100<br />

EVK-IPCAM7110<br />

RDK-IPCAM7110<br />

EVK-IPCAM7120<br />

RDK-IPCAM7120<br />

EVK-HDCCTVCAM<br />

RDK-HDCCTVCAM<br />

Maximum Resolution at<br />

Full Frame Rate<br />

1080p60<br />

5MP<br />

1080p60<br />

4MP<br />

1080p30<br />

720p60<br />

Interface Options Encoding Capability Control Protocols<br />

Ethernet, CVBS Analog Monitor,<br />

HDcctv Local Monitor<br />

H.264 High Profile, H.264 Scalable Video CODEC, MPEG4 PSIA and ONVIF<br />

Ethernet, CVBS Analog Monitor H.264 High Profile, MPEG4 PSIA and ONVIF<br />

Ethernet, CVBS Analog Monitor H.264 High Profile, H.264 Scalable Video CODEC, MPEG4 PSIA and ONVIF<br />

1080p30 HDcctv None HDcctv

<strong>Stretch</strong> Software Development Kit (SDK)<br />

... performance of hardware, simplicity of C<br />

S7000 Software<br />

All <strong>Stretch</strong> board products—IP camera reference<br />

designs, PCIe DVR add-in cards, and standalone DVR<br />

systems—are compatible with the same SDK. This<br />

ensures maximum code reuse and speeds time to<br />

market. The <strong>Stretch</strong> SDK provides a rich collection<br />

of CODECs, video processing algorithms, and system<br />

management functions. All SDK features can be<br />

accessed through an extensive collection of Application<br />

Programming Interface (API) calls, making host application<br />

software development straightforward and intuitive.<br />

The <strong>Stretch</strong> H.264 High Profile CODEC<br />

This <strong>Stretch</strong> H.264 High Profile CODEC is standard<br />

in the SDK and is available to all <strong>Stretch</strong> platforms. Its<br />

highly efficient design produces compressed video at<br />

half the bit rate of competing products, reducing storage<br />

requirements and slashing operating costs. For a given<br />

bit rate, the <strong>Stretch</strong> H.264 High Profile CODEC produces<br />

the surveillance industry’s best video quality.<br />

The <strong>Stretch</strong> H.264 Scalable Video CODEC (SVC)<br />

The <strong>Stretch</strong> H.264 SVC CODEC produces compressed<br />

streams that can be decoded to produce video at different<br />

frame rates and resolutions. By parsing the encoded<br />

stream, bandwidth and decode compute requirements<br />

can be changed in real time. In this way, SVC streams<br />

can transit networks with constrained bandwidth and<br />

be decoded by low-complexity client devices. Recorded<br />

SVC streams can be parsed to lower their frame rate<br />

and resolution, reducing their storage requirements to<br />

regain valuable storage resources. This reduces costs<br />

while allowing operators to retain a valid video archive<br />

for longer periods.<br />

Megapixel<br />

IP Camera<br />

Single SVC Stream<br />

SVC<br />

Server<br />

Remote Monitoring<br />

HD Monitor<br />

Monitor Wall<br />

First Responders

WWW.STRETCHINC.COM<br />

<strong>Stretch</strong> <strong>Inc</strong>orporated<br />

1322 Orleans Drive<br />

Sunnyvale, CA 94089 USA<br />

Tel: 408-543-2700 Fax: 408-747-5736<br />

sales@stretchinc.com<br />

MK-S7PROD-0001-005

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