Schematic - Grand Idea Studio
Schematic - Grand Idea Studio
Schematic - Grand Idea Studio
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D<br />
D<br />
C<br />
C<br />
B<br />
B<br />
A<br />
A<br />
NOTE: RESISTORS ARE IN OHMS +/- 5% AND CAPACITORS ARE IN MICROFARADS UNLESS<br />
OTHERWISE NOTED. SEE BOM FOR ACTUAL VOLTAGE AND SPECIFICATION.<br />
3V3<br />
VADJ<br />
4/19/2013 B B<br />
2<br />
2 Joe <strong>Grand</strong><br />
JTAGulator: Target Interface<br />
SIZE<br />
DATE<br />
REV<br />
SHT<br />
OF<br />
TITLE<br />
DRAWN BY<br />
FILENAME<br />
Distributed under a Creative Commons Attribution 3.0 US license<br />
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3<br />
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5<br />
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6<br />
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6<br />
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3<br />
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VCC<br />
5<br />
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5<br />
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6<br />
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VADJ<br />
I/O1<br />
1<br />
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2<br />
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3<br />
I/O3<br />
4<br />
VCC<br />
5<br />
I/O4<br />
6<br />
U13<br />
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VADJ<br />
3V3<br />
VADJ<br />
0.1uF<br />
C18<br />
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C22<br />
3V3<br />
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Diode limiters for input protection<br />
Vf must be < 0.5V to prevent damage to level translators<br />
VCCA
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