Exception Handling ABI for the ARM Architecture

Exception handling ABI for the ARM architecture
11001yyy Spare (yyy != 000, 001)
11010nnn
11xxxyyy Spare (xxx != 000, 001, 010)
Pop VFP double-precision registers D[8]-D[8+nnn] saved (as if) by FSTMFDD (see
remark d)
It may be possible for application code to save registers in a variety of data representations. When restoring
registers the personality routine will assume that the application saved the registers using the following
representations:
An integer register is assumed to be on the stack as if transferred by a STR instruction.
A sequence of VFP registers encoded in a single unwind instruction are assumed to have been saved as if by
FSTMFDX or FSTMFDD, depending on the unwind instruction used.
A WMMX data register is assumed to have been saved as if by WSTRD.
A WMMX control register is assumed to have been saved as if by WSTRW.
9.4 Interpreting the tables
Recall that the return address into the current function is in VRS[r15] on entry to the personality routine. The
personality routines interpret an exception-handling table entry as follows:
The descriptors are traversed linearly.
Cleanup descriptors are ignored in phase 1. In phase 2, if the return address is within the specified range, the PR
must update the virtual register set for entry to the landing pad, call __cxa_begin_cleanup (see §8.4), save
whatever it needs in the UCB cleanup_cache (see 7.2) then return _URC_INSTALL_CONTEXT.
Catch descriptors are examined in phase 1. If the return address is within the specified range, the type of the
thrown exception is checked for a match against the catch type. __cxa_type_match (see §8.4) may be used when
offset encodes a type_info object. A match denotes a propagation barrier and the PR should fill in the
barrier_cache and return _URC_HANDLER_FOUND. On re-encountering the barrier in phase 2, the PR should
set the VRS for landing pad entry (passing the UCB address in r0) and return _URC_INSTALL_CONTEXT.
Function exception specification descriptors are examined in phase 1. If the return address is within the specified
range, the type of the thrown exception is checked for a match against the specified types. __cxa_type_match
(see §8.4) may be used. No match against any of the types denotes a propagation barrier and the PR should fill in
the barrier_cache and return _URC_HANDLER_FOUND. On re-encountering the barrier in phase 2, the
behaviour depends on whether the descriptor has an explicitly specified landing pad (signified by high bit set in the
type count word) or not:
If it does, the PR should set the VRS for entry to that pad (passing the UCB address in r0), ensure the data
required for __cxa_call_unexpected is in the barrier_cache (see §8.2), and then return
_URC_INSTALL_CONTEXT. The pad will call __cxa_call_unexpected.
If it does not, the PR should execute the unwind description to virtually unwind the frame, set the VRS for
entry to __cxa_call_unexpected (see §8.4), ensure the data required for __cxa_call_unexpected is in the
barrier_cache (see §8.2), then return _URC_INSTALL_CONTEXT.
If the PR has retained control after processing the final descriptor, it must execute the unwind description to
virtually unwind the frame. It must then return _URC_CONTINUE_UNWIND, causing the unwinder to locate and
initiate processing of the next frame.
The PR is not allowed to change its mind about a barrier between phase 1 and phase 2.
In summary, the ARM personality routines always pass a pointer to the UCB in r0 when entering a handler or a
handler landing pad.
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