Representation of Floating Point Numbers in Single Precision ...

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* -ARG1 +ARG2 * +ARG1 -ARG2 FPAMS MOVEQ #-128,D3 CREATE A CARRY MASK ($80) * ARG1
* MIXED SIGNS NORMALIZE FPANOR MOVE.B D4,D5 FPANRM CLR.B D7 SUB.B #1,D4 SAVE CORRECT SIGN CLEAR SUBTRACT RESIDUE MAKE UP FOR FIRST SHIFT CMP.L #$00007FFF,D7 ? SMALL ENOUGH FOR SWAP BHI.S FPAXQN BRANCH NOPE SWAP.W D7 SHIFT LEFT 16 BITS REAL FAST SUB.B #16,D4 MAKE UP FOR 16 BIT SHIFT FPAXQN ADD.L D7,D7 DBMI EOR.B D4,D5 SHIFT UP ONE BIT D4,FPAXQN DECREMENT AND BRANCH IF POSITIVE ? SAME SIGN BMI.S FPAZRO BRANCH UNDERFLOW TO ZERO MOVE.B D4,D7 RESTORE SIGN/EXPONENT BEQ.S FPAZRO RETURN ZERO IF EXPONENT UNDERFLOWED RTS RETURN TO CALLER * EXPONENT UNDERFLOWED - RETURN ZERO FPAZRO MOVEQ.L #0,D7 CREATE A TRUE ZERO RTS RETURN TO THE CALLER EECC250 - Shaaban #27 lec #17 W<strong>in</strong>ter99 1-27-2000
Page 1 and 2: Representation of Floating Point Nu
Page 3 and 4: IEEE 754 Format Parameters Single P
Page 5 and 6: Floating Point Conversion Example
Page 7 and 8: Basic Floating Point Addition Algor
Page 9 and 10: Floating Point Addition Example •
Page 11 and 12: Basic Floating Point Subtraction Al
Page 13 and 14: Basic Floating Point Multiplication
Page 15 and 16: Floating Point Multiplication Examp
Page 17 and 18: Basic Floating Point Division Algor
Page 19 and 20: Floating Point Error Rounding Obser
Page 21 and 22: * REGISTERS D3 THRU D5 ARE VOLATILE
Page 23 and 24: * +ARG1 +ARG2 * -ARG1 -ARG2 FPALS S
Page 25: * -ARG1EXP > -ARG2EXP * +ARG1EXP >

Representation of Floating Point Numbers in Single Precision ...

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