CS137: Electronic Design Automation Today Last Time Force ...

CS137:
Electronic Design Automation
Today
Day 20: November 23, 2005
Scheduling
Variants and Approaches
• Scheduling
– Force-Directed
– SAT/ILP
– Branch-and-Bound
CALTECH CS137 Fall2005 -- DeHon
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CALTECH CS137 Fall2005 -- DeHon
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Last Time
Force-Directed
• Resources aren’t free
• Share to reduce costs
• Schedule operations on resources
• Greedy approximation algorithm
• Problem: how exploit schedule freedom
(slack) to minimize instantaneous
resources
– Directly solve time constrained
– Trying to minimize resources
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CALTECH CS137 Fall2005 -- DeHon
Force-Directed
• Given a node, can schedule anywhere
between ASAP and ALAP schedule
time
– Between latest schedule predecessor and
ALAP
– Between ASAP and already scheduled
successors
• N.b.: Scheduling node will limit freedom
of nodes in path
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Single Resource Challenge
A1 A3 A5 A7 A8 A9 A10 A11 A12 A13
A2 A4 A6
B2
B1
B3
B4
B10
B11
B5
B6
B7
B8
B9
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Force-Directed
Force-Directed
• If everything where scheduled, except
for the target node, we would:
– examine resource usage in all timeslots
allowed by precedence
– place in timeslot which has least increase
maximum resources
• Problem: don’t know resource
utilization during scheduling
• Strategy: estimate resource utilization
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CALTECH CS137 Fall2005 -- DeHon
Force-Directed Estimate
• Assume a node is uniformly distributed
within slack region
– between earliest and latest possible
schedule time
• Use this estimate to identify most used
timeslots
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Single Resource Challenge
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CALTECH CS137 Fall2005 -- DeHon
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2 2 2 2
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Single Resource Challenge
Single Resource Challenge
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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Single Resource Challenge
Single Resource Challenge
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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2 3/9
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2 1/9
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CALTECH CS137 Fall2005 -- DeHon
Force-Directed
• Scheduling a node will shift distribution
– all of scheduled node’s cost goes into one
timeslot
– predecessor/successors may have
freedom limited so shift their contributions
• Want to shift distribution to minimize
maximum resource utilization (estimate)
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Single Resource Challenge
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CALTECH CS137 Fall2005 -- DeHon
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2 2 2 2
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Repeat
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Single Resource Challenge
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CALTECH CS137 Fall2005 -- DeHon
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Repeat
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Single Resource Challenge
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CALTECH CS137 Fall2005 -- DeHon
2 2
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2 2 2 2
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Single Resource Challenge
Single Resource Challenge
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2 2
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2 2
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2 2 2 2
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3 4/9
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Single Resource Challenge
Single Resource Challenge
2
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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3 2/9
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2 3/9
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2 1/9
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Single Resource Challenge
Single Resource Challenge
2
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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2 3/9
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2 3/9
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Single Resource Challenge
Single Resource Challenge
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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Single Resource Challenge
Single Resource Challenge
2
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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2 13/18
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Single Resource Challenge
Single Resource Challenge
2
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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3 2/9
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Single Resource Challenge
Single Resource Challenge
2
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2 2
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2 2 2 2
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2 2 2 2
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2 13/18
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2 13/18
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Single Resource Challenge
Single Resource Challenge
2
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2 2
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2 2 2 2
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2 13/18
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Single Resource Challenge
Single Resource Challenge
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2 2
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2 2 2 2
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2 2 2 2
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2 13/18
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Single Resource Challenge
Single Resource Challenge
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2 2 2 2
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2 2 2 2
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2 13/18
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Single Resource Challenge
Single Resource Challenge
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2 2
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2 2 2 2
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2 2
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2 2 2 2
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Many steps…
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Force-Directed Algorithm
1. ASAP/ALAP schedule to determine range of
times for each node
2. Compute estimated resource usage
3. Pick most constrained node
(in largest time slot…)
– Evaluate effects of placing in feasible time slots
(compute forces)
– Place in minimum cost slot and update
estimates
– Repeat until done
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CALTECH CS137 Fall2005 -- DeHon
Time
• Evaluate force of putting in timeslot
O(NT)
– Potentially perturbing slack on net
prefix/postfix for this node N
– Each node potentially in T slots
• Evaluate all timeslots can put in O(NT 2 )
• N nodes to place
•O(N 2 T 2 )
– Loose bound--don’t get both T slots and N
perturbations
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Two Constraint Challenge
SAT/ILP
(Integer-Linear Programming)
• Processing elements have limited
memory
– Instruction memory (data memory)
• Tasks have different requirements for
compute and instruction memory
– i.e. Run length not correlated to code
length
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CALTECH CS137 Fall2005 -- DeHon
Task
• Task: schedule tasks onto PEs obeying
both memory and compute capacity
limits
Example and
ILP solution
From
Plishker et al.
NSCD2004
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CALTECH CS137 Fall2005 -- DeHon
Task
• Task: schedule tasks onto PEs obeying
both memory and compute capacities
• two capacity partitioning problem
– …actually, didn’t say anything about
communication…
• two capacity bin packing problem
• Task: i
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SAT Packing
•A i,j – task i assigned to resource j
Constraints
• Coverage constraints
• Uniqueness constraints
• Cardinality constraints
– PE compute
– PE memory
Allow Code Sharing
• Two tasks of same type can share code
• Instead of memory capacity
– Vector of memory usage
• Compute PE Imem vector
– As OR of task vectors assigned to it
• Compute mem space as sum of nonzero
vector entries
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CALTECH CS137 Fall2005 -- DeHon
Allow Code Sharing
• Two tasks of same type can share code
• Task has vector of memory uage
– Task i needs set of instructions k: T i,k
• Compute PE Imem vector
– OR (all i): PE.Imem j,k +=A i,j * T i,k
• PE Mem space
– PE.Total_Imem j = Σ(PE.Imem j,k *Instrs(k))
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CALTECH CS137 Fall2005 -- DeHon
Symmetries
• As with partitioning, many symmetries
• Speedup with symmetry breaking
– Tasks in same class are equivalent
– PEs indistinguishable
– Total ordering on tasks and PEs
– Add constraints to force tasks to be assigned
to PEs by ordering
– Plishker claims “significant runtime speedup”
– Using GALENA [DAC 2003] psuedo-Boolean
SAT solver
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Plishker Task Example
Results
Greedy (first-fit) binpack
SAT/ILP Solve
Solutions in < 1 second
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Why can they do this?
Why can they do this?
• Ignore precedence?
• Ignore Interconnect?
• Ignore precedence?
– feed forward, buffered
• Ignore Interconnect?
– Through shared memory, not dominant?
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Interconnect Buffers
Interconnect
Buffer
• Allow “Software Pipelining”
Each data item
Spatial we would pipeline, running all three at once
Think of each schedule instance as one
timestep in spatial pipeline.
A B C
50 100 50
PE0 C A
PE1
B
A B C
A B C
A B C
A B C
B B B B
C A C A C A C A
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Add Precedence to SAT/ILP?
• Assign start time to each task
• Precedence: constrain start of each
task to be greater than start+run of each
predecessor
• Time Exclusivity: constrain nonoverlap
of startstart+run-1 on nodes
on same PE
– Maybe formulate as order on PE
– And make PE order predecessor like a
task predecessor?
CALTECH CS137 Fall2005 -- DeHon
Untested conjecture
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Memory Schedule Variants
• Persistent: holds memory whole time
– E.g. task state, instructions
• Task temporary: only uses memory
space while task running
• Intra-Task: use memory between point
of production and consumption
– E.g. Def-Use chains
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Memory Schedule Variants
• Persistent:
– Binpacking in memory
• Task temporary:
– Co-schedule memory slot with execution
• Intra-Task:
– Lifetime in memory depends on scheduling
def and last use
– Phase Ordered: Register coloring
Branch-and-Bound
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CALTECH CS137 Fall2005 -- DeHon
Brute-Force
• Try all schedules
• Branching/Backtracking Search
• Start w/ nothing scheduled (ready
queue)
• At each move (branch) pick:
– available resource time slot
– ready task (predecessors completed)
– schedule task on resource
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Example
T1
T4
T2
T6
T5
T1→time 1
T3→time 1
T3
T2→time 1
Target: 2 FUs
idle→time 1
idle→time 2 T4→time 2
T3→time2
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CALTECH CS137 Fall2005 -- DeHon
Branching Search
• Explores entire state space
– finds optimum schedule
• Exponential work
–O (N (resources*time-slots) )
• Many schedules completely
uninteresting
Reducing Work
1. Canonicalize “equivalent” schedule
configurations
2. Identify “dominating” schedule
configurations
3. Prune partial configurations which will
lead to worse (or unacceptable
results)
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CALTECH CS137 Fall2005 -- DeHon
“Equivalent” Schedules
• If multiple resources of same type
– assignment of task to particular resource at
a particular timeslot is not distinguishing
T1
T2
T3
Keep track of resource usage by capacity at time-slot.
T2
T1
T3
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CALTECH CS137 Fall2005 -- DeHon
“Equivalent” Schedule
Prefixes
T1
T4
T2
T6
T5
T3
T1 T3
T1 T2
T2 T4
T3 T4
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“Non-Equivalent” Schedule
Prefixes
T1
T4
T2
T6
T5
T3
T1
T2
T3
T2
T3
T1
Pruning Prefixes?
• I’m not sure there is an efficient way
(general)?
• Keep track of schedule set
– walk through state-graph of scheduled
prefixes
– unfortunately, set is power-set so 2 N
– …but not all feasible, so shape of graph
may simplify
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CALTECH CS137 Fall2005 -- DeHon
Dominant Schedules
• A strictly shorter schedule
– scheduling the same or more tasks
– will always be superior to the longer
schedule
T1
T3
T3
T2
T1
T4
T5
T4
T3
T4
T2 T5
T1 T2 T5
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CALTECH CS137 Fall2005 -- DeHon
Pruning
• If can establish a particular schedule
path will be worse than one we’ve
already seen
– we can discard it w/out further exploration
• In particular:
– LB=current schedule time +
lower_bound_estimate
– if LB greater than existing solution, prune
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Pruning Techniques
Establish Lower Bound on schedule time
• Critical Path (ASAP schedule)
• Resource Bound
• Critical Chain
“Critical Chain” Lower Bound
• Bottleneck resource present coupled
resource and latency bound
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Single red resource
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“Critical Chain” Lower Bound
• Bottleneck resource present coupled
resource and latency bound
Single red resource
CALTECH CS137 Fall2005 -- DeHon
Critical path 5
Resource Bound (1,1) 4
Critical Chain (1,1) 7
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CALTECH CS137 Fall2005 -- DeHon
Alpha-Beta Search
• Generalization
– keep both upper and lower bound
estimates on partial schedule
• Lower bounds from CP, RB, CC
• Upper bounds with List Scheduling
– expand most promising paths
• (least upper bound, least lower bound)
– prune based on lower bounds exceeding
known upper bound
– (technique typically used in games/Chess)
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CALTECH CS137 Fall2005 -- DeHon
Alpha-Beta
• Each scheduling decision will tighten
– lower/upper bound estimates
• Can choose to expand
– least current time (breadth first)
– least lower bound remaining (depth first)
– least lower bound estimate
– least upper bound estimate
• Can control greediness
– weighting lower/upper bound
– selecting “most promising”
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CALTECH CS137 Fall2005 -- DeHon
Note
• Aggressive pruning and ordering
– can sometimes make polynomial time in
practice
– often cannot prove will be polynomial time
– usually represents problem structure we
still need to understand
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Multiple Resources
• Works for multiple resource case
• Computing lower-bounds per resource
– resource constrained
• Sometimes deal with resource coupling
– e.g. must have 1 A and 1 B simultaneously
or in fixed time slot relation
• e.g. bus and memory port
Summary
• Resource estimates and Refinement
• SAT/ILP Schedule
• Software Pipelining
• Branch-and-bound search
– “equivalent” states
– dominators
– estimates/pruning
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Admin
Big Ideas:
• Class
– Friday (no holiday)
– Next week:
• Monday, Friday
• No Wed.
• Next week’s reading all online
• Estimate Resource Usage
• Use dominators to reduce work
• Techniques:
– Force-Directed
– SAT/ILP
–Coloring
–Search
• Branch-and-Bound
• Alpha-Beta
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