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Electrical & Computer Engineering University of Windsor - Research ...

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR<br />

A Multi-Level Memory Based on CVNS<br />

Golnar Khodabandehloo, Ph.D. Candidate<br />

Supervisors: Dr. M. Ahmadi, Dr. M. Mirhassani<br />

This multi-level current mode DRAM can<br />

store up to 4-bit (16-level) on each<br />

storage cell. It will increase the bit-percell<br />

storage capacity. Refreshing circuitry<br />

is designed based on Continuous Valued<br />

Number System (CVNS) resulting in<br />

higher noise margin for the memory.<br />

With series configuration <strong>of</strong> ADC and<br />

DAC, it restores the correct value on the<br />

storage capacitor after each refreshing<br />

cycle. The circuit is designed and<br />

simulated using 90nm CMOS technology.<br />

a < M<br />

99.84 < 100<br />

((a)) n = (a. B) / M (MID)<br />

((a)) 1 = (99.84×10) / 100=9.984<br />

((a)) n-1 = {((a)) n - ⎣((a)) n ⎦ }× B ((a)) 0 = (9.984 - 9) × 10 = 9.84<br />

((a)) n-2 = {((a)) n-1 - ⎣((a)) n-1 ⎦ } × B<br />

((a)) -1 = (9.84 - 9) × 10 = 8.4<br />

…<br />

…<br />

Digit Generation in CVNS<br />

RCIM Report 2008 Graduate Students <strong>Research</strong> Summary 24

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