High site count complex mixed-signal device parallel testing soultion
High site count complex mixed-signal device parallel testing soultion
High site count complex mixed-signal device parallel testing soultion
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<strong>High</strong> <strong>site</strong> <strong>count</strong> <strong>complex</strong> <strong>mixed</strong>-<strong>signal</strong> <strong>device</strong> <strong>parallel</strong> <strong>testing</strong> <strong>soultion</strong><br />
Joon Hong(Teradyne Korea)
Agenda<br />
• Mixed-Signal SOC Multi<strong>site</strong> Test Roadmap<br />
• Device Overview<br />
• System configuration<br />
• DIB Design<br />
• AC Expansion Board Application<br />
• Test Result<br />
• Q&A<br />
June 29, 2010<br />
The 11th Korea Test Conference
Multi-<strong>site</strong> Test Roadmap<br />
2 or 4-<strong>site</strong> 8-<strong>site</strong><br />
16-<strong>site</strong> 32-<strong>site</strong> 64-<strong>site</strong><br />
2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011<br />
Catalyst/Tiger<br />
FLEX<br />
UltraFLEX<br />
UltraFLEX-HC<br />
UltraFLEX with new <strong>High</strong> density Options<br />
4-<strong>site</strong> Optical Disk<br />
Drive SOC test<br />
solution<br />
World’s first 8-<strong>site</strong><br />
CD, DVD Player Processor<br />
SOC test solution<br />
World’s first 16-<strong>site</strong><br />
Mobile A/V Processor<br />
SOC test solution<br />
World’s first 32-<strong>site</strong><br />
Mobile A/V Processor<br />
SOC test solution<br />
64-<strong>site</strong> SOC <strong>device</strong> test solution<br />
Using new high density (x2 ~ x4)<br />
UltraFLEX future option<br />
Multi-<strong>site</strong> capability is the key strategy to achieve low cost of test in SoC business<br />
4-<strong>site</strong> codec in 2001<br />
8-<strong>site</strong> CDP/DVDP in 2004<br />
16-<strong>site</strong> Mobile A/V processor in 2007<br />
32-<strong>site</strong> Mobile A/V processor in 2009<br />
June 29, 2010<br />
The 11th Korea Test Conference
Target Device Overview<br />
Feature - Mobile Audio/Video Application processor<br />
ARM Core (90MHz)<br />
Media Core(AMCv2)<br />
Memory controller<br />
- 128K SRAM (Shared)<br />
- 256K System Memory in AMC<br />
- 128K System SRAM<br />
- 50KB Embedded Rom<br />
Class D AMP<br />
DMA (4ch 10 DMA)<br />
10 Bit ADC<br />
Package - Discrete 148-ULGA, POP 232-ULGA<br />
Tests - Total ~1000 test items<br />
- Test group<br />
ADC_DM_TEST<br />
PMU_CURRENT_TEST<br />
BAT_OVPTHM_TEST<br />
BIRA_TEST<br />
D-CLASS Amplifier DAC_TEST<br />
USB_FS_TX_TEST, FS_Level_Test, HS_Level_Test<br />
IDS_AF_TEST<br />
ChipID, DieID<br />
June 29, 2010<br />
The 11th Korea Test Conference
System Configuration<br />
UltraFLEX-HC system configuration<br />
- 70 HSD, 11 DC, 4 AC channels for <strong>testing</strong> single <strong>site</strong><br />
- Total option channels for <strong>testing</strong> 32 <strong>site</strong>s<br />
HSD<br />
2240 Channels<br />
DC<br />
382 Channels<br />
AC<br />
128 Channels<br />
36 slot UFLEX configuration<br />
18 HSD 2304 Digital I/O channels<br />
6 HDVS 288 Channels<br />
4 DC30 80 Channels<br />
2 DCIO 384 Channels<br />
2 ACEX 128 Source Fan-outs<br />
128 Capture Muxing<br />
2 BBAC 4 Source & 4 Capture<br />
2 VHFAC 4 Source & 4 Capture<br />
*Optional 2 VHFAC for test time reduction<br />
June 29, 2010<br />
The 11th Korea Test Conference
DIB Design - Overview<br />
• DIB (Mother) board<br />
- <strong>High</strong> speed Digital and precision AC<br />
connections<br />
- Remove most of AC applications using<br />
ACEX options on the test head<br />
ACEX<br />
• Daughter board<br />
- DC test application circuit and relays<br />
- 1 DC Block supports 4 <strong>site</strong>s <strong>testing</strong><br />
- 8 copies of the DC Block for 32 <strong>site</strong>s<br />
• AC Expansion board<br />
- Provide Common AC applications on<br />
test head for the multi-<strong>site</strong> AC <strong>testing</strong><br />
Independent 16<br />
<strong>site</strong> design<br />
North<br />
Independent 16<br />
<strong>site</strong> design<br />
South<br />
• Option assignment<br />
- North16 & South16 <strong>site</strong>s identical<br />
DIB design for <strong>testing</strong> independently<br />
• Symmetrical <strong>site</strong> to <strong>site</strong> circuit design<br />
- Improve the <strong>site</strong> to <strong>site</strong> correlation<br />
• 4.8mm DIB thickness<br />
Daughter Board<br />
(8 DC Blocks)<br />
DIB Board<br />
(AC and Digital)<br />
ACEX<br />
June 29, 2010<br />
The 11th Korea Test Conference
DIB Design – Expand Application<br />
Space<br />
Interface design for mother and daughter boards<br />
• Doubled application space using a daughter board under the DIB<br />
• 10 of 200 pins high performance and high speed connectors for mating the daughter board<br />
• All relays on the DIB and Daughter boards are mating through receptacles and can be replaceable<br />
• Design 4.8mm thickness DIB for the handler interface standard<br />
• The 10 connectors, screws and daughter board will sustain the main DIB more flat and stable for<br />
the high forces applied by the 32 pick-ups on the multi-<strong>site</strong> handler<br />
DIB<br />
Device Socket<br />
7-16 mm<br />
4.8mm<br />
3.6mm<br />
Daughter Board<br />
DIB and Daughter board Interface<br />
connector<br />
June 29, 2010<br />
The 11th Korea Test Conference
DIB Design – Signal Delivery<br />
Simulation<br />
• Design the parts and transmission line models<br />
• Simulate - pulse and sine wave response<br />
June 29, 2010<br />
The 11th Korea Test Conference
DIB Design – Relay Power Budget<br />
•Relay assignment<br />
• Assign a NEC 2 form C relays for <strong>testing</strong> low speed AC and DC test items on daughter board .<br />
•Select Panasonic AGN20012 relays for low speed digital and AC applications on DIB<br />
•Use small size Sanyu MFS-E1T12G relays for USB2.0 application on DIB<br />
•Power budget study<br />
• Count the total relay turn on currents on a group<br />
• Check the max relay turn on number<br />
• Assign right relay power source for the group<br />
8442 DIB Relay power budget<br />
No. of<br />
DUT<br />
NO/DUT<br />
(EA)<br />
Part Number<br />
Voltage<br />
(V)<br />
Power(W)/<br />
Relay<br />
Total<br />
Power<br />
(W)<br />
Current<br />
(A)<br />
Max<br />
Relay<br />
Turn-on<br />
(EA)<br />
Actual<br />
Max<br />
Current<br />
(A)<br />
Utility<br />
Max<br />
Current<br />
(A)<br />
Current<br />
Mmargin<br />
(A)<br />
Daughter Bd 32 17.5 NEC UA2-5NU 5 0.14 78.4 15.68 9 8.064 8 -0.064 5V-1,2 2 Form C<br />
DIB 32 5 PANASONIC AGN20012 12 0.1404 22.464 1.872 3 1.1232 2 0.8768 12V 2 Form C<br />
DIB 32 3 SANYU MFS-E1T12G 12 0.2616 25.1136 2.0928 1 0.6976 2 1.3024 12V 1 Form C<br />
Assign<br />
-ment<br />
Relay<br />
Type<br />
Power budget study for the total 816 relays<br />
June 29, 2010<br />
The 11th Korea Test Conference
DIB Design- Relay Control<br />
•Relay control channel expansion<br />
• Total number of UDB channels on UFLEX system is 128<br />
• Total number of relays on the daughter board is 560<br />
• Need to expand the relay control channel by using fan-out buffers<br />
• One fan-out buffer control s 4 of 2 form C relays for <strong>testing</strong> 8 <strong>site</strong>s <strong>parallel</strong><br />
June 29, 2010<br />
The 11th Korea Test Conference
DIB Design - Data Bit Grounding<br />
• Separate the Data Bit Control GND - Low noise data bit grounding<br />
June 29, 2010<br />
The 11th Korea Test Conference
ACEX - User Interface and Signal<br />
1Mhz<br />
ACEX to DIB<br />
Loopback<br />
Test Result<br />
• 32 <strong>site</strong>s Test time<br />
10.9 sec<br />
• Parallel Test Efficiency 98.8%<br />
• Throughout improvement 184% (Compare with the16 <strong>site</strong>s <strong>testing</strong> )<br />
Site Count 1 4 8 16 22 32<br />
Test Time 8.040 8.446 8.939 9.610 10.361 10.875<br />
Parallelism 100.00% 98.32% 98.40% 98.70% 98.63% 98.86%<br />
10.870<br />
10.370<br />
9.870<br />
9.370<br />
Test Time<br />
8.870<br />
8.370<br />
7.870<br />
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32<br />
99.00%<br />
98.90%<br />
98.80%<br />
98.70%<br />
Parallelism<br />
98.60%<br />
98.50%<br />
98.40%<br />
98.30%<br />
98.20%<br />
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32<br />
June 29, 2010<br />
(TT_x16 * Site <strong>count</strong>_x32 ) (15.5 * 32 )<br />
= = 2.84<br />
(TT_x32 * Site <strong>count</strong>_x16 ) (10.9 * 16 )<br />
The 11th Korea Test Conference
Q&A<br />
June 29, 2010<br />
The 11th Korea Test Conference