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UART - Microchip Taiwan

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<strong>UART</strong> - Receive Interrupts<br />

• <strong>UART</strong> module 以 設 定 UxRXIF bit 來 指 出 有 Receive<br />

Interrupt 發 生 , 若 UxRXIE bit 也 被 設 定 為 1 則 會 發 生<br />

硬 體 中 斷<br />

• 接 收 中 斷 與 Receive Buffer 之 關 係 如 下 :<br />

When URXISEL bits in the UxSTA register = 11<br />

‣ Interrupt occurs when buffer becomes full<br />

‣ Used for receiving a block of 4 characters<br />

When URXISEL bits = 10<br />

‣ Interrupt when buffer has 3 characters<br />

‣ Used for receiving a block of 3 characters<br />

When URXISEL bits = 01 or 00<br />

‣ Interrupt whenever a character is received<br />

‣ Used for receiving a single character<br />

dsPIC Peripheral Module Training – RTC <strong>Taiwan</strong><br />

SLIDE 17

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