5SYA2032-02 Feb06 - 5S Components

Integrated Gate Commutated ThyristorsApplication NoteApplying IGCTs

Applying IGCTsThomas Setz, Matthias LüscherABB Switzerland LtdSemiconductorsFebruary 20061 IntroductionThe Integrated Gate Commutated Thyristor (IGCT) has become the power semiconductor ofchoice in Medium Voltage Industrial Applications. Also in Energy Management and the Tractionmarkets, the versatility of this power switch has enabled performance improvements and costsavings in a variety of applications.The outstanding feature of the IGCT - leading to its name and its main advantages - is not onlythe silicon wafer itself, but the way it is driven by the gate - the electrical and mechanical gatedrivedesign. The “hard-drive” concept at the heart of IGCT operation requires the mechanicalintegration of gate driver and semiconductor into one single unit with low circuit inductance. Italso implies a number of new converter features, which make IGCT converters different fromGTO or IGBT converters. It is the scope of this application note to make designers familiar withthe datasheets and the use of IGCTs in their main application areas. The following features areimportant to remember:- no turn-off snubber is needed in applications without series connection; where turn-offsnubbers are used, they are considerably smaller than those of GTOs- the customer control interface is reduced to that of a power supply and optical input andstatus feedback- gate drive geometry is an important parameter in mechanical stack design.It should be noted that “IGCT” is a generic reference to the complete device. “GCT” refers to thesemiconductor press-pack component. Further distinctions can be made to distinguish RC-IGCTs(reverse-conducting), RB-IGCTs (reverse blocking,) and AS-IGCTs (asymmetric with neitherreverse blocking nor reverse-conducting capability). ABB sells only IGCTs whereas othermanufacturers may offer the GCT and gate-unit separately. The term “SGCT” is also used bysome suppliers to designate a “symmetric blocking” device, known here as an RB-IGCT per theabove definition.The first part of this application note is a user’s guide to IGCT datasheets. In the 2 ndapplication-specific topics are illustrated.partPage 2 of 46 Doc. No. 5SYA2032-02, Feb 06

2 Table of contents1 INTRODUCTION .............................................................................................................................22 TABLE OF CONTENTS..................................................................................................................33 DATASHEET USER’S GUIDE........................................................................................................53.1 KEY PARAMETERS AND FEATURES.................................................................................................53.2 BLOCKING ....................................................................................................................................63.3 MECHANICAL DATA .......................................................................................................................73.4 GCT DATA...................................................................................................................................83.4.1 On-state of IGCT ...............................................................................................................83.4.2 Turn-on switching ............................................................................................................113.4.3 Turn-off switching ............................................................................................................133.5 GATE UNIT DATA........................................................................................................................143.6 THERMAL ...................................................................................................................................153.7 DIAGRAMS .................................................................................................................................173.7.1 GCT on-state current vs. on-state voltage ......................................................................173.7.2 GCT surge current vs pulse width and number of pulses ...............................................183.7.3 GCT turn-off characteristics ............................................................................................193.7.4 Gate unit related diagrams..............................................................................................203.8 DIODE-SPECIFIC DATA OF REVERSE CONDUCTING IGCTS (FROM DATASHEET 5SHX 26L4510)......213.8.1 Diode On-state ................................................................................................................213.8.2 Diode turn-on...................................................................................................................213.8.3 Diode turn-off...................................................................................................................213.8.4 Thermal data ...................................................................................................................214 IGCT APPLICATION-SPECIFIC TOPICS.....................................................................................224.1 IGCTS IN VOLTAGE SOURCE INVERTERS (VSI)............................................................................224.1.1 Design criteria..................................................................................................................234.1.2 Determining the design parameters ................................................................................254.1.3 Determining the size of the di/dt limiting inductor............................................................254.1.4 Determining the size of the clamp capacitor C CL and the damping resistor R S ...............264.1.5 Stray inductance L CL ........................................................................................................284.1.6 Influence of the clamp diode type....................................................................................29Page 3 of 46 Doc. No. 5SYA2032-02, Feb 06

4.2 IGCTS IN CURRENT SOURCE INVERTERS (CSI)...........................................................................304.2.1 The RB-IGCT test circuit and commutation modes.........................................................314.2.2 Commutation inductance L comm .......................................................................................334.2.3 RC snubber .....................................................................................................................344.3 RETRIGGERING OF AN IGCT .......................................................................................................354.3.1 Introduction......................................................................................................................354.3.2 When are external retrigger pulses required?.................................................................354.3.3 How are external retrigger pulses released? ..................................................................364.3.4 What is the best timing for the external retrigger? ..........................................................374.3.5 Applications requiring retrigger pulses ............................................................................384.4 SERIES CONNECTION OF IGCTS..................................................................................................394.4.1 Design criteria..................................................................................................................414.4.2 Snubber concepts............................................................................................................414.4.3 Scaling of clamp design...................................................................................................424.4.4 Factors influencing turn-off voltage sharing ....................................................................424.4.5 Conclusions .....................................................................................................................455 GLOSSARY...................................................................................................................................466 APPLICATION SUPPORT............................................................................................................46Page 4 of 46 Doc. No. 5SYA2032-02, Feb 06

3 Datasheet user’s guideThis section is a detailed guide to the proper understanding of an IGCT data sheet. Parametersand ratings will be defined and illustrated by figures where appropriate while following thesequence in which parameters appear in the datasheet. For explanation purposes, data anddiagrams associated with IGCT type 5SHY 35L4510 have been used but because all IGCTs havesimilar datasheets, this guide is applicable to all IGCTs. Additionally a 5SHX 26L4510 datasheetis used to explain the diode parameters of reverse-conducting devices.The datasheets distinguish between maximum rated values and characteristic values. Maximumrated values indicate limits beyond which damage to the device may occur. Characteristic valuesare parameters defined under typical application conditions.ABB reserves the right to change datasheets without notice. Therefore, for the latest version,please visit our website at www.abb.com/semiconductors.3.1 Key Parameters and featuresV DRM = 4500 VI TGQM = 4000 AI TSM = 32×10 3 AV (T0) = 1.4 Vr T = 0.325 mV DClink = 2800 W VAsymmetric Integrated Gate-Commutated Thyristor5SHY 35L4510• High snubberless turn-off rating• Optimized for medium frequency (

3.2 BlockingMaximum rated valuesParameter Symbol Conditions min typ max UnitRep. peak off-state voltage V DRM Gate Unit energized 4500 VPermanent DC voltage for100 FIT failure rate of GCTV DClinkReverse voltage V RRM IGCT inAmbient cosmic radiation at sea levelin open air. Gate Unit energized2800 Voff-state 17 Von-state 10 VCharacteristic valuesParameter Symbol Conditions min typ max UnitRep. peak off-state current I DRM V D = V DRM , Gate Unit energized 50 mAV DRMV DRM is the maximum repetitive voltage in the forward direction. The IGCT is able to block thisvoltage at line frequencies of 50 or 60 Hz, assuming a sinusoidal voltage waveform. V DRM is amaximum rating; if exceeded, leakage current and power loss may increase rapidly and may leadto thermal runaway and subsequent blocking degradation.Although V DRM specifies the IGCT’s quasi-static blocking capability, it is, in fact, the maximumdynamic voltage, V DM , that IGCTs can withstand following turn-off. It is important to note that theIGCT can only block rated voltage if the gate unit is energized.V DC-linkV DC-link is the maximum continuous DC voltage for a specified failure rate (100 FIT for example),due to cosmic radiation. Exceeding this voltage does not immediately lead to device failure, butthe probability of a cosmic radiation failure increases progressively with applied DC voltage. Adetailed explanation and IGCT type-specific calculations are printed in the application note5SYA2046 “Failure rate of IGCTs due to cosmic rays”.V RRMVRRM is the maximum repetitive voltage in the reverse direction. For all asymmetric IGCTs, thisvalue is in the range of 17 V, since it is determined by the reverse blocking capability of the gateto-cathodejunction (VGRM). The datasheet distinguishes between off-state (VRRM = 17V) and“on-state” (VRRM = 10V). The reduced reverse voltage rating in the “on-state” is determined bythe status feedback which sends an error signal if a reverse voltage greater than 10V is detectedwhile the device is gated “on”. If the controller does not use the feedback signal, it is possible toallow reverse voltages of up to 17V with the device gated “on”.In these conditions, the term “on-state” refers to the gating status i.e. the controller may order thedevice to be “on” but circuit conditions may require the anti-parallel diode to conduct, a conditionwhich will cause voltage to appear across the diode and hence, negatively across the IGCT; inthis condition it is the diode part of the GCT/diode combination which is in the on-state.Thus when an anti-parallel freewheeling diode conducts, an IGCT reverse voltage appears due tostray inductance and to the diode’s forward recovery voltage spike at high di/dt. If this exceedsPage 6 of 46 Doc. No. 5SYA2032-02, Feb 06

the rated value, V RRM , the IGCT will be driven into reverse avalanche. This condition is notharmful for the device, provided avalanche time and current are below 10 µs and rated I TGQM ,respectively.I DRMI DRM specifies the maximum leakage current, when V DRM is applied. It is measured at T vj max , withsinusoidal voltage pulses (t p = 10 ms) and an energized gate unit.3.3 Mechanical dataMaximum rated valuesParameter Symbol Conditions min typ max UnitMounting force F m 36 40 44 kNCharacteristic valuesParameter Symbol Conditions min typ max UnitPole-piece diameter D p ± 0.1 mm 85 mmHousing thickness H 25.3 25.8 mmWeight m 2.9 kgSurface creepage distance D s Anode to Gate 33 mmAir strike distance D a Anode to Gate 10 mmLength l ± 1.0 mm 439 mmHeight h ± 1.0 mm 40 mmWidth IGCT w ± 1.0 mm 173 mmF mF m is the mounting force necessary to establish a good electrical and thermal contact. It is veryimportant that F m stay within the specified limits, even under limiting operating temperature.Thermal expansions and tolerances of stack parts have to be considered in the design of theclamping system. Too low mounting force results in increased thermal resistance and -particularly at high currents - in damage to the dry interfaces within the housing that may provokedegradation. Also the individual cathode segments might not all be correctly contacted, leading toan increase in V T and drastic reduction of I TSM and I TGQM .Exceeding F m leads to increased mechanical stress on the silicon wafer, particularly wherethermal cycling is severe. This reduces life-expectancy of the device and can lead to prematurewear-out of the cathode segment metallization with subsequent gate-to-cathode short circuits.Besides a correct mounting force, it is also vital that the pressure be distributed homogeneouslyover the contact area. If not, the copper pole pieces of the housing may deform plastically, whichin turn, may lead to localized mechanical stress on the silicon wafer with subsequent degradationof the device performance or even fracturing of the wafer. Details concerning a proper clampingsystem are described in Application Note 5SYA2036 “Recommendations regarding mechanicalclamping of Press Pack High Power Semiconductors”.Note: If no external force is applied across a press-pack semiconductor, the silicon wafer willprobably not contact the pole pieces at all. For even the most basic device verifications (blockingPage 7 of 46 Doc. No. 5SYA2032-02, Feb 06

or gating checks by service personnel), a minimum clamping force of about 1 kN is required toestablish contact for low-current measurements.D p , H, l, h, wThese mechanical parameters are described in the outline drawing in the datasheet.mThis is the weight of the complete device, including the gate unit.D sThe surface creepage distance is defined as the shortest path along the ceramic surface betweenthe anode flange and the gate contact.D aThe air strike distance is defined as the shortest direct path between the anode side and the gatecontact.3.4 GCT Data3.4.1 On-state of IGCTMaximum rated values 1)Parameter Symbol Conditions min typ max UnitMax. average on-state I T(AV)M Half sine wave, T C = 85 °C,1700 AcurrentDouble side cooledMax. RMS on-state current I T(RMS) 2700 AMax. peak non-repetitivesurge on-state currentLimiting load integralMax. peak non-repetitivesurge on-state currentLimiting load integralStray inductance betweenGCT and antiparallel diodeCritical rate of rise of onstatecurrentI TSM t p = 10 ms, Tj = 125 °C, sine wave32×10 3 Aafter surge: V D = V R = 0 VI 2 t5.1×10 6 A 2 sI TSM t p = 30 ms, Tj = 125 °C, sine wave21×10 3 Aafter surge: V D = V R = 0 VI 2 tL Ddi T /dt crOnly relevant for applications withantiparallel diode to the IGCTFor higher di T /dt and current lowerthan 100 A an external retrigger pulsis required.6.27×10 6 A 2 s300 nH200 A/µsCharacteristic valuesParameter Symbol Conditions min typ max UnitOn-state voltage V T I T = 4000 A, T j = 125 °C 2.35 2.7 VThreshold voltage V (T0) T j = 125 °C1.4 VSlope resistanceI T = 1000...4000 A0.325 mΩr TPage 8 of 46 Doc. No. 5SYA2032-02, Feb 06

I 2 tLimiting surge current load integral I 2 t is an abbreviation and stands for ∫ I T 2 dt. This value isderived from the I TSM value discussed above, according to the following expression:tp2I t2 2TSM⋅pIt= ∫ IT() t dt =(for half-sinusoidal waveforms)20To protect the IGCT, the I 2 t of a semiconductor fuse must be lower than the maximum I 2 t of theIGCT. The caveat for I TSM applies similarly to I 2 t.L DStray inductance between IGCT and anti-parallel diode: for optimized switching behavior, it isrecommended to minimize L D as much as possible. Typical application values are in the range of30 … 50nH. However in the datasheets for asymmetric IGCTs, a maximum L D is defined andABB has verified proper operation up to this high value.di T /dt crThis is the critical rate of rise of forward current at IGCT turn-on . Please refer to the detaileddescription in section 4.3.V TV T is the on-state voltage at a given on-state current I T and at maximum junction temperature. V Tis influenced, within limits, by the irradiation dose that determines minority carrier lifetime. A lowerV T automatically implies a higher E off , and vice versa. Maximum and typical values are shown.V (T0) , r TIn many cases, it is convenient and sufficiently accurate to approximate the on-statecharacteristic (max. values) by a straight line, determined by V T0 and r T :V ( I )TT= V(T 0)The current range over which this expression yields acceptable accuracy is indicated by thecondition I T = 1000 - 4000 A (for the 5SHY 35L4510).+ IT⋅rTWhen average and RMS values of on-state current, I T(AV) and I T(RMS) , are known, then the on-statepower loss, P on-state , is readily calculated using V (T0) and r T :Pon−state= V⋅ I+ r ⋅ I2( T 0) T ( AV ) T T ( RMS )Page 10 of 46 Doc. No. 5SYA2032-02, Feb 06

3.4.2 Turn-on switchingMaximum rated valuesParameter Symbol Conditions min typ max UnitCritical rate of rise of onstatecurrentThe definitions of turn-on switching parameters are illustrated on the last page(s) of the IGCTdatasheets, with typical anode voltage and current waveforms along with electrical commandsignal(CS) and status-feedback signal (SF). These waveforms are reproduced in Fig. 1 and Fig.2 shows the test circuit.di T /dt crf = 0..500 Hz, T j = 125 °C,I T = 4000 A, V D = 2800 V1000 A/µsCharacteristic valuesParameter Symbol Conditions min typ max UnitTurn-on delay time t don V D = 2800 V, T j = 125 °C3.5 µsTurn-on delay time status tI T = 4000 A, di/dt = V D / L idon SF 7 µsfeedbackL i = 5 µHC CL = 10 µF, L CL = 0.3 µHRise time t r 1 µsTurn-on energy per pulseE on1.5 JL iL CLL DR sDUTVDCC CLL LoadFig 1 Turn-on waveformsFig 2 Turn-on test circuitdi T /dt crThis is the maximum permissible on-state di T /dt at turn-on. The maximum di T /dt is very much gatecurrent dependent (rate-of-rise-of-gate-current, di G /dt and peak gate current amplitude I GM ). Alarge gate current ensures that all IGCT cathode segments are turned on simultaneously andwithin a short time ensuring fast, uniform conduction and avoiding localized conduction and “hotspots”, which could destroy the IGCT. In most applications, turn-on of the IGCT causes a diodeturn-off. The maximum diode turn-off di/dt usually limits the allowed rate of commutation. Theturn-on gate conditions (di G /dt, I GM ) of the gate-unit are designed to amply cover the (turn-off) di/dtcapabilities of fast switching diodes. It would be possible to realize higher di T /dt cr for the IGCT butthis would unnecessarily increase the losses, input power and cooling requirements of the gateunit.Page 11 of 46 Doc. No. 5SYA2032-02, Feb 06

t don , t don SF , t rTurn-on delay time, turn-on delay time status-feedback and anode voltage fall time, respectively.These definitions are illustrated in Fig. 1.E onTurn-on energy per pulse E on is defined as the time integral of power P(t) = I T (t) x⋅V D (t) duringturn-on (from start of commutation until V D reaches the static on-state V T ):Eon = ∫ IT( t)⋅VD( t)dtThe turn-on power losses, P turn-on of the IGCT, are calculated as follows:Pturn−on=f⋅ Eonwhere f = switching frequency.Page 12 of 46 Doc. No. 5SYA2032-02, Feb 06

t doff , t doff SFTurn-off delay time and turn-off delay time status-feedback respectively. These definitions aregiven in Fig. 3.E offTurn-off energy per pulse E off is defined as the time integral of the power P(t) = I T (t) x⋅V D (t) duringturn-off (from start of commutation until IT reaches the static leakage current value):Eoff = ∫ IT( t)⋅VD( t)dtThe turn-off power losses, P turn-off , are calculated as follows:Pturn−off=f⋅ Eoffwith f = switching frequency.E off can be varied to a certain extent by electron and/or proton irradiation as described earlier inthis section for V T . E off varies, to a first approximation, linearly with I TGQ and V D . It is also highlydependent on T vj .3.5 Gate Unit DataThe important aspects of the gate unit are described in detail in the separate Application Note5SYA2031 “Applying IGCT Gate Units”.Page 14 of 46 Doc. No. 5SYA2032-02, Feb 06

3.6 ThermalMaximum rated valuesParameter Symbol Conditions min typ max UnitJunction operating temperature T vj -40 125 °CStorage temperature range T stg -40 60 °CAmbient operational temperature T a -40 50 °CCharacteristic valuesParameter Symbol Conditions min typ max UnitThermal resistance junction-to-caseof GCTR th(jc)Double side cooled 8.5 K/kWThermal resistance case-toheatsinkof GCTR th(ch)Double side cooled3 K/kWT vjThis is the operating junction temperature. The lower limit of T vj is determined mainly by the turnonand turn-off characteristics of the IGCT. Extremely low temperatures may raise latchingcurrent to the point at which the device no longer turns on and also the turn-off capability reduceswith temperature according to Fig. 11. The upper limit, on the other hand, is determined by theblocking capability of the main pn junction. Leakage current rises exponentially with temperatureand thermal instabilities may start to appear at high voltage.T stgThis is the storage temperature. Temperatures above T stg max lead to reduced lifetime of theelectrolytic capacitors in the gate unit.T aThis is the operating ambient temperature. T a defines the temperatures at which the gate unitworks reliably. T a is the air temperature around the gate-unit components (especially theelectrolytic capacitors) during operation. Temperatures below Ta min reduce I TGQM because of anincrease in gate unit impedance. T a max is the ambient temperature at which ageing of the gateunit becomes important. For a lifetime of 20 years, the case temperature of the electrolyticcapacitors should be limited to 60°C. Fig. 5 shows the effect of light forced air–cooling on theallowable turn-off current as a function of switching frequency. In cases where T a , T case GCT orcooling conditions differ significantly from the datasheet, we recommend measuring the casetemperature of the electrolytic capacitors.Max. turn-off current vs frequency for:• calculated lifetime of on-board capacitors20 years.• light forced air-cooling (air velocity > 0.5m/s).NB: forced air-cooling allows higher ambient airtemperature.Fig. 5 Max. turn-off current vs. frequency forlifetime operationPage 15 of 46 Doc. No. 5SYA2032-02, Feb 06

R th(jc)R th(jc) is the thermal resistance from junction (silicon wafer) to case with double-side cooling. As afree-floating IGCT has several dry interfaces inside the ceramic housing, it is evident that R th(jc)depends on F m . Datasheet figures are, therefore, based on the nominal mounting force asspecified in the mechanical-data sub-section. Reverse-conducting IGCTs have two separatelyspecified values, one for the GCT-part and one for the diode-part. The data are specified underthe condition that the GCT and diode parts are at the same temperature. Homogeneousmounting pressure is vital for reliable IGCT operation; this is particularly important for R th(jc) .R th(ch)Thermal resistance from case to heat sink (surface of IGCT housing to surface of heat sink) isdefined at nominal mounting force F m . Since R th(ch) is a dry interface between two surfaces, itdepends a great deal on the quality of the surfaces and the homogeneity of the mountingpressure. The specified R th(ch) is achieved when the heat sink surface is of a similar quality to thatof the IGCT surface i.e. when its flatness is of the order of 15 µm, its roughness is of the order of1 µm and the per-unit-area mounting pressure is uniform across the surface to within ± 15 %. Thelatter requirement calls for careful design of the clamping system. Details concerning a properclamping system are described in Application Note 5SYA2036 “Recommendations regardingmechanical clamping of Press Pack High Power Semiconductors”.Z th(j-c) (t)Transient thermal impedance, Z th(j-c) (t), emulates the rise of junction temperature versus timewhen a constant power is dissipated in the junction. It is defined as the temperature differencejunction-to-case, divided by the power:Zth ( j−c)∆T(j−c( t)=P)( t)Analytical function for transient thermalimpedance:Zth(j - c)(t) =n∑i=1R i(1- e-t/ τi 1 2 3 4R i (K/kW) 5.562 1.527 0.868 0.545τ i (s) 0.5119 0.0896 0.0091 0.0024i)Fig. 6aFig. 6b Transient thermal impedance (junction-tocase)vs. time (max. values)This function can be specified as a curve as shown in Fig. 6b, or by an analytical approximationwith the superposition of four exponential terms (Fig. 6a), as shown above. The analyticalexpression is particularly useful for computer calculations.Page 16 of 46 Doc. No. 5SYA2032-02, Feb 06

3.7 Diagrams3.7.1 GCT on-state current vs. on-state voltageFigs. 7a and 7b show maximum on-state current vs on-state voltage for T vj = 25 °C and 125 °C.Both, typical and maximal values are given. These curves can be used to calculate on-statelosses. The max. curves are characterized by the equations shown above the diagrams.Max. on-state characteristic model:Max. on-state characteristic model:VT 25= A + B ⋅ I + C ⋅ln(I + 1)+ DTvjTvj T Tvj TValid for i T = 300 – 30000 ATvj⋅ITVT125= A + B ⋅ I + C ⋅ln(I + 1)+ DTvj Tvj T Tvj TValid for i T = 300 – 30000 ATvj⋅ITA 25 B 25 C 25 D 25 A 125 B 125 C 125 D 125622.7×10 -3 163.4×10 -6 141.1×10 -3 0.0×10 0 -16.0×10 -3 226.6×10 -6 218.4×10 -3 0.0×10 0Fig. 7a GCT on-state voltage characteristics: Equationfor T vj = 25 °C and diagram up to 5 kAFig. 7b GCT on-state voltage characteristics:Equation for T vj = 125 °C and diagram upto 30 kA.Page 17 of 46 Doc. No. 5SYA2032-02, Feb 06

3.7.2 GCT surge current vs pulse width and number of pulsesFigs. 8 and 9 specify the surge current ratings and corresponding fusing integrals. Therelationship between these two ratings was examined in the on-state parameter section. Theconstraints linked to I TSM and ∫i 2 t mentioned there also apply to Fig. 9.Fig. 8 Surge on-state current vs pulse length. Halfsinewave.Fig. 9 Surge on-state current vs number of pulses.Half-sine wave, 10 ms, 50HzPage 18 of 46 Doc. No. 5SYA2032-02, Feb 06

3.7.3 GCT turn-off characteristicsFig. 10 shows GCT turn-off losses vs turn-off current. The curves are determined in the testcircuit of the datasheet. In VSI topologies with clamp circuits, the losses vary approximatelylinearly with DC-link voltage V D and turn-off current I TGQ .Fig. 11 specifies the turn-off safe operating area in a VSI clamp-circuit. Two parameters mainlydetermine the turn-off capability:a) the impedance of the turn-off gate channel increases with decreasing ambienttemperature of the gate unit; this limits max. turn-off current ITGQM independently of turnoff voltageb) The max. turn-off power capability of the GCT limits turn-off current as a function of turnoffvoltage.For these reasons, the safe operating area (Fig. 11) depends on device type and variesaccording to the dominant constraint (gate-unit type, DC voltage, temperature etc).Fig. 10 GCT turn-off energy per pulse vs. turn-offcurrentFig. 11 Safe Operating AreaPage 19 of 46 Doc. No. 5SYA2032-02, Feb 06

3.7.4 Gate unit related diagramsPower ConsumptionThe total power consumption of the IGCT Gate Unit is strongly load-dependent as can be seen inFig. 12. Turn-off current ITGQ, switching frequency fs, junction temperature Tvj and devicetechnology (gate charge Qgq) have a major influence on power consumption. The powersupplied to the gate-unit falls into two parts:a) a small thermal dissipation in the gate circuit and in the gate-cathode junction; this isdependent on switching frequency and ambient temperature since the “back-porch”current is increased at low temperature to ensure latchingb) the bulk of the supplied power is transferred to the load once the cathode is commutatedoff.Gate Unit limitations must be checked before the operating range in a specific application isdetermined. For the thermal limitations see Fig. 5.Burst capabilityThe gate unit of the IGCT has a large capacitor bank which stores energy for turn-on pulse, backporchcurrent and turn-off pulse. Since the turn-off pulse needs a large charge and the gate unitpower supply has an internal current limitation (I GIN Max ), triggering with very high frequencies islimited according to Fig. 13.Fig. 12 Max. Gate Unit input power in chopper modeFig. 13 Burst capabilityPage 20 of 46 Doc. No. 5SYA2032-02, Feb 06

3.8 Diode-specific data of reverse conducting IGCTs (from datasheet5SHX 26L4510)3.8.1 Diode On-stateOn-state data and diagrams are described in the same way as the on-state data of the GCT-part.Please refer to section 3.4.1 and diagrams Fig. 6 ... 9.3.8.2 Diode turn-onCharacteristic valuesParameter Symbol Conditions min typ max UnitPeak forward recoveryvoltageV FRM dI F /dt = 650 A/µs, T vj = 125°C 80 VV FRMPeak forward recovery voltage: Please refer section 4.1.6.3.8.3 Diode turn-offMaximum rated values 1)Parameter Symbol Conditions min typ max UnitMax. decay rate of on-statecurrentdi/dt crit I FM = 2200 A, T vj = 125 °CV DClink = 2800 V650 A/µsMax. decay rate of on-state di/dt crit I FM = 3200 A, T vj = 125 °C650 A/µscurrentV DClink = 3200 VCharacteristic valuesParameter Symbol Conditions min typ max UnitReverse recovery current I RMI FM = 2200 A, V DC-Link = 2800 V700 A-dI F /dt = 650 A/µs, L CL = 300 nHReverse recovery charge Q rr 2800 µCC CL = 10 µF, R CL = 0.8 Ω,Turn-off energyE rr T vj = 125°C, D CL = 5SDF 10H4520 2.7 4 Jdi/dt critMax. decay rate of on-state current defines the minimum value of (L i + L CL ) according to:VDClink( Li+ LCL)=di/dtwhere V DClink is the voltage drop across (L i + L CL ) during turn-off of the diode (see Fig. 4for test circuit). It is important to respect the “diode safe operating area” diagram of thedatasheet and to ensure that L CL be as low as possible. Typical applications work in arange of L CL = 150 … 250nH. Large stray clamp inductance increases the electricalstress on the diode during turn-off and also reduces the turn-off capability of the switch.I RM , Q rr , E rrReverse recovery current, reverse recovery charge and diode turn-off energy are specified underapplication-specific conditions. Additional data is printed in the datasheet diagrams.3.8.4 Thermal dataIn addition to the thermal data of the IGCT, the datasheets of reverse conducting IGCTs havethermal data for the diode part. The data is documented in the same way as in section 3.6. R thand Z th are specified without heat flow between the GCT-part and diode-part.Page 21 of 46 Doc. No. 5SYA2032-02, Feb 06

4 IGCT application-specific topics4.1 IGCTs in Voltage Source Inverters (VSI)Reverse conducting IGCTs (RC-IGCT), asymmetric IGCTs (AS-IGCT) and their correspondingdiodes are qualified and tested in test circuits built according to the circuit diagram below. It is anequivalent circuit for the switching events occurring in a VSI circuit, be it of 2-level or 3-leveltopology.L iL CLL DR sDUTVDCC CLL LoadFig. 14 Test circuit as shown in the datasheetFig. 15General current and voltage waveforms with IGCT-specific symbols.Page 22 of 46 Doc. No. 5SYA2032-02, Feb 06

4.1.1 Design criteriaFor the design of an inverter, several considerations have to be taken in account. The mainconcerns are:Critical di/dt of the freewheeling diodeIn order to meet the turn-off di/dt requirements of the freewheeling diode, the turn-on di/dt of theIGCT has to be limited.Minimum dead times t ON MIN and t OFF MINt OFF MINt BDt ON MINt BDCS1CS2ONOFFONOFFCase 1I Load > 0AI T1ClampdischargeV D1V D2V D1I T2ITGQM+IRMdi/dtt dynV CLCase 2I Load < 0AI RMI T1V D2I T2DefinitionsInverter circuitFor the control scheme, the dead time between switching transients should be as small aspossible. On the other hand, IGCTs should not be turned on or turned off whilst the clamp circuitis still conducting. Due to the blocking delay time t BD , which is the necessary delay time betweenturn-off and turn-on of a switching pair within a VSI phase leg, t ON MIN and t OFF MIN are not equal:ITGQM+ IRMt OFF MIN = t ON MIN + 2 x t BD with: tON MIN≥+ tdyndi/dtIn IGCT circuits, a blocking-delay-time t BD of about 10 µs is typical.Page 23 of 46 Doc. No. 5SYA2032-02, Feb 06

Maximum device voltage V DMThe voltage overshoot V DM is not allowed to exceed the rated repetitive blocking voltage of eitherthe IGCT or the diode:V DM < V DRM , V RRMClamp voltage overshoot DVCLTo stay within the safe operating area of IGCTs and diodes the clamping capacitor voltageovershoot ∆V CL must be close to zero again before the next switching transition takes place. Ifthis condition is not fulfilled, the switching voltage V D will be higher than V DC and may exceedmax. V D of the datasheet (see Fig. 11).Clamp diode current IDCLNot only the clamping capacitor over-voltage, but also the clamping diode current, I DCL , must beclose to zero before the IGCT turns on again. If not, the clamping diode, at IGCT turn-on, willitself turn-off at a high di/dt value (limited by the stray inductance L CL only) in excess of the di/dtcapability of the clamping diode.Page 24 of 46 Doc. No. 5SYA2032-02, Feb 06

4.1.2 Determining the design parametersThe values for Li, C CL and R S given in the conditions column of the data sheet are establishedvalues and can be used as a starting point for the design. However, these values do not considerthe parasitic parameters that are present in all real applications. Figure 16 depicts the test circuitas in the datasheet but extended to show the most important parasitic parameters.L I1L CLVDCL I2L S R SC CLC DCD CLFWDDUTL LoadFig. 16Circuit as shown in the data sheet, extended with parasitic inductancesC DCL IR SL SC CLL CLDC-link capacitordi/dt limiting inductor; the di/dt limiting inductor L I is normally divided in two parts:L I1 : discrete inductor to achieve the required di/dtL I2 : stray inductance of the DC-link capacitor; this part is not damped by R S andtherefore strongly contributes to the voltage overshoot V DM and should beminimizeddamping resistor, used to dissipate the clamp circuit energystray inductance of damping resistor, should be minimizedclamp capacitor, used to clamp the IGCT over-voltage;it also initially absorbs some of the energy stored in the di/dt limiting inductorstray inductance of the clamp - should be minimizedD CL clamp diode, should have a small forward recovery V FR .4.1.3 Determining the size of the di/dt limiting inductorIn a VSI, as in most power electronic circuits, a diode turn-off is caused by an IGCT turn-on andthe diode’s turn-off di/dt capability is, in most cases, lower than the turn-on di/dt capability of theIGCT. This is especially true in applications without a turn-off snubber, which are common in theIGCT world. Hence the di/dt choke L I must be chosen large enough to allow operation within thedi/dt range of the diode even at the highest DC-link voltages. Typical values for ABB-diodes arebetween 200 and 1000 A/µs depending on diode wafer size and switching voltage.Page 25 of 46 Doc. No. 5SYA2032-02, Feb 06

Diode switching losses and surge currents are also dependent on the choke size and theseconsiderations may require a larger inductance value. This, however, will come at the cost of aslower clamp circuit transient (t dyn ) and longer switching dead times.The minimum size of the di/dt inductor can be calculated from the maximum dc-voltage and themaximum allowed di/dt:LI= L+ L>V( −LDC maxI1 I 2CLdi / dtmax)The stray inductance of the clamp (L CL ) can normally be disregarded.4.1.4 Determining the size of the clamp capacitor C CL and the damping resistor R SBecause of the parasitic parameters, it is difficult to determine an analytic method for calculatingthe optimal values for C CL and R S . We therefore recommend the following procedure to optimizeC CL and R S :a) implement the above circuit (Fig. 16) in a circuit simulation tool, e.g. SPICEb) use an ideal switch that changes its impedance from on-state to off-state within about 2 µsc) chose the values of the datasheet as starting point for C CL and R Sd) insert estimated values for L I2 and L Se) run IGCT turn-off switching simulations with worst case conditions (V DC , I TGQM )f) iteratively adjust the values of C CL and R S to meet the desired results:I. V DM < V DRM (increase C CL or decrease R S )II. damping of loop R S – C CL – C DC – L I2 – L S so that the clamp diode does not conductagain after its turn-off (increase R S )III. clamp diode blocks before an associated IGCT has to switch on againIV. clamp capacitor is discharged to its static value before an associated IGCT has toswitch on or off again (decrease C CL or R S )g) the stray inductances may differ from the anticipated values and other parameters mayinfluence the design; the above simulations together with accurate verificationmeasurements will ideally be part of the design iterations.For this simulation, the turn-off behavior of the IGCT is not relevant. The IGCT can therefore bemodeled as a simple ideal switch with a defined transition time. For example in SPICE, a voltagecontrolled switch can be used as follows:.MODEL IGCT VSWITCH Roff=1e4 Ron=10.0e-3 Voff=0.0V Von=1.0VThis switch can then be controlled with a voltage ramp that goes from 1V to 0V within 5µs.The first voltage spike in the simulation (V DSP ) has to be ignored, since it is highly IGCTdependent (and not simulated by this simple model). It is also not relevant for the design of C CLand R S .Page 26 of 46 Doc. No. 5SYA2032-02, Feb 06

The following figures show examples of simulated IGCT turn-off waveforms. All designs work witha 6kV device, however the allowable minimum turn-off times differ. To avoid stress on the clampdiode, the IGCT should not be switched while the clamp diode is still conducting.Recommended design5000400030001000090008000C CL is discharged after about 35µsand clamp diode turns off properly20007000V [V]10000-1000-2000VdVcclampIDclampIT6000500040003000I [A]Minimum transient time t dyn ~ 40µsV DM = 4.6kV-30002000-40001000-500000 10 20 30 40 50 60 70 80t [µs]500010000Clamp diode does not turn offbecause of too high damping:4000300090008000⇒ increase R S20007000V [V]10000-1000VdVcclampIDclamp600050004000I [A]Minimum transient time t dyn ~ 70µsV DM = 4.3kV-2000IT3000-30002000-40001000-500000 10 20 30 40 50 60 70 80t [µs]5000400030001000090008000Clamp diode turns on for a secondtime; L I2 is too high, the damping inthe loop L I2 -L S -R S -C CL -C DC is toolow20007000⇒ minimize L I2V [V]10000-1000-2000-3000VdVcclampIDclampIT60005000400030002000I [A]Minimum transient time t dyn ~ 70µsV DM = 5.0kV-40001000-500000 10 20 30 40 50 60 70 80t [µs]Fig. 17 Determine size of clamp capacitor C CL and damping resistor R S for freewheeling diodePage 27 of 46 Doc. No. 5SYA2032-02, Feb 06

In the above paragraph, the determination of the clamp circuit parameters was shown for IGCTturn-off. Naturally the freewheeling diode (FWD) also needs a clamp. Whereas for the IGCT, theturn-off current determines the clamp overshoot voltage, for the freewheel diode, it is the reverserecovery current I RM that causes the overshoot. Since in most applications, the maximum IGCTturn-off current is larger than the maximum diode reverse recovery current, the clamp design ofthe IGCT normally also suits the diode turn-off.4.1.5 Stray inductance L CLThe stray inductance L CL is the overall inductance in the loop comprising C CL , D CL , DUT andFWD. It is determined by the geometry of bus bars, cables, heat sinks and the devices of thecommutation circuit themselves. This inductance has a major influence on the first voltageovershoot peak V DSP (Fig. 15) and the switching losses of both IGCT and diode. Switching lossesincrease and the safe operating area decreases when the loop inductance increases. The testcircuit stray inductance L CL is given for each IGCT or diode product in the datasheet.Fig.18 shows the influence of the stray inductance L CL on the switching waveforms on IGCT type5SHY 35L4510 by comparing waveforms with 300 and 800 nH stray inductances.Fig. 18Influence of stray inductance on turn-off behavior (L CL = 300nH and 800nH)To meet the specified SOA and switching losses, L CL has to be equal to or less than, the valuespecified in the datasheet.Page 28 of 46 Doc. No. 5SYA2032-02, Feb 06

4.1.6 Influence of the clamp diode typeFor selection of the clamp diode, the forward recovery (V FR ) has to be considered. When thecurrent from the IGCT is commutated to the clamp diode, the diode reacts with an initially higherforward voltage drop. This is because the number of free charge carriers is initially much lowerthan in steady state and the diode’s conductivity is still low.The V FR is strongly dependent on the voltage class, diameter and temperature of the diode aswell as the forward di/dt. Figs. 19 and 20 show typical curves for 4.5 kV and 6.0 kV ABB diodeswith “H-housings” (68 mm wafers). The active silicon area of the diode influences V FR in that itdetermines di/dt per unit area.400V FR vs. Tj400V FR vs. voltage class300125 °C80 °C25 °C3006.0kV4.5kVVFR [V]200VFR [V]20010010000 1000 2000 3000di/dt [A/µs]Fig 19 Typical V FR of H-housing 6kV fastswitching diode00 1000 2000 3000di/dt [A/µs]Fig 20 Typical V FR of H-housing fast switchingdiodes with different voltage classesThe forward recovery behavior of the clamp diode has the same effect as stray inductance in theclamp circuit in that it increases the peak voltage V DSP . The clamp design, shown in theconditions column of the datasheet for I TGQM and E off, is valid for an ABB diode of the samevoltage class as the IGCT and a housing type that is one size smaller than that of the IGCT.In applications where SOA and E off are critical, it is recommended to use a clamp diode of thesame voltage class as the IGCT and to minimize the clamp inductance.Page 29 of 46 Doc. No. 5SYA2032-02, Feb 06

4.2 IGCTs in Current Source Inverters (CSI)At first glance, the heart of common Current Source Inverter topologies has seemingly remainedthe same over the years (Fig. 21). The most common solution is a local RC snubber circuit foreach device in order to limit the over voltage and to absorb the energy of the commutationinductance during switching.When looking closer into the inverter design, it becomes apparent that due to semiconductordevelopments, the simple inverter bridge for current source applications has improved in terms ofperformance and cost effectiveness. The most recent step in this development has been the RB-IGCT, or Reverse Blocking IGCT allowing the use of the “hard drive” technique also in CurrentSource Inverters.Apart from gate turn-off capability, one feature, which allows performance improvements ascompared to thyristor solutions, is the outstanding di/dt capability of the RB-IGCT. This results ina substantial reduction in the required commutation inductance and snubber capacitance. Inmany cases, the bus-bar and cable inductance between output filter and phase leg is sufficient.Commutation times are reduced from more than one hundred to a few microseconds and the costand space of the bulky and noisy commutation inductance can be saved. Self-commutated fastswitches allow high switching frequencies and up to 900 Hz pwm has been realized with theIGCT-CSI.1Rs3Rs5RsCsCsCs4Rs6Rs2RsCsCsCsFig. 21Current source inverter bridgePage 30 of 46 Doc. No. 5SYA2032-02, Feb 06

4.2.1 The RB-IGCT test circuit and commutation modesFig. 22 shows an equivalent circuit for the commutation of a current source inverter. In this circuitthe commutation modes occurring in an IGCT-CSI can be tested. Test equipment for qualificationand final product testing of RB-IGCT products are built according to this circuit diagram.The inductor, L D , represents the DC-link choke and the capacitor, C DC , represents the outputfilter. These components are chosen large enough to keep I L and V DC approximately constantduring commutation. Thus the values of L D and C DC do not have to be adapted to the specificapplication. This corresponds to the fact that the sizes of L D and C DC in a current source inverterdo not normally influence the local switch environment.The local switch environment consists of the inductor L COMM , which represents the total interphasecommutation inductance of the CSI output and the RC snubber R S and C S . The equivalentvalue of the latter can be calculated as:and3R eq= R s55C eq= C s.3(For details see Application Note 5SYA2020 “Design of RC Snubbers for Phase ControlApplications”.)The equivalent value of the stray inductances, which are distributed throughout the stack. shouldbe calculated or at least estimated.½ L commDUT1L SR eqL Dd+C eqC DC½ L commDUT2L SR eqC eqFig. 22Test circuit for RB-IGCT.Switching waveforms for the different commutation modes are shown in Figs. 23 to 25 for RB-IGCT type 5SHZ 08F6000. In the upper sections of Figs. 23 and 24, the blue trace is thecommand signal (CS) and the red trace is the gate-to-cathode voltage (V GK ). The lower sections,show anode voltage and current waveforms in different operating points.Page 31 of 46 Doc. No. 5SYA2032-02, Feb 06

kA0.5kV0.5kA1.2kV1.20.00.00.80.8-0.5-0.50.40.4I3700I3000I2000I1000V3700V3000V2000V1000-1.0-1.5-2.0-2.5-3.0-3.5-1.0-1.5-2.0-2.5-3.0-3.5I800I600I400I200V800V600V400V2000.0-0.4-0.8-1.2-1.6-2.0-2.40.0-0.4-0.8-1.2-1.6-2.0-2.4-2.8-4.0-4.0-3.2-4.5-4.5-3.6-5.0-5.0-4.0-5.5-5.5-4.4-1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20-1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20µsµsID = 400A = constantVD = 3000V = constantVD = -1000 V (black)ID = 200 A (black)-2000 V (green)400 A (green)-3000 V (red)600 A (red)-3700 V (blue)800 A (blue)Fig. 25 Diode turn-off into reverse blocking voltage (load commutation).-2.8-3.2-3.6-4.0-4.44.2.2 Commutation inductance L commAs for the VSI clamp circuit design, the first step is to determine the minimum commutationinductance needed, based on the diode repetitive turn-off di/dt capability:VLcomm≥di / dtBecause of the symmetric blocking requirement, an asymmetric clamp or RCD snubber cannotwork in the CSI circuit. The simple RC snubber shown in Fig. 21 is used to absorb thecommutation inductance energy after device turn-off. This snubber also helps to increase theturn-off di/dt capability during load commutation (diode reverse recovery), so that a very low valueof commutation inductance is made possible. For an optimal design of the RC snubber, thecommutation inductance value must be known.DCMAXMAXAs a prerequisite for an optimal RC snubber design, the overall inductance betweenoutput filter and inverter devices (comprising stack geometry, cables and bus bars) mustbe measured. It is important to keep in mind that subsequent design changes mightinfluence this value.Page 33 of 46 Doc. No. 5SYA2032-02, Feb 06

4.2.3 RC snubberOnce the commutation inductance is known, the RC snubber can be designed. Both selfcommutationand load commutation must be considered. By observing the switching waveforms,it becomes apparent that the behavior of the switch has a major influence on the commutationprocess. During self-commutation, the switch determines the initial dv/dt and shares thecommutation current with the snubber. A simple model of the switch behavior, which allows asimplified analytical or simulated solution for the RC design, does not exist. The result would bean undesirably large snubber capacitance, producing correspondingly excessive losses,particularly if the IGCT is modeled by an ideal switch. Thus it is recommended to use the datasheet values as a starting point for a specific design and then to extrapolate from this designpoint. Verification can be carried out using a test circuit similar to that of Fig. 22.Page 34 of 46 Doc. No. 5SYA2032-02, Feb 06

4.3 Retriggering of an IGCT4.3.1 IntroductionThe IGCT is basically a thyristor and requires a trigger pulse to turn on. A continuous gate current(back-porch current) is needed to hold it in the on-state when the GCT current drops below itsholding current. In many applications the switch current even changes direction. In this case ananti-parallel diode takes over the current and a slightly negative voltage appears across the GCT,in fact, across the gate-cathode terminals in the case of asymmetric or RC devices, which tendsto increase the forward gate-current. To protect the gate unit against an uncontrollable rise ofgate current due to this negative voltage, the back porch current has to be reduced.Since the gate current is reduced and furthermore, is flowing from the gate to the anode insteadof to the cathode, the GCT is not “conditioned” to conduct when the current finally commutatesaway from the diode and back to the GCT. Therefore, when the switch’s current directionchanges back from the anti-parallel diode to the IGCT, the GCT behaves like an inadequatelygated thyristor. The GCT experiences a rising anode voltage accompanying the forward current,the product of which is termed “power pulse”. The power of such pulses is small but because itdoes not occur homogenously over the whole GCT area it results in a localized hot spot and maylead to thermal instability and possible destruction of the device.To avoid this indeterminate triggering, a “retrigger pulse” is issued by the gate unit. The GCT isthen completely and homogenously triggered by a sufficient supply of carriers to the p-baseresulting in normal turn-on. Any remaining voltage peak is considered forward recovery.There are two different ways by which a retrigger may be released:a) internal retrigger: released by the gate unit itself when it detects zero crossing of thegate to cathode voltageb) external retrigger: released by the controller via the fiber optic command signal.For low di T /dt e.g. the zero crossing of the load current, the internal retrigger is sufficient but forhigh di T /dt, an external retrigger from the converter controller is recommended, as the instructioncan then be synchronous with the event requiring the re-trigger (e.g. snubber discharge provokedby another phase). The self-retrigger is, of course, of the same amplitude as the external retriggerbut is subject to a small delay due to the acquisition of the anode polarity change, a delay whichmight be unacceptable at high di/dt.4.3.2 When are external retrigger pulses required?External retrigger pulses are required when a fast di T /dt occurs while the GCT is conducting littleor no current. When the GCT is conducting large currents, i.e. the device is operating well aboveits holding current, high di T /dt will not affect the GCT. Low di/dt is also not critical because eitherthe gate unit can react with an internal retrigger pulse or the dissipated power is too low to harmthe GCT. The critical current and di T /dt levels are specified in the datasheet under “On-state:critical rate of rise of on-state current, di T /dt CR ”.Page 35 of 46 Doc. No. 5SYA2032-02, Feb 06

Fig. 26 Triggering conditionsFig. 26 above shows four different cases:A) / C) - the current prior to the di T /dt is high enough not to require a retrigger irrespectiveof the di/dt value.B) - the current prior to the di T /dt is too low; an external retrigger has to be released at t 1D) - the di T /dt is low enough for the IGCT to handle it without an external retrigger pulse.4.3.3 How are external retrigger pulses released?An external retrigger pulse can be released by fiber optic command signal. During the on-state ofthe IGCT, the optical command signal is interrupted for a short period, t retrig (see datasheet). Thistells the gate unit to “re-arm” and then release a trigger pulse.Fig 27 Release of external retrigger pulseIt is important to maintain the specified pulse-width t retrig according to the datasheet, since tooshort a pulse will be ignored and too long a pulse will result in turn-off of the IGCT.Page 36 of 46 Doc. No. 5SYA2032-02, Feb 06

4.3.4 What is the best timing for the external retrigger?Fig. 28 shows the time response in four phases.At donB~ 10µsC~ 20µsD1CS0RetriggerpulsetI G0 AtFig 28 Phases of an external retrigger pulseA) delay time from command signal to retrigger pulse; retrigger not yet effectiveB) current pulse into gate; retrigger is fully effective.C) memory time, retrigger remains effective unless negative voltage was applied to theanode-cathode during phase B or CD) retrigger is no longer effectiveIt is therefore recommended that the release of the retrigger pulse be such that the di T /dt occursduring phase B.As mentioned earlier, in many applications, the di T /dt is caused by the switching of another IGCT.Since the delay of the retrigger (phase A) is equal to the normal turn-on delay of an IGCT,synchronization of the retrigger command with the turn-on command of the high-di/dt-originatingIGCT is both possible and ideal.Page 37 of 46 Doc. No. 5SYA2032-02, Feb 06

4.3.5 Applications requiring retrigger pulsesThe occurrence of di T /dt that requires retrigger pulses is not always obvious. One example is the3-level VSI converter.Ls1C1Rs1Vcl1V1Ccl1Vnp1V2C2Ccl2Vnp2V3Rs2Vcl2V4Ls1Fig 29 Commutation in 3-level VSIWe will analyze the following commutation:Load current flows through the anti-parallel diodes of V4 (V4 D ) and V3 (V3 D ). Now V4 GCT is turnedoff and a few microseconds later, V2 GCT is turned on, while V3 GCT stays turned on. After thiscommutation, V4 will sustain the DC-link voltage of C2. However, before this happens, a reverserecovery current flows through the flooded diodes V4 D and V3 D .If the reverse recovery current of V4 D is larger than that of V3 D , V3 GCT would have to take over thecurrent difference but V3 GCT is not conditioned for this and responds with a voltage spike (powerpulse). In adverse conditions, voltage pulses of up to 2kV and 1 to 2µs duration may beobserved. The application of an external retrigger pulse to V3 GCT in synchronism with V2 GCT istherefore highly recommended.This is only one example for the causes of power pulses but there are other possibilities. Inparticular, applications with RC-snubbers and clamp circuits common to all three phases, must becarefully analyzed with regards to inter-phase snubber charge/discharge cycles. It behooves thecircuit designer to look for cases where power pulses could occur and to apply the appropriateexternal retriggering.Page 38 of 46 Doc. No. 5SYA2032-02, Feb 06

4.4 Series connection of IGCTsDue to its technology, the IGCT is more suitable for series connection than for example the GTO.The GTO has a storage time of the order of 25 µs, while the IGCT’s storage time is reduced toabout 1 µs because of hard gate-commutation. The spread of storage time for the IGCT is thusvery small which makes series connection possible with small equalizing snubbers.However, series connection requires sharing snubbers for all blocking conditions, i.e. during turnon,turn-off and in the off-state (under dc-voltage).D CL2D CL1LloadFig 30 Schematic of test circuitIn designs with RC or RCD snubbers, the turn-off process is clearly more critical than that of turnon.The most critical issue of the turn-on process is a time delay between the control signals ofthe series-connected IGCTs. If one device is fired before the others, current starts to rise throughthis device and through the snubbers of the other devices, thereby charging their snubbers with arate-of-rise determined by the di/dt inductor.Fig. 31 shows the turn-on process in a series connection of two devices in a two-level phase-legwith sharing RC-snubbers across each device and a clamp circuit (test circuit of Fig 30).Device S2 is fired with a delay of 300ns with respect to device S1. The delayed firing causes aninsignificant initial rise of the blocking voltage across device S2.Page 39 of 46 Doc. No. 5SYA2032-02, Feb 06

VD1 VD2 IT1 IT2kV3.0kA3.02.52.52.02.01.51.51.01.00.50.50.00.0-0.5-1 0 1 2 3 4µsFig 31 Turn-on process with RC snubber (1Ω / 500nF) per device-0.5The turn-off process is more complex as the following sections will describe. Fig. 32 shows theturn-off of two series connected IGCTs illustrating the fact that the spread in certain parameters(see § 4.4.4) have a significant influence on the voltage sharing resulting in a voltage unbalance∆V steady . The voltage difference remains until the static balancing (R P ) eventually equalizes thevoltages or until the next turn-on process.VD1 VD2 IT1 IT2kVkA4.02.003.5∆V steady1.753.01.502.51.252.01.001.50.751.00.500.50.250.00.00-0.595 100 105 110 115 120 125 130 135µsFig 32 Turn-off process with RC snubber (1Ω / 500nF) per device-0.25Page 40 of 46 Doc. No. 5SYA2032-02, Feb 06

4.4.1 Design criteriaTo design a converter with series-connected IGCTs, it is important to be aware of the following(boundary) conditions:Peak and DCsharingCosmic RayRedundancyOverall efficiencyand cost aspectsthe voltage across each device must at all times stay at or below therated value (V DRM , V D )peak and DC voltage sharing is important for reliability; failure rate ishighly voltage dependent (see Application Note 5SYA2046 “Failurerate of IGCTs due to cosmic ray”)the most common failure mode of an IGCT is short circuit; the otherseries connected IGCTs must be able to take over the voltage of afailed device if continued operation is requiredThe voltage sharing of the series connection can easily be improvedby increasing the snubber size but this will reduce overall efficiencyand may increase converter cost; a compromise must be foundbetween voltage sharing, efficiency and cost4.4.2 Snubber conceptsAs discussed above, series connection of IGCTs always requires snubbering to share the voltageacross the series-connected devices. A dynamic sharing snubber is required for voltageequalizing during switching. The most common of these are RC- and RCD snubbers. Additionally,a static sharing resistor (R P ) is required. This is needed to compensate the leakage currentdifferences of the devices and to neutralize the voltage differences after imbalanced turn-off.The following table lists the advantages and disadvantages of both dynamic snubbers.ConceptOne RCD-snubber and static sharingresistor R p per IGCTOne RC-snubber and static sharingresistor R p per IGCTAdvantage+ Effective turn-off snubbering+ minor stress during turn-onDisadvantage - large time constant for staticbalancing- tends to voltage overshoot due to lowdamping- needs an additional diode per switch- large time constant of snubberdischarge+ Effective turn-off snubbering+ low number of components+ damping effect- increased turn-on losses of IGCT.- large time constant for static balancingPage 41 of 46 Doc. No. 5SYA2032-02, Feb 06

4.4.3 Scaling of clamp designIn designs with clamp circuits, the clamp components can be scaled according to the followingrules (n = number of series connected devices):CCL ( n)=R ( n)= RSCnSCL⋅nL ( n)= L ⋅nLICLI( n)≤ LCL⋅n4.4.4 Factors influencing turn-off voltage sharingIn this chapter, we show the dependence of voltage sharing on various parameters for the caseof an RC-snubber in a series connection with n = 2 (see Fig. 30). The diagrams show test resultswith an RC-snubber of 1Ω / 500nF (unless otherwise mentioned).4.4.4.1 Variations of IGCT parametersThe main IGCT parameters which influence voltage sharing in series connection are shownbelow. Since there are other influencing parameters, the measurements do not show idealvoltage sharing even with seemingly identical devices.T doff , V T :1500voltage difference vs. Dt doff1500voltage difference vs. DVt @ I TGQ =2000A1000DVsteady [V]1000500DVsteady [V]50000-250 -200 -150 -100 -50 0 50Dt doff [ns]-500-50 0 50 100DVt [mV]Fig. 33 T doff dependencyDifferences in turn-off delay time directlyinfluence voltage sharing; the device with thehigher delay takes over less voltageFig. 34 V T dependencySince t doff varies with on-state voltage V T ,voltage sharing is also influenced bydifferences in V TPage 42 of 46 Doc. No. 5SYA2032-02, Feb 06

1000voltage difference vs. I TGQD Vs te a dy [V]800600400200∆t doff [ns]-225-552525250-2000 500 1000 1500 2000 2500I TGQ [A]Fig. 35 I TGQ dependenceDevices with similar t doff show good voltagesharing with low current dependence; with high∆t doff , voltage sharing becomes highly currentdependent.Best results can be achieved if the series-connected IGCTs have very similar t doff and V Tvalues.I DRMLeakage current determines static voltage sharing. The differences in the leakage current tend tore-distribute the snubber capacitor voltages and lead to static voltage asymmetries. In mostapplications, static balancing is required because voltage is applied for long enough to equalizethe snubber capacitors.The simplest method of static sharing is the use of sharing resistors (R P ) in parallel with theIGCTs. These resistors constitute a voltage divider that is additionally biased by the leakagecurrent difference. These resistors have therefore to be chosen with a low enough resistance tohandle the leakage current difference. Since many applications use anti-parallel freewheel diodeswith IGCTs, the leakage current of these diodes also have to be considered.ABB has extensive experience in the banding of IGCTs and diodes for series connection. Fordetails, please contact your nearest representative or the address shown at the end of thisapplication note.Page 43 of 46 Doc. No. 5SYA2032-02, Feb 06

4.4.4.2 Variations of converter parametersCommand signal timingTime differences between the command signals of series-connected IGCTs directly influencevoltage sharing as shown in Fig. 36.500voltage difference vs. Dt CS @ I TGQ =2000ADVsteady [V]250025°C115°C-250-500-100 -50 0 50 100Dt CS [ns]Fig. 36 Command signal dependenceSnubber capacitor (C Snub )The RC-snubber is mainly a capacitive voltage divider biased by a charge difference from theIGCTs, therefore, the larger the capacitors, the better the voltage sharing as Fig. 37 shows. It isalso important to minimize capacitor tolerances.400voltage difference vs. C snubber @ I TGQ =2000A30025°C /240nF25°C / 500nFDVs te a dy [V]2001000-1000 1000 2000 3000I TGQ [A]Fig. 37 Snubber capacity dependencePage 44 of 46 Doc. No. 5SYA2032-02, Feb 06

Snubber resistor (R Snub )The snubber resistor is needed to limit the inrush current of the IGCT during turn-on. It alsodamps oscillations and minimizes overshoot during turn-off if correctly chosen. A small resistorwill increase the turn-on losses of the IGCT and reduce the damping effect. A large resistor willdecouple the snubber capacitor and reduce its dynamic sharing ability. The time constant of thesnubber should be of the order of the rise time of the IGCT voltage.Junction temperature differences:The junction temperature has a significant influence on voltage sharing as shown in Fig. 38.600voltage difference @ I TGQ =2000A400DVsteady [V]2000-200-400-600-10 -5 0 5 10DTj [K]Fig. 38 ∆T VJ dependenceThe influence of junction temperature has to be considered in the design of the stack. Normally ina stack with several series connected devices, each heat sink serves two devices. However, thelast heat sink in a stack contacts only one device. This device is therefore better cooled and mayhave a lower junction temperature. The same goes for stacks with redundant devices. If theredundant device fails, it generates less loss and therefore the neighboring devices will also havea lower junction temperature.4.4.5 ConclusionsThe series connection of IGCTs is possible with relatively small snubbers. However, the leanerthe snubber design, the more severe is the impact of the factors influencing voltage sharing.It is mandatory to verify the design thoroughly under worst-case conditions. This includes worstcaseparameter variations and verification under switching conditions at rated frequency.Page 45 of 46 Doc. No. 5SYA2032-02, Feb 06

5 GlossaryAS-IGCTBack porch currentCSIDUTFWDGate unitGCTIGCTRB-IGCTRC-IGCTSOAVSIAsymmetric IGCTContinuous current, delivered to the GCT as holding currentCurrent source inverterDevice Under TestFree Wheeling DiodeDriver board for the GCTGate Commutated ThyristorIntegrated Gate Commutated Thyristor (GCT with gate unit)Reverse Blocking IGCTReverse Conducting IGCTSafe Operating AreaVoltage source inverter6 Application supportFor further information please contact:Product Marketing EngineerBjörn BacklundPhone +41 58 586 13 30Fax +41 58 586 13 06E-Mail bjoern.backlund@ch.abb.comABB Switzerland LtdSemiconductorsFabrikstrasse 3CH-5600 Lenzburg, SwitzerlandPhone +41 58 586 14 19Fax +41 58 586 13 06E-Mail abbsem@ch.abb.comInternet www.abb.com/semiconductorsDatasheets of the devices and your nearest sales office can be found at the ABB Switzerland Ltd,Semiconductors internet website:http:// www.abb.com/semiconductorsABB Switzerland Ltd, Semiconductors reserves the right to change specifications without notice.Page 46 of 46 Doc. No. 5SYA2032-02, Feb 06