Compiler Usage Guidelines for 64-Bit Operating Systems on AMD64 ...

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<strong>Compiler</strong> <strong>Usage</strong> <strong>Guidelines</strong> <strong>for</strong> AMD<strong>64</strong> Plat<strong>for</strong>ms Does your program rely on x87 features? 32035 Rev. 3.22 November 2007 Some Intel compiler switches instruct the compiler to use SSE2 registers and instructions. If the results do not match your expectations when using SSE2, the program may rely on some x87 features. As a diagnostic step, try building the program using x87 operations <strong>for</strong> floating-point computations and see if the results are as expected. Omitting the -QxK, -QxW, and -arch:SSE2 switches recommended in the general per<strong>for</strong>mance guidelines causes the compiler to build the program using x87 operations <strong>for</strong> floating-point computations. Because omitting the -QxK, -QxW, and -arch:SSE2 switches could lower per<strong>for</strong>mance, the user could investigate the precision requirements of the program. If the user has access to the source code, it may be possible to adapt the algorithm to SSE2. 4.11.3 Program Terminates Unexpectedly Are you using an architecture switch that is unsafe <strong>for</strong> AMD Opteron processors? Some architecture switches can cause programs compiled with the Intel compiler versions 7.1 and 8.0 to terminate unexpectedly when run on AMD Opteron processors. Table 9 shows 32-bit Intel compiler architecture switches that are not safe <strong>for</strong> the AMD Opteron processor. If a program built with any of the switches shown in Table 9 produces errors, try building the program without those switches. Table 9. Unsafe Architecture Switches in 32-<strong>Bit</strong> Intel <strong>Compiler</strong>s <strong>for</strong> Microsoft ® Windows ® <strong>Compiler</strong> Version Unsafe Architecture Switches Intel 7.1 -QxK and -QxW Intel 8.0 -QxK -QxW -QxP -QxB and -QxN Intel 8.1 -QxN and -QxP 4.11.4 Program Gives Unexpected Results or Exception Behavior Does your program need C++ exception handling? By default, the Intel C++ compiler <strong>for</strong> Microsoft Windows does not turn on C++ exception handling. To enable C++ exceptions, use the -GX and -GR switches with the C++ compiler. 4.12 Microsoft ® <strong>Compiler</strong>s (32-<strong>Bit</strong>) <strong>for</strong> Microsoft ® Windows ® This section addresses errors and unexpected results that may be encountered when using 32-bit Microsoft compilers <strong>for</strong> Microsoft Windows. 52 Troubleshooting and Portability Issues Chapter 4
32035 Rev. 3.22 November 2007 4.12.1 Run-Time Errors Is your code causing buffer overruns that violate security? <strong>Compiler</strong> <strong>Usage</strong> <strong>Guidelines</strong> <strong>for</strong> AMD<strong>64</strong> Plat<strong>for</strong>ms Turn on the /GS switch. Turning on the /GS switch causes the Microsoft compiler to generate additional security code, such as bounds checking. 4.12.2 Compiled and Linked Code Generates Unexpected Results Does your program depend on precise floating-point behavior? Do not use the /fp:fast switch recommended in the general per<strong>for</strong>mance guidelines. When the fp:fast mode is enabled, the compiler relaxes the rules that fp:precise uses when optimizing floating-point operations. This mode allows the compiler to further optimize floating-point code <strong>for</strong> speed at the expense of floating-point accuracy. Does your program rely on some x87 features? The /arch:SSE2 switch instructs the compiler to use SSE2 registers and instructions. If the results do not match your expectations when using SSE2, the program may rely on some x87 features. As a diagnostic step, try building the program using x87 operations <strong>for</strong> floating point computations and see if the results are as expected. Omitting the /arch:SSE2 switch recommended in the general per<strong>for</strong>mance guidelines causes the compiler to build the program using x87 operations <strong>for</strong> floatingpoint computations. Because omitting the /arch:SSE2 switch could degrade per<strong>for</strong>mance, the user should investigate the precision requirements of the program. If the user has access to the source code, it may be possible to adapt the algorithm to SSE2. 4.12.3 Program Gives Unexpected Results or Exception Behavior Does your code depend on exact implementation of IEEE or ISO rules or specifications <strong>for</strong> floatingpoint behavior? Do not use /fp:fast optimization, as recommended in the general per<strong>for</strong>mance guidelines, in this case. The compiler uses /fp:precise by default if no /fp switch is specified. Does your code need structured and/or C++ exception handling? Enable C++ exception handling with the appropriate /EH switch. Are you to developing 32-bit code that you may eventually port to <strong>64</strong>-bit code, and you would like the code to remain compatible? Use /Wp<strong>64</strong> to detect <strong>64</strong>-bit porting problems. This switch can be used with both 32-bit and <strong>64</strong>-bit Microsoft compilers. On AMD<strong>64</strong> architecture-based systems running the Microsoft Windows operating system, both int and long are 32-bit, and pointers are <strong>64</strong>-bit (P<strong>64</strong>). Do not use int or long <strong>for</strong> type-casting pointers. Chapter 4 Troubleshooting and Portability Issues 53
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