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International Journal <strong>of</strong> Engineering and Technology Volume 1 No. 1, Oc<strong>to</strong>ber, 20112. MULTILEVEL INVERTERS ANDMODULATING TECHNIQUES2.1 Pulse Width Modulation(PWM) TechniquesA power electronic inverter is essentially a devicefor creating a variable AC magnitude and frequency outputfrom a DC input. <strong>The</strong> frequency <strong>of</strong> the output <strong>voltage</strong> orcurrent is readily established by simply switching for equaltime periods <strong>to</strong> the positive and negative DC bus andappropriately adjusting the half cycle period. However thevariable frequency ability is accompanied by acorresponding need <strong>to</strong> adjust the amplitude <strong>of</strong> fundamentalcomponent <strong>of</strong> the output waveform as the frequencychanges i.e., <strong>voltage</strong> control. One <strong>of</strong> the widely utilizedstrategies for controlling the AC output <strong>of</strong> powerelectronic converters is the PWM [4] Technique. Thisvaries the duty cycle <strong>of</strong> the inverter switches at a highfrequency <strong>to</strong> achieve a target average low-frequencyoutput <strong>voltage</strong> or current.Modulation theory has been a major research areain power electronics for over <strong>three</strong> decades and continues<strong>to</strong> attract considerable attention and interest. On the otherhand, there have been a number <strong>of</strong> clear trends in thedevelopment <strong>of</strong> PWM concepts and strategies since 1970s,addressing the main objectives <strong>of</strong> reduced harmonicdis<strong>to</strong>rtion and increased output magnitudes for a givenswitching frequency and the development <strong>of</strong> modulationstrategies <strong>to</strong> suit different converter <strong>to</strong>pologies.Principle <strong>of</strong> PWMFig. 2.1 illustrates the circuit model <strong>of</strong> a singlephaseinverter with a center-tapped grounded DC bus andFig. 2.2 illustrates the principle <strong>of</strong> PWM.Fig. 2.2 Pulse Width Modulation(PWM)From Fig. 2.2 the inverter output <strong>voltage</strong> is determined inthe following1. When , = /22. When , = /2M= , ………(1)……..(2)3. MODULATION TECHNIQUES FORDIODE CLAMPED MULTILEVELINVERTER3.1 Third Harmonic Injected PWMFig. 2.1 Circuit Model <strong>of</strong> Single - Phase Inverter<strong>The</strong> reference ac waveform is not sinusoidal asillustrated in Fig. 3.1 but consists <strong>of</strong> both fundamentalcomponent and a third harmonic component. As a result,the resulting peak <strong>to</strong> peak amplitude <strong>of</strong> the resultingreference function does not exceed the dc supply <strong>voltage</strong>, but the fundamental component is higher than theavailable supply . <strong>The</strong> presence <strong>of</strong> exactly the samethird harmonic component in each phase results in aneffective cancellation <strong>of</strong> the third harmonic component atthe neutral terminal and all sinusoidals with peakamplitude. This is approximately 15.5% higher inamplitude than that achieved by the sinusoidal PWM.<strong>The</strong>refore, the third harmonic PWM provides betterutilization <strong>of</strong> the dc supply <strong>voltage</strong>.Copyright IJET © 2011 - IJET Publications UK


International Journal <strong>of</strong> Engineering and Technology Volume 1 No. 1, Oc<strong>to</strong>ber, 2011= +j …….(8)4.2 PRINCIPLE OF SPACE VECTORMODULATIONAn inverter is now-a-days commonly used invariable speed ac mo<strong>to</strong>r drives <strong>to</strong> produce a variable, <strong>three</strong>phase ac output <strong>voltage</strong> from a DC <strong>voltage</strong>. Since AC<strong>voltage</strong> is defined by two characteristics, amplitude andfrequency, it is essential <strong>to</strong> work out a strategy that permitscontrol over both these quantities. PWM controls theaverage output <strong>voltage</strong> in a sufficiently small period,called switching period, by producing pulses <strong>of</strong> variableduty-cycles [3]. Here, sufficiently small means theswitching is small compared <strong>to</strong> the desired output <strong>voltage</strong>which may be considered as equal <strong>to</strong> desired.Fig. 3.1 Third Harmonic Injected PWM with TriangularCarriers for Multi<strong>level</strong> Inverter4. SPACE VECTOR MODULATION(SVM)4.1 INTRODUCTION<strong>The</strong> space vec<strong>to</strong>r constituted by the pole <strong>voltage</strong>s ,and is defined as:= + .exp [j (2π/3)] + .exp [j (4π/3)]…(3)<strong>The</strong> relationship between the phase <strong>voltage</strong>s , ,and pole , and is given by:Fig. 4.1 Three-phase two-<strong>level</strong> PWM inverterSince + + =0;= + ;…..(4)= + ;…….(5)= + ;……(6)= ( )/3 …..(7)Where is the common mode <strong>voltage</strong>From Eqns. (4), (5) and (6) it is evident that phase <strong>voltage</strong>s, , also result in the same space vec<strong>to</strong>r .<strong>The</strong> space vec<strong>to</strong>r can also be resolved in<strong>to</strong> tworectangular components namely and as in Eqn. (7).It is cus<strong>to</strong>mary <strong>to</strong> place the α-axis along the A-phase axis<strong>of</strong> the mo<strong>to</strong>r.Hence:= …(9)Also, the relationship between switching variablevec<strong>to</strong>r [a b c] t and line-line <strong>voltage</strong> vec<strong>to</strong>r [ ] tcan be expressed in Eqn. (10)= ……(10)As illustrated in Fig. 4.2 there are eight possiblecombinations <strong>of</strong> on and <strong>of</strong>f patterns for the <strong>three</strong> upperpower switches [11]. <strong>The</strong> on and <strong>of</strong>f states <strong>of</strong> the lowerpower devices are opposite <strong>to</strong> the upper one and so areeasily determined once the states <strong>of</strong> the upper powertransis<strong>to</strong>rs are determined. According <strong>to</strong> Eqns.(4),(5),(6),the switching vec<strong>to</strong>rs, output line <strong>to</strong> neutral <strong>voltage</strong>, andCopyright IJET © 2011 - IJET Publications UK


International Journal <strong>of</strong> Engineering and Technology Volume 1 No. 1, Oc<strong>to</strong>ber, 2011output line-line <strong>voltage</strong>s in terms <strong>of</strong> DC link are givenin table 4.1 and Fig. 4.2 shows the eight inverter <strong>voltage</strong>vec<strong>to</strong>rs ( <strong>to</strong> )Table 4.1 Switching vec<strong>to</strong>rs, line <strong>to</strong> neutral<strong>voltage</strong>s and line <strong>to</strong> line <strong>voltage</strong>sVoltageVec<strong>to</strong>rSwitchingVec<strong>to</strong>rsa b cLine <strong>to</strong> neutral<strong>voltage</strong>Line <strong>to</strong> line<strong>voltage</strong>0 0 0 0 0 0 0 0 01 0 0 2/3 -1/3 -1/3 1 0 -11 1 0 1/3 1/3 -2/3 0 1 -10 1 0 -1/3 2/3 -1/3 -1 1 00 1 1 -2/3 1/3 1/3 -1 0 10 0 1 -1/3 2/3 2/3 0 -1 11 0 1 -2/3 1/3 1/3 1 -1 01 1 1 0 0 0 0 0 0Fig. 4.3 illustrates the basic circuit for the <strong>three</strong>-<strong>level</strong>DC3LI. <strong>The</strong> circuit employs 12 power switching devicesand 6 clamping diodes (D 1 -D 6 )and the DC bus <strong>voltage</strong> issplit in<strong>to</strong> <strong>three</strong>-<strong>level</strong>s(+V dc /2, 0,-V dc /2). Thus, the <strong>voltage</strong>stress <strong>of</strong> the switching device is greatly reduced. <strong>The</strong>output phase <strong>voltage</strong> V ao has <strong>three</strong> different states: +V dc /2,0, -V dc /2. Here take phase A as an e.g., for <strong>voltage</strong>. For<strong>voltage</strong> +V dc /2, S a1 and S a2 need <strong>to</strong> be turned on. We candefine these states as 2, 1, and 0, respectively [12].<strong>The</strong>switching variable S a in table 4.4 ,is similar <strong>to</strong> <strong>three</strong>-phasetwo-<strong>level</strong> inverter, the switching states <strong>of</strong> each bridge leg<strong>of</strong> <strong>three</strong>-phase <strong>three</strong>-<strong>level</strong> inverter is described by usingswitching variables S a , S b and S c .<strong>The</strong> difference is that, in<strong>three</strong>-<strong>level</strong> inverter, each bridge leg has <strong>three</strong> differentswitching states.Table 4.4 Switching variables <strong>of</strong> phase AV ao S a1 S a2 S' a2 S' a1 S a+V dc /2 ON ON OFF OFF 20 OFF ON ON OFF 1-V dc /2 OFF OFF ON ON 0Using switching variable S a and DC bus <strong>voltage</strong>V dc , the output phase <strong>voltage</strong> V ao is obtained as follows:V an =(S a -1)*V dc /2 ………(11)And the output line <strong>voltage</strong> <strong>of</strong> phase A and B can beexpressed as follows:V ab = V ao - V bo = 1/2*V dc (S a -S b ).....(12)4.4 SPACE VECTOR PWM FOR THREELEVEL INVERTERFig. 4.2 Inverter <strong>voltage</strong>s vec<strong>to</strong>rs ( <strong>to</strong> )4.3 OPERATION OF THREE-PHASETHREE-LEVEL INVERTER<strong>The</strong>re are al<strong>to</strong>gether 27 switching states in aDC3LI. <strong>The</strong>y correspond <strong>to</strong> 19 <strong>voltage</strong> vec<strong>to</strong>rs whosepositions are fixed. <strong>The</strong>se space <strong>voltage</strong> vec<strong>to</strong>rs can beclassified in<strong>to</strong> four groups, where the first groupcorresponds <strong>to</strong> 3 zero vec<strong>to</strong>rs or null vec<strong>to</strong>rs (V0, V7,V14), the second group consists <strong>of</strong> large <strong>voltage</strong> vec<strong>to</strong>rs(V15-V20), the third group consists <strong>of</strong> medium <strong>voltage</strong>vec<strong>to</strong>rs (V8-V13) and finally the fourth group consists <strong>of</strong>small <strong>voltage</strong> vec<strong>to</strong>rs (V1-V6). <strong>The</strong> last <strong>three</strong> groups canbe distinguished in<strong>to</strong> <strong>three</strong> hexagons illustrated in Fig. 4.6.Fig. 4.3 Power circuit for Three-phase <strong>three</strong>-<strong>level</strong> inverterFig. 4.4 Space Vec<strong>to</strong>r hexagonCopyright IJET © 2011 - IJET Publications UK


International Journal <strong>of</strong> Engineering and Technology Volume 1 No. 1, Oc<strong>to</strong>ber, 2011<strong>The</strong> plane can be divided in<strong>to</strong> 6 major triangularsec<strong>to</strong>rs (1-6). Each major section represents pi/3 <strong>of</strong> thefundamental cycle. Within each major sec<strong>to</strong>r, there are 4minor triangular sec<strong>to</strong>rs. <strong>The</strong>re are <strong>to</strong>tally 24 minor sec<strong>to</strong>rsin the plane and the vertices <strong>of</strong> these sec<strong>to</strong>rs represent the<strong>voltage</strong> vec<strong>to</strong>rs.<strong>The</strong> modulation ratio <strong>of</strong> <strong>three</strong>-phase <strong>three</strong>-<strong>level</strong> inverter isrepresented as follows:M= / (2/3V d ) = 3 /2V d ……(15)Table 4.5 <strong>The</strong> switching states (27 states) for a <strong>three</strong><strong>level</strong>inverterTHESWITCHING STATESS a S b S c VS 1 0 0 0 V 0S 2 1 1 1 V 7S 3 2 2 2 V 14S 4 1 0 0 V 1S 5 1 1 0 V 2Fig. 4.5 Space Vec<strong>to</strong>r hexagon displaying switching statesS 6 0 1 0 V 3S 7 0 1 1 V 4S 8 0 0 1 V 5S 9 1 0 1 V 6S 10 2 1 1 V 1S 11 2 2 1 V 2Fig. 4.6 Three-<strong>level</strong> inverters hexagons(a) Small hexagon (b) Medium hexagon (c) Big hexagonIn <strong>three</strong>-phase <strong>three</strong>-<strong>level</strong> inverter, when the rotating<strong>voltage</strong> vec<strong>to</strong>r falls in<strong>to</strong> one certain sec<strong>to</strong>r, adjacent<strong>voltage</strong> vec<strong>to</strong>rs are selected <strong>to</strong> synthesize the desiredrotating <strong>voltage</strong> vec<strong>to</strong>r based on the vec<strong>to</strong>r synthesisprinciple, resulting in <strong>three</strong>-phase PWM waveforms. Bythe examination <strong>of</strong> the phase angle and the magnitude <strong>of</strong> arotating reference <strong>voltage</strong> vec<strong>to</strong>r V*, the sec<strong>to</strong>r whereinV* resides can be easily located.From table 4.5, each small <strong>voltage</strong> vec<strong>to</strong>r and zero <strong>voltage</strong>vec<strong>to</strong>r have 2 and 3 redundant switching states,respectively. This will be analyzed in the later section.X = T x /T s ; Y = T y /T s ; Z = T z /T s …..(13)Based on the principle <strong>of</strong> vec<strong>to</strong>r synthesis, the followingequations can be written:X+Y+Z=1 ... (13.1)S 12 1 2 1 V 3S 13 1 2 2 V 4S 14 1 1 2 V 5S 15 2 1 2 V 6S 16 2 1 0 V 8S 17 1 2 0 V 9S 18 0 2 1 V 10S 19 0 1 2 V 11S 20 1 0 2 V 12S 21 2 0 1 V 13S 22 2 0 0 V 15S 23 2 2 0 V 16S 24 0 2 0 V 17S 25 0 2 2 V 18S 26 0 0 2 V 19V x *X +V y *Y+ V z *Z =…….(14)S 27 2 0 2 V 20Copyright IJET © 2011 - IJET Publications UK


International Journal <strong>of</strong> Engineering and Technology Volume 1 No. 1, Oc<strong>to</strong>ber, 2011Where is the magnitude <strong>of</strong> the reference<strong>voltage</strong> vec<strong>to</strong>r , which rotates with an angular speed <strong>of</strong>ω=2f in d-q coordinate plane and 2/3 V dc is magnitude <strong>of</strong>the large <strong>voltage</strong> vec<strong>to</strong>r, e.g., V 13 .states: + V dc /2, 0, and -V dc /25. SIMULATION RESULTS ANDDISCUSSIONFig. 5.1 illustrates the Line Voltage <strong>of</strong> DC3LI withSPWM and Fig. 5.2 illustrates the THD spectrum <strong>of</strong>DC3LI with SPWM.In this modulation <strong>technique</strong> thefundamental <strong>voltage</strong> is 233.3 V and THD is 29.89%.5.1.2 Space Vec<strong>to</strong>r Pulse Width Modulation(SVPWM)5.1 FOR A DIODE CLAMPED THREE-LEVELINVERTER5.1.1. Sinusoidal Pulse Width Modulation (SPWM)Fig. 5.3 Line Voltage <strong>of</strong> DC3LI with SVPWMFig. 5.1 Line Voltage <strong>of</strong> DC3LI with SPWMMODULTIONTECHNIQUESDC3LITHDFundamentalComponentSinusoidal PWM 29.95% 200.1 VSVPWM 20.31% 173.1.7 VFig. 5.2 THD spectrum <strong>of</strong> DC3LI with SPWMFig. 5.4 THD spectrum <strong>of</strong> DC3LI with SVPWMCopyright IJET © 2011 - IJET Publications UK


International Journal <strong>of</strong> Engineering and Technology Volume 1 No. 1, Oc<strong>to</strong>ber, 2011Fig. 5.4 illustrates the Line Voltage <strong>of</strong> DC3LI withSVPWM and the THD spectrum <strong>of</strong> DC3LI with SVPWM.In this modulation <strong>technique</strong>, the fundamental <strong>voltage</strong> is312.7 V and THD is 23.20%.6. CONCLUSIONS AND FUTURE SCOPE6.1 ConclusionsDiode Clamped Multi-Level Inverter <strong>to</strong>pologies aredeveloped with 3-<strong>level</strong>s for various modulation <strong>technique</strong>si.e., Sinusoidal PWM, Space Vec<strong>to</strong>r PWM and DC3LI<strong>to</strong>pology. Space Vec<strong>to</strong>r PWM <strong>technique</strong> gives lesser THDcompared <strong>to</strong> that <strong>of</strong> Sinusoidal PWM.6.2 Scope For Future Work<strong>The</strong> presented simulink model can be setupexperimentally using semi conduc<strong>to</strong>r devices likeTransis<strong>to</strong>r, Thyris<strong>to</strong>r, MOSFET etc., and controllingstrategies by using any <strong>of</strong> the following devices likemicroprocessor, microcontroller, digital signal processorand FPGA. <strong>The</strong> controlling strategies can be implementedusing m-file programming with FPGA for betterprocessing speed and performance.ACKNOWLEDGEMENTAuthors acknowledge the support, encouragementand facilities provided by the Electrical&ElectronicsEngineering Department and management <strong>of</strong> BharatInstitute <strong>of</strong> Engineering & Technology(BIET),Mangalpally, ibrahimpatnam,Hyderabad,AP, Indiain carryout the presented study/research work.REFERENCES[1] R. Teodorescu, F. Beaabjerg, J. K. Pedersen, E.Cengelci, S. Sulistijo, B. Woo, and P. Enjeti,―Multi<strong>level</strong> converters — A survey,‖ in Proc.European Power Electronics Conf. (EPE’99),Lausanne, Switzerland, 1999, CD-ROM.[2] A. Nabae, I. Takahashi, and H. Akagi, ―A newneutral-point clamped PWM inverter,‖ IEEETrans. Ind. Applications., vol. IA-17, pp. 518–523, Sept./Oct. 1981.[3] T. A. Meynard and H. Foch, ―Multi-<strong>level</strong>choppers for high <strong>voltage</strong> <strong>application</strong>s,‖ Eur.Power Electron. Drives J., vol. 2, no. 1, p. 41,Mar.1992.[4] C. Hochgraf, R. Lasseter, D. Divan, and T. A.Lipo, ―Comparison <strong>of</strong> multi<strong>level</strong> inverters forstatic var compensation,‖ in Conf. Rec. IEEE-IAS Annu. Meeting, Oct. 1994, pp. 921–928.[5] P. Hammond, ―A new approach <strong>to</strong> enhancepower quality for medium <strong>voltage</strong> ac drives,‖IEEE Trans. Ind. Applications., vol. 33, pp.202–208, Jan./Feb. 1997.[6] E. Cengelci, S. U. Sulistijo, B. O. Woom, P.Enjeti, R. Teodorescu, and F. Blaabjerge, ―Anew medium <strong>voltage</strong> PWM inverter <strong>to</strong>pologyfor adjustable speed drives,‖ in Conf. Rec.IEEE-IAS Annu. Meeting, St. Louis, MO, Oct.1998, pp. 1416–1423.[7] R. H. Baker and L. H. Bannister, ―Electricpower converter,‖ U.S. Patent 3 867 643, Feb.1975.[8] R. H. Baker, ―Switching circuit,‖ U.S. Patent 4210 826, July 1980.[9] ―Bridge converter circuit,‖ U.S. Patent 4 270163, May 1981.[10] P.W. Hammond, ―Medium <strong>voltage</strong>PWMdriveand method,‖ U.S. Patent 5 625 545, Apr.1997.[11] F. Z. Peng and J. S. Lai, ―Multi<strong>level</strong> cascade<strong>voltage</strong>-source inverter with separate DCsources,‖ U.S. Patent 5 642 275, June 24, 1997.[12] P.W. Hammond, ―Four-quadrant AC-AC driveand method,‖ U.S. Patent 6 166 513, Dec.2000.[13] M. F. Aiello, P. W. Hammond, and M. Ras<strong>to</strong>gi,―Modular multi-<strong>level</strong> adjustable supply withseries connected active inputs,‖ U.S. Patent 6236 580, May 2001.[14] RODRÍGUEZ et al.: MULTILEVELINVERTERS 737 ―Modular multi-<strong>level</strong>adjustable supply with parallel connectedactiveinputs,‖ U.S. Patent 6 301 130, Oct. 2001.AUTHOR’S BIOGRAPHYDr. JBV Subrahmanyam is a Doc<strong>to</strong>rate in ElectricalEngineering from JNTU-Hyderabad, India, with twodecades <strong>of</strong> rich experience in teaching, training, research,industry, projects and consultancy. He published 15research papers in reputed international journals and 20papers in international and national conferences.Hisresearch interest is in au<strong>to</strong>mation <strong>of</strong> power systems. He isan expert in condition moni<strong>to</strong>ring <strong>of</strong> industrial equipmentthrough modern diagnostic <strong>technique</strong>s. He implementedCopyright IJET © 2011 - IJET Publications UK


International Journal <strong>of</strong> Engineering and Technology Volume 1 No. 1, Oc<strong>to</strong>ber, 2011the latest GPS and GIS technologies in many powerutilities in India successfully. He executed manyinternational and national <strong>level</strong> technical projectseffectively funded by Power Finance Corporation,Ministry <strong>of</strong> Power, Government <strong>of</strong> India, APDRP, DRUM,USAID and DFID-UK.Mr. Sankar is a faculty in electrical engineeringdepartment <strong>of</strong> HITS, Hyderabad, India, with many years <strong>of</strong>rich experience in teaching, training, research. Hisresearch interest is in au<strong>to</strong>mation <strong>of</strong> power systems.Copyright IJET © 2011 - IJET Publications UK

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