LSH33 32-bit Barrel Shifter with Registers - Datasheet

DEVICES INCORPORATEDDEVICES INCORPORATEDLSH3332-bit Barrel Shifter with RegistersLSH3332-bit Barrel Shifter with RegistersFEATURESDESCRIPTION❑ 32-bit Input, 32-bit Output Multiplexedto 16 Lines❑ Full 0-31 Position Barrel ShiftCapability❑ Integral Priority Encoder for 32-bitFloating Point Normalization❑ Sign-Magnitude or Two’s ComplementMantissa Representation❑ 32-bit Linear Shifts with Sign orZero Fill❑ Independent Priority EncoderOutputs for Block Floating Point❑ 68-pin PLCC, J-LeadLSH33 BLOCK DIAGRAMRIGHT/LEFTFILL/WRAPNORM32:5PRIORITYENCODE 3252:1G55322:1The LSH33 is a 32-bit high speedshifter designed for use in floatingpoint normalization, word pack/unpack, field extraction, and similarapplications. It has 32 data inputs,and 16 output lines. Any shift configurationof the 32 inputs, includingcircular (barrel) shifting, left shiftswith zero fill, and right shifts withsign extension are possible. In addition,a built-in priority encoder isprovided to aid floating point normalization.Input/Output registers providecomplete pipelined operation. Bothhave independent bypass paths forcomplete flexibility. When FTI = 1,the input registers are bypassed.Likewise, when FTO= 1, the outputregisters are bypassed.SIGNG2:1 2:11632-bitBARRELSHIFTARRAYG162:1I31-I0G2:1 2:116GCLKENIFTICLKENOFTOMS/LSSHIFT ARRAYThe 32 inputs, which can be registered,to the LSH33 are applied to a32-bit shift array. The 32 outputs,which can also be registered, of thisarray are then multiplexed down to16 lines for presentation at the deviceoutputs. The array may be configuredsuch that any contiguous 16-bit field(including wraparound of the 32inputs) may be presented to theoutput pins under control of the shiftcode field (wrap mode). Alternatively,the wrap feature may bedisabled, resulting in zero or sign bitfill, as appropriate (fill mode). Theshift code control assignments and theresulting input to output mapping forthe wrap mode are shown in Table 1.Essentially the LSH33 is configured asa left shift device. That is, a shift codeof 000002 results in no shift of theinput field. A code of 000012 providesan effective left shift of 1 position, etc.When viewed as a right shift, the shiftcode corresponds to the two’s complementof the shift distance, i.e., a shiftcode of 111112 (–110) results in a rightshift of one position, etc.When not in the wrap mode, theLSH33 fills bit positions for whichthere is no corresponding input bit.The fill value and the positions filleddepend on the RIGHT/LEFT (R/L)direction pin. This pin is a don’t careinput when in wrap mode. For leftshifts in fill mode, lower bits are filledwith zero as shown in Table 2. Forright shifts, however, the SIGN inputis used as the fill value. Table 3depicts the bits to be filled as afunction of shift code for the right shiftcase. Note that the R/L input changesonly the fill convention, and does notaffect the definition of the shift code.SI/O4-SI/O0OEY15-Y01Special Arithmetic Functions08/16/2000–LDS.33-O

DEVICES INCORPORATEDLSH3332-bit Barrel Shifter with RegistersTABLE 1. WRAP MODE SHIFT CODE DEFINITIONSShift Code Y 31 Y 30 Y 29 ••• Y 16 Y 15 ••• Y 2 Y 1 Y 000000 I31 I30 I29 ••• I16 I15 ••• I2 I1 I000001 I30 I29 I28 ••• I15 I14 ••• I1 I0 I3100010 I29 I28 I27 ••• I14 I13 ••• I0 I31 I3000011 I28 I27 I26 ••• I13 I12 ••• I31 I30 I29• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •01111 I16 I15 I14 ••• I1 I0 ••• I19 I18 I1710000 I15 I14 I13 ••• I0 I31 ••• I18 I17 I1610001 I14 I13 I12 ••• I31 I30 ••• I17 I16 I1510010 I13 I12 I11 ••• I30 I29 ••• I16 I15 I14• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •11100 I3 I2 I1 ••• I20 I19 ••• I6 I5 I411101 I2 I1 I0 ••• I19 I18 ••• I5 I4 I311110 I1 I0 I31 ••• I18 I17 ••• I4 I3 I211111 I0 I31 I30 ••• I17 I16 ••• I3 I2 I1TABLE 2. FILL MODE SHIFT CODE DEFINITIONS — LEFT SHIFTShift Code Y 31 Y 30 Y 29 ••• Y 16 Y 15 ••• Y 2 Y 1 Y 000000 I31 I30 I29 ••• I16 I15 ••• I2 I1 I000001 I30 I29 I28 ••• I15 I14 ••• I1 I0 000010 I29 I28 I27 ••• I14 I13 ••• I0 0 000011 I28 I27 I26 ••• I13 I12 ••• 0 0 0• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •01111 I16 I15 I14 ••• I1 I0 ••• 0 0 010000 I15 I14 I13 ••• I0 0 ••• 0 0 010001 I14 I13 I12 ••• 0 0 ••• 0 0 010010 I13 I12 I11 ••• 0 0 ••• 0 0 0• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •11100 I3 I2 I1 ••• 0 0 ••• 0 0 011101 I2 I1 I0 ••• 0 0 ••• 0 0 011110 I1 I0 0 ••• 0 0 ••• 0 0 011111 I0 0 0 ••• 0 0 ••• 0 0 0In fill mode, as in wrap mode, the shiftcode input represents the number ofshift positions directly for left shifts,but the two’s complement of the shiftcode results in the equivalent rightshift. However, for fill mode the R/Linput can be viewed as the mostsignificant bit of a 6-bit two’s complementshift code, comprised of R/Lconcatenated with the SI4–SI0 lines.Thus, a positive shift code (R/L = 0)results in a left shift of 0–31 positions,and a negative code (R/L = 1) a rightshift of up to 32 positions. The LSH33can thus effectively select any contiguous32-bit field out of a (sign extendedand zero filled) 96-bit "input."OUTPUT MULTIPLEXERThe shift array outputs can be registeredand then applied to a 2:1 multiplexercontrolled by the MS/LS selectline. This multiplexer makes availableat the output pins either the mostsignificant or least significant 16outputs of the shift array.PRIORITY ENCODERThe 32-bit input bus drives a priorityencoder which is used to determinethe first significant position forpurposes of normalization. Thepriority encoder produces a five-bitcode representing the location of thefirst non-zero bit in the input word.Code assignment is such that thepriority encoder output represents thenumber of shift positions required toleft align the first non-zero bit of theinput word. Prior to the priorityencoder, the input bits are individuallyexclusive OR’ed with the SIGNinput. This allows normalization infloating point systems using two’scomplement mantissa representation.A negative value in two’s complementrepresentation will cause the exclusiveOR gates to invert the input data tothe encoder. As a result, the leadingsignificant digit will always be "1."Special Arithmetic Functions208/16/2000–LDS.33-O

DEVICES INCORPORATEDLSH3332-bit Barrel Shifter with RegistersTABLE 3. FILL MODE SHIFT CODE DEFINITIONS — RIGHT SHIFTShift Code Y 31 Y 30 Y 29 ••• Y 16 Y 15 ••• Y 2 Y 1 Y 000000 S S S ••• S S ••• S S S00001 S S S ••• S S ••• S S I3100010 S S S ••• S S ••• S I31 I3000011 S S S ••• S S ••• I31 I30 I29• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •01111 S S S ••• S S ••• I19 I18 I1710000 S S S ••• S I31 ••• I18 I17 I1610001 S S S ••• I31 I30 ••• I17 I16 I1510010 S S S ••• I30 I29 ••• I16 I15 I14• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •• • • • ••• • • ••• • • •11100 S S S ••• I20 I19 ••• I6 I5 I411101 S S S ••• I19 I18 ••• I5 I4 I311110 S S I31 ••• I18 I17 ••• I4 I3 I211111 S I31 I30 ••• I17 I16 ••• I3 I2 I1TABLE 4. PRIORITY ENCODER FUNCTION TABLEI31I30I29•••I16I15••• I2 I1 I0 Shift Code1 X X ••• X X ••• X X X 000000 1 X ••• X X ••• X X X 000010 0 1 ••• X X ••• X X X 00010• • • ••• • • ••• • • • •• • • ••• • • ••• • • • •0 0 0 ••• 1 X ••• X X X 011110 0 0 ••• 0 1 ••• X X X 100000 0 0 ••• 0 0 ••• X X X 10001• • • ••• • • ••• • • • •• • • ••• • • ••• • • • •0 0 0 ••• 0 0 ••• 0 1 X 111100 0 0 ••• 0 0 ••• 0 0 1 111110 0 0 ••• 0 0 ••• 0 0 0 11111This affects only the encoder inputs;the shift array always operates on theraw input data. The priority encoderfunction table is shown in Table 4.NORMALIZE MULTIPLEXERThe NORM input, when asserted,results in the priority encoder outputdriving the internal shift code inputsdirectly. When using the NORMfunction, the LSH33 should be placedin fill mode, with the R/L input low.When NORM is high (not asserted),the SI/O4–SI/O0 port acts as the shiftcode input to the shifter.APPLICATIONS EXAMPLESNormalization of mantissas up to 32bits can be accomplished directly by asingle LSH33. To do this, the NORMinput is asserted, and fill mode andleft shift are selected. The normalizedmantissa is then available at thedevice output in two 16-bit segments,under the control of the output datamultiplexer select, the MS/LS signal.If it is desirable to avoid the necessityof multiplexing output data in 16-bitsegments, two LSH33 devices can beused in parallel. Both devices receivethe same input word, with the MS/LSselect line of one wired high, and theother low. Each device will thenindependently determine the shiftdistance required for normalization,and the full 32 bits of output data willbe available simultaneously.Special Arithmetic Functions308/16/2000–LDS.33-O

DEVICES INCORPORATEDLSH3332-bit Barrel Shifter with RegistersMAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8)Storage temperature ........................................................................................................... –65°C to +150°COperating ambient temperature ........................................................................................... –55°C to +125°CVCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0VInput signal with respect to ground ........................................................................................ –3.0 V to +7.0 VSignal applied to high impedance output ............................................................................... –3.0 V to +7.0 VOutput current into low outputs ............................................................................................................. 25 mALatchup current ............................................................................................................................... > 400 mAOPERATING CONDITIONS To meet specified electrical and switching characteristicsMode Temperature Range (Ambient) Supply VoltageActive Operation, Commercial 0°C to +70°C 4.75 V ≤ VCC ≤ 5.25 VActive Operation, Military –55°C to +125°C 4.50 V ≤ VCC ≤ 5.50 VELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4)Symbol Parameter Test Condition Min Typ Max UnitVOH Output High Voltage VCC = Min., IOH = –2.0 mA 2.4 VVOL Output Low Voltage VCC = Min., IOL = 8.0 mA 0.4 VVIH Input High Voltage 2.0 VCC VVIL Input Low Voltage (Note 3) 0.0 0.8 VIIX Input Current Ground ≤ VIN ≤ VCC (Note 12) ±20 µAIOZ Output Leakage Current Ground ≤ VOUT ≤ VCC (Note 12) ±20 µAICC1 VCC Current, Dynamic (Notes 5, 6) 10 30 mAICC2 VCC Current, Quiescent (Note 7) 1.5 mASpecial Arithmetic Functions408/16/2000–LDS.33-O

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COMBINATIONAL DELAYS Notes 9, 10 (ns)123456789012345678901234567123456789012345678901234567To OutputLSH33-40*LSH33-30123456789012345678901234567LSH33-20*123456789012345678901234567123456789012345678901234567123456789012345678901234567From Input123456789012345678901234567123456789012345678901234567Y15-Y0SO4-SO0123456789012345678901234567123456789012345678901234567Y15-Y0SO4-SO0123456789012345678901234567123456789012345678901234567Y15-Y0SO4-SO0123456789012345678901234567123456789012345678901234567123456789012345678901234567FTI = 0, FTO = 0CLKMS/LS12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456728 2828 —12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456724 2424 —12345678901234567890123456712345678901234567890123456715 1515 —123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567FTI = 0, FTO= 1CLK (NORM = 0/1)SI4-SI0R/L, F/WMS/LS12345678901234567890123456712345678901234567890123456773 / 40 55 / —52 —52 —28 —12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456758 / 30 42 / —40 —40 —24 —12345678901234567890123456712345678901234567890123456720 / 20 20 / —20 —20 —15 —123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567FTI = 1, FTO = 0CLKMS/LS12345678901234567890123456712345678901234567890123456728 2828 —12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456724 2424 —12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456715 1515 —123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567FTI = 1, FTO = 1I31-I0, SIGN(NORM = 0/1)SI4-SI0R/L, F/WMS/LS12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456773 / 40 55 / —52 —52 —28 —12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456758 / 30 42 / —40 —40 —24 —12345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456720 / 20 20 / —20 —20 —15 —123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567GUARANTEED MINIMUM SETUP AND HOLD TIMES WITH RESPECT TO CLOCK RISING EDGE Notes 9, 10 (ns)LSH33-40*LSH33-30LSH33-20*123456789012345678901234567123456789012345678901234567123456789012345678901234567123456789012345678901234567FTI = 0 FTI = 1123456789012345678901234567123456789012345678901234567123456789012345678901234567FTI = 0 FTI = 1FTI = 0 FTI = 1123456789012345678901234567123456789012345678901234567123456789012345678901234567InputSetup Hold Setup Hold123456789012345678901234567123456789012345678901234567Setup Hold Setup HoldSetup Hold Setup Hold123456789012345678901234567123456789012345678901234567I31-I0, SIGN12 3 20 212345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456710 3 15 28 0 8 2SI4-SI017 0 17 015 0 15 08 0 8 0R/L, F/W12 0 12 010 0 10 01234567890123456789012345671234567890123456789012345678 0 8 0123456789012345678901234567123456789012345678901234567ENI, ENO12 0 12 012345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901234567890123456710 0 10 08 0 8 012345678901234567890123456712345678901234567890123456712345678901234567890123456712345678901231234567890123TRI-STATE ENABLE/DISABLE TIMES Notes 9, 10, 11 (ns)LSH33-40* LSH33-30 LSH33-20*1234567890123123456789012312345678901231234567890123CLOCK CYCLE TIME AND PULSE WIDTH Notes 9, 10 (ns)LSH33-40* LSH33-30 LSH33-20*123456789012312345678901231234567890123123456789012312345678901231234567890123tENA20 17 151234567890123123456789012312345678901231234567890123Minimum Cycle Time30 20 151234567890123123456789012312345678901231234567890123tDIS20 17 15123456789012312345678901231234567890123123456789012312345678901231234567890123Highgoing Pulse12 9 71234567890123123456789012312345678901231234567890123Lowgoing Pulse12 9 71234567890123123456789012312345678901231234567890123123456789012345678901234123456789012345678901234123456789012345678901234*DISCONTINUED SPEED GRADE1234567890123456789012345Special Arithmetic Functions08/16/2000–LDS.33-O

123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234512345678901234567890123456789012123451234567890123456789012345678901212345123456789012345678901234567890121234512345678901234567890123456789012123451234567890123456789012345678901212345123456789012345678901234567890121234561234567890123456789012345678901212345612345678901234567890123456789012123456123456789012345678901234567890121234561234567890123456789012345678901212345612345678901234567890123456789012123456DEVICES INCORPORATEDLSH3332-bit Barrel Shifter with RegistersSWITCHING CHARACTERISTICS — MILITARY OPERATING RANGE (–55°C to +125°C)GUARANTEED MAXIMUM COMBINATIONAL DELAYS Notes 9, 10 (ns)To OutputLSH33-50*LSH33-40*123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234LSH33-30*123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234From InputFTI = 0, FTO = 0CLKMS/LS123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234Y15-Y0SO4-SO012345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123432 3232 —Y15-Y0SO4-SO028 2828 —Y15-Y0SO4-SO024 2424 —123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234FTI = 0, FTO= 1CLK (NORM = 0/1)SI4-SI0R/L, F/WMS/LSFTI = 1, FTO = 0CLKMS/LS12345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123480 / 50 65 / —62 —62 —32 —12345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123432 3232 —73 / 40 55 / —52 —52 —28 —28 2828 —58 / 30 42 / —40 —40 —24 —24 2424 —123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234FTI = 1, FTO = 1I31-I0, SIGN(NORM = 0/1)SI4-SI0R/L, F/WMS/LS12345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123480 / 50 65 / —62 —62 —62 —73 / 40 55 / —52 —52 —28 —58 / 30 42 / —40 —40 —24 —123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234GUARANTEED MINIMUM SETUP AND HOLD TIMES WITH RESPECT TO CLOCK RISING EDGE Notes 9, 10 (ns)LSH33-50*LSH33-40*LSH33-30*123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234FTI = 0 FTI = 1FTI = 0 FTI = 1FTI = 0 FTI = 1123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234InputI31-I0, SIGNSI4-SI0R/L, F/WENI, ENOSetup Hold Setup HoldSetup Hold Setup Hold12345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123415 3 20 212 3 20 212345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123420 0 20 017 0 17 012345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123415 0 15 012 0 12 012345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123412345678901234567890123456789012123456789012345678901234567890121234567890123415 0 15 012 0 12 0Setup Hold Setup Hold10 0 15 215 0 15 010 0 10 010 0 10 0123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234123456789012345678901234567890121234567890123456789012345678901212345678901234TRI-STATE ENABLE/DISABLE TIMES Notes 9, 10, 11 (ns)LSH33-50* LSH33-40* LSH33-30*123456789012345678901234567890121234512345678901234567890123456789012123451234567890123456789012345678901212345CLOCK CYCLE TIME AND PULSE WIDTH Notes 9, 10 (ns)LSH33-50* LSH33-40* LSH33-30*123456789012345678901234567890121234561234567890123456789012345678901212345612345678901234567890123456789012123456tENA22 20 1712345678901234567890123456789012123451234567890123456789012345678901212345Minimum Cycle Time35 30 201234567890123456789012345678901212345612345678901234567890123456789012123456tDIS22 20 1712345678901234567890123456789012123451234567890123456789012345678901212345Highgoing Pulse15 12 91234567890123456789012345678901212345612345678901234567890123456789012123456Lowgoing Pulse15 12 9123456789012345678901234567890121234561234567890123456789012345678901212345612345678901234567890123456789012123456123456789012345678901234123456789012345678901234123456789012345678901234*DISCONTINUED SPEED GRADE1234567890123456789012346Special Arithmetic Functions08/16/2000–LDS.33-O

DEVICES INCORPORATEDLSH3332-bit Barrel Shifter with RegistersNOTES1. Maximum Ratings indicate stressspecifications only. Functional operationof these products at values beyondthose indicated in the Operating Conditionstable is not implied. Exposure tomaximum rating conditions for extendedperiods may affect reliability.2. The products described by this specificationinclude internal circuitry designedto protect the chip from damagingsubstrate injection currents and accumulationsof static charge. Nevertheless,conventional precautions shouldbe observed during storage, handling,and use of these circuits in order toavoid exposure to excessive electricalstress values.3. This device provides hard clamping oftransient undershoot and overshoot. Inputlevels below ground or above VCCwill be clamped beginning at –0.6 V andVCC + 0.6 V. The device can withstandindefinite operation with inputs in therange of –0.5 V to +7.0 V. Device operationwill not be adversely affected, however,input current levels will be well inexcess of 100 mA.4. Actual test conditions may vary fromthose designated but operation is guaranteedas specified.5. Supply current for a given applicationcan be accurately approximated by:whereNCV 2F4N = total number of device outputsC = capacitive load per outputV = supply voltageF = clock frequency6. Tested with all outputs changing everycycle and no load, at a 5 MHz clockrate.7. Tested with all inputs within 0.1 V ofVCC or Ground, no load.8. These parameters are guaranteedbut not 100% tested.9. AC specifications are tested withinput transition times less than 3 ns,output reference levels of 1.5 V (excepttDIS test), and input levels of nominally0 to 3.0 V. Output loading may be aresistive divider which provides forspecified IOH and IOL at an outputvoltage of VOH min and VOL maxrespectively. Alternatively, a diodebridge with upper and lower currentsources of IOH and IOL respectively,and a balancing voltage of 1.5 V may beused. Parasitic capacitance is 30 pFminimum, and may be distributed.This device has high-speed outputs capableof large instantaneous currentpulses and fast turn-on/turn-off times.As a result, care must be exercised in thetesting of this device. The followingmeasures are recommended:a. A 0.1 µF ceramic capacitor should beinstalled between VCC and Groundleads as close to the Device Under Test(DUT) as possible. Similar capacitorsshould be installed between device VCCand the tester common, and deviceground and tester common.b. Ground and VCC supply planesmust be brought directly to the DUTsocket or contactor fingers.c. Input voltages should be adjusted tocompensate for inductive ground and VCCnoise to maintain required DUT inputlevels relative to the DUT ground pin.10. Each parameter is shown as a minimumor maximum value. Input requirementsare specified from the pointof view of the external system drivingthe chip. Setup time, for example, isspecified as a minimum since the externalsystem must supply at least thatmuch time to meet the worst-case requirementsof all parts. Responses fromthe internal circuitry are specified fromthe point of view of the device. Outputdelay, for example, is specified as amaximum since worst-case operation ofany device always provides data withinthat time.11. For the tENA test, the transition ismeasured to the 1.5 V crossing pointwith datasheet loads. For the tDIS test,the transition is measured to the±200mV level from the measuredsteady-state output voltage with±10mA loads. The balancing voltage,VTH, is set at 3.5 V for Z-to-0and 0-to-Z tests, and set at 0 V for Z-to-1 and 1-to-Z tests.12. These parameters are only tested atthe high temperature extreme, which isthe worst case for leakage current.FIGURE A. OUTPUT LOADING CIRCUITDUTCLS1IOHVTHFIGURE B. THRESHOLD LEVELSOEZ 0Z 1VOL*VOH*tENA1.5 V 1.5 V1.5 V1.5 VVOL*VOH*tDIS0.2 V0.2 VMeasured VOL with IOH = –10mA and IOL = 10mAMeasured VOH with IOH = –10mA and IOL = 10mAIOL3.5V Vth0 Z1 Z0V VthSpecial Arithmetic Functions708/16/2000–LDS.33-O

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