10. Sequential Logic Synthesis What are Combinational Circuits?

11/05/201310. Sequential Logic Synthesis• Combinational logic implements Boolean functions orsets of Boolean functions.• Digital devices require 'memory' to remember state anddata values – sequential logic.• Modelled on the fundamental concept of the Turingmachine but of course with finite memory.• Sequential logic can be synchronous (clocked) orasynchronous (unclocked).• Asynchronous is faster but much harder to design.293What are Combinational Circuits?Definition: A circuit is combinational if it computes a functionwhich depends only on the current inputs applied to thecircuit; for every input set of values, there is a uniqueoutput set of values.• Acyclic circuits are necessarily combinational• Cyclic circuits can be combinational,– in fact, there are combinational circuits whose minimalimplementation must have cycles [Kautz 1970]2941

11/05/2013What are Sequential Circuits?Some sequential circuits have memory elements.– Synchronous circuits have clocked latches.– Asynchronous circuits may or may not have latches but these are notclocked.Feedback (cyclic) is a necessary, but not sufficient condition for a circuitto be sequential.Synthesis of sequential circuits is not as well developed ascombinational. (only small circuits)Sequential synthesis techniques are not really used in commercialsoftware (except maybe retiming).Sequential circuit verification is a difficult problem.295Finite State MachinesFinite State Machines in STG or transition relation form area behavioral view of sequential circuits.– They describe their transitional behavior.– They can distinguish among a finite number of classes of inputsequence histories:– These classes are the internal states of the machine.Moore Machine: is a quintuple: M(S, I, O, , )– S: finite non-empty set of states– I: finite non-empty set of inputs– O: finite non-empty set of outputs– : S x I S transition (or next state) function– : S O output function (note: output only a function ofpresent state)2962

11/05/2013Moore FSMinputCombinationalNext State LogicStateCombinationaloutput logicoutput297FSM’s (continued)Mealy Machine: M(S, I, O, , ) but– : S x I O (i.e. output depends on both present state andpresent input)– for digital circuits, typically I = {0,1} m and O = {0,1} nIn addition, (for both Moore and Mealy machines) certainstates are classified as reset or initial statesFinite automata are similar to FSM’s, but– they do not produce any outputs,– they just accept input sequences (an accepting set of states isgiven).2983

11/05/2013Mealy FSMinputCombinationalNext State LogicStateCombinationaloutput logicoutput299TRAFFIC LIGHT Control ExampleSource: notes.ump.edu.my/fkee/BEE2243/AMRAN/Notes/TRAFFIC%20LIGHT%20FSM.ppt3004

11/05/2013TRAFFIC LIFHT301TRAFFIC LIGHT3025

11/05/2013TRAFFIC LIGHT303STATE DIAGRAM3046

11/05/2013STATE ENCODING305CODED STATE DIAGRAM3067

11/05/2013FSM REALIZATION307STATE EQUATION3088

11/05/2013FSM IMPLEMENTATION309Incompletely Specified Machines• Next state and output functions have don’t cares.• However, for an implementation, and are functions,– thus they are uniquely defined for each input and statecombination.• Don’t cares arise when some combinations are of no interest:– they will not occur or– their outputs will not be observed• For these, the next state or output may not be specified.– (In this case, and are relations, but of special type. Weshould make sure we want these as don’t cares.)• Such machines are called incompletely specified.3109