PRACE Summer School on Code Optimisation for Multi-Core and ...
PRACE Summer School on Code Optimisation for Multi-Core and ...
PRACE Summer School on Code Optimisation for Multi-Core and ...
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Press release / <strong>for</strong> release: 02-05-2012 IMMEDIATELY<str<strong>on</strong>g>PRACE</str<strong>on</strong>g> <str<strong>on</strong>g>Summer</str<strong>on</strong>g> <str<strong>on</strong>g>School</str<strong>on</strong>g> <strong>on</strong> <strong>Code</strong> Optimisati<strong>on</strong> <strong>for</strong> <strong>Multi</strong>-<strong>Core</strong> <strong>and</strong>Intel® MIC ArchitectureThe Partnership <strong>for</strong> Advanced Computing in Europe (<str<strong>on</strong>g>PRACE</str<strong>on</strong>g>) is pleased to announce the <str<strong>on</strong>g>Summer</str<strong>on</strong>g><str<strong>on</strong>g>School</str<strong>on</strong>g> <strong>on</strong> <strong>Code</strong> Optimisati<strong>on</strong> <strong>for</strong> <strong>Multi</strong>-<strong>Core</strong> <strong>and</strong> Intel® Many Integrated <strong>Core</strong> (MIC) architecture,which will be held from 21st to 23rd June 2012 at the Swiss Nati<strong>on</strong>al Supercomputing Centre inLugano, Switzerl<strong>and</strong>.In this three day intensive event participants will focus <strong>on</strong> programming <strong>and</strong> tuning techniques <strong>for</strong>modern multi- <strong>and</strong> many-core processors with a particular focus <strong>on</strong> the Intel® Many Integrated <strong>Core</strong>architecture. Topics will be presented at an advanced level <strong>and</strong> will include structuring code to enableSIMD/vectorizati<strong>on</strong>, efficient usage of register, cache <strong>and</strong> memory hierarchies, use of multi-threadingtechniques to maximize resource utilizati<strong>on</strong>, data locality c<strong>on</strong>siderati<strong>on</strong>s <strong>on</strong> multi-socket NUMA nodes,<strong>and</strong> inter-node communicati<strong>on</strong>. Intel specialists will introduce the Intel® MIC architecture <strong>and</strong> the Intelprogramming envir<strong>on</strong>ment, <strong>and</strong> will delve into greater detail of the use of multi- <strong>and</strong> many-coreprogramming techniques. Dem<strong>on</strong>strati<strong>on</strong>s <strong>and</strong> h<strong>and</strong>s-<strong>on</strong> sessi<strong>on</strong>s will be integrated throughout thecourse to illustrate the topics in greater depth, <strong>and</strong> user case studies will highlight real-worldexperiences in optimising scientific (HPC) codes <strong>on</strong> the Intel® MIC architecture.Dates: 21 st – 23 rd June 2012Locati<strong>on</strong>: Swiss Nati<strong>on</strong>al Supercomputing Centre, Lugano, Switzerl<strong>and</strong>Registrati<strong>on</strong>: To apply <strong>for</strong> a place please go to here(http://survey.ipb.ac.rs/index.php?sid=43493&lang=en)Registrati<strong>on</strong> deadline: 11 th May 2012.The school is offered free of charge to students <strong>and</strong> academics residing in <str<strong>on</strong>g>PRACE</str<strong>on</strong>g> member states,<strong>and</strong> lunches, coffee breaks <strong>and</strong> an evening dinner event will be provided. Please note that a soundknowledge of C, C++ or Fortran is a pre-requisite <strong>for</strong> this course. Attendance is limited to 30 places,<strong>and</strong> selecti<strong>on</strong> of participants will be based <strong>on</strong> dem<strong>on</strong>strated underst<strong>and</strong>ing of computati<strong>on</strong>al science<strong>and</strong> high-per<strong>for</strong>mance computing <strong>and</strong> experience with at least <strong>on</strong>e of MPI, OpenMP, or multi-coreprogramming. Registrati<strong>on</strong> closes Friday 11th May 2012, but we encourage applicants to apply asearly as possible. C<strong>and</strong>idates will be in<strong>for</strong>med of the results of their applicati<strong>on</strong> by the sec<strong>on</strong>d week ofMay (at the latest).For further in<strong>for</strong>mati<strong>on</strong> please c<strong>on</strong>tact:Dr Tim Robins<strong>on</strong>CSCS - Swiss Nati<strong>on</strong>al Supercomputing CentreVia Trevano 131, 6900 Lugano, Switzerl<strong>and</strong>E-mail: tim.robins<strong>on</strong>@cscs.chwww.prace-ri.eu
About <str<strong>on</strong>g>PRACE</str<strong>on</strong>g>The Partnership <strong>for</strong> Advanced Computing in Europe (<str<strong>on</strong>g>PRACE</str<strong>on</strong>g>) is an internati<strong>on</strong>al n<strong>on</strong>-profit associati<strong>on</strong>with its seat in Brussels. The <str<strong>on</strong>g>PRACE</str<strong>on</strong>g> Research Infrastructure (RI) provides a persistent world-classHigh Per<strong>for</strong>mance Computing (HPC) service <strong>for</strong> scientists <strong>and</strong> researchers from academia <strong>and</strong>industry. The Implementati<strong>on</strong> Phase of <str<strong>on</strong>g>PRACE</str<strong>on</strong>g> receives funding from the EU’s Seventh FrameworkProgramme (FP7/2007-2013) under grant agreements n° RI-261557 <strong>and</strong> n° RI-283493.www.prace-project.eu
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