Advanced Laboratory on Embedded Systems S.r.l.
Advanced Laboratory on Embedded Systems S.r.l.
Advanced Laboratory on Embedded Systems S.r.l.
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Randomized HW/SW Architectures Move towards a truly randomized architectures— Opposite directi<strong>on</strong> of predictable (deterministic) HW/SW architectures— Break any dependency <strong>on</strong> code executi<strong>on</strong> history (typical in caches, butnot <strong>on</strong>ly there!)— Probabilistic analysis suffers dependencies (i.e. it is much simpler to rely<strong>on</strong> statistical independence) Example with caches:— Randomized replacement policy (select random a replacement victim)— Traditi<strong>on</strong>al replacement (LRU) depends <strong>on</strong> executi<strong>on</strong> history• probabilistic executi<strong>on</strong> time analysis suffer of systemic cache misses (probabilisticanalysis relies <strong>on</strong> statistical independence) Problems/Doubts— How to achieve true randomizati<strong>on</strong> ?— Is this still cost effective ?— A reduced complexity architecture could achieve better meanperformance and B/WCET bounds ?[ecrts09.pdf “Using Randomized Caches in Probabilistic Real-Time <strong>Systems</strong>”]7/9/2012 [ACM-probabilistic_rt.pdf Alberto “PROARTIS: Ferrari - ALES S.r.l. Probabilistically Analysable Real-Time <strong>Systems</strong>”] 22