Using CoreSight Trace Techniques on Cortex - IAR Systems

Instruction trace
Instruction <strong>Trace</strong> (also known as ETM trace) is a continuously collected sequence of every executed
instruction for a selected portion of the application. Note that the ETM (Embedded <strong>Trace</strong> Macrocell)
component is optional so that some Cortex-M3/M4 devices might not support Instruction <strong>Trace</strong>. When
ETM is included and enabled, it generates trace packets and sends them to TPIU. A special hardware
probe (e.g. IAR J-<strong>Trace</strong> for Cortex-M3) is required to receive these packets and transfer them to the
host debugger. The J-<strong>Trace</strong> probe contains a 4MB buffer that collects instructions in real time, but the
trace data will not be displayed in the ETM <strong>Trace</strong> window of C-SPY until the execution has been
stopped.
Since the (up to) 4-bit trace port is not sufficient to transfer all executed instructions, ETM does not
actually output every address/instruction that the processor has reached or executed. It usually
generates compressed information about the program flow and outputs full addresses only if needed
(e.g. if a branch has taken place). Since the debugger knows the application code image, it can then
reconstruct the full instruction sequence from the trace data.
Supported by a probe such as IAR J-<strong>Trace</strong> for Cortex-M3, Instruction <strong>Trace</strong> can be used with SWO
trace (Data <strong>Trace</strong> and Software <strong>Trace</strong>) concurrently. In this case, trace data from DWT and ITM will also
be collected to the ETM trace buffer, instead of being streamed via the SWO channel immediately. This
means that DWT and ITM trace data will not be displayed until the execution has been stopped, instead
of being continuously updated in the C-SPY windows.
• Example 7: Instruction trace and function trace
• Example 8: View the call stack graph
• Example 9: Statistics of code coverage
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