Practical ICT Experience – Flexibility – Worldwide References
Practical ICT Experience – Flexibility – Worldwide References - Ericpol
Practical ICT Experience – Flexibility – Worldwide References - Ericpol
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Portfolio of Training Courses<br />
<strong>Practical</strong> <strong>ICT</strong> <strong>Experience</strong> <strong>–</strong> <strong>Flexibility</strong> <strong>–</strong> <strong>Worldwide</strong> <strong>References</strong>
Knowledge Evolution<br />
Why Ericpol Training Services?<br />
<strong>Practical</strong> Wide <strong>Experience</strong><br />
We teach the subjects which we use in our work, combining practical experience with our<br />
professional but friendly teaching style<br />
<strong>Flexibility</strong><br />
We customize our training programs to fulfil customers’ needs<br />
We are flexible in how we organize our training courses<br />
<strong>Worldwide</strong> <strong>References</strong><br />
Our trainers conduct courses all over the world<br />
Ericpol Training Centre<br />
tel. +48 42 6642500<br />
fax: +48 42 6642555<br />
training@ericpol.com<br />
training.ericpol.com<br />
I/02 ericpol.com
Undoubtedly, knowledge is a valuable thing;<br />
however it is the ability to transfer, develop and<br />
practically apply it which actually influences<br />
a company's income. 20 years ago, when I created<br />
Ericpol, I personally used to teach my first<br />
employees modern methods of work and<br />
technologies that, at the time, were unknown in<br />
Poland. Even now we pay special attention to<br />
ensure that the ability to transfer knowledge<br />
benefits the entire company. The result is good.<br />
We employ over 1000 people in 4 countries.<br />
We have the know-how and experience which<br />
enable 1.5 billion people worldwide to communicate<br />
over the phone every day. I would like to<br />
encourage you to use our potential. Every day,<br />
since 1991 we have been creating global telecommunications<br />
systems, working in large international<br />
projects, verifying our competences in<br />
practical ways, often on a 24/7 basis. Telecommunications<br />
never sleep and remain in a continuous<br />
state of development. Our team of engineers<br />
follows the changes, analyzes them and passes<br />
their knowledge onto others. Their experience<br />
is at your disposal.<br />
Yours sincerely,<br />
Jan Smela<br />
President of the Board of<br />
Ericpol Telecom Sp. z o.o.<br />
Our training is conducted by a specially - designated<br />
team to enable us to share with you<br />
the know-how and skills we acquire. I hope that<br />
our catalogue communicates the scope of our<br />
services and allows you to choose those which will<br />
effectively aid you in meeting your challenges,<br />
today and in the future.<br />
We offer training related to telecommunications<br />
technologies, tools and programming solutions.<br />
These over 30 choices will surely allow you to find<br />
something of interest for your engineers and<br />
managing staff alike. Our team always adapts<br />
the topic you choose to suit your actual individual<br />
needs in order to transfer the target knowledge<br />
in a competent and effective manner. We have<br />
a motto which states that only those who speak<br />
about difficult issues in an easy way truly understand<br />
the essence of the topic. Thanks to this<br />
approach we can present references from satisfied<br />
customers from all over the world.<br />
Together with our team we guarantee that both<br />
the know-how and the way it is transferred will<br />
meet your expectations. You can expect that,<br />
when it is applied in practice, such know-how will<br />
increase the effectiveness of your organization.<br />
We want your market success to also become our<br />
success. Only then will our mission have been<br />
achieved.<br />
Yours sincerely,<br />
Małgorzata Wdówka<br />
Manager of the Training Department of<br />
Ericpol Telecom Sp. z o.o.<br />
I/03<br />
ericpol.com
Table of Contents<br />
Why Ericpol Training Services? .........................................................................<br />
Ericpol Telecom ..........................................................................................<br />
I/02<br />
I/06<br />
Ericpol Training Centre .................................................................................. I/07<br />
Training Competence .....................................................................................<br />
<strong>Worldwide</strong> Training <strong>References</strong> .........................................................................<br />
Courses on Telecommunications Networks<br />
GSM Overview ......................................................................................<br />
GSM for non-IT Staff ...............................................................................<br />
UMTS <strong>–</strong> 3rd Generation Network Solution .......................................................<br />
IMS Overview .......................................................................................<br />
LTE/SAE <strong>–</strong> a Step towards 4G .....................................................................<br />
LTE Radio Interface ...............................................................................<br />
I/08<br />
I/09<br />
II/01<br />
II/02<br />
II/03<br />
II/04<br />
II/05<br />
II/06<br />
Courses on Telecommunications Signalling<br />
SS7 Signalling in GSM Core Network .............................................................<br />
SIGTRAN <strong>–</strong> SS7 Signalling over IP ...............................................................<br />
IN Protocols Introduction ..........................................................................<br />
MSS Signalling ......................................................................................<br />
UTRAN Protocols and Procedures ................................................................<br />
Introduction to SIP .................................................................................<br />
ASN.1 ...............................................................................................<br />
III/01<br />
III/02<br />
III/03<br />
III/04<br />
III/05<br />
III/06<br />
III/07<br />
Applications Development Training Courses<br />
UML Modelling ....................................................................................<br />
Perl <strong>–</strong> Workshop ....................................................................................<br />
Python <strong>–</strong> Workshop .................................................................................<br />
OCJP Tips & Tricks .................................................................................<br />
Java Workshop <strong>–</strong> Preparation for OCJP Exam ....................................................<br />
JAIN SLEE and SIP Servlets <strong>–</strong> Workshop ........................................................<br />
JAIN SLEE <strong>–</strong> Workshop ...........................................................................<br />
SIP Servlets <strong>–</strong> Workshop ...........................................................................<br />
IV/01<br />
IV/02<br />
IV/03<br />
IV/04<br />
IV/05<br />
IV/06<br />
IV/07<br />
IV/08<br />
I/04 ericpol.com
Table of Contents<br />
Embedded Systems Software Design and Development<br />
Introduction to Embedded Systems and Software .................................................<br />
Introduction to Real-Time Operating Systems .....................................................<br />
Testing of Embedded Software ......................................................................<br />
Embedded Software Fundamentals Masterclass ...................................................<br />
Architectural Design of Real-Time Software .......................................................<br />
Debugging Real-Time Software .....................................................................<br />
Design of Distributed and Multi-Core Systems & Software .......................................<br />
Design of High Availability Systems & Software ...................................................<br />
Design of Safety-Critical Systems & Software ......................................................<br />
V/01<br />
V/03<br />
V/05<br />
V/07<br />
V/09<br />
V/11<br />
V/13<br />
V/15<br />
V/17<br />
Design of Device Drivers for Embedded Systems .................................................. V/19<br />
Safety Critical & High Availability Systems Masterclass ..........................................<br />
Embedded Software Testing and Debugging Masterclass .........................................<br />
V/21<br />
V/23<br />
C++ Wizardry for Embedded ........................................................................ V/25<br />
New Ways of Working<br />
Work with Agile Software Development <strong>–</strong> Scrum .................................................. VI/01<br />
Scrum Simulation .................................................................................... VI/02<br />
I/05 ericpol.com
Knowledge Evolution<br />
Ericpol Telecom<br />
Professionalism in <strong>ICT</strong> Services<br />
Since 1991, Ericpol has been providing the highest quality outsourcing and consulting services<br />
in the field of telecommunications, as well as technical support and training services for the world’s<br />
largest telecommunications suppliers and various telecoms operators. Ericpol is also the largest<br />
company in Poland to provide telecommunications software solutions and on-demand software.<br />
Our engineers have extensive knowledge and experience in fixed and mobile networks, IN, NGN, signalling<br />
and data transmission protocols as well as billing systems. Our services cover consultancy<br />
for telecoms suppliers and operators, software development for telecoms nodes, telecoms network maintenance<br />
& management, installing network elements and comprehensive software testing.<br />
Ericpol Telecom employs over 1000 people in Poland and in subsidiary companies in Sweden, Ukraine<br />
and Belarus. Our engineers have carried out a large variety of successful projects in more than 70 countries<br />
all over the world.<br />
Thanks to the experience which we have gained whilst working with business partners such as Ericsson,<br />
France Telecom Group, Telmex, Telia Sonera, Oracle, BEA, OpenCloud, Catapult, Dialogic, AePona<br />
and Alcatel Lucent, we are in an excellent position to define our own processes, not only for software<br />
development, but also for business areas. This is reflected in the fact that we hold ISO 9001:2008 and ISO<br />
14001:2004 certificates, and expect to gain the ISO 27001 certificate in the near future, all of which gives<br />
our partners a feeling of security in the certain knowledge that, in working with us, they have chosen<br />
highly reliable and respectable partner.<br />
All the above makes Ericpol Telecom a stable company with a critical mass of knowledge and experience,<br />
large growth potential and in a strong financial position.<br />
You can rely on Ericpol’s professional expertise to<br />
handle the complexity of your current and future networks!<br />
I/06 ericpol.com
Knowledge Evolution<br />
Ericpol Training Centre<br />
<strong>Experience</strong>, <strong>Flexibility</strong> and <strong>Worldwide</strong> <strong>References</strong><br />
Ericpol always aspires to set up “win-win” partnerships coupled with our individual approach and flexible<br />
pricing model. We strive to create constructive dialogue whilst choosing the most suitable training model<br />
for our client. Clear communication, fast responses and an attitude which values long term-relationships<br />
are very important to us.<br />
Ericpol Training Centre offers many off-the-shelf training courses in telecommunications technologies,<br />
a wide range of programming languages and technological platforms as well as project management<br />
methodologies, all presented by highly qualified and experienced instructors. The content of these<br />
courses is based on standard documents and, what is more important, originates from Ericpol’s experience<br />
gained in real projects which we have undertaken all over the world.<br />
If no course from our portfolio fully satisfies customers’ requirements, we adapt currently existing course<br />
or compile a few courses into one. Each course consists of a number of modules which can be combined<br />
to create a unique training programme depending on the customer choice and preference.<br />
In this way, our new partner pays for exactly what he or she really wants.<br />
We can also prepare and organize courses with the content tailored to customers’ specific requirements<br />
and needs. Key areas of our competence are:<br />
RADIO NETWORKS<br />
BSS<br />
BSC<br />
BTS<br />
RNC<br />
PROTOCOLS<br />
& STANDARDS<br />
SS7 (ISUP, MAP, BICC, TCAP)<br />
INAP CS1, INAP CS1+<br />
CAPV2,3,4<br />
SIP, DIAMETER<br />
TCP/IP, SIGTRAN<br />
LDAP<br />
CORE NETWORKS<br />
GSM (HLR, MSC)<br />
GPRS/EDGE<br />
UMTS/WCDMA<br />
LTE<br />
IMS<br />
PSTN<br />
IN<br />
PROJECT<br />
MANAGEMENT<br />
AGILE<br />
SCRUM<br />
PMI<br />
SOFTWARE<br />
DEVELOPMENT<br />
TECHNOLOGIES<br />
UML, JAVA, C++, PERL, PYTHON,<br />
PARLAY, JSLEE, SIP SERVLETS<br />
EMBEDDED<br />
SYSTEMS - RTOS<br />
VRTX, pSOS<br />
VxWorks<br />
OSEK/VDX<br />
Nucleus<br />
OSE, µC/OS<br />
As our offer in telecommunications sector is wide, training courses and workshops can be part<br />
of a more complex project. We are also experienced in technology knowledge transfer.<br />
I/07 ericpol.com
Knowledge Evolution<br />
Training Competence<br />
<strong>Practical</strong>, Wide <strong>Experience</strong> with Professional Teaching Skills<br />
Ericpol has a team of competent trainers who are all curious about new technologies and solutions<br />
in telecoms and software design. They are professionals with broad knowledge and years of experience<br />
in business and running training courses. Their friendly, yet professional teaching style has gained praise<br />
from many participants as reflected in the very positive feedback.<br />
Training courses can be provided at all levels, from the basics to advanced.<br />
They are aimed at:<br />
Telecommunications and IT professionals (designers, software system architects and analysts,<br />
software development engineers, testers, operation and maintenance engineers)<br />
Technical consultants<br />
Technical sales support and sales representatives<br />
Project managers<br />
CTO, CIO<br />
Ericpol offers training paths which can be adjusted to specific needs in order to:<br />
Build up competence effectively<br />
Improve efficiency in problem solving<br />
Support the implementation of new technologies and new ways of working<br />
Trainers are carefully chosen, regularly assessed and themselves trained to transfer knowledge<br />
effectively, run workshops and lead groups. They keep up-to-date with current and cutting-edge technologies<br />
and standards in the industry. They can easily translate technical language to more understandable<br />
language depending on participants’ background. Training courses with such professionals are more<br />
effective than any form of self-education, including books, e-learning and tutorials, because the trainer<br />
is always ready and willing to:<br />
Share personal experiences<br />
Guide through technological complexities<br />
Give (live) answers to all questions on a topic<br />
Dispel any doubts<br />
After training, we support participants by offering consultation sessions which help them to use their<br />
newly gained knowledge in practical way in their everyday work. Ericpol offers all training courses in<br />
English, most of them in Polish (except for Embedded Systems Software Design and Development) and<br />
some can be provided in Russian.<br />
I/08 ericpol.com
Knowledge Evolution<br />
<strong>Worldwide</strong> Training <strong>References</strong><br />
Ericpol Training Centre conducts courses all over the world (see the figure below for examples of past<br />
training locations):<br />
Participants on our training courses work for technology providers, operators and institutions such as:<br />
Ericsson<br />
France Telecom Group<br />
T-Mobile Group<br />
... and more<br />
Here is what some of our clients said about the quality of our training courses and attitude of our<br />
trainers:<br />
“Ericsson was very pleased with the way the training was performed and the high quality level of the training.”<br />
<strong>–</strong> Competence Manager, Ericsson AB<br />
“The training program on SS7 and SIGTRAN protocols, which was provided to a group of our designers<br />
and architects, fully met our expectations.”<br />
<strong>–</strong> Consulting & System Integration Manager, Ericsson Poland<br />
“The workshop was prepared in a professional manner. Trainer had extensive knowledge on the presented<br />
subject (...) Well-illustrated examples of the discussed topics were used. The training was positively received<br />
by participants.”<br />
- Head of Division, Telekomunikacja Polska (France Telecom Group)<br />
“I confidently recommend Ericpol Telecom's services in providing training workshops in the domain of telecommunications<br />
solutions, in this case, on JAIN SLEE / SIP Servlets.”<br />
<strong>–</strong> Studio Manager, Orange Labs Poland<br />
I/09 ericpol.com
Knowledge Evolution<br />
Courses on Telecommunications Networks<br />
GSM Overview<br />
Course ID: EPOL-05:002<br />
Duration: 3 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
This course aims to present a general description of the GSM system architecture and functionality.<br />
On completion of the course, participants will have a general knowledge of GSM:<br />
History of mobile and cellular systems<br />
Services in 2G and 2,5G GSM networks<br />
Architecture of Core Network and interconnections to other networks (including layered architecture)<br />
Coverage optimisation and frequency reuse problem<br />
Radio interface in 2G and 2,5G systems (with typical limitations of radio transmissions)<br />
Radio channels and bursts transmitted in radio channels<br />
GPRS/EDGE Packet transmission<br />
ID-numbers, with information about numbering plans and number analyzing tool<br />
Traffic cases (most typical scenarios) in the core network<br />
Target audience<br />
This training course has been designed for professionals in telecommunications who need technical<br />
background on GSM system. This includes designers, testers and maintenance engineers.<br />
Prerequisites<br />
Participants should have a general understanding of data communications and telecommunications.<br />
Some technical background, especially in the fields of the telecoms network and signalling, is recommended;<br />
otherwise, the course will take longer to complete.<br />
Learning method<br />
The course is based on theoretical lessons supported by a quiz and active discussion.<br />
II/01<br />
ericpol.com
Knowledge Evolution<br />
GSM for non-IT Staff<br />
Course ID: EPOL-07:024<br />
Duration: 1 day<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
“GSM for non-IT Staff” is a course which aims to introduce participants to the Global System for Mobile<br />
Communications. The discussion about GSM includes:<br />
Brief history of cellular networks of the zero, first and second generations<br />
Basic services available in GSM network<br />
General structure of the network<br />
Description of the radio interface with some radio transmission concepts<br />
Introduction to resource usage, including the concepts of physical and logical channels<br />
Numbers used in the system<br />
Basic scenarios which are characteristic of the GSM system<br />
Target audience<br />
This course is tailored for people with no technical background, but who wish to gain a basic understanding<br />
of GSM. It has been developed especially for managers and sales representatives. All the concepts are<br />
presented without any difficult technical language, making it easy to absorb knowledge. Also numerous<br />
non-technical analogies help people feel more confident while exploring this field.<br />
Prerequisites<br />
There are no prerequisites for this course.<br />
Learning method<br />
The course is delivered in the form of presentations, lectures, reviews and time for questions, thereby<br />
helping participants to better assimilate information.<br />
II/02<br />
ericpol.com
Knowledge Evolution<br />
UMTS <strong>–</strong> 3rd Generation Network Solution<br />
Course ID: EPOL-09:005<br />
Duration: 3 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
“UMTS <strong>–</strong> 3rd Generation Network Solution” is a course which aims to introduce participants<br />
to the Universal Mobile Telecommunications System network with Wideband Code Division Multiple<br />
Access as the radio access method. The presentation comprises:<br />
The evolution path of 1G <strong>–</strong> 4G mobile systems<br />
Network architecture from Release 99 to Release 8<br />
Introduction to TDMA, FDMA and CDMA multiple access methods<br />
Spreading and scrambling codes in WCDMA<br />
Quality of Service concept for UTRAN<br />
Description of power control mechanisms and handovers in WCDMA<br />
Channel concepts for WCDMA access networks<br />
Protocol stack structures on the UTRAN interface<br />
Security in a UMTS network<br />
Popular scenarios and flow cases for a UMTS network<br />
Target audience<br />
The course is tailored for telecoms professionals working with system engineering, operation and maintenance,<br />
hardware and software development, testing and verification.<br />
Prerequisites<br />
The course will be more beneficial for people with some technical background. Basic knowledge<br />
of telecoms networks may be useful. Previous attendance on the “GSM Overview” (EPOL-05:002) course<br />
is recommended.<br />
Learning method<br />
The course is delivered in the form of presentations, lectures, reviews and time for questions, thereby<br />
helping participants to better assimilate information.<br />
II/03<br />
ericpol.com
Knowledge Evolution<br />
IMS Overview<br />
Course ID: EPOL-10:013<br />
Duration: 1 day<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
The main objective of the “IMS Overview” course is to introduce the participants to the IP Multimedia<br />
Subsystem network and its basic concepts. The presentation includes:<br />
Introduction to IMS and network convergence<br />
IMS (and VoIP) architecture and component<br />
IMS identities, user identification and “Registration” process<br />
Services and service functionality in IMS (AS, B2BUA, SS to TISPAN, Media Server Control)<br />
Brief description of the main protocols used in IMS (e.g. SIP, SDP, H.248, RTP, Diameter)<br />
IMS over cellular systems <strong>–</strong> radio interface<br />
Security aspects and charging policies<br />
Example of the call flow and session establishment (e.g. Registration to IMS)<br />
Perspectives (3GPP, EPS)<br />
Target audience<br />
The course is tailored for telecoms professionals working with technical project management, design,<br />
system engineering, network planning, operations and maintenance, as well as technical sales of IMS<br />
systems, products and services.<br />
Prerequisites<br />
The course will be more beneficial for people with some technical background. Basic knowledge of<br />
telecoms networks and computer network protocols may be an advantage.<br />
Learning method<br />
The course is delivered in the form of presentations, lectures, reviews and time for questions, thereby<br />
helping participants to better assimilate information.<br />
II/04<br />
ericpol.com
Knowledge Evolution<br />
LTE/SAE <strong>–</strong> a Step towards 4G<br />
Course ID: EPOL-10:035<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
The “LTE/SAE <strong>–</strong> a Step towards 4G” is a course which aims to present the architecture and functionality<br />
of the Evolved Packet System, which is to be successor of, for example, UMTS/HSPA technology.<br />
On completion of this course, participants will have gained the following knowledge about the LTE/SAE<br />
system:<br />
LTE/SAE system architecture and interworking with legacy networks (GSM/UMTS/CDMA<br />
2000)<br />
LTE/SAE node functions, e.g. eNB, MME, S-GW, P-GW, PCRF, HSS<br />
QoS model for LTE/SAE<br />
ID numbers and area structure<br />
LTE radio interface (including FFT/IFFT, OFDMA, SC-FDMA, MIMO)<br />
Overview of LTE channel organization and physical procedures<br />
Voice transfer via LTE/SAE (VoIP, SAE and legacy networks interworking <strong>–</strong> CS fallback)<br />
Security mechanisms in LTE/SAE<br />
Example traffic cases<br />
Target audience<br />
Professionals in the field of telecommunications who need to know about the Evolved Packet System.<br />
This course will be valuable for employees from different teams and domains who want to start working<br />
with LTE/SAE or need to refresh their current knowledge of this subject.<br />
Prerequisites<br />
The course will be more beneficial for people with a general knowledge of 2G/3G mobile networks<br />
and telecommunications in general.<br />
Learning method<br />
The course is presentation-based.<br />
II/05<br />
ericpol.com
Knowledge Evolution<br />
LTE Radio Interface<br />
Course ID: EPOL-10:036<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
The “LTE Radio Interface” course aims to present key aspects of the LTE air interface, physical layer<br />
procedures as well as signal transmission and processing in L1/L2 in detail. On completion of the course,<br />
participants will have know the following about the LTE radio interface:<br />
E-UTRAN structure and node functions<br />
Structure of S1-U, S1-MME, X2 and Uu protocol stacks and signalling protocol functions for<br />
each stack<br />
Uu interface physical layer features (frequency allocation, Doppler, multipath, ISI, OFDMA,<br />
SC-FDMA, FFT/IFFT, Cyclic Prefix, MIMO)<br />
LTE physical channels (types, functions, processing chains, physical resources organization,<br />
reference signals, radio frame structure)<br />
Physical layer procedures (cell search, synchronization, random access, etc.)<br />
L2 for LTE (MAC/RLC overview)<br />
Target audience<br />
Telecoms professionals who need detailed knowledge of the LTE radio interface. This course will be<br />
valuable for employees from different teams and domains, working on LTE radio.<br />
Prerequisites<br />
The course will be more beneficial for people with a general knowledge of LTE/SAE.<br />
Learning method<br />
The course is presentation-based.<br />
II/06<br />
ericpol.com
Knowledge Evolution<br />
Courses on Telecommunications Signalling<br />
SS7 Signalling in GSM Core Network<br />
Course ID: EPOL-07:022<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
The “SS7 Signalling in GSM Core Network” course explains and describes the world’s most widely used<br />
inter-exchange signalling system for mobile telecommunications today, Signalling System No 7. This<br />
course concentrates on the SS7 protocol stack and includes:<br />
Introduction to the Signalling System No. 7 protocol stack<br />
Description of the Message Transfer Part protocol<br />
Description of the Signalling Connection Control Part protocol<br />
Description of the Transaction Capabilities Application Part protocol<br />
Description of the ISDN User Part<br />
Description of the Mobile Application Part protocol<br />
Description of the Intelligent Network Application Part and CAMEL Application Part<br />
Standardization documents and organisations<br />
Target audience<br />
The course has been developed for telecommunications professionals working with network management,<br />
system engineers, hardware and software developers and anybody who wishes to gain a basic<br />
understanding of SS7 signalling.<br />
Prerequisites<br />
The course will be more beneficial for people with some technical background, especially in the field<br />
of the telecommunications networks and GSM network structure. We recommend that participants<br />
on this course have previously attended the “GSM Overview” (EPOL 05:002) and “ASN.1” (EPOL<br />
07:004) courses.<br />
Learning method<br />
The course is delivered in the form of presentations, practical exercises, reviews and time for questions,<br />
helping participants to better assimilate the newly acquired information.<br />
III/01<br />
ericpol.com
Knowledge Evolution<br />
SIGTRAN <strong>–</strong> SS7 Signalling over IP<br />
Course ID: EPOL-10:034<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objective<br />
The “SIGTRAN <strong>–</strong> SS7 Signalling over IP” course aims to provide the details of signalling issues in IP<br />
networks, but still compatible with worldwide SS7 signalling. On completion of the course, participants<br />
will have gained the following knowledge about SIGTRAN in a network:<br />
The idea behind SIGTRAN, IP networking, adaptation layers from SS7 in TDM to IP networks<br />
Stream Control Transmission Protocol <strong>–</strong> a reliable way to deliver messages over unreliable<br />
network<br />
Typical adaptation layers in SIGTRAN (M2UA, M3UA, SUA, IUA)<br />
<strong>Practical</strong> issues related to redundancy, reliability and the evolution of signalling into<br />
SIGTRAN<br />
Traffic cases and call flows <strong>–</strong> typical scenarios which relate to signalling messages in IP<br />
Target audience<br />
This course has been designed for professionals in the telecommunications field who need to know<br />
the details on SIGTRAN signalling. This course will be valuable for employees from different teams<br />
and domains, but especially for those who design, maintain or support signalling over IP networks<br />
or multi-domain networks.<br />
Prerequisites<br />
The course will be more beneficial for participants with a general knowledge of networks and telecommunications,<br />
especially if they are familiar with SS7 signalling issues and IP networking.<br />
Learning method<br />
The course is presentation-based, along with exercises for participants.<br />
III/02<br />
ericpol.com
Knowledge Evolution<br />
IN Protocols Introduction<br />
Course ID: EPOL-05:017<br />
Duration: 6 hours<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
During this course, participants will be trained on, and will gain knowledge about:<br />
The general concept of Intelligent Network and its origins<br />
Architecture of an IN Network<br />
Description of IN functional entities: SSP, SCP, SDP, IP, other<br />
IN services and examples of use<br />
Signalling protocols (SS7 stack), focus on IN Application Part protocol<br />
Main differences between INAP protocol versions (CS-x)<br />
The CAMEL standard and solution for implementing in a mobile network<br />
Exemplary traffic flows between IN nodes<br />
Process of creation of an IN service (lifecycle and SCE)<br />
Target audience<br />
This training course has been designed for professionals in telecommunications who need technical<br />
background on the Intelligent Network solution.<br />
Prerequisites<br />
Participants should have a general understanding of data communications and telecommunications.<br />
Some technical background, especially in the field of the networking and signalling, is recommended.<br />
Learning method<br />
The course is based on theoretical lessons.<br />
III/03<br />
ericpol.com
Knowledge Evolution<br />
MSS Signalling<br />
Course ID: EPOL-09:015<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
This course aims to present a general description of the MSS system architecture and functionality used<br />
in core mobile networks. On completion of the course, participants will have knowledge on the following:<br />
Introduction <strong>–</strong> description of the Signalling Network and Mobile Core Network protocol<br />
stacks<br />
Mobile SoftSwitch architecture and functionality (MSC Server, Media Gateway, Virtual Media<br />
Gateway)<br />
ATM/AAL/Q.2630 <strong>–</strong> Functions and capabilities, frames structures, typical flow cases<br />
IPBCP <strong>–</strong> the tunnelling concept, messages and parameters, Session Description Protocol<br />
BICC <strong>–</strong> Principles and concepts, messages and parameters, typical BICC procedures<br />
GCP (H.248) <strong>–</strong> Functions and concepts, commands and descriptors, examples of procedures<br />
SIP <strong>–</strong> Functions and capabilities, routing and addressing for SIP signalling, how SIP works<br />
in MSS operations<br />
Explanations of complex traffic cases according to 3GPP standards and based on real traffic<br />
cases<br />
Target audience<br />
This training course has been designed for professionals in telecommunications who need technical<br />
background on the Mobile SoftSwitch system (MSC Server + Media Gateway).<br />
Prerequisites<br />
Participants should have a general understanding of data communications and telecommunications.<br />
Technical background, especially in the fields of the networking and signalling, is recommended.<br />
Learning method<br />
The course is delivered in the form of presentations, network log exercises supported by review and active<br />
discussion.<br />
III/04<br />
ericpol.com
Knowledge Evolution<br />
UTRAN Protocols and Procedures<br />
Course ID: EPOL-10:005<br />
Duration: 3 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
The “UTRAN Protocols and Procedures” which cover the WCDMA radio access interfaces, such as Uu,<br />
Iub, Iur and Iu. It also includes a comprehensive survey of the protocols used over these interfaces: RRC,<br />
RLC, MAC, NBAP, RNSAP and RANAP. The presentation comprises:<br />
Protocol stacks for Uu, Iub, Iur, Iu interfaces<br />
QoS architecture<br />
RRC <strong>–</strong> Radio Resource Control<br />
RLC <strong>–</strong> Radio Link Control<br />
MAC <strong>–</strong> Medium Access Control<br />
NBAP <strong>–</strong> Node B Application Part<br />
RNSAP <strong>–</strong> Radio Network Subsystem Application Part<br />
RANAP <strong>–</strong> Radio Access Network Application Part<br />
FP <strong>–</strong> Frame Protocols<br />
Signalling procedures on UTRAN interfaces for layer 3 signalling protocols<br />
Target audience<br />
The course has been developed for telecoms professionals working with system engineering, hardware<br />
and software development, testing and verification.<br />
Prerequisites<br />
The course will be more beneficial for people with an understanding of UMTS’s WCDMA radio interface<br />
principles. Pervious participation on the “UMTS <strong>–</strong> 3rd Generation Networks Solution” (EPOL-09:005)<br />
course is therefore recommended.<br />
Learning method<br />
The course is delivered in the form of presentations, lectures, reviews and time for questions, thereby<br />
helping participants to better assimilate the newly acquired information.<br />
III/05<br />
ericpol.com
Knowledge Evolution<br />
Introduction to SIP<br />
Course ID: EPOL-07:006<br />
Duration: 1 day<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
This course provides a high-level overview of SIP protocol functionality. Participants will acquire<br />
background on SIP's strengths and performance. They will learn the structure of SIP messages and SIP<br />
usage in applications. The discussion about Session Initiation Protocol includes:<br />
SIP history and introduction<br />
SIP functions and components<br />
SIP message, methods and response format<br />
SDP format, offer/answer model and usage in SIP<br />
Registrations and addressing (URI, URL)<br />
SIP servers, clients and user agents (e.g. B2BUA)<br />
SIP routing and proxies<br />
Reliability, Extending the protocol, forking, call preferences<br />
SIP session and basic call flow (e.g. Registration and Subscribe)<br />
SIP usage in the IMS network and SIP interworking SIP<br />
Target audience<br />
The course has been created for telecoms professionals working with hardware and software design,<br />
system engineering, testing and verification, network planning, operations and maintenance as well<br />
as technical sales of IMS systems, products and services.<br />
Prerequisites<br />
The course will be more beneficial for people with basic knowledge of telecoms networks, especially IMS.<br />
Previous attendance on the “IMS Overview” (EPOL-10:013) course is therefore recommended.<br />
Learning method<br />
This course is delivered in the form of lectures with a presentation of applications based on SIP protocol.<br />
III/06<br />
ericpol.com
Knowledge Evolution<br />
ASN.1<br />
Course ID: EPOL-07:004<br />
Duration: 1 day<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
This course aims to introduce participants to the Abstract Syntax Notation number one. The presentation<br />
on ASN.1 includes:<br />
Introduction to the Abstract Syntax Notation and description of its main concepts<br />
Description of the notation elements, aimed to prepare the participants to easily<br />
understand the ASN.1-based specifications<br />
Detailed description of the Basic Encoding Rules with examples of usage<br />
The course can be adapted to CER or DER encoding formats on demand.<br />
Target audience<br />
Telecoms professionals who need technical details on ASN.1 notation and BER encoding rule.<br />
Prerequisites<br />
The course will be more beneficial for people with some technical background. It is especially useful if<br />
participants are familiar with the basics of at least one computer programming language<br />
and binary/decimal/hexadecimal numbers conversion.<br />
Learning method<br />
The course is presentation-based. Apart from the lecture part, it includes practical exercises in encoding<br />
and decoding.<br />
III/07<br />
ericpol.com
Knowledge Evolution<br />
Applications Development Training Courses<br />
UML Modelling<br />
Course ID: EPOL-06:001<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
This course aims to introduce participants to the Unified Modelling Language. It shows them how<br />
to analyze customers’ needs, formalize them in UML diagrams and create a system model. The course<br />
includes:<br />
History of UML language<br />
Class diagrams<br />
Use case diagrams<br />
Sequence diagrams<br />
Communication diagrams<br />
Activity diagrams<br />
Interaction overview diagrams<br />
Object diagrams<br />
State machine diagrams<br />
Package diagrams<br />
Composite structure diagrams<br />
Component diagrams<br />
Deployment diagrams<br />
Timing diagrams<br />
Target audience<br />
This course has been created for software architects, programmers, software developers, analysts<br />
and anyone else interested in understanding how to analyse and design systems in the UML 2.1<br />
language.<br />
Prerequisites<br />
The course will be more beneficial for people familiar with the object-oriented approach.<br />
Learning method<br />
The course is predominantly presentation-based, but also includes some exercises.<br />
IV/01<br />
ericpol.com
Knowledge Evolution<br />
Perl <strong>–</strong> Workshop<br />
Course ID: EPOL-07:025<br />
Duration: 3 days<br />
Number of participants: recommended minimum 4, maximum 6<br />
Course objectives<br />
This course aims to introduce participants to the <strong>Practical</strong> Extraction and Report Language.<br />
The training includes:<br />
Programming basics<br />
Control structures, loops and decisions<br />
Subroutines<br />
Object-Oriented Programming<br />
Target audience<br />
This training course has been designed for software engineers who need to use the Perl language<br />
for scripting and web development.<br />
Prerequisites<br />
The course will be most beneficial for people familiar with any high-level programming language (Python,<br />
Java, C++), although it has been designed to be approachable for people with basic knowledge of programming<br />
in any structural language (ANSI C, Pascal).<br />
Learning method<br />
The course is based on theoretical lessons interlaced with practical exercises carried out<br />
by participants.<br />
IV/02<br />
ericpol.com
Knowledge Evolution<br />
Python <strong>–</strong> Workshop<br />
Course ID: EPOL-08:002<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, maximum 6<br />
Course objectives<br />
This course aims to introduce participants to the Python language. The presentation includes:<br />
Syntax and variables in the Python language<br />
Control structures<br />
Functions, modules and classes<br />
I/O handling<br />
Brief information about the standard library<br />
Target audience<br />
The training course has been designed for software engineers who need to use the Python language for<br />
scripting.<br />
Prerequisites<br />
The course would be most beneficial for people already familiar with any high-level programming<br />
language.<br />
Learning method<br />
The course is based on theoretical lessons, instructor-led presentations of tools and practical exercises<br />
carried out by participants.<br />
IV/03<br />
ericpol.com
Knowledge Evolution<br />
OCJP Tips & Tricks<br />
Course ID: EPOL-10:031<br />
Duration: 3 days<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
This course aims to introduce participants to the Oracle Certified Java Programmer (OCJP) examination.<br />
It shows how to deal with tough questions and gives some rarely referred to information on Java.<br />
The presentation includes:<br />
Exam details<br />
General tips and tricks<br />
Tips for all the exam objectives<br />
Examples of questions<br />
Target audience<br />
The training course has been designed for software engineers who want to pass the OCJP exam.<br />
Prerequisites<br />
The course will be beneficial for people with a good level of knowledge of the Java programming<br />
language. <strong>Experience</strong> in Java programming will be an advantage.<br />
Learning methotd<br />
The course is based on presentation and hands-on exercises.<br />
IV/04<br />
ericpol.com
Knowledge Evolution<br />
Java Workshop <strong>–</strong> Preparation for OCJP Exam<br />
Course ID: EPOL-10:032<br />
Duration: 3 days<br />
Number of participants: recommended minimum 4, recommended optimum 6, maximum 8<br />
Course objectives<br />
This course aims to help participants to prepare for the Oracle Certified Java Programmer examination.<br />
Its goal is to give participants the chance to work on specific features of the Java language. It concentrates<br />
on:<br />
Object oriented subjects<br />
Concurrency<br />
Collections<br />
Declarations and initialization objectives<br />
Target audience<br />
The course has been created for software developers who need to gain practical experience in Java<br />
programming, especially before taking the OCJP exam.<br />
Prerequisites<br />
The course will be more beneficial for people who already know Java and have used it at work as designer<br />
or tester.<br />
Learning method<br />
The course is in the form of a project. Participants learn by writing code which correctly solve set<br />
problems.<br />
IV/05<br />
ericpol.com
Knowledge Evolution<br />
JAIN SLEE and SIP Servlets <strong>–</strong> Workshop<br />
Course ID: EPOL-08:010<br />
Duration: 4 days<br />
Number of participants: recommended minimum 4, recommended optimum 6, maximum 8<br />
Course objectives<br />
This course aims to introduce participants to JAIN technology and the concept of SIP servlets.<br />
On completion of the course, participants will be familiar with:<br />
IMS basis<br />
SIP protocol basis<br />
SIP servlets<br />
JAIN technology<br />
JSLEE elements<br />
Differences between SIP Servlets and JSLEE<br />
Example applications can be implemented on different platforms depending on a trainees’ requirements.<br />
Target audience<br />
The course has been created for software engineers, service developers or technical managers who need<br />
to gain practical experience in SIP servlets or JAIN SLEE technologies.<br />
Prerequisites<br />
The course would be more beneficial for people who have knowledge of the basics of telecommunications<br />
technologies. Participants should be familiar with the Java language. Previous participation<br />
in the “IMS Overview” (EPOL-07:019) and “SIP Protocol” (EPOL-07:006) courses would be helpful<br />
for participants of this course to better understand the IMS/SIP environment of developed applications.<br />
Learning method<br />
The course is based on presentation and hands-on exercises.<br />
IV/06<br />
ericpol.com
Knowledge Evolution<br />
JAIN SLEE <strong>–</strong> Workshop<br />
Course ID: EPOL-10:014<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, recommended optimum 6, maximum 8<br />
Course objectives<br />
This course aims to introduce participants to JAIN technology. On completion of the course, participants<br />
will be familiar with:<br />
IMS basis<br />
JAIN technology<br />
JSLEE elements<br />
Example applications can be implemented on different platforms depending on a trainees’ requirements.<br />
Target audience<br />
The course has been created for software engineers, service developers or technical managers who need<br />
to gain practical experience in JAIN SLEE technologies.<br />
Prerequisites<br />
The course would be more beneficial for people with at least some knowledge of the basics of telecommunications<br />
technologies.<br />
Learning method<br />
The course is based on presentations and hands-on exercises.<br />
IV/07<br />
ericpol.com
Knowledge Evolution<br />
SIP Servlets <strong>–</strong> Workshop<br />
Course ID: EPOL-10:015<br />
Duration: 2 days<br />
Number of participants: recommended minimum 4, recommended optimum 6, maximum 8<br />
Course objectives<br />
This course aims to introduce participants to the concept of SIP servlets. On completion of the course,<br />
participants will be familiar with:<br />
IMS basis<br />
SIP protocol basis<br />
SIP servlets<br />
Example applications can be implemented on different platforms depending on a traineess’ requirements.<br />
Target audience<br />
The course has been created for software engineers, service developers or technical managers who need<br />
to gain practical experience in SIP servlets.<br />
Prerequisites<br />
The course would be more beneficial for people with at least some knowledge of the basics of telecommunications<br />
technologies.<br />
Learning method<br />
The course is based on presentations and hands-on exercises.<br />
IV/08<br />
ericpol.com
Knowledge Evolution<br />
Embedded Systems Software Design and Development<br />
Introduction to Embedded Systems and Software<br />
Course ID: EPOL-10:016<br />
Duration: 2 or 3 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give the participant the concepts and techniques necessary<br />
to develop software for embedded computer systems with or without a real-time operating system.<br />
This is a very practical, results-oriented course that will provide knowledge and skills that can be applied<br />
immediately.<br />
This course introduces the concepts shared by most embedded systems and their software. It also<br />
introduces the techniques used in the development of embedded multitasking application software.<br />
The course begins with the fundamental elements of embedded systems hardware and software, including<br />
their design and development. Fundamental processor and operating system concepts relevant<br />
to multi-tasking systems are introduced, with focus on the basic services provided by off the shelf<br />
real-time operating system (RTOS) kernels.<br />
The course then introduces the students to multitasking application software design, using many application<br />
examples. Design approaches are shown for soft- as well as hard- real time systems. In addition,<br />
both mathematical and empirical development and debugging tools are studied. The special facilities<br />
of the C programming language for embedded software development are surveyed. On the third day<br />
of the course, special topics are given in-depth attention <strong>–</strong> including embedded device driver development,<br />
testing and debugging of embedded software and systems. The usage of multi-core<br />
systems-on-a-chip for embedded multiprocessing is also discussed.<br />
V/01<br />
ericpol.com
Knowledge Evolution<br />
Target audience<br />
This course is intended for practicing software developers who will be transitioning into embedded<br />
systems software development. This is a course for engineers working in industry with less than a year<br />
of experience in the specifics of embedded systems development.<br />
For companies who can dedicate 4-5 days of training to its embedded systems software engineers, our<br />
course “Embedded Software Fundamentals” provides more extensive introductory training.<br />
Prerequisites<br />
Course participants are expected to be knowledgeable in the C programming language for general applications.<br />
Learning method<br />
The course is based on presentation with student work exercises.<br />
V/02<br />
ericpol.com
Knowledge Evolution<br />
Introduction to Real-Time Operating Systems<br />
Course ID: EPOL-10:017<br />
Duration: 2 or 3 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
NOTES:<br />
Can be tailored to focus on a specific Real-Time Operating System (RTOS), such as: VRTX,<br />
pSOS, VxWorks, OSEK / VDX, Nucleus, OSE, µC/OS and others<br />
Can be tailored to focus on the Transition of Applications between specific RTOSs, such as:<br />
VRTX, pSOS, VxWorks, OSEK / VDX, Nucleus, OSE, µC/OS and others<br />
Course objectives<br />
The primary goal of this course is to give the participant the skills necessary to develop software<br />
for embedded computer systems using a real-time operating system. This is a very practical, results<br />
oriented course that will provide knowledge and skills that can be applied immediately.<br />
This course introduces the principles shared by many real-time operating systems, and their use<br />
in the development of embedded multitasking application software.<br />
The course begins with the fundamental elements of real-time multitasking embedded application<br />
software design and development. Processor and operating system concepts relevant to multitasking<br />
systems are examined, with focus on pre-emptive task scheduling, intertask communication<br />
and synchronization.<br />
The course continues with a detailed survey of popular operating system kernel services, giving many<br />
application examples. Topics include timer services, dynamic memory allocation schemes, network<br />
communication programming interfaces and device driver supervisors. Multitasking code development<br />
is discussed and example programs are reviewed and debugged. <strong>Practical</strong> experience is gained during<br />
student work exercises.<br />
VxWorks and pSOS are registered trademarks of Wind River Systems, Inc. Other marks and brands are<br />
the property of their respective holders<br />
V/03 ericpol.com
Knowledge Evolution<br />
On the third day of this course, advanced topics are discussed such as operating systems and hypervisors<br />
for symmetric and asymmetric multiprocessing which are appropriate for multi-core SOCs.<br />
The faculty for this course has extensive experience with a number of major real-time operating systems<br />
(RTOSs), including VRTX, pSOS, VxWorks, OSEK / VDX, Nucleus, OSE, µC/OS and others. Instructor<br />
can provide in-depth insight into the specific workings of these RTOSs during the course, if it<br />
is of particular interest.<br />
Target audience<br />
This course is intended for practicing embedded systems software development engineers, software<br />
system architects, project managers and technical consultants who are responsible for designing<br />
and implementing the software for real-time and embedded computer systems using a real-time operating<br />
system.<br />
This is a course for engineers in industry with less than 3 years of experience with real-time operating<br />
systems. For those with more experience, we recommend the advanced course “Architectural Design<br />
of Real-Time Software”.<br />
Prerequisites<br />
Course participants are expected to be knowledgeable in the C programming language.<br />
Learning method<br />
The course is based on presentation with student work exercises.<br />
V/04<br />
ericpol.com
Knowledge Evolution<br />
Testing of Embedded Software<br />
Course ID: EPOL-10:018<br />
Duration: 2 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give the participant the skills necessary to systematically plan,<br />
develop and implement test cases for software in embedded and real-time computer systems. This is<br />
a very practical, results-oriented course that will provide knowledge and skills that can be applied immediately.<br />
This course examines the activities and methods involved in systematically testing for errors, flaws, faults<br />
and failures in embedded and real-time software as it undergoes development. The class begins with<br />
a presentation of the main concepts and principles for systematic testing of embedded systems software.<br />
General techniques are touched upon quickly, including equivalence partitioning, boundary value<br />
testing, and code coverage criteria. Emphasis is placed on uniquely embedded testing issues such as flaws<br />
in interfacing, multitasking and timing, rather than on general data processing issues.<br />
The class continues with an examination of approaches important in embedded software testing, such<br />
as input / protocol testing, state machine model testing, testing of functional pair interactions, and simulation<br />
of unexpected interactions with the world outside the embedded system. High-level testing<br />
approaches are discussed for advanced stages of system development and integration, including security<br />
testing, stress testing and independent verification and validation. Disciplined techniques and tools are<br />
presented to support these approaches.<br />
Participants are asked to do detailed exercises on many of the techniques presented, so that the concepts<br />
and methods taught are reinforced and absorbed into the participant's arsenal of testing skills.<br />
This course is not a general course about software testing, but rather it is highly focused on the testing<br />
of embedded, time-constrained, resource-constrained software. Multitasking and real-time operating<br />
system (RTOS) testing issues will be emphasized if relevant for course participants.<br />
V/05<br />
ericpol.com
Knowledge Evolution<br />
Target audience<br />
This course is intended for practicing real-time and embedded systems software testers, designers, developers<br />
and quality engineers who have responsibility for testing, planning and implementing the software<br />
for embedded and real-time computer systems.<br />
Prerequisites<br />
Course participants are expected to have some background in coding for real-time and embedded<br />
systems. It would be helpful, although it is not required, for course participants to have some familiarity<br />
with at least one RTOS. This knowledge can be gained at one of our introductory courses “Introduction<br />
to Embedded Systems and Software” or “Introduction to Real-Time Operating Systems”.<br />
Additional knowledge useful for attendees of this course can be obtained at the co-requisite advanced<br />
course “Debugging Real-Time Software”. Both courses can be combined in a 3-day format named<br />
“Embedded Software Testing and Debugging Masterclass”.<br />
Learning method<br />
The course is based on lectures, discussions, example software testing scenarios and classroom exercises.<br />
V/06 ericpol.com
Knowledge Evolution<br />
Embedded Software Fundamentals Masterclass<br />
Course ID: EPOL-10:019<br />
Duration: 4 or 5 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this Masterclass is to give the participant the concepts and skills necessary to<br />
develop software for embedded computer systems, including the use of a real-time operating<br />
system and debugging tools and techniques. This is very practical, results-oriented training that<br />
will provide knowledge and skills that can be applied immediately.<br />
This Masterclass introduces the concepts shared by most embedded systems and their software.<br />
It also introduces the techniques used in the development of embedded multitasking application<br />
software, including real-time operating systems, and debugging techniques specific to real-time<br />
and embedded software.<br />
The Masterclass begins with the fundamental elements of embedded systems hardware<br />
and software, including their design and development. Fundamental processor and operating<br />
system concepts relevant to multitasking systems are introduced, with focus on the basic services<br />
provided by off-the-shelf real-time operating system (RTOS) kernels.<br />
The Masterclass then introduces the students to multitasking application software design. Design<br />
approaches are shown for soft- and hard- real time systems. In addition, development and debugging<br />
tools are studied. The special facilities of the C programming language for embedded software<br />
development are surveyed, as well as more disciplined approaches to C language programming for<br />
use in critical systems.<br />
The Masterclass concludes with an extensive 2-day session on the “Top 50” bugs in embedded<br />
software, and tools and techniques that are used to deal with them.<br />
V/07<br />
ericpol.com
Knowledge Evolution<br />
Target audience<br />
This Masterclass is intended for practicing software developers who are transitioning into embedded<br />
systems software development.<br />
This is technical training for engineers working in industry with less than a year of experience in<br />
the specifics of embedded systems development. For those with more experience, we recommend<br />
the advanced course “Architectural Design of Real-Time Software”.<br />
Prerequisites<br />
Masterclass participants are expected to be knowledgeable in the C programming language<br />
for general applications.<br />
Learning method<br />
The course is based on presentation with student work exercises.<br />
V/08<br />
ericpol.com
Knowledge Evolution<br />
Architectural Design of Real-Time Software<br />
Course ID: EPOL-10:020<br />
Duration: 2 or 3 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give the participant the skills necessary to do high-level design<br />
of software for single-CPU real-time and embedded computer systems using a real-time operating<br />
system. This is a very practical, results-oriented course that will provide knowledge and skills that can be<br />
applied immediately.<br />
For engineers more focused on distributed and multi-core multiprocessing software design, our course<br />
“Design of Distributed and Multi-Core Systems & Software” may be of more immediate interest.<br />
This course examines the activities of high-level design of real-time and embedded systems software<br />
that's to be developed using a real-time operating system (RTOS).<br />
The class begins with a quick examination of some fundamental issues in real-time multitasking embedded<br />
application software design and development, and briefly reviews several modern techniques<br />
for real-time and embedded software requirements specification. It then quickly focuses on how to structure<br />
a software system that must execute within strict deadline and resource limits. Emphasis is placed<br />
on multitasking and timing behaviours, rather than object orientation.<br />
The class continues with a detailed examination of a broad spectrum of intertask communication<br />
and synchronization options including mutexes of several varieties. 'Liveness' issues such as deadly<br />
embrace, lockout, memory starvation and CPU starvation are discussed in detail. Students learn how<br />
to correctly configure queue lengths, and examine design dangers such as excessive interrupt latency<br />
and interrupt overflow. The next major subject area of the class is the evaluation of timing performance<br />
and quality of a real-time or embedded software design. A large variety of application examples reinforce<br />
the concepts that are learned.<br />
This course is not a general course about software design theory, but rather it is highly focused<br />
on the design of deeply-embedded, time-constrained, resource-constrained multitasking software that<br />
will run under the control of a modern RTOS.<br />
V/09<br />
ericpol.com
Knowledge Evolution<br />
Target audience<br />
This course is intended for practicing real-time and embedded systems software system architects,<br />
project managers and technical consultants who have responsibility for designing, structuring and implementing<br />
the software for real-time and embedded computer systems using an RTOS. This course focuses<br />
on design for single-CPU systems.<br />
Prerequisites<br />
Course participants are expected to have thorough familiarity with at least one RTOS. This knowledge<br />
can be gained by attending one of the prerequisite introductory courses “Introduction to Embedded<br />
Systems and Software” or “Introduction to Real-Time Operating Systems”.<br />
Learning method<br />
The course is based on lectures, discussions, design examples, exercises.<br />
V/10 ericpol.com
Knowledge Evolution<br />
Debugging Real-Time Software<br />
Course ID: EPOL-10:021<br />
Duration: 2 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give the participant the skills necessary to identify and correct<br />
defects in software for real-time computer systems developed with or without an RTOS. This is a very<br />
practical, results-oriented course that will provide knowledge and skills that can be applied immediately.<br />
This course examines the activities involved in discovering and correcting errors, flaws, faults<br />
and failures in real-time and embedded systems software.<br />
The class begins with a presentation of the main steps and guidelines for identifying and remedying<br />
situations in which real-time and embedded software is not working correctly. This is followed<br />
by a survey of the wide range of categories of bugs from which such software can suffer. The class then<br />
quickly focuses on a detailed discussion of the “top 5” kinds of bugs that can be “project killers” or “product<br />
killers”, including stack overflows, race conditions, deadlocks, timing problems, and re-entrancy<br />
conditions. Emphasis is placed on multitasking and timing behaviours, rather than on general data<br />
processing issues.<br />
The class continues with an examination of debugging tools that are helpful in real-time software development,<br />
such as low-level monitors, and high-level RTOS-aware system debuggers. 'Liveness' issues<br />
including deadly embrace, lockout, memory starvation and CPU starvation are discussed in depth.<br />
As are the particular sorts of bugs that tend to create problems in multi-tasking software when using<br />
real-time operating systems. Emphasis then focuses on the unique sorts of bugs that plague Interrupt<br />
Service Routines (ISRs), such as interrupt overflow.<br />
This course is not a general course about software debugging, but rather it is highly focused on the debugging<br />
of embedded, time-constrained, resource-constrained multitasking software that may run under<br />
the control of a modern real-time operating system (RTOS).<br />
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Knowledge Evolution<br />
Target audience<br />
This course is intended for practicing real-time and embedded systems software designers, software<br />
developers, project managers and quality engineers who have responsibility for planning, implementing<br />
and debugging the software for real-time and embedded computer systems.<br />
Prerequisites<br />
Course participants are expected to have practical knowledge of coding for real-time and embedded<br />
systems, plus some familiarity with at least one RTOS. This knowledge can also be gained by attending<br />
one of our prerequisite introductory courses “Introduction to Embedded Systems and Software” or<br />
“Introduction to Real-Time Operating Systems”.<br />
Additional knowledge useful for attendees of this course can be obtained at the prerequisite foundation<br />
course “Testing of Embedded Software”. Both courses can be combined in a 3-day format named<br />
“Embedded Software Testing and Debugging Masterclass”.<br />
Learning method<br />
The course is based on lectures, discussions, example debugging scenarios, classroom exercises.<br />
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Knowledge Evolution<br />
Design of Distributed and Multi-Core Systems &<br />
Software<br />
Course ID: EPOL-10:022<br />
Duration: 2 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give the participant the skills necessary to design software for<br />
real-time and embedded multiprocessing systems that will operate in distributed and/or multi-core<br />
processing configurations. This is a very practical, results-oriented course that will provide knowledge<br />
and skills that can be applied immediately.<br />
This course examines the high-level design of embedded systems and software for distributed and multicore<br />
processing environments.<br />
It begins with a discussion of the basic concepts of distributed systems and multi-core systems on a chip<br />
(SoC's). This is followed by an in-depth study of distributed control systems design, including examples<br />
from automotive applications and home automation. Guidelines are given for the design of large<br />
and complex distributed systems, with examples from the worlds of transportation and highperformance<br />
communication systems. The course then shifts focus to the use of multi-core SoC's<br />
in embedded systems designs. This includes detailed study of both symmetric and asymmetric multiprocessing<br />
<strong>–</strong> from the perspectives of hardware, software and operating systems support. It delves deeply<br />
into operating systems for multi-core SoC's, multi-core software architectural design, and special<br />
memory issues in multi-core software.<br />
This course is far from a general course about system or software design theory, but rather it is highly<br />
focused on the practical design of multi-processor embedded systems and software that will operate<br />
in distributed and multi-core processing configurations.<br />
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Knowledge Evolution<br />
Target audience<br />
This course is intended for practicing real-time and embedded systems software system architects, project<br />
managers and technical consultants who will have responsibility for designing, structuring and implementing<br />
the software for real-time and embedded multiprocessing systems that will operate in distributed<br />
and/or multi-core processing configurations.<br />
Prerequisites<br />
Course participants are expected to have background in embedded and real-time software design for<br />
single-CPU systems. This knowledge can be gained by attending a prerequisite embedded software design<br />
course such as “Architectural Design of Real-Time Software”.<br />
Learning method<br />
The course is based on lectures, discussions, design examples, exercises.<br />
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Knowledge Evolution<br />
Design of High Availability Systems & Software<br />
Course ID: EPOL-10:023<br />
Duration: 2 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give participants the skills necessary to design software for real time<br />
and embedded computer systems that must relentlessly provide service despite the occurrence<br />
of internal and external faults. This is a very practical, results-oriented course that will provide knowledge<br />
and skills that can be applied immediately.<br />
This course examines the high-level design of embedded systems and software that are to provide their<br />
services at near-continuous availability.<br />
High availability systems must tolerate both expected and unexpected faults. Their design is based<br />
on redundant hardware and software combined in ways that will achieve “five-nines” (99.999%) or greater<br />
availability, equivalent to less than 1 second of downtime per day. Basic hardware N-plexing and voting<br />
issues are discussed, followed by an in-depth study of a number of backward error recovery fault tolerance<br />
techniques including static N-version programming, Checkpoint-Rollback, Process Pairs, and Recovery<br />
Blocks. The class continues with several forward error recovery techniques. Technical issues such<br />
as failover management, data replication, and software design defects, are addressed in depth. Many<br />
real-world examples are presented.<br />
This course is far from a general course about system or software design theory, but rather it is highly<br />
focused on the design of embedded systems and software that must make their services available<br />
at all times, with less than 5 minutes per year of downtime.<br />
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Knowledge Evolution<br />
Target audience<br />
This course is intended for practicing real-time and embedded systems software system architects,<br />
project managers and technical consultants who have responsibility for designing, structuring and implementing<br />
the software for real-time and embedded computer systems that are required to continue providing<br />
service despite the occurrence of internal and external faults.<br />
Prerequisites<br />
Course participants are expected to be familiar with general embedded and real-time software design.<br />
This knowledge can be gained by attending a prerequisite embedded software design course such<br />
as “Architectural Design of Real-Time Software”.<br />
Many (but not all) high-availability systems are also safety-critical systems - which can threaten human<br />
safety or even human life in situations where the system fails and remains unavailable for significant<br />
periods of time. For those high-availability systems that also have safety-critical requirements, we recommend<br />
that the course “Design of Safety-Critical Systems and Software” should be taken at the same time<br />
as this course. The two courses have little overlap in content, and offer complimentary approaches<br />
and perspectives. It is possible to combine these two courses into a unified three- or four-day course<br />
for presentation at customer sites, under the name “Safety Critical and High Availability Systems<br />
Masterclass”.<br />
Learning method<br />
The course is based on lectures, discussions, design examples, exercises.<br />
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Knowledge Evolution<br />
Design of Safety-Critical Systems & Software<br />
Course ID: EPOL-10:024<br />
Duration: 2 or 3 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give the participant the skills necessary to design software for<br />
real-time and embedded computer systems in which faults and failures could pose a danger to human<br />
life. This is a very practical, results-oriented course that will provide knowledge and skills that can be<br />
applied immediately.<br />
This course examines the design of embedded systems and software that are to provide services in applications<br />
that could, when they fail, threaten the well-being or life of people. It offers practical guidance on<br />
how to address safety concerns when designing safety critical software in fields such as medical, automotive,<br />
avionics, nuclear and chemical process control.<br />
The course surveys concepts and alternatives for software and system architectures appropriate for<br />
safety-critical systems. Following an examination of hazard and risk analysis techniques, it goes on to list<br />
a number of approaches to software safety that span fault avoidance, fault detection, and fault containment<br />
tactics including redundancy, recovery, masking and barriers. A variety of candidate architectural<br />
design patterns are examined, including dual/triple modular redundancy, dissimilar independent<br />
designs, backup parallel patterns and active/monitor parallel patterns. Many real-world examples are<br />
presented. Software design approaches are discussed for run-time Built-In Self Test (BIST) of processor<br />
and peripheral hardware.<br />
This course is far from a general course about system or software design theory, but rather it is tightly<br />
focused on the design of embedded systems and software that are required to provide their intended<br />
functions without endangering the safety or life of users or their environment.<br />
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Knowledge Evolution<br />
Target audience<br />
This course is intended for practicing real-time and embedded systems software system architects,<br />
project managers and technical consultants who have responsibility for designing, structuring<br />
and implementing the software for real-time and embedded computer systems in applications that<br />
could, when they fail, threaten the well-being or life of people.<br />
Prerequisites<br />
Course participants are expected to be familiar with general embedded and real-time software design.<br />
This knowledge can be gained by attending a prerequisite embedded software design course such<br />
as “Architectural Design of Real-Time Software”.<br />
Many (but not all) safety-critical systems must also be high-availability systems <strong>–</strong> with severe consequences<br />
in situations where the system fails and remains unavailable for significant periods of time. For<br />
those safety-critical systems that also have high-availability requirements, we recommend that the course<br />
“Design of High Availability Systems and Software” should be taken at the same time as this course.<br />
The two courses have little overlap in content, and offer complimentary approaches and perspectives.<br />
It is possible to combine these two courses into a unified three- or four-day course under the name<br />
of “Safety Critical and High Availability Systems Masterclass”.<br />
Learning method<br />
The course is based on lectures, discussions, design examples, exercises.<br />
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Knowledge Evolution<br />
Design of Device Drivers for Embedded Systems<br />
Course ID: EPOL-10:025<br />
Duration: 2 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to provide the participant with the knowledge and skills needed to<br />
design and develop device drivers for use with custom application specific hardware. This is a very practical,<br />
results-oriented course that will provide knowledge and skills that can be applied immediately.<br />
This course covers the concepts and principles shared by device drivers in a wide variety of environments.<br />
It deals with issues important to engineers who need to structure and write drivers for input, output<br />
and network interfacing hardware devices. Rather than focusing on the device driver requirements for<br />
a specific real-time operating system (RTOS), this course examines features and design similarities that<br />
are shared by device drivers in a variety of environments including those without an RTOS.<br />
The course begins with a presentation of the basic structure of device drivers and device I/O supervisors.<br />
This is followed by an in-depth discussion of fundamental issues in the design of device driver software<br />
or firmware, such as mutual exclusion, and synchronous vs. asynchronous execution. High-level design<br />
of device drivers is presented with emphasis on tailoring the structure of the driver to the characteristics<br />
of specific hardware devices and the nature of the data they carry. Interrupts, exception handling<br />
and DMA are discussed in detail.<br />
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Knowledge Evolution<br />
Target audience<br />
This course is intended for real-time software development engineers, software system architects, project<br />
managers, and technical consultants who have the responsibility for designing and implementing device<br />
driver software for real-time and embedded systems running on custom hardware containing<br />
application-specific I/O and network interfaces. While the class will be most useful for engineers who<br />
need to design and code device drivers, it will also be very helpful for application software engineers who<br />
want to have a better understanding of underlying firmware and how it relates to their application<br />
software.<br />
Prerequisites<br />
Course participants are expected to have a thorough familiarity with the C programming language<br />
and some software-hardware interface programming experience. Knowledge of at least one real-time<br />
operating system (RTOS) kernel is recommended. This knowledge can also be gained by attending one<br />
of the prerequisite introductory courses “Introduction to Embedded Systems and Software” or “Introduction<br />
to Real-Time Operating Systems”.<br />
Learning method<br />
The course is based on lectures, discussions, design examples, exercises.<br />
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Knowledge Evolution<br />
Safety Critical & High Availability Systems Masterclass<br />
Course ID: EPOL-10:026<br />
Duration: 3 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this Masterclass is to give the participant the skills necessary to design systems<br />
and software for real-time and embedded computers in which faults and failures could pose a danger to<br />
human life. As part of this, participants gain skills in designing systems for high availability. This is very<br />
practical, results-oriented training that provides knowledge and skills that can be applied immediately.<br />
This Masterclass examines the design of embedded systems and software that are to provide services<br />
in applications that could, when they fail, threaten the well-being or safety of people. Many, though not<br />
all, of these systems must not be stopped under any circumstances, and thus must be designed for high<br />
availability. <strong>Practical</strong> guidance is offered on how to address these concerns when designing systems<br />
in fields such as medical, automotive, avionics, nuclear and chemical process control.<br />
The Masterclass surveys concepts and alternatives for system and software architectures appropriate for<br />
safety-critical and high availability systems. Following an examination of hazard and risk analysis<br />
techniques, the seminar goes on to list a number of approaches to software safety that span fault avoidance,<br />
fault detection, and fault containment tactics including redundancy, recovery, masking<br />
and barriers. A variety of candidate architectural design patterns are examined, including dual/triple<br />
modular redundancy, shutdown monitors, dissimilar independent designs, backup parallel patterns<br />
and active/monitor parallel patterns. Many real-world examples are presented.<br />
Systems which are required to provide high availability must be designed to tolerate faults. Their design<br />
is usually based on off-the-shelf hardware and software combined in ways that will achieve “five-nines”<br />
(99.999%) or greater availability. Basic hardware N-plexing and voting issues are discussed, followed<br />
by an in-depth study of a number of backward error recovery fault tolerance techniques including<br />
Checkpoint-Rollback, Process Pairs, and Recovery Blocks. The class continues with several forward error<br />
recovery techniques. Software design approaches are discussed for run-time Built-In Self Test (BIST) of<br />
processor and peripheral hardware. Technical issues such as failover management, data replication,<br />
and software design defects, are addressed in depth.<br />
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Knowledge Evolution<br />
This Masterclass is far from a general course about system or software design theory, but rather<br />
it is tightly focused on the design of embedded systems and software that are required to provide their<br />
intended functions without endangering the safety or life of users or their environment, while<br />
at the same time maintaining high availability if required.<br />
Target audience<br />
This Masterclass is intended for practicing real-time and embedded systems engineers, software system<br />
architects, project managers and technical consultants who have responsibility for designing, structuring<br />
and implementing the hardware and software for real-time and embedded computer systems in applications<br />
that could, when they fail, threaten the well-being or life of people. Many of these systems have high<br />
availability as an additional design requirement.<br />
Prerequisites<br />
Course participants are expected to be familiar with general embedded and real-time software design.<br />
This knowledge can be gained by attending a prerequisite embedded software design course such<br />
as “Architectural Design of Real-Time Software”.<br />
Learning method<br />
The course is based on lectures, discussions, design examples, exercises.<br />
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Knowledge Evolution<br />
Embedded Software Testing and Debugging Masterclass<br />
Course ID: EPOL-10:027<br />
Duration: 3 or 4 days<br />
Number of participants: recommended optimum 15, maximum 25<br />
Course objectives<br />
The primary goal of this course is to give the participant the skills necessary to systematically identify<br />
and correct defects in software for real-time computer systems developed with or without an RTOS. This is<br />
a very practical, results-oriented course that will provide knowledge and skills that can be applied immediately.<br />
This Masterclass examines the activities involved in testing and debugging errors, flaws, faults and failures<br />
in real-time and embedded systems software.<br />
Testing and debugging are two distinct activities with the shared goal of extracting defects from software<br />
and systems. Testing uses systematic, engineering-style methods, while debugging uses investigative,<br />
research-style methods.<br />
The class begins with a presentation of the main concepts and principles for systematic testing of embedded<br />
systems software. Emphasis is placed on uniquely embedded issues such as flaws in interfacing, multitasking<br />
and timing, rather than on general data processing issues.<br />
The class continues with an examination of approaches important in embedded software testing. Highlevel<br />
testing approaches are discussed for advanced stages of system development and integration, including<br />
security testing, stress testing and independent verification and validation. Techniques and tools are<br />
presented to support these approaches.<br />
The debugging portion of the course starts with a survey of the wide range of categories of bugs from which<br />
embedded and real-time software can suffer. It then focuses on a detailed discussion of the “top 5” kinds of<br />
bugs that can be “project killers” or “product killers”, including stack overflows, race conditions, deadlocks,<br />
timing problems, and re-entrancy conditions. Emphasis is placed on multitasking and timing behaviours.<br />
The class continues with an examination of debugging tools that are helpful in real-time software development.<br />
'Liveness' issues including deadly embrace, lockout, memory starvation and CPU starvation are<br />
discussed in depth. As are the particular sorts of bugs that tend to create problems in multi-tasking software<br />
when using real-time operating systems. Emphasis then focuses on the unique sorts of bugs that plague<br />
Interrupt Service Routines (ISRs), such as interrupt overflow.<br />
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Knowledge Evolution<br />
Participants are asked to do detailed exercises on many of the techniques presented, so that the concepts<br />
and methods taught are reinforced and absorbed into the participant's arsenal of testing and debugging<br />
skills.<br />
This course is not a general course about software testing and debugging, but rather it is highly focused on<br />
the testing and debugging of embedded, time-constrained, resource-constrained multitasking software that<br />
may run under the control of a modern real-time operating system (RTOS).<br />
Target audience<br />
This course is intended for practicing real-time and embedded systems software designers, software<br />
developers, project managers, testers and quality engineers who have responsibility for planning, implementing,<br />
testing and debugging the software for real-time and embedded computer systems.<br />
Prerequisites<br />
Course participants are expected to have practical knowledge of coding for real-time and embedded<br />
systems, plus some familiarity with at least one RTOS. This knowledge can also be gained by attending<br />
one of our prerequisite introductory courses “Introduction to Embedded Systems and Software” or<br />
“Introduction to Real-Time Operating Systems”.<br />
Additional knowledge useful for attendees of this course can be obtained at the co-requisite advanced<br />
Course “Architectural Design of Real-Time Software”. For on-site presentation, both courses can be<br />
combined in a 4- or 5-day format.<br />
Learning method<br />
The course is based on lectures, discussions, design examples, exercises.<br />
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Knowledge Evolution<br />
C++ Wizardry for Embedded<br />
Course Code: EPOL-10:042<br />
Duration: 2 days<br />
Number of Participants: recommended optimum 15, maximum 25 participants<br />
Course objectives<br />
The primary goal of this course is to give the participant a better understanding of C++ constructs,<br />
and when it is and is not appropriate to use those constructs. The course will arm participants with<br />
a new set of C++ programming techniques to enhance the quality, reliability, maintainability, performance<br />
and ease of coding of their software projects. These programming techniques are also useful<br />
as a baseline and “food for thought” for participants to build upon to formulate their own techniques<br />
to improve their software projects.<br />
This course examines and demonstrates the applicability and advantages of C++ to the embedded developer.<br />
Using numerous tested and proven programming techniques, solutions are demonstrated for<br />
avoiding common problem areas in software design relating to quality, reliability, maintainability<br />
and performance using C++ language facilities. Techniques are shown to reduce source code size<br />
and eliminate common manual programming tasks - all leading to more maintainable software with<br />
significantly lower bug counts, faster development times and shorter debug cycles.<br />
Examples of high consequence real world embedded software failures are examined. Strategies are then<br />
presented for how those problems could have been avoided using advanced C++ programming<br />
techniques. Particular attention is paid to issues of memory and resource management which can lead<br />
to intermittent, difficult to detect and hard to find and fix classes of bugs. In addition, performance<br />
implications of advanced C++ constructs, decoupling/maintainability, test driven<br />
development/defensive programming and interface-hidden performance enhancement techniques are<br />
covered in great detail.<br />
This course is not intended as an introduction to C++ and its features. Rather it is focused on advanced<br />
techniques and patterns that make ingenious use of C++ features to increase maintainability and quality<br />
without degradation of performance.<br />
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Target audience<br />
This course is intended for engineers and consultants in the embedded field with intermediate<br />
to advanced C++ experience wishing to improve the quality, reliability, maintainability and performance<br />
of their software projects. Also, technically oriented managers and architects who wish to gain an understanding<br />
of why and how choosing C++ can benefit their new or existing projects.<br />
Prerequisities<br />
Course participants are expected to be familiar with C++ and related topics such as object oriented<br />
programming and templates.<br />
Training Methods<br />
The course is based on lectures, discussions, example C++ problem-solving scenarios, classroom<br />
exercises.<br />
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Knowledge Evolution<br />
New Ways of Working<br />
Work with Agile Software Development <strong>–</strong> Scrum<br />
Course ID: EPOL <strong>–</strong> 10:001<br />
Duration: 5 or 6 hours<br />
Number of participants: recommended minimum 4, maximum 12<br />
Course objectives<br />
During this course, participants will receive a solid grounding in Scrum and its core principles. They will<br />
learn how to apply Scrum techniques and tools in teams and how to benefit from them. After completing<br />
the course participants will be familiar with:<br />
Agile manifesto<br />
Scrum roles<br />
Scrum meetings<br />
Project flow<br />
Tools used in Scrum projects<br />
Optional module: a 60 minute Scrum which simulates a three-day sprint from start to finish will give<br />
participants the opportunity to check how the Scrum methodology works in practice.<br />
Target audience<br />
This course has been created for IT professionals who are interested in implementing Scrum methodology<br />
in software development. It is suitable both for engineers, project leaders and managers.<br />
Prerequisites<br />
There are no prerequisites for this course.<br />
Learning method<br />
The course is based on theoretical presentation. Participants will also learn through interactive<br />
and team-based exercises, and will be challenged to discuss and solve the most common Scrum<br />
problems.<br />
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Knowledge Evolution<br />
Scrum Simulation<br />
Course ID: EPOL <strong>–</strong> 10:002<br />
Duration: 2 days<br />
Number of participants: recommended minimum 6, maximum 12<br />
Course objectives<br />
During the Scrum Simulation course your employees will have a chance to work in a mini project lead<br />
with Scrum. They will have to prepare a product during three sprints fulfilling the Product Owner’s<br />
needs. During the course participants will:<br />
Take part in all the Scrum meetings<br />
Cope with the continuous change of requirements<br />
Learn how to define and share the tasks<br />
Meet with different project problems<br />
Learn the differences between the first, the middle and the last sprint<br />
See how money issues are handled in Scrum methodology<br />
Work out good practices in Scrum projects<br />
Target audience<br />
The course has been created for IT professionals who are interested in implementing Scrum methodology<br />
in software development. It is suitable both for engineers, project leaders and managers.<br />
Prerequisites<br />
Participants have to be familiar with Scrum methodology. We recommend taking part in Agile Software<br />
Development with Scrum (EPOL/BDTR/DES:10-001).<br />
Learning method<br />
Participants build up Scrum skills on a mini project using Lego Blocks. They are supported by the team<br />
of experienced trainers <strong>–</strong> one in a role of a team coach, the other in a role of Product Owner.<br />
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Close to Customer<br />
Location<br />
Ericpol offices are located in six cities in<br />
four European countries.<br />
Linkoping, SWEDEN<br />
Lodz, POLAND<br />
Krakow, POLAND<br />
Lviv, UKRAINE<br />
Brest, BELARUS<br />
Warsaw, POLAND<br />
ericpol.com
Head Office<br />
Ericpol Telecom Sp. z o.o.<br />
Targowa 9A<br />
90 042 Lodz, Poland<br />
tel: +48 42 6642500<br />
fax: +48 42 6642555<br />
Krakow office<br />
Bobrzynskiego 12<br />
30 348 Krakow, Poland<br />
tel: +48 12 2954600<br />
fax: +48 12 2954666<br />
Warsaw office<br />
Chalubinskiego 8<br />
00 613 Warszawa, Poland<br />
tel: +48 22 6243561<br />
fax: +48 22 6243561<br />
Ericpol - Sweden<br />
Ericpol AB<br />
Datalinjen 4<br />
583 30 Linkoping, Sweden<br />
tel: +46 13 212141<br />
fax: +46 13 212151<br />
Ericpol - Ukraine<br />
Ericpol TZOV<br />
Sholom Aleykhem 11<br />
79 007 Lviv, Ukraine<br />
tel: +38 032 2424421<br />
fax: +38 032 2424423<br />
Ericpol - Belarus<br />
IOOO Ericpol Brest<br />
63 Dzerzhynskogo Str.<br />
22 4030 Brest<br />
tel: +375 162 204697<br />
fax: +375 162 205457<br />
office@ericpol.com<br />
ericpol.com<br />
Ericpol Training Centre<br />
tel. +48 42 6642500<br />
fax: +48 42 6642555<br />
training@ericpol.com<br />
training.ericpol.com<br />
EPOL/DOTR/INF-08:006 Uen<br />
This document is non-binding offer.<br />
Copyright 2011 by Ericpol Telecom Sp. z o.o.