Advanced Metal Shader Optimization

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Latency/Occupancy GPUs hide latency with large-scale multithreading When waiting for something to finish (e.g. a texture read) they run another thread
Latency/Occupancy The more latency, the more threads you need to hide it The more registers you use, the fewer threads you have • The number of threads you can have is called the ‘occupancy’ • Threadgroup memory usage can also bound the occupancy ‘Latency-limited’: too few threads to hide latency of a shader Measure occupancy in <strong>Metal</strong> compute shaders using MTLComputePipelineState maxTotalThreadsPerThreadgroup()
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Graphics and Games #WWDC16 Advanced
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Metal at WWDC This Year A look at t
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Optimizing Shaders An overview Ther
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Metal Pipeline Buffer Buffer Textur
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Shader Performance Fundamentals
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Address Spaces Comparison GPUs have
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Address Spaces Constant memory Read
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Address Spaces Example: vertex data
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Address Spaces Example: projection
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Address Spaces Example: skinning ma
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Address Spaces Example: per-instanc
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Buffer Preloading Buffer loads can
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Constant Buffer Preloading Direct l
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Constant Buffer Preloading Use cons
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Constant Buffer Preloading A practi
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Vertex Buffer Preloading Fixed-func
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Fragment Function Resource Writes N
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Compute Kernel Organization Per-thr
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kernel void sobel_1_1(/* ... */ ush
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Page 53 and 54: continue to pixel 2... dstCoord.x++
Page 55 and 56: continue to pixel 2... dstCoord.x++
Page 57 and 58: Compute Kernel Organization NEW Con
Page 59 and 60: Shader Performance Fundamentals Con
Page 65 and 66: GPU Architecture Focus on the bottl
Page 67 and 68: Optimization Opportunities Data typ
Page 69 and 70: Data Types Using half and short ari
Page 77 and 78: Arithmetic Built-ins Use built-ins
Page 79 and 80: Arithmetic A8 and later GPUs are sc
Page 81 and 82: Arithmetic ILP (Instruction Level P
Page 83 and 84: Arithmetic A8 and later GPUs have v
Page 85 and 86: Arithmetic A8 and later GPUs have v
Page 87 and 88: Arithmetic Integer divisions Avoid
Page 89 and 90: Arithmetic Fast-math If you absolut
Page 91 and 92: Control Flow Control flow uniform a
Page 93 and 94: Memory Access Stack access Avoid dy
Page 95 and 96: Memory Access Stack access Avoid dy
Page 97 and 98: Memory Access Loads and stores One
Page 99 and 100: Memory Access Loads and stores One
Page 101 and 102: Memory Access Loads and stores Use
Page 103: Memory Access Loads and stores Use
Page 107 and 108: Memory Access Latency-hiding: False
Page 109 and 110: Memory Access Latency-hiding: False
Page 111 and 112: Summary Pick correct address spaces
Page 113 and 114: Summary Pick correct address spaces
Page 115 and 116: More Information https://developer.
Page 117: Labs Xcode Open Hours Metal Lab Xco
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Advanced Metal Shader Optimization

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