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8<br />
(a)<br />
CSTM(τB)<br />
(b)<br />
CPC(τB)<br />
1<br />
0.8<br />
0.6<br />
0.4<br />
0.2<br />
LR<br />
V=1<br />
V=2<br />
V=5<br />
V=10<br />
V=25<br />
V=50<br />
0<br />
0 10 20 30 40 50<br />
1<br />
0.8<br />
0.6<br />
0.4<br />
0.2<br />
delay τB<br />
0<br />
1 2 3 4 5 6 7 8 9 10<br />
delay τB<br />
LR<br />
VV=1<br />
VV=2<br />
VV=5<br />
VV=10<br />
VV=25<br />
VV=50<br />
V: # of virtual nodes<br />
V: # of virtual nodes<br />
50<br />
45<br />
40<br />
35<br />
30<br />
25<br />
20<br />
15<br />
10<br />
5<br />
50<br />
45<br />
40<br />
35<br />
30<br />
25<br />
20<br />
15<br />
10<br />
5<br />
20<br />
15 10<br />
CSTM<br />
22<br />
20<br />
18<br />
16<br />
14<br />
12<br />
10<br />
8<br />
6<br />
4<br />
2<br />
0<br />
1 10<br />
τΔ<br />
100<br />
CPC<br />
7<br />
2<br />
1<br />
3<br />
4<br />
1 10 100<br />
τΔ<br />
5<br />
5<br />
6<br />
6<br />
5<br />
4<br />
3<br />
2<br />
1<br />
0<br />
CPC CSTM<br />
30<br />
25<br />
20<br />
15<br />
10<br />
5<br />
0<br />
4<br />
3.5<br />
3<br />
2.5<br />
2<br />
1.5<br />
1<br />
0.5<br />
0<br />
J/Δ=1.0 J=1.0xx<br />
J/Δ=0.5 J=0.5xx<br />
J/Δ=0.2 J=0.2xx<br />
J/Δ J/Δ=0.1<br />
J/Δ=0.05<br />
J=0.1xx<br />
J/Δ J=0.05xx<br />
J/Δ=1.0 J=1.0xx<br />
J/Δ=0.5 J=0.5xx<br />
J/Δ=0.2 J=0.2xx<br />
J/Δ=0.1 J=0.1xx<br />
J/Δ<br />
J/Δ=0.05<br />
J=0.05xx<br />
1 10 100<br />
τΔ<br />
1 10 100<br />
τΔ<br />
FIG. 5. Performance analyses of the 5-qubit QRs. (a) (left) STM curve C STM(τ B) plotted as a function of the delay τ B for<br />
J/∆ = 2h/∆ = 1, τ∆ = 1 and V = 1–50. (middle) STM capacity C STM plotted as a function of the number of virtual<br />
nodes V with the same QR settings for τ∆ = 0.5–128. (right) STM capacity C STM plotted as a function of τ∆ with couplings<br />
J/∆ = 0.05–1.0 and h/∆ = 0.5. (b) PC curve C PC(τ B) and capacity C PC plotted with the same settings as (a). The error bars<br />
in the left and right panels indicate the standard deviations of the capacities evaluated on 20 samples of the QRs with respect<br />
to the random couplings.<br />
binary input sequence (see e.g., Refs. [34, 54]), which<br />
we name the short-term memory (STM) task and parity<br />
check (PC) task. The former task is intended to emulate<br />
a function that outputs a version of the input stream<br />
delayed by τ B timesteps, whereas the latter is intended<br />
to emulate an τ B -bit parity checker. Both tasks require<br />
memory to be emulated, and the PC task requires nonlinearity<br />
in addition, because the parity checker function<br />
performs nonlinear mapping. Hence, the STM task can<br />
evaluate the memory capacity of systems and the PC<br />
task can additionally evaluate the amount of nonlinearity<br />
within systems.<br />
The function for the STM task can be expressed as<br />
follows:<br />
y k = s k−τB ,<br />
where s k is a binary sequence and τ B represents the delay.<br />
The function for the PC task is expressed as follows:<br />
y k = Q(<br />
Q(x) =<br />
τ B<br />
∑<br />
m=0<br />
s k−m ),<br />
{<br />
0 (x ≡ 0 (mod 2))<br />
1 (otherwise).<br />
We investigated both tasks thoroughly by applying a<br />
random input sequence for the tasks such that there<br />
is no external source to provide temporal coherence to<br />
the system. In these tasks, one trial consists of 5000<br />
timesteps. The first 1000 timesteps are discarded, the<br />
next 3000 timesteps are used for training, and the last<br />
1000 timesteps are used for system evaluation. We evaluated<br />
the system performance with the target output for<br />
each given τ B by using the measure known as τ B -delay<br />
capacity C(τ B ) expressed as<br />
C(τ B ) = cov2 (y k , ȳ k )<br />
σ 2 (y k )σ 2 (ȳ k ) .<br />
In the main text, τ B -delay capacities for the STM task<br />
and the PC task are termed τ B -delay STM capacity<br />
C ST M (τ B ) and τ B -delay PC capacity C P C (τ B ), respectively.<br />
Note that, in the analyses, to reduce a bias due<br />
to the effect of the finite data length, we have subtracted<br />
C(τB<br />
max)<br />
from C(τ B), where τB<br />
max is a substantially long<br />
delay. The capacity C is defined as<br />
C =<br />
τB∑<br />
max<br />
τ B =0<br />
C(τ B ),<br />
where τB<br />
max was 500 throughout our experiments. The<br />
capacities for the STM task and the PC task are referred<br />
to as the STM capacity C ST M and the PC capacity C P C ,<br />
respectively. For each task, 20 samples of the QRs were<br />
randomly generated, and the average values of the τ B -<br />
delay capacities and the capacities were obtained.<br />
In Fig. 5 (a) (left), C STM (τ B ) is plotted as a function<br />
of τ B for V = 1, ..., 50, where τ∆ = 1 and J/∆ = 1.0 are