Semiconductor Devices Modelling and Technology-ilovepdf-compressed (1)

emiconductor
Ill
. .
ev1ces
Modelling and Technology
N andita DasGupta
Amitava DasGupta

SEMICONDUCTOR DEVICES
Modelling and Technology
NANDITA DASGUPTA
Professor
Department of Electrical Engineering
Indian Institute of Technology Madras, Chemzai
AMITAVA DASGUPTA
Professor
Department of Electrical Engineering
Indian Institute of Technology Madras, Chennai
PHI Learning [;)u1Cf3mO@ [bBwuBO@dJ
Delhi-110092
2013

t 295.00

To
Our Parents

Contents
xi
xiii
Y Semiconductors
1.1 Introduction 1
1.2 Energy Bands in Solids 6
1.2.1 Splitting of Discrete Energy Levels into Bands 6
1.2.2 Metals, Semiconductors, and Insulators 8
1.2.3 Direct and Indirect Semiconductors 9
1.2.4 Charge Carriers in Semiconductors-Electrons and Holes IO
1.2.5 Intrinsic and Extrinsic Semiconductors 12
1.3 Electron and Hole Densities in Equilibrium 13
1.3.1 Distribution of Quantum States in the Energy Band 13
1.3.2 Fermi-Dirac Statistics 14
1.3.3 Electron Concentration in the Conduction Band 17
1.3.4 Hole Concentration in the Valence Band 18
1.3.5 Carrier Concentration in Intrinsic Semiconductor 19
1.3.6 Position of Fermi Level in Extrinsic Semiconductors 21
1.3.7 Ionization of Impurities 22
1.3.8 Equilibrium Electron and Hole Concentration 26
1.3.9 Fermi Level at Thermal Equilibrium 29
1.3. l O Vacuum Level, Work Function, and Electron Affinity 29
1.4 Excess carriers-Non-equilibrium Situation 30
1.4.l Quasi-Fermi Level or IMREF 31
1.4.2 Generation and Recombination of Carriers and the Concept of
Lifetime 32
1.4.3 Indirect Recombination 36
1.4.4 Surface Recombination 36
v
1-44

vi
Contents
1.5 Mobility of Carriers 37
1.5.1 Effect of Electric Field on Carrier Movement 37
1.5.2 Effect of Temperature and Doping on Carrier Mobihty 39
1.5.3 Effect of High Electric Field on Mobility
1.6 And Finally a "Wish List" 41
Problems 42
References and Suggested Further Reading 44
2 Integrated Circuits Fabrication Technology
2.1 Crystal Growth 45
2.2 Doping and Impurities 47
2.2.1 Epitaxy 47
2.2.2 Diffusion 49
2.2.3 Ion Implantation 51
2_ 3 Growth and Deposition of Dielectric Films 54
2.3.1 Thermal Oxidation of Silicon 54
2.3.2 Deposition of Dielectric Films 55
2.4 Masking and Photolithography 56
2.5 Metallization 57
2.6 Technological Advantages of Silicon 58
Problems 59
References and Suggested Further Reading 60
3 Charge Transport in Semiconductors
3.1 Drift Current 61
3.2 Hall Effect 64
3.3 Diffusion Current 65
3.4 Current Density Equations 67
3.5 Einstein's Relation Connecting µ and D 67 }J· -:- D
1 1
3.6 Continuity Equation 69
3. 7 A Typical Example Leading to an Expression for Diffusion Length
Problems 74
References and Suggested Further Reading 75
4 p-n Junctions
4.1 p-n Junction Under Thermal EquiJibrium 76
4.1.1 Built-in Potential 78
4.1.2 Concept of Space Charge Layer 80
4.1.3 Distribution of Electric Field and Potential within the Space
Charge Layer for Abrupt Junctions at Zero Bias 81
4.1.4 Distribution of Electric Field and Potential within the Space
Charge Layer for Linearly Graded Junctions at Zero Bias
4.2 The p-n Junction Under Applied Bias 87
4.2.1 Depletion Layer Capacitance in an Abrupt p-n Junction 89
4.2.2 Depletion Layer Capacitance in Junctions with Arbitrary
Doping Profiles 90
41
.

4.3 Static Current-Voltage Characteristics of p-n Junctions 92
4.3. l
Current-Voltage Relationship in an Infinitely Long Diode 92
4.3.2 Quasi-Fermi LeveJs Under Bias Condition 98
4.3.3 Current-Voltage Relation in Practical Diodes Having Finite Length 98
4.3.4 Ideality Factor of a p-n Junction Diode 104
4.4 Transient Analysis 104
4.4.1 Time Variation of Stored Charoe 105
4.4.2 Reverse Recovery of a Diode 107
4.4.3 Charge Storage CapacitaiF1ce 109
4.5 Breakdown Mechanisms 111
4.5.l Zener Breakdown 112
4.5.2 Avalanche Breakdown· 11 J
4.6 Fabrication of Discrete Planar p-n .'Junction Diodes 116
Problems 117
References and Suggested Further Reading 1 J 8
Coments vii
5 Applications of p-n Junctions
5.1 Introduction 119
5 .2 Voltage Regulator 119
5.3 Variable Capacitor (Varactor) 120
5.4 Tunnel Diode 121
5.5
Solar Cells and Photodiodes 123
5.5.l Photovoltaic Effect 123
5.5.2 Solar Cell 126
5.5.3 Photodiode J 30
5.6 Light Emitting Diodes (LEDs) and Lasers 132
5.6. l Spontaneous and Stimulated Emission 133
5.6.2 Light Emitting Diodes 133
5.6.3 Semiconductor Laser 135
Problems J 36
References and Suggested Further Reading J 36
119-136
6 Bipolar Junction Transistors
6.1 Introduction 137
6.2 Principle of Operation 137
6.3 Current Components in a BJT 138
6.4 Approximate Expressions for Currents in Normal Active Mode of Operation
6.s Basic BJT Parameters 147
6.6 The Ebers-Moll Model 152
6.7 Static Output 1-V Characteristics 158
6. 7 .1 Common Base Configuration l 59
6.7.2 Common Emitter Configuration 161
6.8 Early Effect 165
6.9 Limitation on the Junction Voltage 169
6.10 Capacitances in a BJT 17 J
6.11 Switching of Bipolar Transistors 173
6.12 Process Flow for an npn Bipolar Junction Transistor in Integrated Circuit
Problems 181
References and Suggested Further Reading 182
137-182
144
178

viii
Comems
7
Advanced Topics in BJT
7 .1 Operation of the BJT at High Frequencies 183
7 .1.1 Charge Control Model 183 .
7 .1.2 Small Signal Equivalent Circuit .
187
7.1.3 Desion of Hioh Frequency Transistors 190
!::'
!::'
7.2 Second Order Effects in BJTs 191
7 .2. l Non-uniform Doping in the Base-Improve
Transit Time 191
7 .2.2 Variation of f3 with Collector Current 193
7 .2.3 Hioh Injection in Collector 195
7 .2.4 He:vy Dopino Effects in the Emitter. 196
7 .2.5 Emitter Crowding in Bipolar Transistors 198
7 .3 Nonconventional BJTs 199
7 .3. l Polysilicon Emitter Transistor 199
7 .3.2 Heterojunction Bipolar Transistors (HBT) 20l
Problems 204
References alld Suggested Fm1her Reading 205
ment in Base
8 Thyristors
8.1 Introduction 206
8.2 Operation of the Two Terminal p-n-p-n Device 206
8.2. l Forward Blocking State 207
8.2.2 Triggering and Forward Conduction of the p-n-p-n Diode 208
8.2.3 Reverse Blocking and Breakdown 209
8.3 Operation of a Thyristor 210
8.4 BidirectionaJ Switches 211
References and Suggested Further Reading 213
9 Junction Field Effect Transistor and Metal-Semiconductor
Field Effect Transistor
9. l Introduction 214
9.2 Metal-Semiconductor Junction 214
9.2.1 Energy Band Diagram of M-S Junction 214
9 .2.2 Current-Voltage Characteristics of M-S Junction 218
9.2,3 Ohmic Contacts 221
9.3 Junction Field Effect Transistor 222
9.3. l Basic JFET Structure and Principle of Operation 222
9.3.2 The 1-V Characteristics of JFETs 226
9.3.3 Small Signal Parameters of JFETs 229
9.4 The MESFETs 230
9.4.l MESFET Structure 230
9.4.2 The Heterojunction FETs 23 J
Problems 233
References and Suggested Further Readillg
233

Contents ix
11
MOSFETs
IO. l Introduction 234
l 0.2 MOS Diode 235
10.2.1 Operation of the Ideal MOS Diode 236
10.2.2 Operation of MOS Diode with 111$ * 0, Qox = 0 2 45
10.2.3 Operation of MOS Diode with ms * 0, Qox * 0 247
10.2.4 C-V Characteristics of the MOS Diode (Capacitor) 251
10.3 The MOSFET 258
10.3.1 Threshold Voltage of MOSFET 261
10.3.2 Above-threshold 1-V Characteristics of MOSFETs 264
10.3.3 Process Flow for a Self-aligned nMOSFET 272
Problems 275
References and Suggested Further Reading 276
Advanced Topics in MOSFETs
l l. l Introduction 2 77
l l.2 Effect of Gate and Drain Voltages on Carrier Mobility in the Inversion
Layer 277
11.2. l Effect of Gate Voltage on Carrier Mobility 277
11.2.2 Effect of Drain Voltage on Carrier Mobility 279
11.3 Channel Length Modulation 282
11.4 MOSFET Breakdown and Punch-through 284
11.5 Subthreshold Current 285
11.6 MOSFET Scaling 290
11.7 Nonuniform Doping in the Channel 291
11.8 Thre hold Voltage of Short-channel MOSFETs 295
11.9 Small Signal Analysis 299
11.9. l Meyer's Model 300
l l .9.2 Small Signal Equivalent Circuit of MOSFET Amplifier 303
11.10 Other MOSFET Configurations 304
l l.10.1 SOI MOSFET 305
11.10.2 Buried Channel MOSFET 307
Problems 309
References and Suggested Further Reading 309
234-276
277-310
Appendix I: Crystal Structure of Silicon 311-314
Appendix II: Properties of Some Important Semiconductors at 300 K 315
Appendix III: Properties of Some Important Dielectric Materials at 300 K 316
Appendix IV: Values of Some Physical Constants 317
Appendix V: List of Symbols 318-321
Index 323-330

Preface
We have been teach,i1t1.g courses om Semiconductor Devices to undergraduate and postgraduate
tudents for more than te11 years. Whle teaching, we have 'observed that there we many excellent
books, which discuss the physics of semiconductor devices iin detail. Om the oher hand, there are also
a number of good books which treat these deyjces simply as circuit elemelilts and discl!lss the models
comrnonl used for circuit simulation. However, since the analytical models are derived om the basic
pFinciples of the devices, engineering students should be able to correlate tble two. his book aims at
providing the students with the understanding of me basic operating principles f semiconductor
devices and at the same time illustrates how the circuit models have t)een derived om these
principles, .
Another important aspect of this book is a brief but comprehensive diseussim1 of devi:oe
fabrication technology. The performance of modem day devices depends, to a glieat extent, on
technological advances. This cannot be appreciated without an exposure to the vai:ions processing
steps alild so, it has been included in this book.
The first chapter discusses the basic properties of semiconduct@rs a;:;id intrnduces the
important parameters such as bandgap energy, mobility and lifetime of carriers which dictate the
choice of material for a particular device application. Chapter 2 outlines the fabrication steps which
have to be carried out in order to realize any device. Chapter 3 discusses the basic semicomductor
equations. Chapters 4 to 11 discuss the operating principles of

xii Preface
at this level. The w
topi in MO FET and may not. be ne ar c t
or Devices. .
.
.
cme ter cour e or two cour e m Semicond
hole book is suitable f o
k along with the
included in the boo
b f "HELP DESK'' questions ar e
tually faced these question
d bts which students have Whtie
erit detailed discussion. Al
num er o . we have ac .
The e que tion are mo tly "real'' ones, that is,
cla room. So we think that these are genuine ou
' . d therefore m
em1conductor device for the first time an
"Examples" ection throuohout provide many .
0
. worked-out n
. ters mvo ve ·
tudents a feel for the values of different parame
hocking disregard in this respect and their answers can be O
I ·
urnerical prob ems Just to
1 d I n our expenence, students
ff by .many orders o magnitu
h students have a fai r id
h . ·'des so that t e
expected value of the parameter they want to calculate.
stgraduate level
his book also cover the subject matena au 0
.
postgraduate students, the number of classes spent m 1scuss1
·
o
ct
d · 0 Chapters , , , an It
ope that these worked-out examples will act as gui
T · · I t aht at the po ·
or er to have adequate coverage for the more advance topics I
f
· topics should b
· d . no the basic e
5 7 8 d
For the Teachers
The teachers handling the course should also find this book useful, as the topics are dis
the sequence as they are taught in class. For a first course, we would suggest the fa
distribution of class hours on the topics discussed in different chapters:
Chapter 1 : 8 to 10 classes
Chapter 2 : 4 to 5 classes
Chapter 3 : 3 to 4 classes
Chapter 4 : 8 to 1 o classes
Chapter 6 : 8 to 10 classes
Chapter 9 : 4 to 6 classes
Chapter 10 : 8 to 1 o classes
NANDITA DA
AMITAVA DAS

Acknowledgements
any
people have contributed in various ways towards the preparation of this manuscript and our
c knowledg ements extend to all of them. First of all, we thank all our teachers, especially, Pro f.
.K. Achuthan, Prof. K.N. Bhat (both from IIT Madras), and Prof. S.K. Lahiri (IIT Kharagpur),
who kindled our interest in the fascinatino field of Semiconductor Devices and encouraged us to
rite this book. In fact, some of the probl;ms in this book are from question papers they set for us,
hen we were students! We also gratefully acknowledge all our students, whose questions started
ains of thought that culminated into this book. Special thanks are due to Mr. Roy Paily,
h.D. Scholar at IIT Madras, who took almost as much interest in the writing of thi1-book as the
hors themselves and help_ed in2_ hung different ways. Mr. Gajendran, Mr. Kannan, and
r. Balasundar provided useful assistance with the preparatio of the diagrams. We also thank the
epresentatives of Prentice-Hall of India, who never lost patience with us even when we were
woefully behind schedule. Acknowledgements are due to the Curriculum Development Cell of the
Centre for Continuing Education, IIT Madras for providing all the support during the preparation
of the manuscript.
And finally we would like to thank our son, Abheek, who allowed his parents to spend long
hours writing and arguing about this book while that time could have been better spent (from his
point of view) playing with him.
NANDITA DASGUPTA
AMITAVA DASGUPTA
xiii

, ;.
Semiconductors
INTRODUCTION
In terms of electrical conductivity, that is, the ability to conduct current, all materials in the world can
be classified under three categories, namely, conductors, insulators, and semiconductors. A conductor
allows current to flow through it, that is, it has high electrical conductivity. On the other hand, an
nsulator tends to block the flow of current. In between these two extremes we have the
emiconductors. Semiconductors are the materials whose conductivity can be modulated over a wide
ange. Numerically, the conductivity of a material is denoted by the symbol a (the reciprocal of
conductivity is resistivity which is denoted by the symbol p). Generally for conductors, p < 10- 3
ohm-cm while for insulators, p > 10 8 ohm-cm at room temperature :
In its pure form,b111conJ the most
widely used semiconductor exhibits a resistivity of(2.31 x 10 5 ohm-cm} at 300 K. However, by
h1troducing a very small amount of impurity (few parts per million) in silicon, it is possible to reduce
this value by several orders of magnitude. This unique property of semiconductors has fuelled intense
research in this field that has culminated in the stupendous success of semiconductor devices and
integrated circuits. In fact, it is not an exaggeration to say .that the "Electronic Revolution" of
twentieth century is largely due to the ubiquitous semiconuctor devices, which are used today in
almost all spheres of life where electronic instruments m

2 Semiconductor Device : Modellmg
'
. and Tecl111olog
f hotnogen
olid block O
R to be a s
The e}ectnc
h L a shown in
pecuve Y·
d 1 ([IA) res
===
Now let us consider the resistanc e · fig. 1. 1
. .
cros - ecti nal area A and lengt
den 1ty J can be expres ed as c8' == (VIL) an
rewritten a
J ==
-IL
RA
-----
. field (&') and the c
E (1 1)
1
eous material hav
T h erefore, q. · ca
v
I
,'
I
I
I
I
I
)-------
-----
Area= A
Figure 1.1
L
A resistance block of cross-sectional area A and length L.
. . .
f the material through the
The resistance of the block is related to the resistivit
P
·ng that the conductivity c,; i
known relati@n R = p(UA). Using this relation in Eq. (1.2) an no I
reciprocal of resistivity p, we have
0aj
The above equation is another form of Ohm s aw. e 1mpor
, 1 Th · tant difference between Eqs. (1.1).
(l.3) is that while R in Eq. (1.1) depends on the shape and size of the resistance block, P and
Eq. (1.3) are the intrinsic properties of the material.
. . . .
Now let us assume that there are N charge carriers uniformly d1str1buted m the res1s
block shown in Fig. 1.1. (A charge carrier is a charged particle which can move 1.mder
influence of an applied electric field, for example, an electron which carries negative charge. In
case of semiconductors, we also have positive charge carriers, called holes. We shall discuss,
concept of holes a little later.) Also, let us assume that the charge carriers move under the influ
of the applied electric field with a velocity v, so that the time t required for the carriers to m
from one end of the block to the other is given by t = Uv. Thus the number of carriers flo
through a side of the block of area A in time t is N. Since the flow of current is continuous, it
be easily understood that the number of charge carriers which pass through any cross-section of
block per unit time is Nit. Hence, the current (in amperes) , which is defined as the total charge
second passing through any area is given by
I= qN = qNv
where q is the charge of each carrier, for example, q = 1.6 x 10 19
d
.
ens1ty is therefore given by
t
L
- C for an electron. The c
_ I qNv
1 - A
=
L A = q nv
where n = N/(LA) is the concentration of charoe carriers ____..
O
per unit volume.

Semiconductors 3
Now comparing Eqs. ( 1.3) and ( 1.5), we see that
}t. ha b e n observed experimentally that at low electric fields, the average velocity _2f. the
_charge earners 1s proportional to the electric field, so that we may write
(1.6)
(v = µ& J
(1.7)
Here, the . roportionality constant µ is referred to as the mobility_ of the carrier, and its val e
depen on the material through which it is travelling. For example, the mobility of electrons m
pure silicon is about 1500 cm 2 /Vs, while in germanium it is about 3900 cm 2 Ns. Now substituting
Eq. (1.7) in Eq. (1.6), we have
fa= qnµl
Thu , it is seen that the conductivity of a solid material primarily depends on two factors,
namely, (1) the concentration of available carriers and (ii) the mobility of these carriers. The
concept of mobility and its dependence on various factors is discussed in detail later in this chapter.
However, t may be pointed out that the values of mobility in different materials vary only over a
few orders of magnitude while the carrier concentrations can vary by many orders of magnitude.
Thus, .
it is the value of n in Eq. (l.8) which primarily determines whether a material is a conductor,
a semiconductor, or an insulator.
Although the ongoing discussion refers to an electron as a charge carrier, it is to be noted that
all electrons are not charge carriers. We know that an element contains 6.022 x 10 23 atoms/mole
(Avogadro number). Consequently, most materials will have about 10 23 electrons per cm 3 . This is an
enormously large number, though the number of electrons actually participating in electrical
conduction is much fewer. This can be explained as follows. In a simple model of an atom, there is a
positively charged nucleus and electrons in various orbits around the nucleus. The electrons in the
outermost shell are referred to as the valence electrons while the others which are closer to the
nucleus are called core electrons. These core electrons are strongly bound by electrostatic forces to
the nucleus and cannot move under the influence of an external electric field. It is only the relatively
loosely bound valence electrons which can move and participate in current flow. However, even if we
consider only the valence electrons, the conductivity obtained using Eq. (1.8) would be extremely
arge. Also, it cannot be explained why the conductivity is so different in carbon, silicon, germanium,
and tin, which all belong to group IV in the periodic table and hence, have the same number of
valence electrons per atom.
· To understand this phenomenon, we must consider that there are no isolated atoms in a solid.
The valence electrons of respective atoms actually participate in chemical bonds which hold the
solid together. When a valence electron is engaged in a chemical bond formation, it is not mobile
and hence, cannot contribute to current flow. At very low temperatures, almost all bonds are
intact. However, with the increase in temperature, th electrons gain thermal energy, resulting in
the breaking of bonds and electrons are set free. These free electrons then become charge carriers
and conduct electricity.
There are three types of bonds in solids: ionic, covalent, and metallic. An ionic bond is
formed between an electronegative and an electropositive element, as in NaCl. These bonds are
usually very strong and difficult to break. Hence, most materials having ionic bonds are insulators
at room temperature. On the other hand in metals the bonds are formed between electropositive 1
elements. These bonds are very weak and the valence electrons move almost freely throughout th.
(1.8)

.
4 Semiconductor Device : Modelling and Technology
meta · A large number of free electrons causes h1g er con uc ivi · .
l
· h d t' · ty The covalent bond is fo
by sharing of electrons between similar atoms . This oond is of particular mterest to us s1 c
_group IV eleme nts form covalent bond. These elements have four valence . elecons which
h d · th h · 1 r· 1· A two-d1mens10nal scheni
are wi t eir four neighbours to form a stab e con 1gura t on. . .
representation of the silicon lattice with the covalent bonds is shown m Ftg . 1
.2· A covalent
can be q uite strong and hence, covalently bonded materials are general ly.
r asona l y
t on _ d ct ors at room temperature . The stren th of the covalent bond also de en s on the s ize f
1
for the larger atoms such as germanium and tin, the bonds can be broken o e eastl y ; .Hence
· J: or small atoms such as carbon, t e v ence electrons are ughtl
y ? ound, \Yltil
room temperature, the conductivit of the rou IV elements increases with mcreas m ato
!1 ber due to the increased availability of the charge carriers. In the c .
ase of the semiconduc t o
silicon and germanium, the conductivities are more than diamond (an m sula or ) and le s .
than
.
a c onductor). An interesting property of semiconductors is the increase m condutlviṭy wi
m crease in te mperature. As the temperature is raised, the electrons gain energy' resultmg m moli
bonds being broken and free carriers being generated. In the case of metals, however almost ll th
valence electrons are already free at room temperature. Hence, there is no. rthr mcrease m th·
number of charge carriers with the increase in temperature. Their conducuvity m fact reduces a
high temperatures due to a fall in mobility of the carriers.
Figure 1.2 Schematic two-dimensional representation of silicon lattice. The black dots represent valence
electrons that participate in the formation of bonds.
In addition to the semi

Semiconductors S
electric field, a neighbouring valence eleotr,on may move to occupy this hole, thus leaving behind a
hole in its origina1l position, as shown in fig. l.3(b). Hence, the hole has effectively mo ved in _ a
direction ° osite to the direction of movement of the electrn. So far as the flow of current i s
conce:ned, lite hole therefore behaves ike a positiveliy charged particle with a charge eq ual . in
magnitude to the electronic charge. We thus see that the breaking of a bond results in the creat t?
n
0, an .
! lec tron-hole pair (EHP). Since they are oppositely charged, and they move in oppos i
te
directions under the influence of an electric field the total current is the sum of the contributi illlS
of'

I
6 Semiconductor Device : Modelling an
--©' •\ --.
I ' I \ I \
/+4Y-
I
+: I,--:'• .-,
d TechnologY
1 '
-- -- I m-
I '1 I•' -,
• .-- +4
• s· _..,.
1•' .-- +4 ; • Si •_ ....
+4
- -- I \ - {:
• Si _ _. - "' - f • \ ( I
-- © •
\ • I \
I ~.-.-- -
• +4 . •--• +5 - +4 - .....
r • I I • I ( • \ Free electron --
__ , s, --W·-~~/
•
I • \ ( • \ I • \
I
- .....
'
•
-.
• SI - ,,
\-
I .- • - . +4 • • I --
l 5· •
• Si • • Si • _
• S1 - ..,. - ..,,. I
• I [ I
- -
I • - - ( • \ • I !
1
(b)
Si with phosphorus (donor)
(a)
ion of free electrons in n
-: :tor) doping.
t e Si with boron (a
t \ \ 1 '
Figure 1.4 Schematic representation of (a) genera
doping and (b) generation of holes in p- YP
se
icond ctor. If the dopnt in an extnnsic sem1c
d nor free e
. . · onductor is a O '
ti the number of electro
without simultaneous creation of holes. Consequen y,
b. n -
tyoe (n stands for
the number of holes and the semiconductor is said to e
. · ptor there WI J e
electrons). Alternately, If the dopant IS an acce '
semiconductor is said to be p-type (p stands for positively
Iectrons are created
.L
ns will be more ui1
ne atively charged
g
l tr and th
- l b more holes than e ec ons · e
. . charoed holes).
.
0
f emiconductors and some other
In this section we have discussed some of the properties O
ffi
s
.
t to describe the operation
'
materials using the chemical bond model. However, is
of a semiconductor device. A far more power u .
operation of semiconductor devices IS t e ener
th. is not su ic1en ' ' b
.11.
f l model for un ers
· · h gy band diagram, w
section. Subsequently, we shall take another look at all the concepts 1
light of the energy band diagram.
- - ,,., I • l Hole 1 .. \
--~ . .-r:+- f+ii--
·w-,~- "f:y
I
d tanding and descn mg l!l1C
d . th
hich is presente m e net
.
· · th
d. scussed in this section m e
I
1.2 ENERGY BANDS IN SOLIDS
1.2.1 Splitting of Discrete Energy Levels into Bands
The transport of charge in a solid depends not only on the properties of the charge carriers but also
on the arrangement of atoms in a solid. Solids can be single crystals, where the atoms are arranged
in a perfectl regular eriodic structure in all three dimensions called the lat ·
•
li
y 0
where t ere are man small regions of single crystal material called the rains· a
; . polycastalli
or hou
here there is no periodic structure. T e sem1con uctors that form the subject of our discussion are
single crystals. As already mentioned, single crystals consist of a space array of atoms or molecules
(or strictly speaking ions) constituted by regular repetition of a certain basic structural unit in three
dimensions. This structural unit is called the unit cell. Silicon, GaAs, and most of the othet
semiconductors have a diamond or zinc blende structure. In this structure, each atom is surrounded
by four of its nearest neighbours. Thus, the electrons in the outer orbit of one atom feel the
influence of neighbouring atoms. Hence, the discrete energy levels for a single free atom (as in a
gas where the atoms are sufficiently far apart so as not to exert any 1· fl h ) ...1i;;;
not apply to the same atom m a crystal.
. n uence on one anot er uv

Semiconductors 7
A i olated atoms are brought closer various interactions occur between neighbouri ng atom ,
The forces of attraction and repulsion btween atoms find a balance at the proper i nte ratom i
c
spacing f r the crystal. In the proces, important changes occur in the electron energy level
configurations, which are responsible for various electrical properties of solids.
ua Itatively, we can say that as atoms are brought closer to each other, the app 1ca 10 -
!f!uli ' s Excusion Principle becomes im .
When two atoms are completely isolated fr om e ach
Q r ·
1· t' n of
other (that i s , they are far apart) so that there is no interaction of electron wavefunctions, they can
hav identica l electronic structures. f1s the distance b etween atoms decreases, the wave functi
beg m to overlap . The exclusion principle dictates that no two electrons in a given interactin g_
3 stem c n . occ upy the same quantum stat Thus, the discrete energy levels of the isolat at o ms
must sp h t m to new levels belonging to the pair rather than to the individual atoms. In a so h d where
many atoms are brought close together, the split energy levels form a large number of discrete but
closely spaced energy levels called Energy B an ds.
L et us consider the imaginary structure of a diamond crystal formed by isolated carbon
atoms. Carbon has six electrons in ls 2 2s 2 2p 2 configuration. Consider a system of n equidi stant
carbon atoms. Each atom has two 1 s states, two 2s states and six 2p states. So for n carbon atoms,
there will be 2 n states of ls type (all filled), 2 n states f 2s typ; ( all filled), and 6n states of 2p
type (of which 2 n are filled and 4n empty). When the interatomic spacing is large, the energy
levels of these subshells are isolated. However, as the atoms are brought closer, these energy levels
split into bands? beginning with the outermost subshell, as shown i!!_ Fig. 1.5. As the 2s and 2p
bands grow" they first merge into a single band comprising of 811 states, of which 4n are occupied.
A the distance' between atoms approaches the equilibium interatomic spacing of diamond, this
single band splits into two bands separated by an energy gap Eg. The lower band contains 4n states
all of which are occupied at O K. The upper band also contains 4n states but they are empty at O K.
The energy gap contains no available states for the electrons to occupy and is hence, also referred
to as the forbidden gap. The lower band is called the valence band since it contains all the valence
electrons. The upper band is called the conduction. band since excitation of electrons into this band
is primarily responsible for electrical conduction.
rn
c
Q)
4n States
O Electrons
6n· States
6n States
2n Electrons
Q) I 2n States
.....
I
2n Electrons
0 I
I
>,
Ol
I
I
Q)
....
c
w
4n Electrons •
I
I
-IOI
ro,c
::::i,·o
o•ro

'
'
8 Semiconductor Devi'ce : Modelli11 g and Tecl,110/o g Y
1·2·2 Metals, Semiconduc t or s , and Insulat o •
r s
For el · 1 erience acce e
(
at is there must be empty not air
.
d' d owe ,
ectnca conduction, that is, for electrons to exp
they must be able to move into new energy states. T h
occupied) energy states available to electrons. F o r i amon
completely filled and theref ore hardly an y empty states are ava 1
a
there ar c
e very 1ew electrons present in the con uctto
1 ratwn in an apphed electric ff
h ' ver the valence band is al
.1 ble for electrons. On the other h
d h nee there is little possibili
d · n band an e '
1
d' ond is an insu ator.
Sem icon · d d cture as msu a tor
uctors have similar energy ban stru
1 t: si
y ence hes n
. ; eV while that in the
small ·
case
· - d · d amon 1s
silica · l ' -
· ·
__
n is on Y 1.1 e V. The energy gaps of some common s emiconductors
.
miconductors allows
re l .
.
elect-i
ative l Y d b ds m se ""
small separation between valence and con uction an
to b
an
e excit · ed f rom the h ty conduction
filled valence band into t e emp
room temperature. This introduces electrons in an almost empty co
f the material.
charge transport. So the electrical conductivity is very poor nd ia rns
l that is, a filled valence b
and an empty conduction band at OK. The on! differ
- er m semiconductors. For example the ban gap 10
1
states in an almost full valence band, thereby increasing the conducttvity O
. . · e of the ener a whic
are given in Table 11
. b d by thermal excitation
d ction band as well as vae
Table 1.1
Band gaps of some common semicon
·
ductors at 300 K
Semiconductor
Germanium (Ge)
Silicon (Si)
Indium Phosphide (lnP)
Gallium Arsenide (GaAs)
Silicon Carbide (SiC)
Gallium Nitride (GaN)
Band gap (eV)
0.66
1.12
1.35
1.42
2.99
3.36
On the other hand, in the case of metals, bands either overlap or they are partially fi
Thus, electrons have empty states available to them into which they can move under the influen
of an electric field. This results in good electrical conductivity of most metals. The differences
the energy band structure of metals, semiconductors, and insulators are shown in Fig. 1.6.
Conduction
Insulator Semiconductor Metal
Figure 1.6 Typical band structures for insulators, semiconductors, and metals.

Semi ·onducturs 9
· The elemets in the group IV of the penodic table present an interesting case. AJI th se
elements have dtamond like scture in which the nei bourin atom are bound by co h es iv e
- ~
- - _.....__ --::..-- _ fo
y g p (
forces. . the mic number increases these cohesive rCJ!S weaken c;!using a reductio n i n the
melting pom . t as w ell as in the energ a . Thus there is a transition from insulating d i am o
nd )
through semiconducting (silicon, germanium) to etallic tin beha v iour as we consider successiv e
elements under this grop with increasing atomic number. The melting p ints and the band g ap s of
s
the e elements along with their ato ·
oh
· ·
m1c-11umbrs are presented m Table 1.2.
)
o
0
Table 1.2 Atomic number, band gap, an d melting points of some group IV elemen ts
Element
Carbon
Silicon
Germanium
Tin (a-Sn)
Atomic number
Band gap (eV}
6
5.30
1.12
0.66
50 0.08
14
32
Melting point ("C}
3800
1417
937
232
1.2.3 Direct and Indirect Semiconductors
The energy band diagrams shown in Fig. 1.6 are the simplified representations of a rather complex
band structre. More complicated energy band diagrams showing the electron energy versus the
momentum m two crystal directions are shown in Fig. 1.7 for two different cases. In case (a), it is
seen that the conduction band minima and the valence band maxima are located at the same
momentum va_lue: Thus, an electron can
· · n from the valence band to the conduction
pand without any change in momentum. allium arsenid · is one such exam le and such materials
·
_;____________ ' '
are called direct semiconductors. In contra
e (b) the conduction band minima and the
valence band maxima are not located at the same momentum value. Thus, the excitation of an
electron from the valence band to conduction band not only s extra energy input, but also a
change in momentum. Such a situation is encountered i silicon nd such semiconductors are t
called indirect semiconductors.
In direct semiconductors, a photon of energy h v = E g
can excite an electron from the valence
band to the conduction band (direct transition). However, in indirect semiconductors, this type of
direct transition is not possible. This is because the photons have very small momentum while the
electron has to undergo a large change in momentum: . J_n such cases, electron transition from
valence band to conduction band can occur by involving a lattice phonon (thermal energy), which
can support the required momentum change (indirect transition). Direct transitions are also possible
·but the minimum photon energy required to excite electrons will be larger than E g
as shown in
Fig. l.7(b).
In a direct semiconductor, when an electron in the .conduction band falls to occupy an empty
state in the valence band, the energy is usually given off as a photon of ligbt. H_o..:v.ever, in the case
of an indirect semiconductor, such as silicon, - this type of transition involves a change in
momentum in addition to a change in energy, and the e2ergy difference is generally given up as
-
,bsfilJ.£.lhe laFtice rather than a photon of light. Therefore, _light emitting devices are generally mad -1 * *
.£f direct semiconductors.
Subsequentli1n'this book, we shall use a simplified energy band diagram where E e
is the
.!!_linimum energy in__the_c.1M41ction band and Ev is the maximum energy in the alence band._
The band ga P. E 8
= E e
- E \:.. is therefore the minimum energy separating the conduction band and
the valence band as shown in Fig. 1.7.
oeed

-----::: d rechflO/og_;Y_
;;.et:M
::.::.Sn!.!11co11duc!.!.rorDevt· o d ;:. e ll ::: i conductlor:1
n:gg_a_,_, ---
11) band
Energy
---
£g
(111]
[111]
band and ti
Valence band
f the conduction
plots at the bottorn
° · direct semicomdl!lctor.
F igure 1.7 The electron energy versus momentum
d" t and (b) an '"
for (a) a ir 0 c
the valence band in two crystal directions
s and ffoles
Charge Carriers in Semiconductors-Electron
l.2.4
. Jenee band receive enough th
As the temperature is raised from O K, some electrons in the va
e electrons in the p rev.i,
energy to be excited into the conduction band. So, now there are so h tes) in the normal!
O
states
.
Y
empty conduction band. Also there are now some unoccupied d
' l e band to con uctton ban
va 1 ence band. Thus, by exciting an electron from the va enc . .
.
electron-hole pair (EHP) is created as represented schematically i n F i g. t.B. Af t er _
e x
c t tat t o
the conduction band, an electron is surrounded by a large number o f un cu p d st ate
example, the equilibrium number of EHP in pure silicon at 300 K , s 1 . cm com
5 x 10
par
the silicon atom density of the order of 1 0 22 cm-'. So the few electrons in the conduction ban
free to move through the many available empty states. In all the following disc ussions, we
> concentrate on electrons in the conduction band and holes in the valence band .
The moveme
these two types of charge-carriers accounts for the current flow in a semiconductor.
Conduction band
Valence band
Figure 1.8
c
reation of EHPs due to th
. .
e exc1tat1on of electrons from the valence to the conduction

I Semiconductors 11
We can now relate to the di cussion' in section 1.1. At O K, all valence electrons are tightly
bound thoug the covalent bonds between neighbouring atoms. As, the tmperature i cr eases ,
thermal vibration of the lattice can impart sufficient energy to some of the electrons allo1 g the
to brak the bons and move freely inside the crystal. These fee' electrons can now part1 c 1p
te m
electncal condct1on. 1_he energy needed to break th bo d is, atually the band gap energ y m
the
and dtaoram. .
' ·
Th.e energy bad diagram actually reflects the electronic energy, that is, if an electron gain _
s
energy, tt moves up .
m the energy bnd diagram. On the other hand, when a hole gains energy , tt
moves don due to its oppo ite charge. Thus, holes seeking the lowest energy state are available at
the top of the valence band (y) while electrons are available at the bottom of the conduction ban d
The unit of nergy generally used is electron volt (eV ), which is equal to 1.6 x 10- 19 J. The
umt electron volt 1 s so named due to the fact that if an electron falls through a potential of 1 V, the
( £).
s
kinetic energy gained, which is equal to the decrease in its potential energy, is
E = qV = 1.6 x 10-1 9 C x 1 V = 1.6 x 10-19 J = 1 eV
s
(·: Coulomb x Volt= Joule)
So in the energy band diagram if electron energy E goes up by l eV, it means equivalently that it
has fallen through a potential V of 1 volt. Note that although V and E are dimensionally different,
they have the same magnitude. So, we may say that the energy band diagram also reflects _{what is
nown as .the ele
tro
ic potential, which is the negative of the electrostatic potenti l (the
electrostatic potential 1s defined with respect to a positive charge). £.Qr_an electron m the_
+: [ conduction band having a energy E, the energy corresponding to the bottom of the conduction
band (Ee) is its potential ene[gy,· whi (.E-:: Ee) is its kinettcenergy.This is shown il)_fig. 1.9 .
If we apply a voltage V across a semiconductor, the energy band diagram looks as shown m
Fig. l.9(b). As the electron moves under the influence of the applied potential V, its loss in
potential energy (q V) is equal to the gain in kinetic energy. However, as the electron moves , it
suffers a number of collisions, giving its kinetic energy to the lattice (generating heat), and falls to
the bottom of the conduction band. Consider .the analogy of a stone of mass m at a height h, which
has a potential energy mgh, where g is the acceleration due to gravity. When it falls and reaches the
ground level under the influence of gravitational field, its entire potential energy is converted into
kinetic energy. However, as it 'collides' with earth, it ultimately loses all its kinetic energy and
comes to rest.
n
_____ _(_l
Kinetic enety of electron
n-type
-
c: semiconductor
0
I...
Ee :::,
u
ro
Energy of electron
Q)
Q) '<
'+-- 0
Ee-}
0 -
>,
0)
Ev
Kinetic energy of hole
I...
$
Q)
c
w
!
(a)
m
';j'
0
v.1
'I
Ev
(b)
i,
Figure 1.9 Energy band diagram of a semiconductor under (a) zero bias and (b) under biasing conditions.
The energy of an electron in motion which loses energy due to collisions is also shown.

a
.
d Te /1110/08
12 Semiconductor Device : Modellmg an . · micond
. .
1.2.5 Intrins1c and Extrms1c
doctors
. · SemicOJl
se
intrinsic
. aIJed a n
15 c
r defect d is ernPt
o
rittes (on ban BP ) are genera e
y at O K as al
erfec em1conductor er ta! with . no 1 /a nd the condu \e pairs (B / ined in section
uch a material, the valence band is ti 1
e
mentioned m ection 1.2.2. At higher tempera
covalent bonds break and alence band electro
he e EI-IP are the only earners in
T .
Y-created in pairs, the electron concentra:1011,
concentration p in the valence band, that ts,
t d
ture, ele ctro -d
Oto Ee as e XP t t rons and hole
115 are exci te r Si nce e c equal to the
sic serniconducto ·
an intrtn
the conduction
.
n in
b and JS
== p == n; . reases, lattice v1brati
. . •
n
wre inc
'f h
. A the tempera wre. Also, 1 t e ene
. trat1on.
· creases wit
S at a a1ven tempera ure
• 1
Thus, ni in d o O
EHP to be generate
· ·}icon n; == 1.5 x 10
where n· is called the intrinsic earner concen
also increase and more EHPs are created.
band gap is smaller, less energy is required fo
r
d
will be higher for a material with smaller ban ! ap r cm 3 . On the other
cm 3 at 300 K while at 500 K 1t is about 3 >< 1
larger band gap than silicon has n; == 1 . 79_ >< lO p ::n
c
temperature and band oap energy are denved late
0 •
We have already discussed m sect10 · .
or holes by introducing a suitable dopant m the smico
the help of energy bands. When impurities are mtroduce
s · h tempera
. t
s
For example, for 51
hand, GaAs which
act dependence of n 1
P m 3 at 300 K The ex
the chapter.
a
. . to create
ssible I . ed
nductor. ThtS conce ..
d . additional
a perfect crystal, en
dditional free elec
• ·
1 1 that 1t 1s po . pt is now exp ain
levels are created in the eneroy band structure. For exam· a O
1
10
o roup V element (P, As, and
This level is
o
aerrnanium.
. . l to E in stl1con or o
h Iectrons can be excite mto
electrons & 0 K and with very little thermal energy t ese e
·t donates electrons. Thus,
generates an energy level E o which 1s very c ose c
. d .
fonduction band. Such an impurity is therefore called a
donor s 1 t d carriers is small there
when the temperature is low so that the number of thermally _
genera e
f d ed semiconductor
large concentration of electrons in the conduction band of this type O 0P. . f I
is, n >> n;, p. Such a semiconductor is called n-type sicondg0Qr. Agam, 1 an
-
l
10
e ement ·
I E · ted very c ose to E
group III is used to dope silicon or germanium, an energy leve A is crea V·
level is em.Pt):'. at O K bu with ljttle thermal energy, electrons from the val nce ban.::;d_.c.,.::a,...._.- ..¥Q
· no this level, creaJing a large number of holes in the valence band. As this level accepts electr
his type of dopants are termed g_cceptors _and the material is called p-type, where p >> nt
nergy band diagrams of n-type arid p-type semiconductors with the donor and acceptor levels
ho_wn in Fi_g. 1.1 .
0. It may be mentioned here that the process of donating or accepting electr
toniz : s the 1mpunty atoms, the donors becoIJling ositivel c ed while the accep.tor.:>-4.,lc .
.
vely charged _(refer Fig. 1.10). This is
Ee
......
:::::::: E o (Donor level)
- - -
etailed further in section 1.3.7.
,
E
,
,
---'-----'--...:::__ _J
(a)
--=--~-
Fi ure 1.10 Energy band diagrams f
semiconductor with acceptor level
conduction band of the n-type sem·
I
E A
-
(Acceptor level) u-"fi-f;-A-r--A-..J
.o
(b)
a) _n-type
EA.
semiconductor with .
of
donor
the
level Eo and
dlonizat1on impurities
(b)
h
p-
1con uctor and
ave
holes in
resulted in
the
free
val
electrons in
ence band f h
-
O t e p-type semicondu

Semiconductors 13
When a emiconductor is n- or p-doped, only one type of carriers dominate. These are called
th mJ o nty ar ner. · Carrier of the other type, whose conceRtration is moch less, are called the
mmon . arrters : Thu ' electrons in an n-type semicondl!lctor and holes in a p-type semiconductor
are maJ nty earners while electrons in p-type semiconductor and holes in n-type semiconductor are
the minority carrier .
HELP DESK '" 1.1
Why is the intrinsic carrier concentration in a semiconductor a constant and not an increasing
function of time, inspite of EHPs being continuously generated at room temperature?
Till now w_e have o?ly discussed the process of generation of EHPs, where an electron in the
valence band gams sufficient energy to reach the conduction band. A simultaneous process called
recombination also takes place in the semiconductor where an electron in the conduction band
relea es energy to fall back to the valence band and rombines with a hole, thereby annihilating an
electron-hole pair. The generation rate G, defined as the number of EHPs generated per unit volume
per second, at a given temperature is more for lower band gap materials. Also, for a particular
semiconductor, G is higher for a higher temperature. On the other hand, the recombination rate R,
defined as the number of EHPs which recombine per unit volume per second, depends on the number
of available carriers, and is actually proportional to the product of the number of free electrons and
holes. If G > R, the number of carriers will inorrease as the number of carriers generated is more than
the number of carriers recombining. On the other hand, if G < R, the number of carrieFs reduces. An
equilibrium is reached and the number (l)f carriers becomes constant only when G = R. Now let us
conduct a thought experiment. Let the temperature of a semiconductor sample be raised
instantaneously at t = 0 from 0-300 K and maintained at 300 K for t > 0. Let the generation rate at
300 K be given by G300• Initially, there are no carriers present and R = 0. As G300 > R, the number of
carriers ir:1creases and R keeps,inoreasiag with time. This process continues till G300 = R and the
carrier concentration reaches an equilibrium value, say (n i h oo· Now at t = t 1 , the temperature of the
semiconductor is suddenly raised to 400 K. Let the generation rate at 400 K be G400• Since G400 >
G300, initially the generation rate is more than the recombination rate (G > R), and the carrier
concentration keeps increasing with a consequent increase in R. Again an equilibrium is reached
when G = R, and let the equilibrium concentration t 400 K be (n;)400. It is quite obvious that
(n;) 400 > (n;h oo· Thus, the intrinsic carrier concentration increases with temperature. Similarly, we can
also argue that the intrinsic carrier concentration will. be lower for higher band gap materials. We
shall develop quantitative relations for the dependence of n; on band gap and temperature, as well as
discuss recombination in more detail later in this chapter.
1.3 ELECTRON AND HOLE DENSITIES IN EQUILIBRIUM
1.3.1 Distribution of Quantum States in the Energy Band
To develop quantitative expressions for electron and hole densities (n and p), we shall introduce
two mathematical results without proof. The first of these resuhs is deFived from quant\!1.m

14 Semiconductor Device : Moclelllfl.g an
mechanics and it deals with the d1str1but1o
.
d re 111,ofog
state
erniconductor,
the energy gap, and the valence band of t h e el which ca. n be
states per unit volume (a state is an energy
conduction band with eneroies between E and
0
g(E)dE == 4Jr ( -, 2
i
in the conductiOiil b
in e nergY
d· no to
Y
ccupied
this the numbe11
. . . n
o f q uantum Accor 1 . 0 b an electron) in
* ]312
2me (£ - Ee)
Similarly, the number of states per unit volume
E + dE is given by
where
h = Planck's constant
( 2m;, J
g(E)dE == 4Jr
h
*
me = effective mass of electrons
•
m h = effective mass of holes
,/2
£ + dE is given
112 dE
b
E
for E '2 c
. h energies between E if
d wit
ban
in the valence
(£ _ E) 1n dE
v
.
for E Ev
== 0 for E < E < E . It is cl
As there are no allowable states in the f o rbidden gap, g(E) .
the num b er of states per 1ii
from the above equations that g(E) is the density of states, that 15'
ohe .
er uniUner_gy around an energy level E.
Smee the electrons in a crystal are not completely free and
instead interact with the peri
·
h t f I tr
potential of the lattice, their behaviour cannot be expecte to e . . .
f
· · ·
d · to charoe earners 1n a sohd
ree space. Thus, m applymg usual equations of electro ynam1cs
d b the same as t a o e ec oas
'
e: . '
must use altered values of particle mass called "effective mass". In domg so, the influence
lattice is taken into account so that electrons and holes can be considered as 'almost free char
carriers' in most computations. Th efkc.tlYe masses electrons and holes are different 1
different materials. For example, m: = 0.067m e in GaAs, where m e is the free electron mass. iFro
Eq. (1.10), we see that at the band edges, that is, at E = E e and E = Ev, the density of states g(
[ 0. T e den ity of states i .
creases continuously as we move deeper into the bands, that is,
mcreasmg E m the conduction band and decreasing E in the valence band.
c
--------
r
1.3.2 Fermi-Dirac Statistics
The second result that we follow is the Fermi-Dirac distributio ·
follow Fermi-Dirac statistics which can be
. '
electron occupies an available state at an energy I l (E)
T ( K) is given by
d
n function. Electrons m sob
expresse as follows-th b b' .
- pro a ihty ftE)
that
eve at thermal equilibrium at a tempera
f(E) = ----;- 1 __ _
where
I + exp ( E /F J
k = Boltzmann's constant and
EF = Fermi energy level.
Equation (1. ll) shows that the maxi
value is O when E oo. For an ener: :a e of f(E) is 1 when E
the . .
F, occupation p rob b-:": - oo and the mt
a ihty at any temperat

Sf!miconductor.
15
J(E) = 0.5 .. 1.t may also be noted tlmt since f(E j
the probab1ltny that it i, vacant is [ l _ J€E}j,
Some proeFtie of Fern1i-Di1 1 ac f111F1ctioF1 are Ii ted here as follo w s:
the pr bab>ility that a particular st.ate is occupied,
. ,,);ff At .T .== O. K, the di tribution fUF1ction takes a simple rectangular form as show n in
fig. 1. l l. This
.
imphe that all tates above E ,.. are empty and all states below E F are filled w ith
electrons, that 1s, for E > Ef, flt.] == 0 and for fl:< Ep, f(E) = l,
, fi.\c:7 . · 11
11 - '
d' h . 1:c .
. '-"-, there exists some probab11Jty 1or states a ove F
.
•
1
E
. F· ere 1s a so a corre ponding pro a 1 1ty t at s a
\. Jffi As shown in Fig. 1.11 for 1 > (;\ u
be 1 e , t at 1s J E) 1s nonzero for E > E T h
b, E to·
b b'l' h t tes
below . F_ are emty smce f(E) < 1 for E < E 'F
, For E > E p
, the state at a higher energy has a lesser
probabilt1y of bemg occup1 by an eleetr.on. On the other hand., for E < E p , the state at a low er
energ
has a lesser probab1ht of being vacalilt. Also the probability that a state at E > E p is
occupied or a state at E < Ep 1s vacant inereases 'th t
w1
empera t ure.
0.3
0.2
600 K
0.1
LU" 0
I
UJ
-0.1
OK
-0.2
f(E)
-0.3
Figure 1.11
0 0.5 1.0
f(E)
The Fermi distrijbl!ltion fomction f(E) versus (E - E F ) at various temperatures.
(c) It can be shown trnat the prnlDability of a state at an energy till above E F beiiilg occupied
is exactly the same as the pwbabiHty, of a state at an energy D.E below E p being vacant. In other
words, f(E) is symmetrical ab©ut E F at all temperatures, that is, f(E p + D.E) = 1 - f(E F - !:1E).
(d) A filled state in the conduction band indicates the presence of a free electron and a
vacant state in the valence band indicates the presence of a hole. The free electron deAsit a Q..Ul)Q
an energy level E in the conduction band is the product of the density of states g(E) and the
probability f(E) th;t the states are ooeupied. On the other hand, the density of holes around an
-energy level E in the valence band w ould be the product of the density of states g(E) and the
robability [l - f(E)] that tt.ie states arie vacant. Since the number of free electrons is the same as
the number of oles in an intriflsic semiconductor, the symliiiletry of f(E) about E p implies that for
an intrinsic semiconductor if tf.ie densit of available states in the conduction and valence band e
' .
the same, then the Fermi level shouild lie exactly at the middle of the band gap. This is hown
c ear y
---·-- -
m 1g. l.12(a).

,..,.,0re fi lied states in
re ... r
irnplies thal there a rnrnetrY of J(E) imp ,es
th e valence band. The sY in this case tt.le area
n
• n Fi 1. 12(b
(7. ), . ti' on of electrons m
. 1 As shown I D
EF should be closer to E e
for n-type matena
· . h ·e re s
ents the con
. the valence ban (w
1!6 Semiconductor Device : Modelling and Techno/ogY
_.,.:
\,11/tJ In an n--type material, n > P· T .
ht
conruction band than there are empty tates I 11
the g(E /(£) curv: in the conduction ban (wht E;
conduction band) 1s more than that undet the
g
(
represents the concentration of holes m t e va
.
be closer to Ev. This is illustrated in Fig. l . 12(c). (for .
ma
I
I
[
cent1a d
i _ J(
E )] curv e 1 1 1 - t pe ma t erial . ' EF s . h u
for y
b d) Similarl y P d further d1scuss1on
. h Jenee an · of an
pro
thematical
1 3 5 and J J.6 ) .
. . f . to sect10ns · ·
t 1 e ast two properties, the reader should 1 e et
E
E
---=-=-------------------- -------
------------------------- ------
------
------------ --------
---
-----
£
/ Electrons
--------- Ee
------- Ev
'Holes
.
(a)
---------------------
-------- -------- --------- Ee
------ ------------------ - ----=--=-- _::-,_,-I---= --------- ---------
-------- -------- --------E v
(b)
g(E) f(E)
/
-------- - Ee
t---..:...::..- ------------------ E..F --------
---... :-::-_-,,._ ,,,..,_ ,+-- --------
Ev
g(E) 0
0 .
5 1 .
0
f(E)
(c)
g(E) [1 - f (E)]
c
arrier
concentration
Fi111ure 1.12 The density of states g(E), the Ferm·1 d' t . .
c ion f(E)
· n-
and th
ype e e I ectron arnd lilsle
semiconductor a d' (
t t. · ( ) . t . . is rtbut1on fun t'
concen ra ions in a 1n nns,c semiconductor (b) t
n c) P-type semiconductor.

Semiconductors 17
1.3.3 Electron Concentration in the Conduction Band
Based on th di cu i n o far, we can now ex.pre s the electron concentration in the conduction
band s
II = Er f (E) g(E) dE
, here E to p = energy at the top of th e concluction band.
Subtituting Eq . (l.lOa) and (l.11) into Eq. (1.12), we have
(1.12)
Ee·
Ee I + exp ( E /F)
11 = EI 4n (2m;lh 2 )312
(E - Ec)112
dE (1.13)
Howe r, it is very difficult to solve this equation analytically. Hence, the following
approximations are made:
(i) Let u assume that (Ee - E F ) > 3kT. Since kT is 0.026 eV at room temperature, it is
usuall a good approximation for normal doping levels. Using this, since (E - E F ) > 3kT for any
energy level E in the conduction band, f(E) given by Eq. (1.11) can be approximated as
J(E) = exp [-(E - E p )lkT]. In other words, the Fermi-Dirac distri0ution can now be approximated
by a Boltzmann distribution. However, it must be remembered that when the semiconductor is very
heavily doped (degenerate), E r is___yery close to E e and this approximation may not be valid.
(ii) Typically, the width of the conduction band is several electrm1 volts. However, most of
the electrons in the conduction band are confined close to E e since for energies above E e , the
probability for electron occupancy quickly approaches zero. So the. upper limit of the integration in
Eq. (1.13) can be changed to oo without any loss of accuracy.
Therefore, Eq. ( 1.13) can now be modified as
(1.14)
The solution of Eq. (1.14) is given by
[ ( E e n = Ne exp -
- EF )]
kT
(l.15)
where N e = 2(27rk.Tm;/h 2 ) 312 and is called the effective .,eensity of states in the conduction band.
The concept of-N e can be explained in the following manner. From Eq. (1.15), we see that the
expression for n is of the form n = Nd(E c ). Therefore, if all the states in the conductfon band were
to be confined at the particular energy level E = E e , then N e represents the number of states
required to be present at E e . As a result, after multiplying N e with the probability of electron

18 Semi onductor Devi e : Modellmg and
occupancy at E = Ee, we get t e
noted that the actual den ity O
rate only helps u to obtain a imple e
separation between the Fermi e
value is different for different material
1.3.4 Hole Concentration 10
To compute the hole concentratwn
rec/1,,oLogY
band- However, it m
. he conduction
p t of effective dens1
tn t
f electron
h number o zero an
d on In
E :=: Ee 1 .
f electron
Ne depen s
f states at
f the ree
since
pres ,on or
b nd edge,
x a
d he conducuon
· l vel an t
. . the Valence Band
occupying a level in the valence band (fh)
we can write that
fii(E) = l _ J(E). Hence, from Eq. (l.l l),
fh(E) = I - J(E) =
The hole concentration in the valence
d the c o
n ce e n tration in terms
cone
the probability of a
d we note that
tate is not occupi
ban
alence '
l'ty that a s
in the v
obab1 1
1 actually the pr
ex p £
(
1 + exp
where E is the energy corresponding to t e .
bot
assumptions as in the previous case, ' .
.
( E - Er
J
J + exp (- kT
/' L = _ F _ EJ
kT
band can now be written as
Ev
P == f f h (E) g(E) dE
Ebo,
h bottom of the va ence .
t
E ) 3kT, from which we ave J
h\
E with -oo, we have
that IS (E F - v >
exp[-(E F - E)/kT] in the valence band and replacing bot
P = J
4,{2;,; r (E v _ £) 112 e+(
= :: (2 m;i312 exp H
£ , ;/ v JU
\; E J] d E
(E
I band After making anal
v - £) 112 exp [-( £\; £)] dE (
From Eq. (l.18), we obtain the concentration of holes in the valence band at thermal equilibri
p = N [ (E F - v exp - Ev)]
kT
where N v = 2(21CkTm;th 2 ) 312 is referred to as the effective density of states in the valence band . .Ir
Eq. (1.19), we see that the expression for pis of the form p = N vf h (E v ). Therefore, Nv represent
number of states required to be present at E v , so that after multiplying with t grobabi ·
£
vacancy at · -;; Ev, the number of lioles in the valence band can be obtained. From the expr,essi
semiconductor, at a given temperature Ne and N v are constants. In case of silicon at
temperatuL'e (300 K), these values are Ne = 2.8 x l0 19 per cm 3 and Nv = I.OZ x 1019 per cm3
-
h
(
(

Semiconductors 19
1.3.5 Carrier Concentration in Intrinsic Semiconductor
If £, denote the po. 1tion nf the Fermi energy level in an intrinsic emiconductor, then from
Eq. (l.15) and (1.19), we have
11, =
(l.20)
P, =
(l.21)
where
11 = concentration of electron in intrinsic semiconductor and
p, = concentration of holes in the intrinsic semiconductor.
Since the electron concentration is equal to the hole concentration m an intrinsic
semiconductor, that 1s, 11 1 = p,. from Eq . (l.20) and (l.21), we obtain
1
= Ee + E v _ k'7: I n Ne )J
1
\ 2 2 (
-- - -
N
(1.22)
v
Equation ( l .22) mathematically proves our observation in section 1.3.2 that if the effective
den1t1c - of late· in the conduction 2ng valence banfls are egg!, the_Eerm· level for an intrinic
material would be located exactly at the centre of the band. gap. However, since the quantity
UT/2) In (N c
lN v ) i rather small (a few meV) in practical situations, E; is assumed to be located
approximately at the middle of the band gap for all intrinsic materials.
Again, ince 11 1 1s equal top,, from Eqs. (1.20) and (l.21), we can write
Therefore,
11,p, = ll, 2 = Nc Nv exp [-( Eek; E v ) J
= N c N v exp [-( :: J]
rll;
= Nc
E
{TJu
Nv exp [-( 2
(1.23)
(l.24)
So. we see that the intrinsic carrier concentration for a particular semiconductor is constant at
a given temperature. The value of the intrinsic carrier concentration is a strong function of the
band gap and is higher for lower band gap materials. This statement agrees well with our
discus ion in ection 1.1. Since the band gap is actually the energy required to break a covalent
bond, a mailer band gap would imply a larger number of broken bonds at room temperature and
consequently a larger number of carriers. The band gaps and the intrinsic carrier concentrations for
some semiconductors at room temperature are listed in Table 1.3.
Table 1.3
Band gap and intrinsic carrier concentrations in some common semiconductors at 300 K
Semiconductor
Indium Arsenide
Germanium
Silicon
Indium Phosphide
Gallium Arsenide
Band gap (eV)
0.35
0.66
1.12
1.34
1.42
Intrinsic carrier concentration (cm- 3 )
1.3 x 10 15
2.3 x 10 13
1.5 x 10 10
1.2 x 10 8
1.8 x 10 6

20 s emiconducto r D ev1ces: . Modelling and Tec/lflO l ogY
How does the intr' msic . carrier concentration varY with . ter,.pera t ure
?·
a variable In the N exp ression · for n; given by Eq. (1.24), in addition to the presence of t ~m.perature
gap with ' c, Nv and E are all functions of temperature. Ignoring the small vanatton in e
can write temperat ore, and 8 considering the expressions for Ne and Nv toge th er wt · th E q. (1.24)
n 1
d 312 exp[-(~ )]
Thus,
in nature.
we see
This
that
a _; increases ~ery rapidly with temperature, the increase being almost expone
n .
bonds are broke~am. ~grees. with our discussion in section !.I. With increase in temperature,
temperature for G givmg nse to more free carriers. Figure J.13 shows the variation of n
e, 5,, and GaAs. I
1018
1016
'7 1015
E
~
.....
Q)
'E
~
g
II)
c
:s
E
1014
1013
1012
1011
1010
10 7 T (°C)
200 100 27 0 -50
ion of temperature

Semiconductors 21
ample 1.1
The intrinsic carrier concentration of ilicn (£ 8
= 1.12 eV) at 300 K is 1.5 x 1010 per cm 3 .
Calculate 11 1 for silicon at 400 K and 500 K. (k = 8.62 x 10- 5 eV/K)
Solution: Since 11; oc T 311 exp [-( 2
)], we can write
(ll; )4ooK
( 400 J
(n, hooK = 300
312
[ { 1.12
exp
- 2 x 8.62 x 10- 5 400 - 300)
( l 1 )1}]
= 1.54 224.475 = 345.7
Therefore,
Similarly,
(n,)500 K
(n;) 400 K = 1.5 x 10 10 x 345.7 = 5.185 x 10 12 per cm 3
- l . x x -- exp - -- - --
300 2 x 8.62 x 10- 5 500 300
5 10 10 ( 500 J
3
'
2
[ {
1.12
= 1.5 x 10 10 x 2.15 x 5779.23 = 1.86 x 10 14 per cm 3
( 1 l J}]
t.3.6
Position of Fermi LevI in Extrinsic Semiconductors
From Eqs. (l.15) and (l.19), we obtain
(1.25)
Now, from Eqs. ( 1.24) and ( 1.25), we have
np = n7
(1.26)
This is an important fundamental relationship which implies that for any semiconductor at
thermal equilibrium, t-he product of electron and hole concentrations is a constant and is
independent of doping. From Eqs. (1.15) and (1.20), it can also be written that
n = n; exp
(EF-£.J
kT '
and similarly from Eqs. (l.19) and (l.21), we have
(1.27)
E; - EF)
p = n; exp (
kT
(1.28)
From the above expressions, the position of the Fermi level. in an extrinsic semiconductor can be
easily obtained. Rearranging Eqs. ( 1.27) and ( 1.28), we can also write
. I
, E F = E; + kT In (;) (1.29)

22
and
Semiconductor Device : Modellmg 0"
. d Technof ogy __
(PJ
_ kT In ;(
EF == E,
'
thee
Jectron (hole) eoncen
- t e) semiconductor , l.Z 9) and (!.3) adle
As already discus ed, for an n- t ype (p Y P. 0 0 T herefore, Eq s .' ( bo ve the mtrms1c Fe
much larger than the intrinsic carrier concentratt
prove that the Fermi energy level for n n-t
:
e
(closer to the conduction band edge) while f
intrinsic level ( closer to the valence band edge ' a
is
·semiconductor
p -type semiconductor,
in section 1.3.2.
o ) s already discussed
a
the Fermi level is be
. p - ,??
What 1 the physical significance of the relation n - ' ·
. f carriers must be equal
.
For any equilibrium cond1t1on, t e ra e O •
recombination rate. The generation rate m a P
. .
h t of oenerauon o
.
.
articular sem1con
h · ductor is mtrmsic -
constant, irrespective of whether t e sem1con
recombination rate at a particular temperature_ mst also
.
. .
whether intrinsic or extrinsic. Since the recombination rate ep
n
and hole concentration, we can infer that the product of th e. ec O
.
an extrinsic semiconductor must be equal to t h at m t e 1
h
ductor at a given temperatu
h ' . 1·
or Pxtrinsic. T IS Imp 1es
e a
d ds on the product of the el
b constant for the semicon
tr n and hole coNcentratjj
. ntn nsic case ence, np - n,.
H _ ?
xample 1.2
J
In an n-type silicon sample, the Fermi level is 0.3 e V below the conduction band edge. F
electron and hole concentrations in the sample at room temperature (300 K). (For Si, Eg =
n; = 1.5 x 10 10 per cm 3 and k = 8.62 x 10- 5 eV/K)
Solution: Since the intrinsic Fermi level is located approximately at the centre of the ban
we can write E e - E; = E/2 = 0.55 eV for silicon. Also, it is given that E e
- E F = 0.3 eV.
Therefore,
From Eq. (l.27), we get
EF- E; = (E e - E,) - ( E e - E F ) = 0.55 - 0.3 = 0.25 eV
n '= 1.5 x 10
From Eq. (1.26),
JO ( 0.25
exp
8.62 x 10- 5 x 300
J
= 1.5 x 10 10 x 1.58 x 10 4 = 2.37 x 1014 per
p= n I
n
= (1.5 x 1010 ) 2
2.37 x 10 14
= 9.5 x 10 5 per cm3
1.3.7 Ionization of Impurities
Example 1.2 illustrates, that once the position of E
electron and hole concentrations respectively ca b F is nown, the values of n and p that
. k h
. .
n or p 1s nown, t e position of EF can be evaluat d
n e easily cal cu 1
e
ated.
·
Conversely if the va
However an
' even more basic problen:t
'
,

Semiconductors 23
obtain the carrier concentrations or the position of the Fermi level in a semiconductor with a known
dopant cocenation. A simple .approximation which is often used 11 ::::: No , where Nv is the donor
concentration m an n-type serruconductor, o p == N A , where N A is the acceptor concentration in a
p - type semiconductor. Although this approximauon holds in most situations, in some cases it may
J e ad to erroneous results. Another situation whei:e we may have difficulty with this approximation is
when both donor and acceptor impurities are present. In a semiconductor, the position of Fermi level
(or the alues of n .
and p) is ,,dtermine from the charge neutrality condition tthe total charge in
the semiconductor 1s zero), which requrres a knowledge of the degree of ionization of donor and
acceptor impurities. This section elucidates the ionization of impurities, while the fo llowing section
I.3.8, shows how the values of n and p in an extrinsic semiconductor can be calculated using the
charge neutrality condition once the degree of ionization is known.
Let us at first consider the ionization of donor impurities. We have already mentioned that
when a group V impurity is introduced in a group IV semiconductor, the fifth valence electron is
loosely bound and can easily be set free. This process of creation of a negatively ohargecl free
electron results in the simultaneous formation of a positively charged donor ion, so that overall
neutrality of charge is maintained. If N O is the concentration of donor atoms, then we may write
+ O
that N O N O + N O , where NO + represents the concentration of ionized donors and N o o is the
concentration = of neutral donors. As shown in the energy band diagram in Fig. 1.10, the
introduction of the donors results in the creation of N v states at an energy level E v , which is very
close to the energy level E e at the conduction band edge. The ionization of a donor atom can be
represented by an electron t the donor energy leyel E v which absorbs energy to move to the
conduction band, thereby creating a free electron in the conduction band and a vacancy at the
donor energy level. It is f lear that N v O represents the number of occupied states at the energy
level E v . The probabilfiy of occupancy of the donor level E v by an ele0tron can be obtained from
the Fermi-Dirac statistics. However, in doing so, we must also consider a 'degeneracy factor'. The
value of the degeneracy factor is calculated by noting that an electron can be placed in a
particular energy level either with spin up or spin down. Thus the leaving of an electron £rom the
donor level causes the availability of two empty states (one for spin up and the other for spin
down). Only one of these two states may be filJed by a recaptured electron; nevertheless, this
recapture can take place in two distinctly different ways. Thus the effective number of available
states for electrons is twice the actual value ( 2Nt) resulting in a sin degeneracy factor of 2 and
=
using the Fermi-Dirac function given by Eq. (1.11), we calil write
f (Ev) = Nv o +
On simplification, Eq. (l.31) gives
Ni
Ni
Nv
o 1
=
2Nv+ =
1 + exp ( E v . E J
k F
2exp( E F - Ev J
kT
(1.31)
(1.32)
We can now obtain a relation for the ionization coefficient of donors (T/D). The ionization
coefficient is defined as the ratio of the concentration of ionized donors to the total concentFation
of donors and is given by
N + 1 l
'fi/ D = ---12... ND = ---
1
= ____
( _E___ E_ + _
N
v"""7
1 + 2 exp
N; _i
F kT
)
(i.33)
II

24 Semiconductor Devices: Modellmg an
.
d Tec/11ZOlvog
y
__ _
·th resp ect to the don·
. level wt h f
. . of the Ferrn1 . f we know t e ree
We see that T/ o
depends on the posiuo l n an be determined 1
H F · )eve c be ana
owever, . the position of the ermt
concentration, which again depends on Tlv·
h
t at T/ o N
o = N 0 == n, or the electron co
. This is a good app r
+
neglected the thennally generated earners.
electron moving from the valence band to, the con
the donor level to the conduction band. Therefore r
where
T/o =
=
1
l y tically solved by
This problem can
ber of ionizecl donors.
n is equal to the nurn
ncentrat10
.xirnatto
duction band is rnu
f orn Eqs. ( 1.15) an · '
)
I + 2exp( E F ; T
Ev I + 2exp k T
1
1 + 2n exp
(
N e
kT )
e
. 0 since the probabHi
ch less than the transiti
d ( l 33) we have
.--I--rJ [ (£ - EF Jj
== - (Ee - E!2.. exp - c kT J]
= 217 N 0 ( Eion )
Eion 1 + exp kT
1
d . band edge and the donor 1
Eion = Ee - E0 is the separation between the con ;;
10
:e
get a quadratic equation ·
the energy required to ionize a donor atom. From Eq. (1.
2,rvNv ( Eioo ) + 7J - 1 = 0
N e
exp
kT
D
The solution of the above equation is given by
r/o =
SN
(£. )
- 0 -exp _!2!!.. + 1 - 1
N e
kT
...!,_____: __ ------:--- = -----=========
_4 N _0_
exp ( - Ei_on )
N e
kT N e
2
1 + SN D exp ( E ion ) + 1
From this expression of the ionization coefficient, it is evident that 1'/o is a strong func
temperature. In practice, for most dopants, rJo is very close to unity at room temperatuFe si
that at this temperature almost all the donors are ionized.
Following a similar line of reasoning, it can be shown that for an acceptor level
p-type semiconductor with a concentration of acceptor impurities given by N A , the io
coefficient of the acceptor impurities (rJA) is given by
N­
Tl A
= _A_ = ----- 1 ----
N A
I+ 2exp( E \; E F )
kT
We no assume that rJANA = N-;. == p, and use Eq. (1.19) to eliminate E in E . (1.37) and
expression for rJA as
SNA
(£. )
--exp + 1 - 1
N y
kT
Tl A = ---
-_;_
- --,- -- = -
4NA
E . r
==::; 2 ===
=:==
)
h E · th · d
--exp SN
N y kT I+
(
N
Y
A exp
w ere ion 1s e energy reqmre to ionize an accepto · . .
F
Eion
kT
( )
q
+ l
r tmpunty and ts given by Eion = E

Semiconductors 25
Example 1.3
Phosphorus in silicon gives nse to a donor level 0.045 eV below the conduction band edge. If 10 16
phosphorus atoms per cm 3 are introduced in silicon, calculate the values of the ionization coefficient
at 300 K and at 77 K. (Assume that at 300 K, the value of Ne in silicon is 2.8 x 10 1 9 per cm 3 and kT
is 0.026 eV. Also assume that at 77 K the value of Ne in silicon is 3.64 x 10 1 8 per cm3 and kT is
0.0065 eV)
Solution: Substituting Eion
kT = 0.026 eV in Eq. (1.36), that is,
= 0.045 eV, N 0 =10 16 per cm 3 , Ne = 2.8 x 10 1 9 per cm 3 and
TJo = ---;: ==== ==== ==== ==
2
8N 0 (E·
l+ --exp )
+ 1
Ne kT
= --'--;::===================
1 +
8 x 10 16 ( 0.045 )
2.8 x 10 19 exp 0.026 + 1
= 0.996
This means that 99.6% of the donor atoms are ionized at 300 K.
Similarly substituting Eion = 0.045 eV, N 0 =10 16 per cm 3 , Ne= 3.64 x 10 1 8 per cm 3 , and kT
= 0.0065 e V in the same equation, we obtain 17 0 = 0.343, that is, 34.3% of the donor atoms are
ionized at 77 K.
Example 1.4
If 10 19 phosphorus atoms per cm 3 are introduced in silicon, what will be the value of 17 0 at 300
K?
Solution: Substituting E ion = 0.045 eV, N 0 =10 19 per cm 3 , Ne = 2.8 x 10 1 9 per cm 3 , and
kT = 0.026 eV in Eq. (1.36), we obtain
TJo = ----;:============================
l 8 x 10 19
+ ( 0.045 l
)
= 0.389
2.8 x 10 19 exp 0.026 +
This implies that 38.9% of the donor atoms are ionized t 300 K.
These examples (Examples 1.3 and 1.4) clearly demonstrate the temperature dependence of
the ionization coefficient. As expected, the degree of ionization reduces with reduction in
temperature. We have also seen that 17 0 depends on the total donor concentration. Even though
the value of 17 0 is much smaller when N 0 =10 19 per cm 3 compared to when N 0 =10 16 per cm 3 at a

26 d Tt t,110/ogY
Senucond". tor De ice : Model/111g a11
,mber of I n,ze
N ) .
• d donors (11D o is muc
n concentration incre
g .
iven temperature, it h uld be noted tha the hen the free eJect n or Jevel. This incr
smce No 1 larger by three orders f magnitude.
Fermi level move clo er to the conduct10n ban
.
probab1hty of occpation of the donor leve'
1.3.8 Equilibrium Electron and Hole
d as well as the
ducing the vaJue o
l thus re
Concentration
F . ductor wit A
or a homogeneous non-degenerate sem1con
equating the number of positive charges to the
condition), we can write
N + + P = N-;, + n
. the temperature I
Assummg complete ionization (justifiable when
D
f ionization coeffi.ci
tors and N O donors p
h N accep
( h
number of negatJV
e charges c arge n
• close to 300 K or abo
can be rewritten as N N A
N+ - N;::::
Although we have assumed complete ionizat10n in
D -
n - P = D
•
i n the cases of inco
. . this sectJOn,
I .
ectively in the fol owmg
ionization, N 0 and N A must be replaced by TJoND and T7Af! A resp p = nln in Eq. (1.40}, we h
F
rom Eq. (1.26), we know that np = n,. T ereior •
quadratic equation
The solution of Eq. (1.41) is expressed as
2 h e subsutuung
n - D- A
I
2 (N N ) fl - 11 = 0
(N D
N A
)+ JcN D - N A
) 2 + 4n;
n = 2
d 1 ·no for p
Similarly, substituting for n = nflp in Eq. (1.40) an so vi o
I
we have
p =
(NA - N D )+ JcN o - N A ) 2 + 4n;
Equations ( 1.42) and ( 1.43) are the general expressions for the .
elclrn
concentrations in a semiconductor. Let us now consider the specific cases of mtrmstc, n-
p-type semiconductors.
Case 1
Intrinsic semiconductor: In this case as there are no donor or acceptor impurities, No = NA
from Eqs. (1.42) and (1.43), we see that n = p = n;.
Case 2
n-type semiconductor: For n-type materials, N D >> N A - Assuming that (ND - NA) >> 2n;, n
and p n;!N o .
Case 3
p-type semiconductor: For p-type materials, N A >> N0. Assuming that (N A - N0) >> 2n,,
and n nf/N A -
2
Materials hat satisfy he condition I N0 - N A I >> 2n; are referred to as stromgly Q
materials. However, one interest

Semi onducJ(Jr 27
Example J.5
Co n ider a silicon ample with.electron concentration n = 10 13 per cm 3 at 300 K. Show that thi.
material 1:::. 'trongly extrins1
at 300 K but becomes nearly intrinsic at 473 K.
Solution: At 300 K. 11 1
for silicon is l.5 x 10 10 per cru . Therefore, the '110te concentration in this
sa m ple i p = 11/11 = 2.25 x 10 7 pcrcin 3 . A urning complete ionization at thi temperature and
u ing Eq. ( 1.40), we get No - NA = n - P = 10 13 - 2. 2 5 x 10 7 10 13 per cm 3 • Thi is the net
d o pant concentratton and its value is independent of temperature. At 300 K, evidently
(N o
- N,1) >> 2n, and therefore, the material i deemed to be trongly extrinsic.
At 473 K, however, the value of 111 in silicon becomes 1.5 x 10 14 per cm 3 • Obviously at this
temperature. NO -
N11
1s much less than 11 1 and the material can no longer be deemed strongly
e trin 1c. From Eqs. ( 1.42) and ( l.43), the values of II and p at 473 K are .calculated to be
11 = 1.55 x 10 14 per cm and p = 1.45 x 10 14 per. cm 3 . Since the values of n and pare nearly equal
to each other, the matenal displays nearly intrinsic behaviour at thi temperature.
3
s
A lot of electron concentration ver us temperature for an n-type semiconductor sample js
shown 111 Fig. 1.14. As already d1 cu se

28 d Technology
t ve
,
. . n in t c
te the vanatio
'th temperature.
Semico11ductor Devices: Model/mg an
. h position of the Fer
A a corollary, it will be intere ting to n t is Ee - EF) w i .
small, that is, most
with respect to the conduction band edge ( 1a.
, tion coefficient
A
1
1 d From our discus
temperatures, we know that the value of t n1z e
he 10
11 on ci states are ti h . low temperature
d . .
.
onors are not ionized. In other wor s, a
th F
e erm1 energy in section 1.3. , we ca
level of this semiconductor must lie above the ono .
b
.
· . . f the Fermi ev
e occupied by electrons. Indeed 1t can e s
1or an n-type semiconductor, the pos1t1on o
d Jmo t a
t h a t at sue
eason
, b I w E are more 1i
2 n the r e1ore •
J vels e o F
d r level, since e
t a
s problem)
. 1 el is given
. b hown (given a . b y
Ee + Eo _ kT I n (J
• EF = 2 2 D
As the temperature increases, the value O t e 1
signifies that now the donor levels are empty and consequent y
level. Then, at very high temperatures when t e e e
equal, the Fermi level comes close to the intrinsic
h t at very low temp
•
fficient approaches unity.
coe
f h · onization
J 1 ·
1 the ferrni }eve
. 1es e
h J ctron and O
the position of the Fermi level shifts from a level closẹ
b low the
h le concentrations become
. Th s with increase m empet
· • t
u ' ·
· · · Fermi level.
to the conduct10n an
i::,
.
·1 planat1on ca
approximately the middle of the band gap. A s1m1 ar ex
· · f the Fermi eve
I b d E with mcrea
illustrates the nature of variation of Fermi level with temperature O
an tt can be seen that for this case, the pos1t1on o
d ·
va ence band edge to the middle of the an gap
i
. .
b d ed
n be oiven for a p-type m
1 I
p·
. 1 1 varies from a Ieve c ose
se in temperature. 1gure
f; r various doping levels.
Conduction band edge Ee
0.4
0.2
- oL-----------------------------------------------------3
-0.2
-0.4
0 100 200 300 400 §00
Temperature (K)
Figure 1.15 Fermi level positions in silicon as functions of temperature d . .
(source A.S. Grove, copyright © 1967 by John Wile &
. r:
an impurity concentration &:
Y Sons, Inc., used by permissiom).

Sem ·ondu c tor 29
t.3.9 Fermi Level at Thermal quilibrium
At thi. juncture, it may be useful t cstabli h an mportant conccp re ar din
he con ta
F rmi level at thermal equilibrium (n net tl w f charge). ' hj c ncept can be ummariud as-
No di cominuity or gradient can exi t in the Fermi energy level at thermal equ llbr um. ' j natir n
'will be particularly useful when we consider non-uni rm doping, Junct1orl "'&etwee n t 110
semiconductors such as p-n junction , or metal-semiconduct r junctions.
To establish the proof of this concept. let us consider two dis imilar materials in intima te
contact, so that electrons can flow between the two. Let f i (E)
and 81 E) be the ermi-Dirac
distribution function and d1 tribution function of available states respectively for material 1, whi) e
JiE) and 82(E) are the Fermi-Dirac distribution function and distribution function of availabl e
states respectively for material 2. At thermal equilibrium, there is no current and therefore no n e t
flow of charge. Also, there is no net transfer of energy. Therefore, for each energy value E, transfer
of electrons from material 1 to material 2 must be exactly balanced by a corresponding transfer of
electrons from material 2 to material 1. The rate of transfer of electrons from material 1 to material
2 at energy E will be proportional to the product of the number of filled states in material 1 and
the number of empty states in material 2 at this energy. Thus, the electron flux from material I to
material 2 is
0 f
F12 ex: 81(E) fi(E) gi(E){ 1- /2(E)}
I
h
Y
(IM)
Similarly, the electron flux from material 2 to material 1 is
At equilibrium, F 1 2 = F21 . This means
F21 ex: 82(E)fi(E) 81(E){ l - fi(E)}
(
1.45)
(1.46)
which gives / 1 (E) = fi(E). That is,
(1.47)
where E FI and E n are Fermi energy levels in material 1 and material 2 respectively.
From Eq. (1.47), we can conclude that E F1 = E n , In other words, there is no discontinuity in
the Fermi level at thermal equilibrium or more generally, the equilibrium Fermi level is constant
throughout the materials in intimate contact. Another way of expressing this is to say that there is
no gradient in the Fermi level at equilibrium. This can be expressed as an important relation as
dEF = 0
dx
(1.48)
1.3.10 Vacuum Level, Work Function, and Electron Affinity
Let us consider Einstein's experiments on the photoelectric effect. He observ t at electr ? can
be emitted from a metal by shining light on it. However, for electron em1ss1on, the mcrdent

30 Semiconducror Devices:
photon required a minimum ener
. TeclmoLogY
Modelling and
called the
th (expresse
h Ip of ene
non with
d in e V ),
rgY ba n
work function of
d diagram. In
an assume a
th t all
gy q'l'm the e we c mp ty
Let us try to explain this . phe ;:,:::" an d valep ce ii: a ll the sta_ tes d • to an enegy level
con idering that the conduction
below Fermi level are occupt
ạ
when an electron at EF absrbs
the vacuum level as shown 10
the forces which earlier bound it to
· · ·
18 the m,mmum energy r
b nds overlap , bo ve Ep are e
l ctrons, wh
'ed by e e
th it is raise
n energy equ
ern1tte
ctron is now
is figure, that q., .. ;=
g
, the metal. It ts al
ince all the sta
it an electron s
th metal. for ex
equired to em
·ty for e
ble quanll
V
f or {
however, E ie F at T he
electrons F·. elt:etro
there are no
ed Therefore,
be
. band. The e
· f
. the conduction
( In c
. 1. 16(a). Thts _ei
e
I to q'l'm'
work function is therefore a measur
function is 5 . 0 e . r s in the
4.1 eV for Al, while for Au the wor
n t e case o
I h f semiconductors,.
semicoductor is degenerately dop
.
d and JS therefor:
so clear from th
te s above EF -e
"'
ample, the value
b"dden gap u
nergy difference
are emitted are usually from the botom
i nd edge Ee is cal !
e de to e rn it an electron
vacuum level EvAc and the conduct10 .
n
.
a
. 1 o the mmimu . measura e
m energy reqmre
d lectron affinity qXs
semieonductor and ts
s .
16(b). This is agam a .
5 eV fo r Si. n e o e,,.,
bl quantity and is a pro
O th
semiconductor, as shown m Fig . 1. 1 the value of qXs is 4· 1 the position on the F
particular semiconductor. For exam e
·
work function of a semtcon u .
d ctor 1s not ixe
which in turn depends on the dopmg co
--------------------- EvAc
'
, ti d but depends on
ncentration.
Electron affinity
= qzs
--------
------ EvAc
q¢5 = Work
function
Ee
th ...
Work function = q¢ m
------ E F
, 1,
~----L------,-· EF
------------.-· Ev
Ii
Figure 1.16
Metal
(a)
Semiconductor
Band diagram of (a) metal and (b) semiconductor showing work function and elect
(b)
The concept of vacuum level is very useful for drawing the energy band diagr
material systems, where EvAc is taken as the reference for drawing the energy band dia
individual materials. This will be clear when heterojunctions and MOSFETs are discuss
chapters.
1.4 EXCESS CARRIERS-NON-EQUILmruUM SITUATION
In the case of the semiconductor
concentratmns
in
is a constant
thermal
for a
equili'b num, ·
particular t e material a t .
product
a given temperature. Howev
· ·
h

.. Semiconductors 31
carrier are introduced in a semiconductor, so that np > nr, a non-equilibrium situation arises .
Excess carriers can be introduced in a semiconductor by shining light (optical excitation). or
{orward-bia ing a p-n junction (discussed in detail in Chapter 4). This process of introduc i ng
excess can-iers is called injection. In case of optical excitation, if the energy of photons is re ter
than the energy gap, that ts, hv > E g
, they are absorbed in the semiconductor, resulting in exc i tation
of electrons from the valence band to the conduction band. Thus, the optical excitation results i . n
additional EHPs being generated, and a new steady state is reached where the recombination rate JS
equal to the total generation rate (thermal + optical). The electron and hole concentrations in this
steady state are more than their equilibrium values. These additional carriers are called ex cess
carriers. The magnitude of the excess carriers relative to the equilibrium majority carrier
concentration determines the level of injection. For example, let us consider an n-type silicon
sample with No = 10 15 per cm 3 at 300 K. The majority carrier concentration at thermal equilibrium
is nn o =10 15 per cm 3 assuming complete ionization and the minority carrier concentration is
Pno = 2.25 x 10 5 per cm 3 (The subscript n indicates that we are referring to an n-type
semiconductor and O refers to thermal equilibriium condition). Now let us suppose that by optical
excitation 10 12 excess minority carriers per cm 3 are injected in this sample. The excess electron
concentration n must be equal to the excess hole concentration p since excess holes and electrons
are generated in pairs. Thus, while the minority carrier concentration in this sample has increased
by nearly seven orders of magnitude (from 2.25 x 10 5 per cm 3 to 10 12 per cm 3 ), the increase in the
electron concentration is negligible. This condition where the excess carrier concentration is small
compared to the majority carrier concentration, that is, n;, = p;,

Therefore,
(a) If E p 11 > E Fp
, then np > 1
•
Exce s earner tnJ
·ectiorl·
(b) If E Fn = E p p, then 11p == n; . ·ngle Fermi level.
Equilibnum with st
(c) If E Fn < E F µ, then np < 111 •
2
carrieṛ extrauọ n occurs.
h Concept of L1fett
Quasi-Fermi levels are discussed in detail in Chapter 4. •
a nd t e
° f Carriers
1.4.2 Gerteration and Recombination
ist to restore the equilibri
ed by the mechanism
ex
. d' rbed processes
. . restor . .
is
equilibnum
' . The recombmat1on can
f arrier mJection, . c arr1ers.
E d E
d majority .
s between c an v
. . . . d . 'ty earner an
. o f carrier
.
transition
d. b d) h ch involve a
c
b'nauon
11 d the recorn 1
. d' . .
d' trap level ( ca e
.. ;;.-. ---
a sernic
. has an indirect band
lent where the atenal
process .
h ecombinauon
d'
. as heat to the lattice, non-ra ta
.
.
. .
honon (that is
'
b ds between ne1ghbounng atoms
. · causes some on
bles an electron to m W
. . d' . is istu
Whenever the thermal eqmhbnum con 1t1?n .
.
.
condition. In the case o excess c
recombination of the mJecte mmon .
irect (also called band-to- an w i
m irect involving an mtrm tat .
Generally, direct recombmat10n l d?m1ant
GaAs, InP) while indirect recombmat10n is preva
in a direct ban
(for example Si Ge). The energy released from t e r
photon (radiative recombmat1on) .
or as a P . .
recombination). Let us consider direct recombmattO
continuous thermal vibrat10n of lattice atoms
break . EHPs are thus generated, that is, thermal enery na
.
d
entre) in the band o
· onductor (for exam
can be emitted
d ap semiconductor
0 f i rst . In a direct ban g . .
h 1 . E This is ca e
ake 'an up
11 d generation of carriers and
. I
transition from E v to E e leaving a o e 1ṇ v· er of EHPs generated per umt vo ume
represented by a generation rate G th
(that is, numb
second) . On the other hand, w en a e c ro
h
annihilated and this is called recombmat1on of earners. is r
. .
'tion from Ee to Ev, an EHP
I t n makes a trans1
I Tb . G - R so as to eep
. . Th' ecombination is represented
k the product np constant.
recombmation rate R th . At therma eqm 1 num,
th - th . •
t h conduction band and
mentioned earlier, R th is proportional to the electron concentration 10 e
hole concentration in the valence band, that is,
np]
where f3 is a proportionality constant . . .
Since Rth is equal to G th
at thermal equilibrium, for an n-type semiconductor we can wnte
G th = R th = f3nnoPno
where nno and p110
denote the electron and hole concentrations respectively in an n­
semiconductor under thermal equilibrium.
When this semiconductor is optically excited to generate EHP at a rate of GL per cm 3
second, the carrier concentrations rise above their thermal equilibrium value to n n and P n· Then,
new recombination rate is given by
R = f3nnPn = /3 (nno + n) (pnO + p)
where n and p are the excess electron and hole concentrations respectively.
'
(I.

Semiconductors 33
The new generation rate i given by
@? Glh + Gll
(1.55)
The net rate of change in the minority caririer concentration (holes for n-type material) is the
di ff erence of the generation and recombinatien rates, and is given by
dpn
-:ft ::: G - R ::: Gth + G L - R
(1.56)
Now at steady state, dp/dt == 0 .. Therefore £r0m Eq. (1.56), we can write
.
where U = excess recombination rate.
..1 G l == R - G th ::: U / (1.57)
Substituting the values of Gth and R from Eqs. (l.53) and (1.54) respectively into Eq. (1.57) and
noting that n, == p as holes and electrons are generated in pairs, we have
U ::: /3(nno + n)(Pno + p - /3(n n0Pno) ::: f3 (n no + p + Pn0) p
-----------------------J~

4 < nu11du tor Dt•v,r Model/mg and 7i c /111

Semiconductor: 35
total population of the village to 1000 + 50 x 5 = 1250. But after 50 years elapsed, the death rate
uddenly went up by 5 as the 5 additional babies born 1900 onwards started dying from 1950 . S
o
again the birth rate became equal to the death rate and a steady state was reached at a population
of 1250. In this example, the analogy to the optical generation case in semiconductor is clearly
vi 1ble. The eventual steady state population in the village can be obtained using Eq. ( l.6 0), by
taking P110 = 1000, G L = 5, and r = 50. '11his also makes i t clear why r JS referred to as the lifet i me .
The oncpt of lifetime can also be explained with the help of Eq. (1.59), where the rate .
of
recombination I
given a the excess carrier concentration divided by lifetime. This clearly impl t es
that the I ifetime i the average time before a carrier recombines.
Example 1.6
Con 1der an n-type sihcon sample with a doping concentration N o = J 016 per cm 3 . lf it is
illuminated such that EHPs at a rate of 10 18 per cm 3 per second are generated, find out the majority
and minority carrier concentrations at steady state. Assuming -r: = 10-6 s, plot the decay of the
excess carriers with time once the light source is switched off. P
Solution: Assuming complete ionization, the electron concentration at thermal equilibrium is
given a
Therefore, the hole concentration,
nno = No = 10 16 per cm 3
Pno = n7/n no = 2.25 x 10 4 per cm 3
Now, when the sample is illuminated such that G L = 10 18 per cm 3 per second in steady state,
from Eq. (l.60), we have
Pn - n n = 'i p L = per cm
Therefore,
3
Pn = Pno + Pn , - Pn , = 1012 per cm
and
3
I _
1016 per cm
, - , G 10 1 2
n n = n no + ll n - nno =
Note that there is a large change in the minority carrier concentration while the majority carrier
concentration remains virtually unaffected.
Now when the light is switched off, excess carriers decay with time constant r P
as shown in
the Fig. 1.17. The minority carrier concentration decays exponentially from · 10 12 per cm 3 to the
thermal equilibrium value of 2.25 x 10 4 per cm 3 . However, the majority carrier concentration
remains almost constant throughout at about 10 16 per cm 3 .
3
Example 1.7
For the n-type silicon sample in Example 1.6, give a pictorial representation of the Fermi level
positions before and after the light source is switched on at room temperature. (Given:
kT = 0.026 eV and n; = 1.5 x 10 10 per cm 3 at room temperature.)
Solution: Before the light is switched on, the sample is in t ermal equilibrium and the f 6 ermi lev
l
position is given by Eq. (1.29). Assuming complete ionization, we have n :::::: N o = 10 per cm ·
Therefore, from Eq. (1.29), at room temperature
E = £. + 0.026 In (
F I
l0 16 J = (E; + 0.35) eV
1.5 x 101 0

.
d recf1110/ogY
36 Semiconductor Device : Modell/118 an
When light is switched on , from
Since the ample 1s no longer in
·
16 r c.rJ1 3 and Pn == 10 2 p0
hat is. ,,p n; ) , 49) and ( 1.50), From
E ample 1.6, \ e have ,z,, ::::= l O z
e f errni J evel splits in
I
uili b riufll ( t • e n by £qS, (1,
· therma eq are g 1v
electron and hole qua i-fermi Je el ' who e positions
equatfon , we ha e
EFn
10 1 6 ] ::::= ( E; + 0.35) eV
(!!:_)
[
= £. + kT ln == £, + 0. 026 Jn
,z'
,
( P J - £. - 0, 0261n
1 Sxl0 10
n;
EF p = E ; - kT ln - - ' ·
[] === (£; _ O.ll)eV
. arrier concentrat·
ajorttY c 10
. . 'th E F
, i n ce the
rn . " the presence of e
i ferrni levels ar
It is observed that the position of EF comcid s 1
; ) is positive sho WI:h oWn as foHows.
almost unchanged. Also, the quantity (EFn Fp
carriers. The positions of the Fermi level and the quas -
---Ee
---E F
------Ee
10.35 eV o.35 ev _______ t, ________ , 6 1
-------------- --------------- E;
---- ------
0.11 eV
- -- ----------
-- ----E
----------- Before illumination Ev
After illumination
1.4.3 Indirect Recombination
· · ·
In an mdtrect band gap serruconductor, the· process o
irec
f d' t recombination with an associa
photon emission is unlikely to occur. This is because not only the energy but also the mmen
needs to be conserved when the electron makes a transition from Ee to Ev · Photons, bemg 1
particles (literally!), cannot assist in momentum conservation. In such cases, the domi
recombination process is indirect transition that occurs through localized energy states betwee
and E v . As the lifetimes in indirect semiconductors are generally high, these states, which ac
intermediate steps, are sometimes deliberately created by introducing special impurities (Au an
in silicon; N in GaAsP). As the transition probability depends on the energy difference between
intermediate steps and E e (or E v ), they can substantially increase the recombination rate
consequently reduce the lifetime.
1.4.4 Surface Recombination
We have essentially discussed in sections 1.4 .
2 and 1 4 3 b h
bulk of a semiconductor. A similar process al
discontinuity of the lattice structure at the
energy states in the forbidden gap called rji
h
. . , a ut t e reco_mbmat10n process i
. .
. so occurs at the semiconductor surface.
d
sem1con uctor s f.
' su ace states Th
ur ace introduces a large numbe
en ances the recombination rate at the surface I dd. . · e presence of these states grea
. n a it10n, there may be adsorbed ions, molecql

Semiconductors 37
damages in the surface layer, which increase the recombination rate. The recombmatt0n rate at
e surface per unit area ( Us) can be expressed in a similar form as Eq. ( 1.59) in the following
(1.64)
mce Us and Pn have the dimensions of cm- 2 s- 1 and cm- 3 , the dimensions of the constant S are
ven by emfs. Since S has the same dimension as velocity, it is called the surface recombination
~locity and it plays a role similar to lifetime in bulk recombination. A higher value of S indicates
higher recombination rate.
MOBILITY OF CARRIERS
Effect of Electric Field on Carrier Movement
n a semiconductor, the charge carriers (that is, electrons and holes) are in constant motion even at
ermal equilibrium. The thermal motion of an electron .at room temp'erature may be visualized as
random scattering from lattice atoms, impurities, other electrons and defects. This random
ovement of an electron leads to a net zero displacement over a sufficiently Jong period of time.
chematically, this can be shown as in Fig. l.18(a), which depicts the trajectory of an electron
onsisting of a series of straight lines between collisions. The average time between collisions is
alled the mean free time and the average distance travelled between collisions is the mean freg_
ath. The root mean square (rms) value of the random thermal velocity vth is of the order of
cmls for mo t semiconductors.
When an electric field ~ is applied to the semiconductor, the situation changes. Each electron
now experiences a force - q~ due to the field and is consequently accelerated between each
collision in a direction opposite to the field, showing a net displacement of the electron. This is
schematically represented in Fig. l. l 8(b ). Thus, we see that an additional velocity component is
superposed on the random thermal velocity. This additional component is called the drift velocity
VJ, which is defined as the net dis lacement per unit time. ~
~ =O
Displacement
(a)
(b)
Possible trajectory of an electron (a) in the absence of electric field and (b) in the presence of
electric field.

. d Tec/Illo/ogY . ...i •
"38~.,.:S~e~m~i=:co~1~1d~u~c~to~r~D~ev~i~ce::;s~: ~M~o~d~e:,:ll~ir~,g~a::; 1 _ __
d 'ft velocity an1::1 its res
- . sa fl
ctrolil acquire th does not a l ter d ue lb
. ti Id an e I e free pa C ti
Thus, in presence of an elect111c .te ' Since the mean free time. onsequen y,
velocity is therefore the vector sum of vu, and ~d·city reduces the mean rgY to the lattice. Hence,
application of field, this increase in electron veho ·efore loses more enfe the carrier velocity. Rath~
f
tr . s and t et ase O It
electron su fers more frequent co 1s10n a continuous incre ing that in steady state,
resistive force develops which does not allow d 'ft velocity. Assu~
at equilibrium, an electron acquires an average h r\ ttice we can write
momentum gained between collisions is lost to t e a ' , (l.65)
m:Vd == -q

Semiconductors 39
# Anf ehlectro"n in a emiconductor experience various forces with in the crystal lattice. The
1uects o
.
t ese 1orces are taken into ac
C~Ulilt
b
y a s1gnmg
· ·
an effective
·
mass m
"'
to the electron rn
·
I ace o f its true mass (m ) In this way th t't' • e a
f th t .
1 f: 0 · ' e euects of the internal forces (while evaluating the euect
e ex ernda." Orce on the electron) can be ignored. Since the internal forces acting on the
ectron are Iuerent in the various cry t I
. A s a
d'
irect1ons,
·
the effective mass is also dependent on
trect1on. s a result to obtain an ove 11 · · ·
t ff, . ' Fa
d
I effective mass, a suitable average of the direct10n
epen en e ect1ve masses must be taken.
From Eq. (1.10) we see that g(E) oc ( . "')312 • • "' 312 h
t' d ·t f ' 1re · Also Ne 1s proportional to (me) . Therefore, t e
ec ive ens1 y o states is calculated by itaking the effective mass as
(m; ) 312 ::::: (m 3/2 m 312 m 3/2) 113
. a b c
ere
1
m
6
a
6
,)mb, and me are the eff~ctive masses in different directions. On the other hand, from
. ( . , we see that µ oc ( 1/m ) There"ore t I I b' · · · k
11
e · 1' , o ca cu ate mo 1ltty, effective mass 1s ta en as
_1_ = _!_ (-1- + 1 + 1 J
m; ~ ma mb me
t is ve~y clear that the. e~fective mass for calculating g(E) can be widely different from that for
calculatmg µn. By a similar argument, it can be shown that the effective mass for holes m "'
sed for calculating g(E) is different from that for calculatino µ It so happens that in siliconh
... ... f b p· '
e > mh or calculating Ne and Nv, while m; < mh* while calculating µ 11
and µP.
Effect of Temperature and Doping on Carrier Mobility
So far we have learnt that the drif,L velocity of the carriers stabilizes to an average value (instead of .
increasing continuously) proportional to the applied electric field, as the carriers lose their energy
gained from the field by collision (scattering). The two basic scattering mechanisms that affect the
carrier mobility are lattice scattering and impurity scattering. In lattice scattering, the carriers
moving through the 7 rystal are scattered by the thermal vibration of the lattice atoms. With an
increase in temperature, the thermal vibration becomes greater, and hence the frequency of such
scattering events goes up. Thus, lattice scattering effect dominates at higher temperatures and the
carrier mobility reduces as the sample is heated. Empirically, the mobility due to lattice scattering
µ 1
expressed as a function of temperature is given by the simple relationship
/µ, oc T- 312 / (1.68)
On the other hand, impurity scattering is the dominant factor at low tern eratures. When a
charge carrier travels pa-st an iomze impurity, its path gets deflected due to Coulomb force
interaction. The probability of impurity scattering depends on the total concentration of ionized
impurity and therefore, the carrier mobility is reduced for a highly doped semiconductor .. However,
nlike lattice scattering, at higher temperatures, the effect of impurity scattering becomes
'nsignificant. At higher temperatures, carriers move faster and therefore, spend less time in the
vicinity of an ionized impurity. Thus, they are less effe

40 Semiconductor Devices: Modelling and Teclin~o~l~ogy~----------~~---­
ressed as
. d ctor can be exp
In general, the carrier mobility in a sem1con u
1 - _]_ + _!_ (1.
µ - µ1 .µi trations of the sample is plotted
· s dopmg concen I d ed I
The electron mobility in silicon for vanou h t for light Y op samp es, mobiI
a function of temperature in Fig. 1.19. It can be see~ t. a the dominance of lattice scatterj
· · . Iearly dep1cung wh th ·
d
ecreases with an mcrease m temperature, c . 10
te:rnperatures, ere e 1mpu~
However for heavily doped samples, mobility is low at : a peak, till finally at big
scattering dominates.
.
It increases with temperature,
b T decreases
reac es again.
.
Also,
.
at any temperahJ
~u
temperatures lattice scattering takes over and mo 1 tty . The variation of electron and h
b T . d . concentration. . I 20 c
mo ~ ~ty ~s l~~er for samples with higher ?pmg . is shown in Fig. · ·
mob1hty m s1hcon as a function of the dopmg concentratwn
' /
' /
' /
17\
Impurity Lattr~
scattering scattenng
Log T
50::--~~~....1-~__i~_L~j___j_..J__LL~
100 200 T (K) 500 1000
Figure 1.19 Variation of electron mobility in silicon as functions of doping concentration and temperature [:
2000Q~~~--r--r~--r--r-r----r--r--r----ir,--r--.-------,
Si
V)
?
E
~
g
:0
0
:E
500
200
50
µn
Figure 1.20
20
10~14~---'~10~1~5.l.._---1...11~01~6:-1--1~~L_--L~~~.J.....--L~ , 1017 101a
~.J.....J
Impurity, concentrat· 1019 1020
El
ron (cm-3)
ectron and hole mobilities in sT r rcon at room t
concentration [2]. emperature plotted as functions of impurity

Serm onductors 41
1.5.3 Effect of High Electric Field on Mobility
In section 1.5.1, we have shown that the average drift elocity is proportional t the appl~ed
electric field; the proportionality constant is termed 1 mobility, and it is independent of the apph~d
field. However, this i true o~ly when. the applied field is smaJl so that d « vth. t h.igher ele trr
fields, when vd :::::: vth, the dn ft eloc1ty shows a sublinear dependence of the electnc field. T~
represents th.e situa~on when th~ additional energy imparted by the field is transferred to the. latuce
rather than mcre~smg. t?e carr.1er velocity. So, the velocity approaches a saturation eloc1t sat
called the scatterrng lzm.1ted drift velocity. In other words, the mobility is no longer a constant a~d
its value decreases at high fields. The Variation of v with electric field for silicon is depicted m
Fig. 1.21.
d
. For semiconductors such as

· d Teclu,ofogY . Ch 4
42 Semiconductor Devices: Modell111g an we shal I see m ap~er , the
a high n,. As aJrnost exponentially Wtth
· · h I w E h a
5
· h · creases . .
earrier concentration. A matenal wit
O
10
g
1 10
,z2 wh1c
1·al This ts one of the main
. . rtiona " h rnater · .
leakage current m a p-n junct10n 1s propo f rnperature for t _e d tor matenal. On the other
temperature. This limits the operating ~ange O ~e principal sernicon u~able for high temperature
reasons why silicon replaced germanium ~s t GaN) will be more sut ial with higher band gap.
hand, materials with higher E 8
(GaAs, 51 ~ · ally higher for a ~a.ter carbide (E = 2.86 eV)
applications. The breakdown field st~ength 15 _u~u 12
eV), while for sthCO~ d gap ma~erial is mo/
Thus, it is only 3 x 10 5 V/cm for sihcon (Eg: 6 V/cm. Thus, a wider c:c fields.
e
10
th~ breakdown fiel~ s~ength is greater ~han 2 it can withstand higher el.e doctors. Dependin o
smted for the fabncat1on of power devices as ro erty of sernicon . g . n
· & • f . . . ·s another important P P . desirable. For fast switching
L 11ettme o mmonty carriers 1 'f . of earners is h d · S .
the particular application a laroer or smaller 11 eume . e the speed of t e evice. pec1al
' e . · d to 1mprov . rfi . fi
diodes a very small lifetime of carriers is require . a small earner 1 et1me or such
, d ted to achieve 1·& . f . .
techniques such as creation of deep levels are a op . · tors a large 11et1me o mmo1c1ty
1 . nct10n trans1s ' 1· I
devices. On the other hand, in the case of bipo ar JU . The crystal qua 1ty P ays a very
. · the current gain.
earners in the base 1s preferred to improve
unportant role in real izing a high carrier lifetim.e. . band gap, for example GaAs, InP,
0
As already pointed out, semiconductors wit~ direct e~er ~y h · oh-speed devices, it is desirable
10
and so on, are preferred in optoelectronic apphcation.s. Again or that both GaAs and InP have
to have high carrier mobility and from Table 1.4, it can be seenT is not the best material as
higher electron mobility compared to silicon. As a matter of f~ct, SI icon t construct a "wish list"
0
far its basic semiconductor properties are concerned. Hence, if we were
11
fi .t I . .
· · · . · s' 1 licon w1 1°ure 0 qm e ow m 1t.
for semiconductor materials based on their mtnns1c properti es, .
~
· · · ·
1· n 1s used m over 95% or the present
Still for a vanety of economic and technolog1ca 1 reasons, s1 1co . . .
day VLSI circuits. Compound semiconductors are used only for s_pecial . apphcat_ions. The
technological advantages of silicon as well a the basic technology to realtze vanous semiconductor
devices will be discussed in the next chapter.
PROBLEMS
Pl.I l..Q. 16 per cm 3 phosphorus atoms are introduced in ilicon g iving rise to a donor level
Eo. Assuming E 8
= 1.1 eV, Ne = 2.8 x 10 19 (T/300) 1 5 cm- 3 , Nv = 1.0 x l0 19 (T/300)1.5 cm-3,
Ee - E 0 = 0.045 eV, n; for silicon= 1.5 x 10 10 cm- 3 and kT = 0.026 eV at 300 K, find the
values of
Pl.2
Pl.3
(a) Electron concentration in the conduction band at 300 K .
(b) Electron concentration in the conduction band at 20 K.
(c) Position of Fermi level at 300 K.
(d) Position of Fermi level at 20 K .
In a semiconductor sample, the donor and acceptor levels are O 5
If 85% of the acceptors are ionized at 300 K
1
: eV apart from each other.
, eva uate the fraction f . . d d f h
donor level is 2kT below the conduction ba d d . o 1omze onors. I t e
. . n e ge, determine the position of Fermi level.
S1hcon wafers are doped with (i) 10 1 5 (ii) I 01 8 .
. ' arsenic atoms p 3 S
assumption of complete ionization is justified er cm . how whether the
300 K. Arsenic introduces a donor level E hi_n he~ch case at temperatures of I 00 K aml
D w ic is 0.049 e V below E C·

Pl.4 t 51i'1~on W~fer. i doped with 10 16 atoms per cm 3 of Indium, which introduces an acceptor
_eve dA ;hich 15 0.16 eV above Ev. Determine the temperature at which 60% of Indium is
wmze t. the wafer was doped with Boron instead of Indium what would have been the
Percen age O f · · t' h' '
iomza ipn at t ts temperature? For Boron, EA - Ev= 0.045 eV.
pl,5 Assuming n == N + show th t
. D , a at very low temperatures the Fermi level in an n-type
semiconductor is given by
E == Ee,+ ED
F - -n
kT I (2Nc)
-
2 2 ND
Hence, show that in this temperature range
where Eion == Ee - Eo.
Also find E F at o K.
n == ~CND ( Eion)
exp - --
2 2kT
Pl.6 (a) At m_ode~ately high temperatures, assuming No =
concentra~ion 10 an n-type semiconductor is given by
N 0 , show that the electron
(b) The intrinsic temperature T; is defined as the temperature at which the intrinsic
concentration n; equals the doping concentration N. Show that the ratio T/To where To is
300 K, is given by
Determine T; for Si and Ge, assuming Ne and Nv to be independent of temperature because
of their logarithmic interdependence.
J'l.s
Pl.9
Draw the energy band diagram of silicon doped with 10 15 arsenic atoms per cm 3 at 77 K,
300 K and 600 K. Show the Fermi level diagrammatically and use the intrinsic Fermi level
as reference. Assume complete ionization.
A silicon wafer is doped with 2 x 10 16 boron and 10 16 phosphorus atoms per cm 3 . Calculate
n, p, and Ep at room temperature assuming complete, ionization. Repeat the same for
8 x 10 15 boron atoms per cm 3 and 10 16 phosphorus atoms per cm 3 .
· 0 16 3 . 'II . d h h t 10 18 3
An n-type silicon wafer, doped with N O = 1 per cm ts 1 ummate sue t a per cm
per second excess EHPs are generated. If the light source is switched off at t = 0, calculate the
time required for the excess minority carriers to drop to 10% of its value at
t = 0, assuming r 0
= 10- 6 s.

44 Semiconductor Devices: Modelling and Technology
REFERENCES AND SUGGESTED FVRTIIER READING
[I] Grove, A.S., Physics and Technology of Semiconductor Devices, Wiley, New Yarlt,
[ 2
] !;:"~le, W.F., J.C.C. Tsai, and R.D. Plummer (Eds.), Quick Reference for Semio
gmeers, Wiley, New York, 1985.
· ·• zysics of Semico11ductor Devices, 2nd ed., Wiley, ew 1or , 1,s1
[ 3 ] Sze, S M Pl · · N v: k
[ 4 J Streetman New J ' B · G · and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice .
ersey, 2000.
[5] New Tyagi, York, M.S. j Int / 0 d uctwn . to Senuconduclor . Materials and Devices, . John Wiley
99

Integrated Circuits Fabrication Technology
an integrated circuit, all the circuit components, that is diode , tran ist r , re lstor, , capacitors as
ell as the interconnections among them are realized on a ingle emic nduct r chip. A large
umber of process steps are involved in the fabrication of semiconduct r devices ~ r integrated
· cuits. To begin with, the semiconductor material must be in the form f single cry tals with
efect-free surfaces. Controlled amount of impurities must then be intr duced in the ubstrate t
cbieve proper doping. This may involve protecting particular region of the sub trate (ma king),
that the doping occurs only in selected regions. This is followed by metallizati n t realize
Jectrical contacts, scribing the devices into individual die , attaching leads and fi nally
ncapsulation (packaging). This chapter discusses the various unit processes u ed in I fabricati n.
ough -most of the discussions are centred around ilicon techn logy, the techn l gy f
compound semiconductors is also mentioned at appropriate places. The techn logical advantages f
silicon over compound semiconductors are also highlighted. The process of fabrication for realizing
the three basic devices in silicon technology, that is diodes, bipolar junction trnnsist r , and
OSFETs are discussed later in Chapters 4, 6, and l O respectively.
CRYSTAL GROWTH
As already pointed out, for the fabrication of semiconductor device , the sub trate mu t be in
single crystal form. Silicon, the most commonly used semiconductor, is abundantly available on the
earth's surface in the form of sand, which is almost pure silica (Si0 2 ). After chemical purificati n
and reduction of silica, very pure (99.9999%) polycrystalline silicon i btained, which is u ed a
the starting material for single crystal growth. Single cry tal silicon for integrated circuits i m stly
grown by two methods, namely the Czochralski (CZ) and the Float Zone (FZ) techniques. ln the
CZ technique, the polycrystalline material is kept in a quartz cru ible held in a graphite susceptor
and is heated by rf or resistive heating. Once the polycrystalline charge melts, a eed f ingle
crystal suspended above the melt, is slowly lowered and br ught into c ntact with the melt. The
crystal is now slowly pulled up while rotating the crucible. A larger crystal starts to gr w as the
melt in contact with the seed solidifies. The whole system is kept inside a chamber that i flushed
45

0 I )I
and Tt' lt 110 • t for thi grnwrh tech
46 Semico11d11ctor Devices: Mode/luig b'l ic arrange~e: appropriate im~uriti
how the ' . troducinc
1
f
. ire 2 . vn by Jn
whh an inert ga uch a argon. JgL : ,,re grov
M aterial · \ 1th · d esired · doping • co ncentratt0n '
the melt.
trull
Rotation
oonor or
acceptor
led enclosure
water-coo
, .L-_--;-- Single crystal
Thermocouple
~ power ( or
~
integral resistive heate111)
Crucible (graphite
or quartz)
~t
Gas outlet
To controller
S K Gandhi , copyright © 1983 by Johfil Wiiey
Figure 2.1 Czochralski crystal growth system (1] (source . . .
& Sons, Inc . used by perm1ss1on).
. · bl yuen content (10 17 -10 18 p~r cm 3 )
The crystals orown by CZ technique have apprec1a e ox o . •
0
.
. .
0 1 I h"nd no crucJbles are used m iFZ
from . the reaction of the melt with quartz crucible. n t 1e ot 1er ,, · . .
technique resulting in higher purity silicon. In thi method, a rod of ~ 1 g.h-punty pol~crystaJllme
siJicon is held vertically in a chamber with an inert ambience. A seed ot mgle crystal is daimpecd
at the lower end of this rod. An rf heater co tl I bro ught close to the eecl-end of the rod amd a
small portion of the rod is melted. A. the heat ing coil 1s moved lowly upwards, the Ql©lten
portion in contact with the seed crystallizes, ass uming the crystal tructure of the seed. Just above
this, a new molten zone is formed and the proce conti nues. Oxygen le els in FZ-grown crysta1s
are only of the order of l 0 15 per cm' .
Toe ?allium arsenide and indium phosphide single cry ta l are al o grown by CZ technique.
However s1~ce. the vapour pressure of arsenic and I ho phoru · i~ very h 1gh, a modified pro©ess,
called , the liquid-encapsulated . Czochralski technique In ' to be adopted . In th . JS process, a mo l ten
layer of B20 3 ts used as a capping layer which fl oats over the melt and reve · f
arsenic or phosphorus. ' p nts evaporatmlll o
The semiconductor crystals grown by either of the two tech . · .
into thin discs called wafers. The thickness of the e f' . rn ques .Ju t described are next ut
wa e1 s is 'lpprox 1 m t I 500
while the diameter is 15-25 cm for standard silicon s·im ' 1
~ a e Y µm to 1 mm,
, P es currently in Th .i: • b
are then chemo-mechanically polished to obtain a 11 ..
k . . use. ese wa1ers, wh c
c . . . . . ' r 111 or-1 I 'e tin 1. h on .ct
1abncat1on. Waifiers used in device fabri cation u Ll"lly I
one SJ e, are now !TeaGly fm
" 1ave a ( l l l} 0 1 . {
Th~ readers rn;iay refer to Appendix-I for more cletrul . b . a 100} crystal oriemtati~.
' ~ .i out various crystal planes.

Integrated Circuits Fabrication Technology
4 1
DOPING AND IMPURITIES
order to fabricate semiconductor devices, a controlled amount of impurities has to be
educed (doped) selectively into single crystal wafers. There are three basic methods used for
ntrolled doping of a semiconductor, namely epitaxy, diffusion, and ion-implantation. The e
cthods are dealt with in the subsequent sections.
Epitaxy
he term epitaxy literally means "arranged upon". In this process, a thin layer of single crystal
miconductor (typically a few nanometers to a few microns) is grown on an already existing
stallinc substrate such that the film h
1
as the same lattice structure as the substrate. Epitaxy can be
rther classified into Vapour Phase Epitaxy (VPE), Liquid Phase Epitaxy (LPE), and Molecular
eam Epitaxy (MBE).
Epitaxial growth of silicon is almost exclusively carried out by VPE. In this method, silicon
deposited by chemical vapour deposition (CVD) from source materials such as SiCl4• SiHCl 3,
nd SiH2Cl 2. The silicon wafer (on which epitaxial growth occurs) is placed on a graphite
usceptor kept in a quartz chamber. Hydrogen gas is passed through liquid SiC1 4 and the mixture of
iC1 4
and H 2 is passed through this quartz tube. The system is rf-heated to a temperature above
100°C. The schematic diagram of a VPE reactor is shown in Fig. 2.2. The basic reaction that
ccurs on the silicon surface in the process is
SiC1 4 + 2H 2 Si + 4HCl
0
0
0
Radio o
frequency~
source g
0
0
0
Gas inlet -i
llf- -w;t e-r;- - ttl
'lllllll,7J1llll1.~
0
0 0 0
0 0 0
0
0
Quartz chamber
Susceptor
~Vent
Schematic diagram of a VPE reactor with barrel-shaped susceptor _(1]_ (source: S.K. Gandhi,
copyright © 1983 by John Wiley & sons, Inc., used by perm1ss1on).
he reaction is surface-catalyzed and silicon is deposited on the wafer surface. Howe~er, the
· l h t. · eversible and can proceed m both
eposition temperature is very high. A so, as t e reac 100 ts r
. . · Alt · t' ely SiH may be used as
irections, etching, instead of depos1t1on, may sometimes occur. et na iv , ~ . .
· · f s ·H t 1000 1100°C results m depos1t1on of
source material. Pyrolytic decompos1t1on o 1 4 a -
pitaxial silicon by the following reaction:
I
SiH 4 ~Si+ 2H2t

nt ining dopants s
Thermocouple ----~ f Quartz crystal thickness monitor
.....U- JL-t-- Hot plate
Heat shielding-~-~ 1-----l
Substrate
Holder
View port
Mass spectrometer
Ionization gauge
Mechanical shutter
E-gun Si source --+---..i
ntanium-sublimation pump Tub J
r 0 -molecular pump
Figure 2.3 Schematic diagram of MBE
system [2].
Sb effusion cell

11tegrated ircuit Fabrication Technology 49
Diffusion
ugh, it i po ible to gro\ a la er with contro lled doping by epitaxy, it is not possible to
I the doping of particular region of the semiconductor urface. In other words, epitaxial
th takes place on the entire urface, that i , it 1 non elective. There have been some reports
1ect1 e epitax , but the la er quality i not a good and the process is therefore not very
ular. In order to achie e elective doping, the technique most commonly used in silicon
ing is called diffuswn. The ba ic principle underlying this proces is that the dopant atoms
te from a region of high concentration to a region of low concentration. Some portions of
semiconductor are covered by a masking material, while the rest is left unprotected. Now if the
1conductor is held in an ambience of high dopant concentration and the temperature is raised,
ant atoms migrate into the unprotected regions of the semiconductor while many
'conductor atoms mo e out of their regular lattice sites. The dopant atoms may either move
these vacant sites (substitutional impurities) or occupy the empty space in between the
ce atoms (interstitial impurities). On cooling the sample, interstitial atoms may occupy
titutional positions and thus, become electronically active. Most common dopants in silicon,
example, phosphorus and boron, occupy substitutional sites, that is, they replace silicon atoms
e lattice. In practice, usually a two-step process is adopted to dope silicon.
?redeposition: In the first step (also called predeposition), the sample is heated in the
nee of a very high concentration of the dopant. Under this condition, the diffusion profile is
en by
N(x, t) = N 0 erfc (
2
§i) + Nn (2.1)
Na = original doping concentration of the sample,
No = solid solubility of the dopant in the semiconductor at the process temperature,
D = diffusion coefficient of the dopant in the semiconductor at the process temperature, and
t = diffusion time
x = distance from the sample surface.
m Eq. (2.1), we can see that after predeposition, the surface concentration N(O, t) will always be
(since usually N 0 >> Na) , which is a constant for a given temperature. The doping profiles for
erent durations of predeposition are shown in Fig. 2.4(a). The total number of impurity atoms
unit area of the semiconductor surface introduced in this step is
Q(t) = 1
o
[N (x, t) - N nl dx = 2N 0 flt!­
In the next step (called drive-in), the dopant source is shut off and the sample is
The doped layer already present on the sample surface now acts as the dopant
ce and the doping profile is given by
Q ( x2 J
N (x, t) = .JnDt exp - 4
Dt + N 8 (2.3)
ation (2.3) represents a Gaussian plot. An examination of Eq. (2.3) reveals that for longer
ations of drive-in, the surface impurity concentration decreases while the impurities move
r into the substrate increasing the junction depth. The doping profiles for different drive-in
ations are shown in Fig. 2.4(b).
(2.2)

50 Semic:onductor D"tvices: ModelUng
Figure 2.4
c::
0
~
c1'
J:;l
c::
~
c::
0
o Na
Distance, x
(b)
Distance, x . . and (b) dri,ve-in f1].
(a~
r ns of (a) predepos1t1on
Doping profiles with different dura ' 0
Bx;ample 2.1
d t pe si licon wit o ·1· f h h
Phosph0rus is diffused into a uniformly dope p- Y h solid-solub1 1ty o P esp
of the sample beino 10 per cm at · . ff' ·ent at thts tempera m:e ts
o d' ff wn coe ic1 .
. h ori ai nal doping concentrati
16 3 11sooc Given that t e . t . 1
in si]iCOJil at 1150°C is J020 per cm 3 and the I US TIS per unit area Of tme SlliC
- 1? ? 1 b . f phosphorus atoi . J: 2 i..
10 - cm-s- , (a) calculate the total num e, o . . d ive-in is earned out 1or 1,1ours
surface after a predeposition time of l hour. (b) It after this, rd the surface concentratiom?
the same temperature, what will be the final j unction depth an . . .
f hosphorus introduced m s1,hcon Il
Solution: (a) From Eq. (2.2), we obtain the total amount O P
unit area aftet predeposition as
Q = 2 x 10 20 10- 12 x 3600 = 6.77 x 1015 per cm2
n
(b) Now after drive-in, the surface concentration is given by setting x = 0 in Eq. (2.3).
if the drive-in is carried out for 2 hours at the same temperature, we have
N =
6.77 x 10 15
-;::======= - 10 16 = 4.5 x 10 19 per cm 3
)n x 10- 12 x 7200
The negative sign for N 8
implies th at the ori ginal ubstrate dopant and the diffused impuri
are of opposite types.
In ~rder to obtain the junctio.n . depth, we note th at at the j unctio n the phosphlor1
concentrat10n becomes equal to the on grnal background doping concentration of the sample th
is, N(xj, t) = 0. Substitutimg this in Eq. (2.3), we get
'
exp( x} J = 4.5 x 10
l 19
4 x l0- 12 x 7200 10'6
This gives the junction depth as xj = 4.92 pm.
_The common n-type dopants in silicon are the gro up y I
arse111 c, and antim6 i;iy while the oroup Ill elemenL b . ~ . , e e me nts s uch as pho splilOfll
. o OIOn is almost ex I . I
d opmg. Usually, diffusion in silicon is carried out in an · c us1ve Y used for p-tYJ
h . open-Lube fu . A . •
t e dopant 1s made tb flow over the sample kept in a careful I .' nace. gas rrnxture ca«ylll
Y cont, o l led atmosphere. The dopaJ

Integrated Circuits Fabrication Technology 51
u ~ rtwy u < 11 J liquid or h · . , d ·
' • t c preferred liquid source used ,or oping
o !'hotu • U

~miconductor Devices:
N(x) ==
~e
ARp Ji_;
r echflOlogY
v[-H~JJ
and ced per unit
where ·ected range. . ns introd 0 • •
/J.Rp = standard deviation of the :~r of impuntY 10 • and the unplanta1;i(,n
Qo = total implantation dose (n current density 1
the ion bealTI
The implantation dose depends on
is expressed as
Jt
Qo == q
·me it can be very;
and ti '
ds only on · concen
Since the implantation dose depen th peak iIJlpurt1Y v~ 111 ing the energy o
· ·d nt that e t BY ~J d ·
controlled. From Eq. (2.4), it JS evJ e . ns come to res. urface or eep :ans
be of dopant JO to the s bo .
is, where the maximum num r . . 00
very close . rofiles for ron m
beam it is possible to obtain unplantatt tual iIJlpJantat1on P
reqW:ements may be. Figure 2.5 shows the ac
different ion-beam energies. ·
the current tration occurs at x ==.
-
..,
1()21
E 1()20
~
E
co
- c: 1019
.Q
~
c
~
c:
8 1018
Boron in silicon
Depth (µm)
Figure 2.5 Actual implantation profile for boron in silicon for different values of ion-beam e
For a crystalline target, Eq. (2.4) is not valid. Due to the regularity of the crystal
the impurity ions may find an open corridor in between the lattice atoms when the ion
projected along a major crystallographic axis and can thus penetrate much deeper as
Fig. 2.6. This is called channelling. Channelling can be particularly severe for low
implantation as shown in the figure. However, by tilting the substrate with respect to the !
direction, channelling can be reduced to a great extent. An alternative technique
channelling is pre-amorphization in which the substrate surface is amorphized by

Integrated Circuits Fabrication Technology 53
lf-i n (that i iii on urface bomb d d · h •+ • • f h
ti
. ' . ar e wit St ) before the actual 1mplantat10n o t e
pant . me m , the 1mplnntation is al · . · J
d . ed . so carried out through a thm (amorphous) oxide ayer
r epo lt on the em1conductor, Surface to reduce channelJing.
10 5
P+. 40 keV
The dose increases from
curve 1 to curve 3.
"O
Q)
N
ro
E
0
z
1Q3
Depth (µm)
1.0
Figure 2.6 Channelling of phosphorus in silicon at different implantation doses [1].
bosphorus is implanted in a p-type silicon sample with a uniform doping concentration of
0 16 atoms per cm 3 . If the beam current density is 2 µA per cm 2 and the implantation is carried out
r ten minutes, calculate the implantation dose. Also find the peak impurity concentration.
sume RP = 1.1 µm and MP = 0.3 µm.
(2.5), we obtain the value of the implantation dose as
2 x 1 o- 6 x 1 o x 60
Q o - = 7.5 x 10 15 cm- 2
1.6 x 10- 19
e peak impurity concentration occurs at x = RP. Substituting this value of x in Eq. (2.4), we get
e peak concentration as
7.5 x 1015 = 6.267 x 1020 cm-3
0.3 x 10- 4 x Ji;
Even though ion-implantation offers a lot of advantages over diffusion, the process of
plantation creates a lot of damages in the implanted region. These defects have to be thermally
ealed in order to make the doped region electronically active. Annealing can be carried out if\ a
nventional furnace at a temperature range of 800-1000°C for 20-30 minutes. However, this may
ter the doping profile considerably by driving the dopants in. Rapid thermal annealing (RT A) is
alternative technique in which the sample temperature is raised to a high value quickly, held
nstant for a brief period, and then cooled down fast. The entire annealing cycle may take a few
onds to a few minutes and the doping profile remains essentially unaltered. RTA is therefore
eferred as an annealing technique in present day VLSI technology over conventional furnace
nea_mg.
1·

d Technology
54 Semico11d11ctor Devices: Mode/Ung an
!ELECTRIC FILMS
2.3 GROWTH AND DEPOSITION OF D
. three purposes. They can b .
. • • . essentially serve . ) (" 11 ) e (t)
In semiconductor processino d1electnc f1 1 ms . f MOS transistor , used as mask a
e,, oxide o a · I s t
part of the active device (for example, gate (" .) d as a protecting ayer (also kno o
. . ) and Ill use . f h h Wn
protect against diffusion (or ion-implantation , t the device rom ars ambien as
. . . . so as to protec . I . ce and
passivation)
.
at the end of device fabncauon
only use
d d'
ie 1 e
ctric rnatena
.
s
d
m semico d
n Uct
ensure rehable operation. The most comm . wn on the sem1con uctor or de . Or
technology are Si02 and Si3N4. These films can either be gro
Posuect
by using various techniques.
2.3.1 Thermal Oxidation of Silicon
. row Si02 on silicon. This is
Thermal oxidation is the most widely used technique to g f 900 1200oC 10 · usually
· t re range o -
an atmo h
earned out in an open-tube quartz furnace at a tempera u · d · sp ere
of dry oxygen (dry oxidation) or water vapour (wet oxidation). For dry oxt a;mn, o_xygen is passec1
through the tube where it reacts with silicon to form Si02 by means of the ollowmg reaction
Si+ 0 2 ~ Si02
In case of wet oxidation, high purity de-ionized water, kept in a _quartz ~ubbler at the inlet of the
furnace, is heated to a temperature close to its boiling point. High punty . h oxygen or nitrogen q .
passed throuoh it so that the oas flowino into the furnace is saturate d
e e o
wit water vapour. Water th en
acts as the oxidizing agent and the oxidation reaction is given by
Si + 2H 20 ~ Si02 + 2H2 i
The oxide thickness grown on silicon by the process of dry or wet oxidation is depend
th "d . . ent
on . e ox1 ation time and temperature. This th ickness can be expressed by a linear-parabolic
relation represented as
where
d 2 + Ad = B (t + 'f) (2.6)
d = oxide thickness,
A and ~ =. coet:icients that depend on ox idation temperature and ambient co d'f
t = ox1dat1on time, and
n 1 IOns,
r = a parameter for fitting the initi al-val ue of oxide thickness.
For short duration of oxidation, d « A and Eq (2 6) b .
· · can e approximated as
B
cl = A Ct + 'f) (2.7)
~hich sig~ifies that when the oxidation is carried out .
lmearly with time. The oxidation rate · h. . . for a hort time, the oxide thickness grows
h . In t IS regime I !" . d b .
c aractenzed b~ the linear rate constant (BIA). imite Y the surface reaction rate and IS
~he solution of Eq. (2.6) shows that for Ion . .
the oxide thickness can be expressed as ger ox1dat1on times, such that (t + 1') >> (A2J4B),
(2.8)

---.,,,,,,...-=e::.a-~-------.-.-----""'' l'fltNI CI rcu/f \ ft ahrl at ion Tel /11,ology 55
It 111 , ix l,n nn ' '' I , i1nn, ,Jy , ov rn I by th diffusion o the ox1dizing
( x 11 1 11' ox I Illy 1111 I i chantct •riic I by the paraboli rate on tant
111 1 Ht
I
on 111 1 1 111~1 lh pu, I olic ru~c con tant increase wi th temperature
II ht < 1 n J,n,n 'lnhl I , ru lid I 11011. fh oxJdntion rot · is mu h fa tcr or wet ox1datw n than
t O, dil l Oii, 'J h .04
0.0049
0.0117
0.027
0.045
0.0208
0 071
0.3
1.12
l~Ul'li ·111 11 0 ~ 1 ln~i< n I ro • ss, n = 0.287 µmi/h, A = .226 µm, and -r is zero. Calculate, till
t tun lh • ox, 11t 1 0 11 rut · ·an be ttJ pr >ximatcd to be linear, such that the oxide thickness
I 1l d by usin th · lin ar rnt • appr ximati n c rresp nd to within 10~ of the value obtained
,n , • ri l(,r·ous analysis.
sin' th · linct1r rnte < f xidati n, the oxide thickness is given by Eq. (2.7). If the
utron is ·ur ri • I >u t f< I h irs, the oxjde thickness (d 1
) for thi particular oxidation process,
rowth raLc, is given a ·
d _ 0.287 t µm
I - 0.226
c oth ·r hand, ·onsid ·ri ng the more rig r us analy i , the oxide thickness for the same time is
ed using ! Cj . (2. ) as
d 2 = 0.5 { (0.226 2 + 4 x 0.2871) 112 - 0.226} µm
ly d 1 is ,reat ·r thnn d 2 . Ace rding t the problem, the value of t is such that d 2 should be
n l O ~ o c/ 1 , that i , d 1 = J .1 d 2 • Further solving the equation, the value of t is obtained as
97 h, r 1.318 min.
It must be noted that oxide grown in dry 0 2 ambient i den er, free of defects and therefore
aram unl imrortancc in M technology, where the quality of gate oxide has to be carefully
lied. ometimcs trace ~ mount f chlorine arc introduced in the gas flow during oxidation to
vc the quality f gate oxide. 1 owever, for growi ng thick oxide within a reasonable time, wet
tion has to be carried ut. The comm n practice for growing an oxide film thick enough to
d a. a mask against diffusion (> 500 nm) is to follow a dry- wet-dry sequence.
Deposition of Dielectric Films
pound mi ondu t r such a. aA and InP, thermal oxidation is not a feasible option.
bet:ausc, the high vapour pressure of arsenic and phosphorus causes severe degradation of

Se1111 onductor Dev, e : Mode/li11g and Te /111ology
:~: ~aterial when it i expo ed t high temperature. Also, the oxide i n~n-. ~o.ichiometric (that .
dtffer~nt .con tituent of the material oxidize at different rates). Even ·~ s1l,1coA devices, Wh ta,
~edtelectnc f1hn is needed a a final pa ivating layer, high temperature ox1dat1on. process lllay ~c
fea tble. In such ca e ·1· d' 'd or ilicon nitride are usually deposited by ch . Ot
v , 1 icon 1ox1 e . b d e,n,c
apour deposition (CVD) technique. For example, a layer of S102 ~an . e eposited by t; I
reaction of SiH4 and 0 2 at temperature between 250- soooc . The reaction IS
c
SiH 4 + 20 2 ~ Si02 + 2H20
Usuall.y a gas mixture containing N2 or Ar with about 1 % SiH4 an.d 0 2 is used in a CVD proccs
For ~1 N4 depo ition, SiH4 and NH with N2 or Ar as the earner ga are used. The chernic:j
reaction that occurs in the temperature range of 700- l 100°C i expressed as
3SiH 4 + 4NH 3 ~ Si 3 N 4 + l 2H2 i
Plasma-enhanced CVD (PECVD) process can also be used to deposit Si02 and Si3N4. In th'
t~chnique, the presence of a gas plasma allow reactions (which would otherwise occur only 18
high temperatures) to take place at a comparatively lower temperature. However, silicon nitri;t
deposited by PECVD contains a lot of hydrogen in the film and the film is usua1t
non-stoichiometric.
y
2.4 MASKING AND PHOTOLITHOGRAPHY
As already pointed out, for the fabrication of semiconductor devices, selective dopililg is often
necessary. Thi means that certain regions of the wafer have to be protected against doping during
diffu ion or ion-implantation. In general, thi s 1s clone by covering the entire sample by a protective
(ma king) layer and then removing this ma k layer at some elected regions by a process called
photobi.thography. Afterwards, diffu ion or ion-implantation is carried out and doping takes place
only in the region not protected by the ma k. The most commonly used mask material in silicon
technology is si licon dioxide (Si0 2 ) and it can be ea ily grown on silicon by thermal oxidation as
discu ed in the previous ection. For compound semiconductors, Si0 2 and/or Si 3 N 4 deposited by
chemical vapour deposition can be u. ed a, mask . Since ion-implantation is a relatively low
temperature proces , photoresist itself can be u ed as a mask against implantation.
Once the mask layer is grown or deposited on the semiconductor surface, it must be
patterned. T hat is, the mask should be retained onl y over certain selected regions ·and removed
from the rest of the surface. Patterning is a two-step process. In the first step, a photosensitive
material (photore i t) i pin-coated on the entire sample surface. There are two types of
photoresi st, namely positive and negative. In optical plzotolithography, the photoresist-coated
wafer i exposed to UV li ght through an appropri ate mask plate (or photomask). Certain regions
on the mask plate are transparent, and the re t i opaque. In ca e of positive photoresist, the
photore ist exposed to UV light i oftened and i therefore easily removed in a develop.er
solution. In ca e of negative photore i t, only the expo eel re i t remains and the unexposed resist
is removed by the developer olution. Thus, the ma. k pattern (or its negative) is transferrea onto
the resist-coated ample after the exposed (or unexpo ed) resist is removed in the developer
solution. Figures 2 .7(a), (b), and (c) illustrate the proce s schematically.

l11tegrated Circuits Fabrication Technology 57
Photoreslst
UV radiation
t J t t t Photomask
Mask
(a)
Developed image
(b)
(c)
Figure 2.7
Different steps in photolithography process showing the transfer of patterns.
In the second s~ep of patterning, the mask is removed (etched) from the regions no longer
tected by photoresist (also called opening windows in the mask). If the masking layer is Si02,
bing is usually done by dipping the sample in hydrofluoric acid (wet chemical etching), which
hes Si02 in the regions which are not protected by the photoresist. After the selective removal of
ide, photoresist is removed from everywhere. The. sample is then washed in de-ionized water,
ed thoroughly, and is ready for diffusion/implantation. However, if photoresist itself is the mask
against ion-implantation, it is not necessary to grow and selectively etch the oxide.
Optical lithography using deep UV light is by far the most widely used lithography technique
ay. The minimum feature size which can be obtained by the photolithography process depends
~he wavelength of the UV radiation, and lower wavelengths are used for better resolution.
ctron beam lithography and X-ray lithography have also been used to reduce the minimum
ture size. Electron beam lithography allows direct writing on the sample (no patterned mask
te is needed as the electron beam is directly raster-scanned on the photoresist). Due to the very
all electron beam size, high resolution can be achieved. However, scanning the entire wafer is
ery slow process and hence not suitable for large scale production. On the other hand, it is
1cult to prepare a suitable mask plate for X-ray lithography. Thus, these techniques so far have
nd only limited application.
METALLIZATION
er the fabrication of the device, ohmic contacts to the different regions of the device have to be
vided by metal deposition. Also, in case of integrated circuits, different devices on the chip must
uitably connected (interconnection) to pe~form the desired circuit operation. Aluminium is most
ely used in silicon technology for providing ohmic contacts. Metal deposition is usually carried
it:1 a vacuum deposition chamber where the source and the substrate are placed. The system is
evacuated with the help of a combination of pumps to a pressure of 10-6- 10- 7 torr. The source

S8 Semi 011d11 tor D ; e : Mod l/ing and
. , nee heating and evaporatio
d by re I ta b . . n
, b nt
1
heate . the su strate ts avadablc in
metal i placed either m a tung ten filame~t. r ' provi i n for r tntt~g etectrolil beam (e·beam)
takes place. For better uniformit of dep itt n,di of re istance ~enung~ron beam is generated and
man mmercial deposition terns . . In tea a high-intensity eJec vaporation. Contaminati
t . h · · I d I th• pro e ' d causes e 0
e npora ion tee mque 1 a so u e · n
n
1
the metal an d to the resistance heaf
focu ed on the source material. Thi e-bearn rne ts deposition cornpare tng
from the boat is significantly reduced with e-beam
may cause pr bl
rocess in tances o ems
P · . r n and in some . dded to aluminium dur·
Aluminium, however, reacts with
I
ic ·bl 1 Oo/o silicon 1 a Wh 1 . tng
. . . . t thi pro em. , 01·um en an e ectnc field
(j unct:Jon sp1kmg). In order to c1rcumven . d 'th aturnt ·
. . . . . blern a ociate wi · ti' on of the field caus·
depos1t10n. Electrom1gratton 1s another pro . · the d1rec tng
is applied during circuit operation, aluminium tons ~?ve 1 ~Ioy is used in many present day !Cs.
breaks in the metal lines. To prevent this, copper- aluminium a d successfully and the superior
. h . lso been use .
Quite recently only copper interconnecuons ave a to be used as an mtercoanect.
' · l of copper ·
performance of these ICs shows the immense potentia_ . . that it has a low meltmg point.
One more disad antage associate
· d
w1
·th alummmm is
t be subjecte
d
to any processmg
·
at
Therefore, after deposition of aluminium, the substrate canno t problem. Therefore, iastead of
. l . oses a area
high temperature. In MOSFET technology, t us P II' silicon, commonly referred to as
aluminium, most modem MOSFETs use doped ~olyc:ystaCVmDe actor (similar to a VPE reactor)
T
po l ys1.1con, as the gate meta 1 . p o I ys1 ·1· icon is · deposited . m a re · I deposition temperature ·
· · f StH The typ1ca ts
usually at a low pressure by decompos1t1on °
4 · .. d b introducing PH or A R
3
d
8
600-800°C. In-situ doping of the polysilicon layer can be canie out Y . 1
. b
3
· . . . f d '(on polys1 icon can e oped b
m the gas stream during deposition. Alternatively a ter eposi 1 ,
Y
standard diffusion or implantation techniques. . . .
In compound semiconductors such as GaAs and InP, metal contact f?rmaaon ts _more drfficult
and a multi-layer structure has to be used. The most common ohmic contact tn n·GaAs is
Ni/Au-Ge with an overlayer of gold and a barrier material like titanium in between the ohmic
contact and the gold overlayer. After metal deposition, the wafer is heated to allow formation of an
alloy of metal and the semiconductor to ensure proper ohmic contact. Rapid thermal annealing is
preferred for compound semiconductors to counter the high vapour pressure problem at elevated
temperatures.
2.6 TECHNOLOGICAL ADVANTAGES OF SILICON
As . already poi~t~ out in ~hapter 1, silicon may not be the most desirable semiconductor as far
a~ _ its characteristic properties are concerned. Still more than 95% of VLSI · ·t b d
s1hcon. As a matter of fact, the electronics revolution of . c1rcm s are ase on
mainly because of silicon dev1·ces In th ' t. f the twentieth century has become possible
· is sec ion a ew tech I · 1 d
other compound semiconductor n·vals a ' no ogica a vantages of silicon over
re enumerated.
~1! Cost factor: Silicon is easily available on th .
pure silica (sand). The reduction of s·1· . . e surface of the earth in the form of Rearly
. I ica mto em1condu t . d ..
comparatively simple process In add·t· h . c 01 gra e s1hcon (99.9999%) is also a
. 1 10n, t e smole c t I
pres_s~re problem unlike that of GaAs or InP (d' b r_ys a growth of silicon poses no ~apour
of sl11con c
an
b
e grown. In contrast, GaAs and InP
iscussecl m sect'
ion
2
·
I)
· As a result, large crystals
usua 11 y smaller L . · crysta I
· arger wafer s12e means that m
orowth · . .
b is more d1ff1cult and crystals are
any more IC chi .
ps can be realized per wafer. Since

Imegrated Circuit Fabrl ation Te /1110/ogy 59
ost of proces tng depend only margtnt\lly on the wafer ize, the co. t per ch1p is much 1 : 85
1licon than for any compound semJconductor substrate. Al o, silicon i a material with
lle~t mech~~ical properti~s and . cua Withstand high temperature processing. Con equently,
icatton. of thcon ~ev~ces 1s relatively siml)le. For example, in silicon, a p-n Junction can be
ly realized by subJectmg the sample to an open tube d)ffusion process. However, compound
ico~ductors are severely. de~raded when ubjected to high temperature without proper
e~tton ~nd sea.led-t~be d1ffus1on O?w throughput) or ion-implantation (more ophisticated
mque) is required m order to realize a junction. Thus, the processing cost of compound
!conductors i also higher. Unless specific performance requirements are to be met, compoun.d
1conductor !Cs cannot be an economically viable alternative to silicon !Cs because of this
substrate and processing cost.
(2) Nati~e oxif!,e: The .success. of sillioom !Cs (particularly the MOSFETs) is largely due to
excellent dtelectnc properties of S10 2 , the almost ideal interface between silicon and Si0 2
, and
ease of thermal oxide growth on silicon surface. SiQ 2
also acts as a protection layer (mask)
inst most common dopants of silicon and hence used almost exclusively as mask in silicon
hnology. On the other hand, native oxiqe growth in GaAs and InP poses various problems and
quality of the native oxide as well as the interfac.e between the oxide and the semiconductor is
good. Consequently, MOSFETs using compound semiconductors is still not commercially
le. Even for masking and passivation, chemical vapour deposition of Si0 2
or Si 3
N 4
has to be
ied out. Despite extensive research for the la$t thirty years, the problems of oxidation in
pound semiconductors have not been' solved and this has adversely affected the growth of
pound semiconductor technology.
So far, we have discussed the basic fabrication processes used to realize semiconductor
ices. The present day semiconductor devices are fabricated using planar technology in which
fabrication is carried out from one surface plane (usually the mirror-polished top surface). The
al sequence of steps required to fabricate particular devices such as diodes, bipolar transist~rs
d MOSFETs in silicon IC will be discussed in Chapters 4, 6, and 10 respectively, along with
operating principles of these d,evices. It will then become clear as to _how the process
hnology has to be modified in order to enhance the performance of the devices.
PROBLEMS
An n-type silicon substrate has 0.5 µm oxide covering the ent~re ~urface area. Now
I 00 µm x I 00 µm windows are opened in the oxide. and bor?~ '.s d1ffus~d throubh 0 ~he
windows. The drive-in after diffusion is carried out m an ox1d1zmg ambient fo_r which
B = 0.3 µm2/h and A = 0.2 µm. This drive-in is continued for two hours. After this step,
(a) what is the thickness of oxide on the windows?
(b) what is the thickness of oxide elsewhere on the substrate?
Phosphorus is diffused into silicon from an infinite source at l 000°C for 30 min.
(a) Find out the total amount of phosphorus pet . um ·t area that has b oone into silicon.
(b) After step (a), the source is shut off and the samp I e is · su b' ~ec ted to drive-in at h 1200°C. Id b
. . d t 5 10'9 per cm
3
If the final surface concentration is to be marntame a x , what s ou e
the duration of drive-in?

60 Sc•mico11ductor Oeviees.· Modellin 8 a1td Technology .
. the junction aepth af ter ste
15 . cm3 what ,s
(c) If the original substrate doping was lO per '
110 _ 12
2
( b)? - 2 5 x .a: cm 1 s, sol
.
ri-14
1
cm2/s, D,200 - ·
[Given: for phos~horus diffusion, D1000 == 3 x · 3
I b 'l' 1021 per , m ]
OU I tty Of phosphorus at 1000°C :::: ~ '}'con wafers, the folJowi
unoxidized st 1
P2.3 In a particular oxidation process carried out on
data was noted:
Oxide thickness (d)
Oxidation time (t)
30 minutes
60 minutes
0.12 µm
0.20 µm
.
h . ?
0 3 ~ 101 in t 1s process.
H h
. ·11 . k w an oxide of thickness .
ow muc time w1 1t ta e to gro k d concemtratiOJil
. h bac groun o
P2.4 Boron is implanted at 100 KeV into n-type silicon wit a
10 15 per cm 3 •
.
00 cm 2, how Jong should th,
1
(a) If the beam current is l mA and the target area / 5
s m2?
implantation be carried out to realize a dose of 4 x 1 O per c . d h k d .
. . us formed an t e pea op,11n1
(b) Calculate the location of the p-n Junct10n th
concentration. Assume Rµ = 3 µm/Me V and ~RP = 0.3Rµ·
(c) Sketch the doping profile after the above process.
h
d
10
· an oxide layer grown on silicor
P2.S Windows of dimensions 5 µm x 5 ~Lm are to be etc e
. b) t' h t . .
. ) · · hotores1st ( nega 1ve p o ories1s
substrate. Draw the mask patterns neatly 1f (a pos1t1ve P
are to be used.
P2.6 (a) What 1s
·
the pnnc1pal
· ·
source from which
·
oxygen is
·
unm
· tentionally incorporated durino
c
Czochralski growth of silicon? . . .
(b) By which technique is it possible to grow single crystal silicon with lower oxygelil
incorporation?
REFERENCES AND SUGGESTED FURTHER READING
[ l] Gandhi, S.K., VLSI Fabrication Principles, John Wiley & Sons, 1983.
[2] Konig, U., H . Kibbe], and E. Kasper, MBE: Growth and Sb Doping, Journal of Vaccum
Science Technology, Vol. 16, p. 985, 1979.
[3] Hofkar, W.K., Implantation of Boron in Silicon, Philips Res. Repts. Suppl., No. 8, 1975.
[4] Sze, S.M ., VLSI Technology, 2nd ed., McGraw-Hill International Book Company, 1988.
[5] Sze, S.M., Semiconductor Devices Physics and Technology, Chapters 8-12, John Wiley &J
Sons, Inc., 1985.

Charge transport in Semiconductors
n this chapter, we shall ~iscuss the basic mechanisms by which current can flow in a
emiconductor. Current flow m a semiconductor can be either due to an applied electric field (drift
urrent) or due to a difference (gradient) in the carrier concentration (diffusion current). These two
urrents form our subject of discussion in this chapter. Subsequently, the fundamental
miconductor equations governing the flow of charge carriers in a semiconductor will be derived
onsidering both these current components.
DRIFT CURRENT
e have already seen in section 1.5.1 of Chapter 1 that when a small electric field is applied across
bar of semiconductor, electrons and holes acquire a drift velocity (vd) proportional to the
agnitude of the electric field. While electrons move in a direction opposite to that of the applied
eld, holes move in the direction of the field. This directional movement of the charge carriers
onstitutes a current, which is usually referred to as the drift current. It has already been derived in
hapter 1 that the current density J in a semiconductor sample having n electrons per unit volume
avelling at a velocity v is given by (refer Eq. (1.5))
J = qnv (3.1)
onsidering only free electrons, so that n is now the free electron concentration, and replacing v
ith the drift velocity vd, the electron drift current density can be expressed as
The minus sign in Eq. (3.2) indicates that the direction of the electron drift current lnctr is
pposite to that of the drift velocity. From Eq. (1.66), we know that the drift velocity is
oportional to the electric field

I .
62 Semiconductor Devices: Modelling and Technology be expressed as
itY can
d
I
·ift current dens
(3.3b)
Followmo a similar analysis for holes, the hole
~ J c1r == qpvd == qpµp&' ·c fields. For high fields, as
P • moderate eJectn d µ&' has to be replaced
I'd only ,or
nt an
However, the above equations are va 1 • . • no longer a consta
already pointed out in section 1.5.3, the mobihtY is .f urrent density (}ctr) is the
. I dn t c . d' .
with Ysat· f carriers the tota d holes move m 1rect1ons
As the semiconductor contains both typ~~ 0 . e ~Jectrons an
d iues 5 me
sum of the electron and hole current ensall ~dds up, and so
opposite to each other, the total current actu Y
(3.4)
J :: qnµn tff + qp µ g - P ' -
(J

Charge Transport in Semiconductors 63
r maximum resistivity (that is, minimum conductivity)
d µp, p > n;, which means that the sam
, p
l
e 1s
·
s
1·
1g
htl
y p-type.
pie 3.1
(a) Calculate the resistivity of intrinsic siHcon at room temperature.
(b) Calculate the resistivity of an n-type semiconductor with a doping concentration
No = 10 16 per cm 3 at room temperature.
olution: (a) As given in Table 1.3, we know that the intrinsic carrier concentration for silicon at
. ~m t~mperature ;s 1.5 x 10 10 cm- 3 • Also, from Table 1.4, the electron mobility for intrinsic
il1con is 1350 cm /Vs and the hole mobility is 480 cm 2 /Vs. The resistivity of intrinsic silicon is
erefore calculated from Eq. (3.6) as
1 1
p = -q-n,-. (-µ-n _+_µ_p_) = -l-.6-x_l_0 _ ~19_x_l-.5-x _1_0_10_(1_3_5_0_+_4_8_0) = 2.3 x 1 os n cm
(b) Assuming complete ionization, in this case the electron concentration, n ~
1016 cm-3.
The hole concentration p = n;IN 0 = 2.25 x 10 4 cm- 3 . Since n >> p, the resistivity of the
ple is effectively given by Eq. (3.7). Assuming the electron mobility in this sample to be equal
that in an intrinsic silicon sample, the resistivity is calculated to be
1
p = - - = l = o:462 Q cm
qnµn 1.6 x 10- 19 x 10 16 x 1350 I
l
Example 3.1 highlights the fact that by introducing a small amount of impurity ( < I ppm), it
possible to change the resistivity of silicon by many orders of magnitude. As already mentioned
Chapter 1, this is an important property of semiconductors. Evidently then, an accurate
easurement of doping concentration in a semiconductor is essential to determine its basic
roperties. It is to be noted that the electron (and hole) mobility is also dependent on doping and is
uced considerably for high concentrations of doping, although this has not been taken into
count in Example 3.1 . Therefore, in practice, a straightforward current- voltage measurement
oes not yield an accurate value of carrier concentration unless the value of electron (and hole)
obility is also known. In the next section, we shall discuss a imple way of measuring carrier
ncentration. and mobility simu.Jtaneously in an extrinsic semiconductor.
i
I
I
N O

,;:,64.:_..:S:=!e:!.n~u~ ·c!:.o~11d~t~,c:.!.ro~1~· ~D~e~v~ic:;e~ : ~M~o~d~e~ll~il~1g?..,..::.a~
d Teclu1olo'~8Y~---­
11 --
3.2 HALL EFFECT centration. 11he under,Jy·
·er con . tng
. ea uring the earn . d in a direotroJil perpendicufar
T~e :rail . effe~t is widely use~ for directly ~a~netic field is applt:d. figure 3.1_ shows a p-t
prmc1ple in tlus measurement 1s that when a he carriers gets de~ect d magnetic fields are apph;pe
to the flow of charge carriers, the path of t thickness d. Electric ~n field Bv an u~ward Lorened
semiconductor bar of length L, width W, and Due to the magn~t,c . with a dritit velocity fl
to this ?ar along x-axis and z-axis respectiv.e';.' moving along x-directl: le which gives rise t '":ir·
force given by qvxBz is exerted on the. carne holes at the top of the sa low in the y-eir.ee~io o_a
This upward force results in accumulatton of h . i's no net current t &o n ln
s ·nce t e1e h Lorenz 11 Fee.
corresponding downward electric field ~y·
1
ctly balance t e
. fi Id must exa
the steady state, the force due to electnc te
That is,
(3.9)
Area A
I c
~
D
Figure 3.1
Vco
Basic set-up to measure carrier concentration using Hall e~ect. The polarity of VH ans Ute
direction of tty correspond to that for a p-type semiconductor.
The physical ignificance of this effect i th at the magnetic field results in an increase in the
hole concentration at the top surface of th e ample shown in Fig. 3.1, till the electric field ~
become as large as vxBz. Once this electric fi eld is established, no net lateral force is experienced
by the holes as they drift along ' the bar in the x-d1rection. The establishment of this electric field is
known as the Hall effect and the field itself 1s called the 'Hall field'. The voltage acros~ the
terminals A and B is called the Hall voltage V1-1. As seen fro m Fig. 3 .1, VH = &'y W. With the kelp of
Eqs. (3.9) and (3.3b), we can now express this Hall fi eld a.
JµBz
~- = v XBZ = -- = J B RH (3.10)
qp p z
. The above _equation s ~gnit7es th~t the Hall field i proportio nal to the product of cl!ll'fent
denstty and applied magnetic foi ld with a proporti onality constant R = 1/c.p calJed the 'Hall
ffi · ' f' H 1 , .
coe . 1c1ent . A me~surement o 1:a11 vo~tage ~or a known current (/) and magnetic field (Bz) rs
earned out to obtam the hole c01y entrat1on p in th e ample. From Eq. (3.10), we have
l

Charge Transport in Semiconductors 65
(3.11)
ince all the q~antities on the ~ight ~ana side of Eq. (3.11) are measurable, accurate values of the
ole concentration can. be obtamed directly fr.om Hall measurement. Now substituting Vx = µP

I I 6(i Se11uconducror 'Devices: Modelling and Tech11of ogY
s
c:
c
0
::::,
~
c
~
c
8
c
~
Q)
w
-I
Distance x
f n of position.
Figure 3.2 Electron concentration as a tune 10
T . _ -1 to x ~ 0 is given by
he number of electrons per unit area in the reg10n from x -
[n(-1); n(O) J
1
We assume that there is no electric field so that the motion of electrons is perfectly ranaom,
is, half of them move to the right and th; other half move to left at any _giv~n tim~. Thei;efore,
number of electrons per unit area crossing the plane at x == 0 from left m time t'c IS
.!_ [n(-l) + n(O)]
4
The current density at x == O is given by the net number of electrons crossing the pla
x = 0 per unit time per unit area. The flux F 1
, defined as the average rate of electron flow per,
area per unit time moving from Jeft to right, is given by
Fj == -
l
4'Z"c
[n (-l) + n(O)]
. Similarly: the flux F
7
defined as the average rate of electron flow per unit area per unit t
movmg from nght to left 1s given by
l
Fz =
4
'Z"c
[n(l) + rz(O)]
Therefore, the net flux F can be written as
l
F = Fj - F 2
= 4
[n(-l) - n(l)]
'Z"c
(3.
The concentration gradient of electrons around x = 0 can be approximated as
dn n ([) - n( -l)
dx - 2l
(3.

Charge Tran ·port in Semiconductors 67
rorn Eq . . (3. l6) and (3.17), we now lilave
F = _ :!:!:_ !_ = _ D dn
dx 2-r " dx
here D,, = l2/(2-rc) i the diffu~ion coefficient or diffusivity of electrons.
The electron flux F constitutes an electron diffusion current density given by
(3.18)
JndifF == -qF = qD dn (3.19)
II dX
A imilar anal.ysis .as above can be. carried out considering holes. This analysis results in a relation
for the hole d1ffus1on current density given by
J pdiff = qF = -qD dp
P dx
(3.20)
The negative sign in Eq. (3.20) signifies that the direction of the hole current is opposite to
the direction of the i~creasing concentration gradient, since the movement of holes is from a level
of higher concentration to a level of lower concentration. Electrons also move from higher
concentration to lower concentration. However, since the direction of the conventional current is
oppo ite to the direction of electron movement, J,,diff is in the same direction as the increasing
concentration gradient as shown in Eq. (3.19).
CURRENT DENSITY EQUATIONS
When an electric field as well as a concentration gradient is present across a semiconductor
sample, both drift and diffusion currents flow and the total current density is given as the sum of
the drift and diffusion components. Thus, the total electron and hole current densities are given by
},, = Jndr + lndiff = qnµnt; +
J p = Jpdr + l pdiff = qpµp8 -
dn
qD,, dx
dp
qDP dx
(3.2la)
(3.2lb)
An important aspect of Eq. (3.21) is that the minority carriers can contribute significantly to
the total current through diffusion. As the drift current is proportional to the carrier concentration,
the contribution of minority carriers is usually negligible. However, even when the actual
concentration of minority carriers is very small, the gradient may be significant. Thus, the minority
carrier diffusion current may become as large as majority carrier currents in certain situations as we
shall see later.
3.5 EINSTEIN'S RELATION CONNECTING µ AND D
Although drift and diffusion are two seemingly different processes, a close relationship exists
between mobility and diffusion coefficient. This is because both these parameters are determined
by the thermal motion and scattering of the free carriers. In order to establish the relationship
between µ and D, the use of the important concept of constant Fermi Energy level at thermal
equilibrium (already demonstrated in sedion 1.3.9) is made.

68 Semiconductor Devices: Modelling and Tec'111ology
jconductor under therm
I
d ed n-type sern · · · · ~ S C
Let us consider a bar of non-uni form Y op
The bar is mtrmstc or x
equilibrium with a doping concentration as hown in Fig. 3 . 3 (a). ::: /. Beyond x = l, the dopin
while from x = 0, the doping concentration gradually increases upto x because of the concentratio
· · ation Now, J h ed · ·
becomes constant again. Let us assume complete tomz . · behind positive Y c arg tomze
gradient, electrons diffuse from x = I towards x =. 0, leaving . h tends to pull the electrons bacl
donors. This charge separation gives rise to an electric field, whic d 'ff use down the concentratio1
towards x = l. Thus in thermal equilibrium, electrons tend to A I in the resulting electric fielc
gradient causing a diffusion flow of electrons from right to ]~ft. ga n~t current flows, these fwc
causes a drift flow of electrons in the opposi te direction. Since no hed and it is easy to see wh)
'l'b · · then reac
current components must add up to zero. An eqUI I rium IS • b d so that the diffusion curren
. . . Tb · · d1stur e .
1t 1s established. Suppose, for some reason, the equi 1 rium 15 ns from right to left, resultmi
1
is more than the drift current. This accounts for a net flow of. e ~ctrol ctric field and the drift o1
·
m an increase
·
m charge separation.
· c
onsequen
tly
•
the butlt-in
r
e
h
e
d
electrons from left to right increase, till the equilibrium is re-estab ts e ·
Therefore, we can write
]
dn == 0
== qn(x)µ
11 11

• 111 ;,, 0 11 /w tm~ 69
ub t,tuting Eq. ( .2 ) in Eq. ( . 4 , ,
, \1\ writ
11(.,) .. .. , xp [ qrY ]
( . )
jfferentiating Eq. (3.25) , ith re pect to . , , e g t
~ - q r ) dv, 11 ·"' <
d.t '""' kT 11 ~·"' --:
d., = - Vr
here Vr = kT/q is the thermal It. ge nnd I: is the built-in ti Id
lectrons. Substituting Eq. (3.26) in Eq. (3.22), , e hn e
( .26)
rented d \1 t the diffu i n f
1milarly, for holes, we can how that
Dn = µ11Vr
DP= µpVr
( .27n)
3.27b)
quation 3.27(a) and 3.27(b) are known as Einstein' relation . Thi imp rtnnt et f equation
hows that there is a definite relationship between drift and diffu ion.
CONTINUITY EQUATION
We shall now consider the overall effect when drift, diffu i n, generati n a well a recombinati n
of carriers occur in a semiconductor. The combined effect i expre ed by the continuity equation.
Let us con ider a bar of semiconductor with cross-sectional area A as hown in Fig. 3.4. on ider
an element of infinitesimal thickness (dx) located at x a hown. The volume f the infinite imal
element is therefore (Adx). The essence of the co11ri111dt equation i that the 'overall rate of
increase in the number of electrons in the given volume i given by the algebraic um of four
components: the rate of flow of electron's into the infinite imal element at , the negative of the rate
of flow of electrons out of it at x + dx, the rate at which electron • re generated in the element, and
neoative of the rate at which they recombine in it.' Thu , the number of electrons in the slice may
e
increase due to the net inflow of electrons into the element con idered and/or net generation.
Expressed mathematically, this can be written as
where G 11
8n A A
Adx - = J,, (.,t + dx)- - J,,(x)- + (G,, - R,,) Adx (3 .28)
at q q
and R,, are the generation and recombination rate of electron re pectively.
v
I I
I I I - >.
.,. )---------- -- - ----J..--
.,. .,. .,. .,. .,.
.,. .,.
~ dx ~
Area A
I
I
J,,(x) ~
G,,
I
I
I R,,
I
I
x x + dx
:~ J,, (x + dx)
A semiconductor bar with cross-sectional area A showing an infinitesimal slice of thickness dx.

,o Semiconductor Devices: Modelling and Tec/lflOO~t~og~y~----
Al~o. since dx is extFemely small, we can expres
ol,, dx
ln(x + dx) == J,Jx) + ~
(3.29)
Substituting Eq. (3.29) into (3.28), we get
Similarly, for the flow of holes
on __!_ ~ + ( G n -
8t - q ax
R,,)
(3.30a)
op __ _!_ a1 p + (Gp _ Rp ) (3.30b)
at - q ox
. Eqs (3 .30a) and (3.30b) is due
d 't terms tn ·
The difference in sign of the current enst Y . ( 3 3
oa) and (3.30b) are referred to
1 b
. 't
to e ectrons and holes emg oppos1 e
1
Y
charoed Equations . . . h .
e · . Now substitutmg t e expressions
1
h
. . . + I d holes respective y. ' .
as t e contmuzty equatzo11s 1or e ectrons an
d ( 3 21 b) and the expressions for
+
1or
h
ole and electron current
d
ens1t1es
· · f
ro
m Eqs
·
(3
·
21a)
.
an
. equations
·
for minority carriers
. . b E (1 59) the continuity
the net recombmat10n rate as given Y q. · ' type semiconductor) can be
. d d for holes m n-
(np for electrons tn p-type sem1con uctor an Pn
expressed as
0 11 ofJ onP a2 nP G _
_P = 11 µ - + µ fJ - + Dn ~ + n
ot P " ox n ox ox
op/I - ofJ - a a 2
fJ J!!2_ + D ~ + c -
ot - Pnµp ox µP ox P ox 2 P
n p - no p
,rn
Pn - Pno
rP
(3.3Ia)
(3.3Ib)
There are three unknown quantities to be evaluated, namely n, P, and t/ and to solve for
these three unknowns, three equat10ns are needed. In princip le, the two continuity equations
(for electrons and holes) along with the Pois on 's equation ( discussed in Chapter 4) with
appropriate boundary conditions should have a unique solut ion. However, because of the nonlinear
nature of the equations, analytical solutions are not possible unless simplifying assumptions
suitable for the particular case are made. The following section discusses a typical example that
sol ves the carrier transport equation using suitable assu mptions. In the case when there is a flow of
carriers in the absence of electric field , (that is,

har,: • Tran.vport in Semlcondu tors 11
A TYPICAL EXAMPLE 'L~ADING TO AN EXPRE
DIFFUSION LENGTlI
ION FOR
Let us conside: an ~-type semi.conductor (fig. 3.5) where excess carriers are injected from one side
as a result of illummation. This generation of excess carriers increases the carrier concentration at
one urface (x == O) and causes diffusion of the carriers inwards (that is, into the bulk of the
semiconductor). In the steady state condition, the surface generation rate must be balanced by the
flux of electrons and holes to the right of x == 0. As the electrons and holes diffuse into the bulk of
the semicond~ct?r, they recombine, resulting in a continuous decrease in their concentrations.
Finally .. deep mSide tqe bulk, the carrier concentrations reduce to their thermal equilibrium values.
Smee electrons and holes are generated in pairs, equal number of electrons and holes are
n-type semiconductor
hv
' ' ' '' '
(\(\(\ ~ ' \
V V V ' I
f\J\/\;~
-----------')"----------=----------Pn0
Lp
Figure 3.5 Injection of excess carrier~ due to illumination from one side of an n-type semiconductor
bar and variation of minority carriers as they recombine inside the semiconductor.
injected into the bulk of the semiconductor at x = 0. This implies that the electron current is exactly
equal and opposite to the hole current, or in other words, the total current is zero. Also, since these
carriers recombine in pairs as they diffuse, even in the bulk Jp(x) + Jn(x) = 0.
Therefore, from Eqs. (3.21a) and (3.2lb), we have
(3.33)
where n; 1
and p~ are the excess electron and hole concentr

·~ Stmicond,tcror Devices: Modelling and Technology
Clearly, the excess electron and hole concentrauons . would have been · balance exactly in excess equal if electron Dn and /)'
h Were I equal. However, in practical situations, there is only a s_mall i?' this condition in Eq. (3 allcl
We o e have concentrattons,
·
and the quasi-neutrality con
d'
1tmn
·
1s
·
v
al1d
·
Usmg · )
,
3
Thus, we see that
Jr/ J p(drift)
1 Jp(diff)
i-cA
Jp(drift) « l
ID~- I I Jp(diff)
(3.35)
"1J-O-WN~ · . h . I I ·
In other words, the drift of minority carriers can be neglected smce t e mtema . e CCtric field
created due to the charge imbalance is small. However, the drift current for the maJonty Carriers
( electrons in this case) is appreciable since the drift current is proportional to the product of the
(small) electric field and (large) majority carrier concentration.
equation Neglecting (3.3Ib) ·as the drift of holes for the n-type semiconductor, we can rewrite the continuity
opn ==
D 0 2 Pn + G _ Pn - Pno
ot p a 2 p r
:x p
(3.36)
Hence At the Eq. steady (3.36) state, can dp.fdt be further = 0. Also, simplified GP = to 0 towards the right of x = 0 as shown in Fig. 3.5(a).
D 0 2 Pn == Pn - Pno
p a
:x 2 r
p
N t . th
02
Pn ° 2 (Pn - Pno) .
o mg at ~ = the solutmn of Eq (3 37) · f th ~
8x2 8x2 , . . IS O e JOffil
(3.37)
• Pn - Pno = A exp [ h J + B exp (-k J (
where A and B are constants that can be evaluated from the t b d . . .
.3S)
3
At x == 0,
At x == 0o,
wo oun ary conditions given by
Pn ::: Pn(O)
Pn == Pn0

ere, pnCO) = c ncentration f h le at the illuminated ur ace a h wn in ig. 3.5. Also, as t~e
0erated carrier diffu e and move deeper into the bulk they recombine re ulting jn a decrease rn
e · A b' ·1 l · ' ated
0centrau n. t an ar itran Y arge d1s~aAce from the surfa e at which the carriers are gener '
0
e carri.er concentration reduces to. t!1e thermal equilibrjum value. Since p,, is a finite value, the
ubstitut1.on of these boundary cond1t~ons in Eq. (3.38) impHes that A = o and B = [pnCO) - p,,o]·
ub tituttng these values of A and B m Eq. (3.38), we can write
Pn - Pno = (p.(O) - p,, 0 ) exp ( - :, J (3.39)
and is referred to as the diffusion length.
Substituting Eq. (3 .39) into Eq. (3.20) and noting that P _ p = p' is actually the excess
• • " rrO n
ole concenJration, we obtain an expre sicm for the hole diffusion current in this case as
J - D 8p qDP ( x J qD p'
pdiff - -q P ax = L (p/1(0) - P,,o) exp -L = { "
p p p
(3.40)
A hown in Fig. 3.5 with increasing x, the excess hole concentration dies out exponentially
due to recombination. The hole diffusion current, which is proportional to the excess hole
oncentration also decays at the same rate. The variable L represents the distance at which the
excess hole concentration falls to lie of its value at the poi~t of injection. It should be noted that
ig. 3.5 shows a steady state profile, that is the variation does not change with time. This implies
that the recombination of carriers in any given region of the curve is compensated by a constant
'nflow of carriers into the region. The excess inflow, that is, difference between the inflow and the
recombination gives the number of carriers which flow out of the region. Thus, if we consider any
region of the curve between x 1 and x 2 (say), the rate of carriers moving out at x 2 will be exactly
equal to the difference of the rate of carriers flowing in at x 1
and the net recombination rate
etween x 1 and x2. It can also be shown that LP represents the average distance travelled by a hole
before recombination.
Finall y, it must be emphasized that the assumption of neglecting the minority carrier drift
current i not justified in high injection condition. However, as already mentioned in Chapter 1,
most of the cases in this text take into account the low level injection.
The relationships derived in, this chapter govern the flow of current in a semiconductor.
These, along with Poisson's equation (discussed in Chapter 4), control the operation of all
semiconductor devices as will be seen in subsequent chapters.
Show that LP is the average distance travelled by the diffusing carriers before they recombine.
From Eqs. (3.39) and (3.40), we find that when carriers are injected from one surface, the
steady state carrier density as well as the diffusion current density reduce exponentially with
distance. From these equations, it can also be concluded that if I is the number of carriers which
are injected per unit time at x = O, the number of carriers which have not yet recombined ,at a
distance x is given by

I
7_~4:=._~S~e~ni~ic~o~n~d~uc~l£Or~O~e~v1~·c~es~:JM~od~e~ll~i,~igla~,~1d~Te~c~l11~w~lo~gQY'.._.~------------------~~:---~--.......
· · ting surface (as · p·
Considering a small slice of thickness dx. at a distance x from the mJec b m ig. 3.4),
the number of carriers which have recombined in the slice can be given y
I exp(--£;)- I ex+ x ;/x) ~ I ex+ {J[1 -ex+T, )1 ~
1
~ ex+t)
D
. . . . . h. h were injected at x = O we
1v1dmg this expression by f which is the number of earners w ic ' get
the probability of a carrier recombining between x and x + dx as
dx. exp(-~)
LP LP
U · h d' t ce travelled by a carrier be"ore
smg t e usual method of averaging, the average ts an 1 1
recombining can then be expressed as
xav =
00
J~exp(-~)dx = LP
LP LP
0
We have thus shown that LP is the average distance travelled by the carriers before they recombine.
PROBLEMS
P3.1 In a uniformly doped silicon sample, the hole component of current is hundred times the
electron component in an applied electric field . Assuming µn = 3µp, calculate the
equilibrium electron and hole concentrations, the net doping, and the sample resistivity at
300 K.
P3.2 A silicon sample is doped with 10 16 phosphorus atoms per cm 3 and 1.8 x 10 16 boron atoms
per cm 3 . Find out the resistivity of the sample at 300 K assuming all impurities are ionized.
If this sample is now uniformly illuminated with light that generates 10 16 excess electronhole
pairs (EHP) per cm 3 per second, calculate the change in resistivity of the sample
caused by the light in the steady state. Assume -r 11
= -rP = 1 o- s.
P3.3 A sample of intrinsic semiconductor has a resistance of 30 n at 375 Kand 300 n at 300 K.
Assuming that mobilities are almost constant at this temperature range, calculate the band
gap of the semiconductor.
P3.4 Th~ resistivity of a silicon sample (p 0 ) is measured at 300 K. The sample is then re-melted
and doped with an additional 5 x 10 16 arsenic atoms per cm 3 . A new crystal is grown tha
has a resistivity of 0.1 n cm and is n-type. Determine the type and concentration of dopan
in the original sample and value of p 0 .

Charge Transport i11 Semiconductors 75
3,5 A ilicon sample is doped with ]0 15 aonor atoms per cm3• Calculate the exce s electron a~d
h o I e concentration · require · d to increase · the sample conductivity by 20%. What 1s · t he earner
generation . rate require . d to maintain • these concentrations? Assume '!p :::
1 o-6 s and
T::: 300 K.
[Note: Use n; = 1.5 x 10 10 cm- 3 , µ,. ==. 1350 cm2/Vs, and µ = 450 cm2/Vs for silicon at
300 K.J P
Consider an n-type silicon sampte with No = 1015 per cmJ. Plot the variation of
conductivity with temperature for this sample. The temperature range should be from very
low temperatures to very high temperatulies. (Hint: Refer to Figs. 1.14 and 1.19)
REFERENCES AND SUGGESTED FURTHER READING
[l] Grove, A.S., Physics and Technology of Semiconductor Devices, Wiley, NP,W York, 1967.
[2] Sze, S.M., Physics of Semiconductor Devices, 2nd ed., Wiley, N.Y., 1981.
[3] Streetman, B.G. and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice Hall Inc.,
New Jersey, 2000.
[4] Tyagi, M.S., Introduction to Semiconductor Materials and Devices, John Wiley & Sons,
New York, 1991.

p-n Junctions
. . . . . f · t rated circuits. Such a junction can be
Th e p-n Junction 1s one of the basic bmldmg blocks o m eg .
formed by selective diffusion or ion implantation of n-type (or p-type) dopants mto a P-lype
(or n-type) semiconductor sample. It has already been mentioned in _Chapter 2 : that _th~ r~ulting
dopant distribution follows a complementary error fun cu on ( erfc) or a Gaussian distribution a,
shown in Fig. 4.l(a). However, in order to obtain simplified analyucal expre~sion_s, the doping
profile is generally approximated as a box-like or abrupt junction as shown m Fig. 4.l(b). An
abrupt junction is one having constant dopant concentrations in both the n-type and p-type regions.
We shaJI first consider the electric field and potential distribution in such an abrupt p-n junction
and later extend the analysis to linearly graded junctions. Finally: the junction capacitances and the
flow of current in a p-n junction under applied bias are discussed.
c
.Q
ro
....
-c
Q)
(.)
c
0
(.)
O>
c
·a.
0
0
"
g .,___N-.o(X)
.... cu
-c
Q)
(.)
c
0
(.)
CJ)
.~
0.
0
0
NA~-----~-------------
(a)
Depth (x) -
Depth (x)
Figure 4.1
(a) Actual doping profile in a p-n junction; and (b) the
. (b)
approximate abrupt doping profile.
4.1 p-n JUNCTION UNDER THERMAL EQUILIBRIUM
We have already seen in Chapter 1 that the F .
valence band edge ' w h.l 1 e m · an n-type semicondu enm level t in . a . p-t ype semiconductor . lies close to the
1 c or, It lies clo se to the conduction band edge.
6

p-n Junctions 77
mean that the p-region ha a higher concentration of holes (and few electrons) while n-region
higher concentration of electron (and few holes). Now, when a p-region and an n-region ~re
ht ~n cl?se contact (i.e. a j.unction is rformed), this large concentration gradient at the ju~ctwn
d1ffu:s1on of carrier . While holes diffuse from the p-region to the n-region, electrons d1ffu~e
the .n-region to the p-region. This process results in some uncompensated donor i.ons (N~) 1.n
-re~ton and some uncompensated acceptor ions (N;) in the p-region near the junction. Thi~ ts
aucally shown in Fig. 4.2(a). Consequently, a negative space charge builds up in the p-reg10n
a positive space charge in the n-region. This creates a built-in electric field directed from
've char e to ne ative char e (that is, from n-region to p-region) which gives rise to a drift
nt. The direction of this drift current will be O posite to that of the diffusion current for b
ons and h les as shown in Fi . 4.2 b . An e uilibrium condition is reache where there is no
ansport of carriers as the diffusion component is balanced by an equa an opposite drift
anent of current
p-n junction
{,
eee (±) (±) (±)
eee (±) (±) (±)
p-region eee (±) (±) (±)
eee (±) (±) (±)
eee (±) (±) (±)
IAee (±) (±) (±)
~ Space charge
region ~
n-region
(a)
q Hole diffusion ¢=:J Hole drift
q
Electron drift ¢=:J Electron diffusion
Ee------._.------ - - - ---- - ----t------
E;---------------,,,
E -----------------~~~~-----------------~
v ' , ' , ,, EF
.... ____________ _
(b)
~ ~-i
n ~ en, , i
(c)
lgure 4.2 (a) A p-n junction showing the uncompensated acceptor a~d donor. im~urities in the space
rge region; (b) the directions of flow of electrons and hol~~ d.ue to dnft and d1ffus1on; and (c) the band
diagram at thermal equilibrium.
Since there can be no net build-up of ch~ ge on either side of the junctio~ as a functi~~ obk
, the drift and .- · on.monents of the current must cance~ each_ o!h: r for both typ~ of
ge carriers that is J and J must each be equal to zero. If that 1s not the case, then to satisfy .
equireme~t of no' n:t curre~t, JP must be equal to - J 11
• This signifies that both electrons and
rs are moving in the same direction, which is absurd. Therefore,
(4.la)

78 Semiconductor Devices: Modelling and Technology
(4.lb)
and
J J J 0
d + ,, diff -
•
n - n r • • • the fermt level must be constan
aJ equ1hbnum, & b d t
Also we know that fior any J·unction at t h
' . erm n juncuon · can there,ore e rawn simpJ y
throughout. The energy band diagram for this abrupt p- . the junction, the electron and hoJ
by aligning the Fermi level as shown in Fig. 4.2(c). Far frohm ositions of Ev and Ee with fCSJ)Cc~
. . . a d and hence t e P . & eel I h
concentrat10ns on both sides remain unauecte ' h J·unctt0n was ,orm · n t e spac
· h were before t e . -" c
to the Fenm level also remain the same as t ey d bend, accountmg ,or the presenee
charge region, however, the conduction and valence band e ;es Jectronic potential (as discussed in
of an electric field. Since the energy band diagra.m reflects ~ e e static potential), the n-region is at
section 1.2.4, the electronic potential is the negative of thee ectr~ E (or Ev) from the p-region t
· · Th· difference tn c o
a higher electrostatic potential than the p-region. is otential or the built-in potent.Jal
. . . '' . th called the contact p - . - - .
th e n-re 10 1ven by Vbi• where vbi is e . . 1 energy can easily "fall down" t
u, h . .
9 th t a hioher potent1a
o
vve ave seen m Fig. 1. at e I ectrons a ~ h ther hand since hole energy •
· · · d · band On t e o ' in
a region of lower potential energy m the con uctton · . 1 "climb up" a potential en t
an energy band diagram increases downwards, holes can east Y 2
·s qut'te different Ther ~rg
. . . . · · Fig 4 (c) i · e 1s a
vanat1on m the valence band. However, the s1tuat1on . b 10 d · the · · n-reg1on . an d holes 1·n th e va I ence
10
large · concentration of electrons in the conduction .. . an " h'le the h o 1 es h ave t o "-" ,a II d own" ·
band m the p-region. . These . electrons . . have . to chmb ·f up th w carriers i have su ffi 1c1ent . 1 y I arge kmeti'c . in
or d er to cross the Junction. This 1s possib 1 e on 1
· · h Y i I e therefore creates a barner . to the flo
energy. The potential difference across the space c arge ayer
w
of carriers called the potential energy barrier. This barrier is equal to ~ Vbi at thermal equilibrium.
We shall see later that this barrier can be modified by application of bias. .
4.1.1 Built-in Potential
The built-in potential can be calculated as the difference in the positions of the intrinsic levels in
the n- and p-regions of the junction in terms of the doping concentrations. In the p-region, using
Eq. (l.30), the position of the Fermi level is given by
Similarly, in the n-region
EFp = E,p - kT In :~
No
EFn = E;n + kT In - n,
l
(4.2a)
(4.2b)
Since the Fermi level is constant throughout, EFp = Ef,,· Therefore, from Eq. (4.2), we have
E - E - k I NANO
ip in - T n = q Vbi
rz2
I
(4.3)
Assuming complete ionization, we can write p = N 11 _
s th b ·1 · · po A• no - N o, np0 = n·
21 Pp0 and p - n·lnn0
21
•
o, e Ul t-m potential can be expressed as ' no -
~
-I Ppo n
_
\/,
bi = V r n - = Vr In ___.!!Q_ '
(4.4)
__ P,,o npo
where
Pp0 and nno = m~jor~ty carrier concentrations at thermal e . . .
Pno and np0 = mmonty carrier concentrations
a
t
t
h
ermal equ1ltbnum.
qu~lt.br~um and

p·n Junctions 79
From ~he E~ample 4.1 .that ~ollow we see that for the nme extrins ic doping concentrations
he p- and n-side of the Junction, the built-in potential i larger for materials with larger band
and c©n equently smaller intrin ic Cafil'ler concentration. In this example, Vbi(GaAs) > VbiCSi) >
e).
tulate the l~uilt-in p3otential at 3?0 K for an abrupt ilicon p-n junction with NA = 101s per cm3
No = lO per cm on the p-side ana n-side respectively Also find the values of the built-in
ntial when the semiconductor is (a) Ge alild (b) GaAs. ·
fi,011 : For. silicon, the intrinsic carrier concentration fl · at 300 K is 1.5 x 1010 per cm3. Also
q at 300 K 15 0.0 2 6 V. Using Eq. (4.3) and substituting 'the values of n;, NA, and No, we have
vbi = 0.026 ln 1018 x 1015
(1 .5 x 1010)2
= 0.76 v
r Ge, n, at 300 K is 2.4 x 10 13 per cm 3 . Therefore ,
1018 15
Vbi = 0.026 In x lO = o.37 v
(2.4 x 10 13 )2
r GaAs, n; at 300 K is 1.79 x 10 6 per cm3. Therefore,
1018 15
vbi = 0.026 ln x IO = 1.23 V
(1.79 x 10 6 )2
n the built-in potential be measured directly?
A built-in potential or contact potential is developed whenever two dissimilar materials are
ought in contact. The two materials may be p-type and n-type regions of the same
miconductor, or a metal and a semiconductor. In all such cases, as the Fermi levels of the two
aterials in contact should align, the built-in potential (in Volts) is equal to the difference in the
sitions of the Fermi level (in e V) of the two materials when they were isolated, or in other words
the difference in their work functions. Now if we are to measure the contact potential, we have
connect a voltmeter, which requires that metal contacts be provided at both p- and n-ends of the
nction, We now have three junctions, namely metal-p-semiconductor, p-n junction, and
semiconductor- metal junctions, in series. The voltmeter will measure the sum of the three
ntact potentials. If q

80 Semiconducto
r
D
evices:
.
Modelling and Tee/mo
l
ogy
4 .. 1.2
Concept of Space Charge Layer
It has alread b . . h d the concentration orad'
a . .Y een pomted out earlier in secuon 4.1 t at ue to . . c ient el•fui
t the ~unction, a space charge layer (also called transition layer) !s ~reat~d With uneo~Pcna g
donor ions i
n
th
e n-reg10n
.
and acceptor ions
. h · Within this space ch 'lcci
tn t e p-region. . . . arige re •
electrons and holes are in transit from one side to the other. How~ver, it ~s. imporit.ant t0 note ~n.
ther~ are much fewer charge carriers than dopants in most of this trans1t1?n reg1.on. S0, We a~
consider
.
that
w1
'th' m the space charge region the c
h
arge is
·
on
l
Y
due
.
to the 1mmobtle
.
a cceptor t:an
donor .ions. In other words, this region is depleted of mobile carn~rs and ts ~lso referred toatld
depletion layer. In this depletion region, as we move from the p-reg10n to n-reg1on, the differen as
EF) at first reduces, becomes zere and th Cc
between the intrinsic level and Fermi level (£, -
becomes ~egative as can be seen from Fig. 4.2(c). This actually ~eans that the. hole ~o~centrau:
across th1~ region decreases from Pp in the p-regio~ to Pn .m the _n-r~gion., Simttlarly, the
concentration of electrons decreases from 11 in the n-reg1on to nP 10 the P region. Figure 4.3 sh 0
, ..
the . . n . "s
vanation of the carrier concentrations in the space charge regwn.
Pp0-----
J----nn0
np0----~
1( ) 1
I
I
'Space charge'
region
Figure 4.3 Variation of electron and hole concentrations in the space charge region.
Example 4.2
Consider a silicon p-n junction where the doping concentration in the p-region is 10 18 per cm 3 .
Calculate the space charge concentration at a point x inside the space charge region where 1/l(x) =
0.1 V. Assume that this point x lies in the p-region.
Solution:
Assuming complete ionization, the equilibrium hole concentration in the p-region
Pp0 = NA = 10 18 per cm 3 and the electron concentration npo = n;I NA = 2.25 x 10 2 per cm 3 at 300 K.
From Eq. (1.28), we can write
Ppo = 11 1 exp
(
E;p -
kT
E F J
and
p(x) = n, exp ( E, (xl; E, J

()" · ga,~
p-n Junctions 81
re, from these equations, we can Write
p(x ) = Pµo ex.p (E,(x) - E,P) = P
exp (-qlf(x))
kT pO kT
t the point x where 1/f(x) = 0.1 V, the hole concentration p(x) is given by
( ) l 018 ( -0.1 )
P x - exp Q026 = 2.13 x 1016 per cm3
ing a similar procedure for electrons using Eq. ( 1.27), it can be shown that
n(x) = npo exp(q~f)) = 2.25 x 10 2 exp( O.l ) = l 05 x 10 4 per cm3
0.026 .
the total space charge density at the point x is
Q(x) = -q [NA - p(x) + n(x)]
= -q [10 18 - 2.13 x 10 16 + 1.05 x 10 4 ] = -q 9.98 x 10 17 =:: - ql0 18 = -qNA
xample 4.2 serves as a validation of the depletion approximation, according to which the
r of mobile charges inside the space charge layer is negligible. It is evident that the hole and
n concentrations are much SI?aller compared to the ionized dopant concentration and hence,
ignored. Thus, neglecting mobile carriers within the space charge, the charge density in the
n is_pP = -qNA and on the n-region, it is Pn = qN 0 .
t must, however, be noted that at the eages of the- space charge layer, the mobile carrier
tration approaches the concentration of the dopants, and hence depletion approximation may
valid. (For example, consider 1/f(x) = 0.026 V in Example 4.2). However, the thickness of
gion is very small compared to the overall space charge layer thickness. Hence, in all further
·s in this book, for the sake of simplicity, we shall assume that the depletion approximation
d throughout the space charge region. In other words, we assume that the space charge
has sharp boundaries, where the charge concentration changes abruptly from Pp = -qNA to
the p-region and Pn = qN 0 to zero in the n-region.
Distribution of Electric Field and Potential within the Space Charge
Layer for Abrupt Junctions at Zero Bias
electric field lines must begin and end on charges of opposite sign, the total number of
ensated acceptor ions in the p-region must be equal to that of the uncompensated donors in
gion of the depletion layer. This causes the space charge layer to extend unequally into the
n-regions depending upon the relative doping concentrations of both sides. For example, if
ing concentration in the p-region (NA) is greater than the doping concentration in the
n (Nv), the space charge region will extend further into the n-region than into p-region to
equal am.ount of charge. Thus, the total uncompensated charge on each side of the junction
iven by ,
(4.5)

where A or ss~sectional area of the junction, . . to p-region, .
• , = penetration of depletion region . Jn ·nto n-region, · and
1
11 P n trntfon of deplebi n region t
q = eleclronie charge.
. for sirnplicity, !hereby asslllll'
d . nsional analY515 · • t
In this book we shall consider only one- une h ss-sectioO· A p-n Junctton, where t
' · I ng t e cro 11 · F'
thnt there i n variation in the device properues a O • schernatic• Y ,n tg. 4.4(a). 'r
depletion region extends from x = -xp to x ~ x,., is. sh~wn4 4(b), Since the nMmber of aecep
corre ponding charge distribution (p versus x) is sho"."n in fig. th. e donor impurities in the n-regi
1mpunt1e · · · · m the space charge region . 1n · the p-reg ion 1s equal . to ;ven by NAxP) rn~st b e equal to that o t, I
the area under the charge di tribution curve for the p-reg'.on 4(~(b) a relationship between Ille relal'
then-region . (given by NoX n ). From Eq. (4.5) as well I . as Fig: ion · can 'b e obtained as
opmg concentration and the penetration of dep euon reg
d
(4.
x,, NA
--- --- :::
Xp ND
p
.n
(a)
-Xp O Xn
p
qNoi----
-------'----..L-----~ x
-Xp O Xn
(b)
g(x)
x
(c)
~m
Figure 4.4
A ~-n junction showing (a) the
distribution, (c} the electric fie~~ad~! tr~:~~;~, r=~~o~d~~~
e potential variation.
x = - x~ to x = Xn, (b) the cf.large

p-n. Junctions 83
other words, i: th~ doping co~centration in the p-region of the junction is 1000 tim~s the
. oping concentration in the n-region, the width of the depletion layer in the n-region will be
ooO times that in t.he p-regio~. In. such cases for all practical purposes, the depletion region
xist only on one. side. of .the Junction ancd the penetration on the heavily doped region can be
egJected. Such a Junction is called a one-sided abrupt junction and is used in our analysis later
this chapter.
J1 L t s . i F 4
e u no~ again .re er to ig. .4! and obtain an expression for the electric field distribution
nside t~e dep.letio~ regmn: To rel.ate the charge distribution with the electrostatic potential 1/f, we
egin with Poisso~ s equation,. which can be derived from Gauss law. According to Gauss law, the
oral normal electnc flux coming out of a closed surface is equal to the charge enclosed by it, or
where
p = charg~ ?~nsity in the space charge layer,
£~ = perm1tttv1ty of the semiconductor, and

l' and Technology efore, we have
84 Semiconductor Devices: Model mg . . 1JJ ( ) :::: o. Thef
ndttJOO n = -
N ic field at x == O.
q vx,, i·s the maximum electr
E
s . we have
l
. ~
Following a similar ana ysis 10 r the p-region,
qNA(x + Xp) _ 8. (1 + ~j
&'P(x)= - E - m xP )
s
for O

t'n Eq. ( 4 .lS), We can wnte
p-11 Junctions 85
x11:::: _NAW -
. NA + No
ubsututmg these values of xP and x in E
II
q. (4.14), we get
2e, v.,(-1_ + -1._)
W::: ~ ::: 2esVl!l.
here Neff can be considered to be an effe ti q . qNerr
c ve doping concentration given by
(4.16)
1 1 1
-:::-+-
Neff
r a one-sided abrupt junction if N >> N N NA N 0 (4.17)
' A D, elf ::::: ND· Also Eq. ( 4.17) can be approximated as
w :::
(4.18)
is ~ so implies that virtually the entire built-in potential is dropped across the lightly doped side.
alculate the maximum electric field and the width of the depletion region at zero bias for an
rupt silicon p-n junction with NA = 10 19 per cm 3 and N 0
= 1015 per cm 3
at room temperature.
se n; = 1.5 x 10 10 per cm3, er= 11.9 for Si, co = 8.85 x 10- 14 Flem)
Using Eq. (4.3), we have
1019 x 1015
vbi = 0.026 ln
10 2 = 0.817 v
(1.5 x IO )
this problem; since NA/No = 10 4 , we consider the junction to be a one-sided abrupt junction.
ow, from Eq. (4.18),
W=
2 x 11 .9 x 8.85 x 10-14 x 0.817 = 1.037 x 10-4 cm = 1.037 µm
1.6 x 10 19 x 1015
l 0 ;n I = ;
2\1, 1 . 2 x 0.817 = 1. 5
8 x 104 V/cm
= 1.037 X 10-4
is left as an exercise for the student to ~e~ ·r y that ( 4.16) the is depletion used. layer w1 "d t h is · ne arly the same, if
one-sided junction is not considered an q

x
. d Tec/1llOO!_l~og{lY ____ _
86 Semiconductor Devices: Modellmg an • •tbiD
P t nt1aJ WI
. . Jd and o e B·as
1
4.1.4 Distribution of Electric Fie J nctions at Zero
Layer for Linearly Graded u . profile may not be VaJ'd
·mation of abrupt doping do jog concentration . I . le
For many. practical situations, .the approx~ed junction where the p
18
a h
now consider the case of a linearly gra h a situation
function of x as shown in Fig. 4.5(a). for sue
r
No - NA = ax ,4
where a = constant of proportionality.
p
~ X)
d . t· .
. . d (b) the electric fiel vana ,on ,n a linearly
Figure 4.5 (a) The doping concentration distnbut,~n an.
9 raded
p-n 1unct1on.
(b)
Then the solution · of Poisson 's equat10n · y1e · Id s an expr ession for the electric field as
I
I
J
(4.20) /
I
where C is a constant of integration to be evaluated from the boundary cond!tion. Accerding to the /
boundary condition at the edges of the depletion la~er (x = ± ~/2), th~ eJec~1c field faJls to zero. Ir /
may be noted that since the doping concentration 1s symmetnc on either side of the junction, the /
depletion width will extend equally on both sides of the junction, that is, Xn = xP = W/2. Therefore,/
.. qa ( 2 W 2 ) !
ef:(x) = 2cs x - 4 (4.21) !
The plot of 0'(x) as a function of xis shown in Fig. 4.5(b). From Eq. (4.22), the value of

p-n Junctions 87
qVbl = (EF - E;(x)) l.r = W/2 - (EF - E,(x)) lx=- W/2 (4.24)
sing (EF - E,(x)) in terms of the doping concentration as in Eqs. (l.29) and (l.30) at the
of the depletion layer, we have
V. . = v ln ((aW/2)(aW/2)J
2 V I (aWJ
br
T
= T n --
2
n. 2n 1
I
(4.25)
~ Eqs. (4.2~) and (4.25! s~multaneo_usly, it is possible to obtain numerical value~ for . the
1on la_Yer width and bu1lt-m .potential for a particular case of linearly graded Junction.
ver, this cannot be done analytically and numerical techniques have to be used.
THE p-n JUNCTION UNDER APPLIED BIAS
an external voltage is applied to the p-n junction, the electron and hole concentrations deviate
their equilibrium values. The diode current is closely related to these variations. Since the space
e region is devoid of mobile carriers, its resistance is much greater than that of the neutral
d n-regions. Therefore, practically all the applied voltage is dropped across this space charge
and is superimposed on the built-in potential. In other words, the potential difference across the
tion layer deviates from its equilibrium value of Vbi by the amount of applied bias. When the
nction is forward biased by V 1 , that is, the positive terminal of the battery is connected to
region and the negative terminal to the n-region, the potential difference across the space charge
is reduced to (Vbi - V1) as shown in Fig. 4.6(a). On the other hand, when the p-n junction is
e biased by Vn that is, the positive terminal of the battery is connected to the n-region and the
ive terminal to the p-region, the potential difference is increased to . ( Vb! + ~r) as shown ~n
.6(b). Figure 4.6 also shows the variation in quasi-Fermi levels, which 1s discussed later m
n 4.3.2.
~
p
;'v,
n
~
p
V,
n
- x Xn
l
I
I
. -'f ----"'---r~-+----'-- E Fn
I
I
I
I
I
I
qV,
I
(a) I ) (b)
Biasing and energy band diagram for a p-n junction under (a) forward bias and (b) reverse bias.
I
I
I

88 Semiconductor Devices: Modelling and Technology . d field is . opposite . to that of th
. f on of the app 1 ie 'th fi c
When a forward voltage is applied, the d1rec I h junction reduces w1. orward biag
built-in field. Consequently the effective field across. t efi Id js increased. This change in th ·
' . h effecuve ie th J tr' fl c
Conversely, when a reverse bias is apphed, t e & rd voltages, e e cc IC
. 'dth For ,onva · · f ux line s
electnc field also affects the depletion layer w1 . W The apphcauon o reverse voltag
reduce, leading to fewer uncompensated charges and sma~Jer . d therefore a larger W. Since the,
:"I.. • • • •
1
tric flux Imes an . h 1 c
b
Y tue same logic, results m mcrease m e ec bru t junction, t e new ~a ues of W and
voltage drop across the junction is now (Vbi - V), f~r an a (Jl4) and (4.16), that JS,
&m can be obtained by replacing Vbi with (Vbi - V) 10 Eqs. ·
(4.26a)
2(Vbi - V)
where
V = applied voltage
V = V 1
, for forward bias
V = -V,, for reverse bias
I I
w ==
~ ' == - w
2es(Vbi - Vl
qNeff
(4.26b)
Example 4.4
For the p-n junction of Example 4.3, obtain the maximum electric field and depletion layer width
when (a) a forward voltage of 0.3 V and (b) a reverse voltage of 3 V is applied. Also sketch the
electric field distribution for these two cases along with that in thermal equilibrium as obtained in
Example 4.3.
Solution:
In Example 4.3, we have calculated Vbi = 0.817 V
Case ( a): When v 1 = 0.3 v,
Now, from Eq. (4.26b),
Vbi - V1 = 0.817 - 0.3 = 0.517 V
W=
2 x 11.9 x 8.85 x 10- 14 x 0.517
1.6 x 10
- 19 x 10
15 = 8.25 x 10- 5 cm = 0.825 µm
From Eq. (4.26a),
Case (b): When V, = 3 V,
Now, from Eq. (4.26b),
Vt,i + V, = 0.817 + 3.0 = 3.817 V
I
w = 2 x 11.9 x s.\ss x 10- 14 x 3.817
1.6 x \ 0 19 x 101 5 = 2.24 x 10-4 cm = 2.24 µm
'

-n Junctions 8
Bq· c 4.26a), I ~. I- 2(Vb1 w -
"""
f roJ11
x 3·817 4
= 3.4 x 104 V/crrt
4 x 10-
p-type ~ ~ ""'type
4.2.1 Depletion Layer Capaciitance i'1 an Abrupt p-n Junction
From our discussion of the space charge lay'er, we can visualize it as a dipole layer of positive
donor and negative accep~or ions. As the li>ias voltage is changed, the width of the depletion layer
also changes, as majority carriers flow in or out ef this layer. This is similar to the charging and
discharging of a capacitor. The depletion eapacitance, also called the junction capacitance (C 1
) is
thus expressed as
C1 = dQa
I d:V
Using Eqs. ( 4.5), ( 4.6), apd (4.17), ,We can write
QD = AqNeffW
Now from Eqs. (4.27), (4.28), and (4.26b), we have
(4.27)
(4.28)
C _ dQ 0 _ dQD dW
1 - dV - dW dV
A ,.,, I Es - Ae q.!N eff
= q , Y,eff 2qNen:CVbi - V) - s 2es(Vbi - V)
(4.29)
Substituting Eq. (4.26b) in Eq. (4.29~, we now have
AES
C 1 - -- w
(4.30)
Equation (4.30) is the well k~owt1 expression for, a p arallel plate capaeitor 'where the two plates are
separated by a distance W. Ln other, wmids, tile expJ;essicm for tfue d~pletion capacitance is identical
to that of a parallel plate capacitor. However, unltke a paraliet pla,te capacitor, W here varies

d 1 ., ,,,,ofogY 'n the atW11ied
LI' "" t ,e 1 r·r
-. 9=.i>:......!S~e::.:n.:.:.1 ic::.:o:.:':::'d~u;.;.cr~o.:..r..;;;D:...;e:...:.v.:;;1c:..: e~s ._· _M_o_d_e_,_,,8,~~ , . with a ch u n h substrate as w
- vanes . f t e
1 1 also . ,ccntrutwn for such a juncd
nonlinearly with voltage. Consequent_Y~t the doping col -n j unction,
0t.tange in C; cam be measured to exti.a e-sicled abrupt P
i . 11 . \SC
b\!lilt-in potent al, especia Y m
of' a on
ci write
Neff~ Nv· Hemce from Bq. (4.29), we cull
where C 1 = C 10 for V = 0.
From Eq. (4.31), we can write
~
C1 == A 2(Vbi - V)
... 112
~c,0(1 -fiJ
1 2 (Vbi - V)
cJ - A 2 qssN D
(4,32)
• nction diode, measure the
the p-n JU · I
. voltage across the apphed vo tage, we get a
So we find that if we chang~ the bt~ lly plot (1/CJ) v~rsu; Now, since q and Es are Well
10 7
capacitance C1 at each bias pomt and 2 ~ ) as shown in f ig. · · the slope of the straight line.
straight line with a slope equal to (-ZIA fiq£ds ~t the value of ND. [ro rnh d iode in the reverse biased
'f A · k own we can tn °
d · with t e
known constants, 1 is n t must be ma e d harge capacitance, \Vhich
It must be pointed out th~t the_ measu~;;:~ sbiased condition the st? renc; does not equal c,. From
condition (that is V < 0), smce m the f. d the measured capac1ta Th .core extrap0lat1'ng th
. . · 4 4 3 dominates an 2 . , ero ere1, , e
we shall discuss m section · · , . I of C 1
is z · .
Eq. (4.32), we find that when V == Vbi• the re;1p;~c;et the value of Vbi from the mtercept of the
( 1/C]) versus V curve for positive values of , . .
curve w1
'th the V-axis
· . - V measurement 1s
.
an
, important tool for obta1mng both
Thus, we see that the reverse bias C . f' . -n J·unction.
. d h b 'It ·n potential o d P
the doping concentration an t e u1 - 1
c2
J
Figure 4.7
(1/C} ) versus V plot for a reverse biased p-n junction.
4.2.2 Depletion Layer Capacitance in J unctions with Arbitrary Doping
Profiles
Let us consider a p-n junction wi th an arbi trary dopi ng as shown in Fig. 4.8(a). The electric field
distribution for this profile at an applied bias V can be obtai ned by integrating the doping profile
function, as discussed in section 4.1.3, and is,shown in Fig. 4.8(b). Now. for an incremental change
dV in the applied reverse voltage, there wi ll be a corresponding change in the electric field (def}. If the
resulting change in Wis very small, that is, dW

dV is given by the area of the
wne'\ flux coming out of a closed
eleC; == dQo, where At;d

92 Semi 011d11ctor Devices: Modelling and Technology
Now substituting Eq. (4.36) in Eq. (4.35), we have
qN(W)A 2 e; .( 1 J
dv - ' -
- - 2
2£ 5 \ C 1
(4.37)
or
dV qN(W)A 2 £ 5
. .
Equation (4.37) shows that the C-V characteristics of p-n Junction
5
can also be used to obtain
is the same as that for
the doping profile for non-uniformly ·doped regions. The initial pro~ess rsus v curve is plotted
uniformly doped junctions, that is after C-V measurements, the (1./C; ~
0
::entration at the edge of
Using Eq. (4.37), we see that from the slope of this curve, the doping . d Equation (4.33) can be
the depletion region N(W) corresponding to a particular C 1 can be obtai.; iot can be drawn. It can
used to obtain W for each value of C 1 , and therefore the N(W) v~rsus p = constant), Eq. (4.3 7
)
be easily verified that for uniform doping concentration (that is, N(W)
reduces to Eq. (4.32).
4.3 STATIC CURRENT-VOLTAGE CHARACTERISTICS OF p-n JUNCTIONS
· · · · · w·th the application of forward
At zero bias, there 1s no net transfer of camers across the Junct10n. 1 .
bias, the potential barrier is lowered and many more electrons from n-region ~e a~le to di~se to
the p-region as they now have sufficient energy to cross the barrier. Similar_ situation prevails f?r
the holes and thus the diffusion current in a forward-biased junction is qmte large. An opposite
situation is encou~tered in a reverse-biased junction, where the potential barrier_ is so large that
virtually no electrons from the n-region and no holes from the p-region can diffuse across the
junction. The current is now due to electrons from the p-region and holes from the n-region
crossing the junction. Since these are minority carriers and are therefore few in number, the reverse
current is extremely small. In this section, we shall derive a relation for the steady state currentvoltage
characteristics of p-n junction diodes in terms of the various device parameters.
4.3.1 Current-Voltage Relationship in an Infinitely Long Diode
After the qualitative discussion regarding the p-n junction under the biased conditions as presented
in the previous section, let us now derive analytical expression for the current-voltage relation in
an infinitely long diode. In doing so, the following assumptions are made.
(a) The current flow across the junction is one-dimensional, that is, only in the x-direction.
(b) All the applied voltage is assumed to drop across the space charge region. As the electric
field in the neutral p- and n-regions is negligibly small, the minority carrier drift current
can be neglected as shown in section 3 .7.
(c) T~ere i~ no net generation or recombination in the space charge layer and the current in
this region remains constant throughout.
(d) Low level injection condition prevails. This is valid for low currents.

p--n Junctions 93
(e) Drift and diffusion currents
a bias is applied.
While the other assumptions ari
ation. Actually, the drift curre
e pJan al equ1h · ·b num) · con d' 1t1on. · Th e 11~ "'
(therm
$t balance each other in the depletion region even when
Y to justify, the last one (assumption e) needs so~e
~ual to the diffusioA current only under zero bras
'1,iffusion current is given by
rning the depletion width to 'be 1 µ:m, and the hole concentration difference to be about
Assu -3 d I . . J . . . .
10 1s crn across the ep etton regi~n, pdlft fll1 104 A/cm 2 , which 1s a large current density. This is
Janced by an equally large hole dnft current. Under 1:,ias conditions, the hole current flowing across
ba ·unction is the difference between th.e hale drift current and the hole diffusion current. Since the
the J th d 'f d d'ff ·
,a rence between e n tan
1
d1ue
us1on comwnents of the current itself is much smaller than the
d l . . .
individual components un er ow Injection levels, even under bias conditions we can write
Similarly, for electrons,
dp
qpµpfl ~ qDP dx
dn
qnµn8 ~ qDn - dx
Since

· d Tec!zno/ogY b t
79,4~~S~en~1~ic~o1~1d~u~ct~o~r .!:D~e!v,~·c~es~:~M~o;:d:!:e:.:ll::..:m.2,g_a_n__
1 ti On can e represen.
- h me re a
. ductor, t e sa
. h t e sem1con
By analogy, for electnons m t e p- YP V )
(4.43b)
n :::
exp(-
llµO Vr . .
pe
forward bias 1s applied~ the
b
e seen that when a ·on (Pne and npe) increase
F
. 4 9 It can . reot d
We now take a critical look at 1g. · · of the depletton ° In other WOli s, there is
minority carrier concentrations at the edges heir equilibrium valu;s· a reverse bias is applied
exponentially by a factor exp (V/Vr) fro_m ton the other hand, w e~inority carriers which ar;
minority carrier injection due_ to forward bi~·/Vr)· This is becau~e th:nd are then swept across by
Pnt and npt decrease exponentially as exp (- hr ace charge region . ·ry carrier ~raction It
. d'ff e to t e sp . . ,nznorz .
close to the space charge region, 1 .us he 'unction, resulting in ·er concentration, there is a
the strong el~ctric field to the other ~1de of t ha~ e in the minorit~ earn neutral regioRs, thereb
may be ment10ned here that along ~1t~ the c . g ncentration in the . . the change in 1/
corresponding change in the maJont~ carne\ co level injection condition,
e
maintaining charge neutrality. However, under ow
majority carrier ;DOncentration is negligibly small.
~:w~
Pp0--------
np0 exp (V,!Vr) = npe
np0--------
(a)
----- nn0
Pne = Pn0 exp (V,!Vr)
---Pn0
Pp0
np0-----......
np0 exp (-V,!Vr) = npe
~w
(b)
~---nn0
, Pne = Pn0 exp (-V,/Vr)
I
I
I
I
I
Figure 4.9 The variation of the electron and hole concentrations in a p-n junction diode for (a) forwarm bias
and (b) reverse biased cases.
The situation in the n-region is quite similar to the illustrative example in section 3.7, where
the semiconductor was illuminated to raise the minority carrier concentration at the surface. In this
case, in a forward biased junction, instead of illumination, minority carriers are injected from the
p-region to increase the hole concentration at the surface adjacent to the space charge region.
Similar to the ca,se detailed in section 3.7, the excess carriers diffuse into the bulk due to the
concentration gradient. Neglecting minority carrier drift current (assumption b ), the steady state
continuity equation in the n-region is given by [refer to Eq. (3.37)].
dx 2
(p" - Pno) = O
L2
p
( 4.44)
Since the hole co_nce~tration at x = x 11 is given by Eq. (4.43a) and the hole cono;ntration
reduces due to
. .
recombmat10n
.
to
.
the thermal equilibrium value fa.
, 1 away
f
rom t
h
e Junction,
· · the
b oundary cond1t1ons for an mfimtely long diode are:

(a) p,,(x,,) = p,,, = Pno exp ( ~-)
(b) Pn(a:>) = p,, 0
at x = co
at x == x,,
p -it Junctions 95
q. (4.44) following the arne pr cedure a in hapter 3 section 3.7, we obtain
P,, - Pno = P.o[exp( ~ )- 1] exp(- x ~/•)
(4.45a)
m Eq. ( 4 .4Sa) we see that the hole concentration in then-region (x > x,,) decays exponentially
move awa f h . . s· .
we
Y ro~ t e Junct!on. 1m1larly, the electron concentration in the p-region (x < -xp)
O decays exponentially and this can be represented as
nP - npo = npo[exp( ~ )- 1] exp( x :.xP)
(4.45b)
Figure 4.9 shows the variation of fhe electron and hole concentrations in the diode for both
ard and reverse biased conditions. Now the hole diffusion current at the edge of the depletion
er is given by
I (x ) = - AqD dpn - AqD pPno [ ( V ) 1]
p II p d - exp - -
x L V.
x=xn P T
ilatly, the electron diffusion current at x = -x can be obtained as
p
(4.46a)
(4.46b)
According to our assumption (c), there is no generation or recombination in the depletion
gion. Therefore, the two current components as derived in Eq. (4.46a) and (4.46b) remain
nstant throughout the depletion layer. The sum of these two components gives the total current
wing through the p-n junction as
'
(DpPno
I = /p(xn) + 1 11 (- xp) = Aq LP (4.47)
erefore, the diode current can be expressed as
here / 0 is called the reverse saturation current of the diode and is given by
(4.48)
(4.49)
Figure 4.10 plots the corrent- voltage characteristics of the diode as given by E~. (4.48).
uation (4.48) shows that when the diode is forward biase9 (that is, V > 0), the current mcreas~s
ponentially with applied vpltage while when it is reverse biased (that is, V < 0), the current is
ited to I = - ! 0 . This property of the diode is used in several applications.

;;..'6.;..,..,:S~~m~ic~o~nd~u!!:c!!to~r~D~e~v~ic:!e;!s·:..
~M!!o~d~el~li~11g~a_n __
d Tecl1r10Lo,g_;_Y~-------­
I
I
I
I
--~)>, I
_.I
: + - I
~ V--+1
I
I
Not drawn to
scale
(b)
(a)
Junction diode.
Figure 4.10 current-voltage characteristics of a p-n
d h e in the expression of 1 0 gi~
For a one-sided abrupt p•n junction Pno >> np0, an .•"\on the reverse saturalion
Eq. ( 4.49), only the first tenn dominates. Thus for such a situ• i '
can be approximated as 2
AqDpPno AqDp'!.!_
Io= Lp = -LpND
. . · +n J·unction is primaril
An mterestmg point to be noted is that although the current 10 a P . lie
to holes injected from the heavily doped p-region into the n-region, the actual magnitude oil !lie
current is . independent of the doping concentration in the p-region but dep~nds .on the di
concentration of the lightly doped n-region. Decreasing the donor concentration m the D-teg!On
mcreas~s reverse saturation current Io in such a junction.
I
_Figure 4. 11 plots the hole and electron currents flowing through a forward biased diode
function. of x. Using Eq. (4.45), we can write the expressions for the minority carrier diffliiin
current m the neutral n-region (x > Xn) as
Ip(x) = -AqD dpn = I (x ) exp(- x -
Pdx P n L p
Xn J
g
0
I = In + Ip I
•, .
'
'
11 1
I I
I I I
I I I
I
I
I
I
I
I I
I
I
I
I
' . '.•
I I
I
I
I
I
I
I
r·-1
I
I
I n
I
I
I I'
I
I
I I ~
I
I
I I I I
I I . ,
I I
·,
I I ' ·r ·-·- ·- ·-'
I I
I 1,
I
I I ,
\Ip
I
I : .
I I \
In+ Ip
'
'
'
In I \
I
'
-Xp Xn
(a}
'
x
0
- Xp
Xn
Ip '
...
x
Ffgl!lre 4.11 V; a nation · of electroh and h
o
I
e current components . .
(b)
(b) reverse bias conditio,~s~ p-n Junction under (a) forward blai

p-n Junction 97
I them· · · · d'ff 1 · d
ar Y, tn nty carnet u ton current m the neutral p-reg1on (x < -xp) is expresse as
l,.( ) ~ AqD. ~ ~ 1,.(-xp) exp ( - x :,.x" J
(4.S lb)
the above two equations, it i obvious that the components of the minority earner diffusion
t decay exp?nentially away from the junction. However, since the total current flowing in a
mu ~ re~am con tant, the decay in the minority carrier current is compensated by a
ondmg 1 c · h · · ·
P . . n r~a e m t e ~a.ionty carrier current as shown in Fig. 4.1 l(a). Thus, far away
the Junction, m the n-region, IP falls to zero and the current is carried entirely by electrons
ng from the n-contact towards the junction. To reiterate, let us trace the flow of electrons from
-contact to the p-contact.. Ele~trons flowing in at the n-contact from the negative terminal of
attery ~ove towards the Junction as a drift current with the aid of a small electric field in the
l n-reg1on. The fir.Id required to cause this flow is very small as electrons are the majority
rs. It has therefore b~en ~eglected in our analysis as mentioned in assumption (b). As t~e
ons flow towards the Junction, they partially recombine with the holes moving in the opposite
'on resu~ting in a decrease i~ electron current. (Since electrons and holes recombine in pairs,
ecrease m electron current 1s equal to the decrease in hole current in the n-region. This
that the sum of the electron and hole current is always constant). The electrons, which
the junction, are injected into the p-region as a minority carrier diffusion current. Far away
the junction, all the electrons recombine, reducing the electron current to zero. Similarly, at
contact, the entire current is carried by holes, and this current ultimately reduces to zero as
1
es move across the junction towards the n-contact.
Figure 4.11 (b) shows the variation of electron and hole current densities for a reverse biased
. In this case, since the minority carrier concentrations in the neutral regions are reduced
the thermal equilibrium values, there is excess generation of carriers. The electrons, which
nerated in the p-region of the junction, diffuse towards the junction and are swept across it
e electric field in the space charge regions. The electron current increases further in the
on due to generation, as these carriers flow towards the positive terminal of the battery
ted to the n-contact. Similarly, the holes flow from the n-region to the p-region.
Physically, one can now understand why the forward current is much larger than the reverse
urrent. Under forward bias conditions, the hole current injected from the p-region (where
are majority carriers) into then-region is proportional to p,, 0 [exp (V!Vr) - l], which can.be
arge. On the other hand, under reverse bias conditions, holes are injected from the n-reg1on
e they are minority carriers) to the p-region. The current, in this case, depends on t~e
tion rate of carriers, which is proportional to p,, 0 . This explains why the reverse current 1s
t independent of the reverse bias voltage and is equal to 1 0 , while the forward bias current is
by a factor [exp (V!Vr) - l].
gh the excess holes in the neutral n-region are continuously recombining, how is it that the
state minority carrier concentration distribution curve shown in Fig. 4.9 does not change
me?
et us first calculate the total minority carrier recombination rate, that is, the number of h~les
ining per unit time, in the neutral n-region. Let (Qp/q) be the total excess hole concentration

d Tech11oLogY
the
9B
total reco
Sem,conductor Devices: Modellmg an hese hoJeS, tlJIIIIIIAftt,,
lifetime oft
. h average
hi\ the neutral n-region. Now since ~P is t e ( )
rate R i given by (Qµiq:)· That is, A ~ [exp(~ J _ i)exp -x ~/" dx
R
= QP = ~ f ( p ) dx :::: - f Pno Vr
p,, - nO fp
QT p 'rµ Xn
x,,
= Ap;:LP [exp(:,)- 1]
On the other hand, the injected hole current is given by ] Aqp 110
LP [ ( V) ]
V J 1 ==
exp V - I
AqDpPno [ ( V) 1] AqDp pPno
[
exp ( Vr - ,r P T
I (x ) = exp - - - L r
P n LP Vr P P . unit time given by lp(x,J/q ·
· · ted into the n-regton per b maintaining the Stead
Thus we see that the number of holes mJeC . . unit time, there Y .
exactly equal to the number of holes recombm!ndg petr for electrons in the p-regt0n.
state profile. A similar analysts . can a lso be carne ou
. U d n·as Condition
4.3.2 Quasi-Fermi Levels n er • . . .
band diagram with apphcation o·
h 1
Let us now refer to Fig. 4.6 and take anot er O ok at the energy . fi h
. the quasi-Fermi level or oles E
. . .t arrier concentrauon, . ·a h I
bias. As there is no change m the maJon Y c .
s: lectrons £~ deep ms1 e t e neutra
. d h . Fermi leve 1 ior e n
deep inside the neutral p-reg1on an t e quasi- . stant However, at th~ edges of tliJ
. . . . . d remam con · I
n-reg1on are essentially at the eqmhbnum valu~ an . s from its equilibrium value by a facto
depletion layer, the minority carrier concentrat10n ~eviate
exp (V!Vr)' so that at the edges of the depletion region
pn = nf exp (:,)
Referring to Eq. (1.51), this implies a separation between EFp and EFn on either side of th
junction by an amount qV, as shown in Fig. 4.6(a) and (b). It can be easily seen that under forwar
bias, the quasi-Fermi level for electrons (Ep,) is above that for holes (EFp) by a value qVJ, an
under reverse bias EFp is higher than Ep,, by qVr. As the minority carriers decay away from tl1
depletion ]ayer edge towards the bulk and approach their equilibrium values, EFp and EFn com
closer and ultimately merge. Also, in the absence of significant generation-recombination, EFp an
EFn remain constant throughout the depletion region.
4i3.3 Current-Voltage Relation in Practical Diodes }laving Finite Length
Fdr a pra.ctical diode with finite length, the boundary conditions change and the eql!lations 2
derived in the 1 previous section have to be modified. Also the continuity equation given b
Eq. (4.44) now needs to be solved subject to these new boundary conditions. While the fir.
boundary condition specifying the carrier concentration at the edge of the depletion region remain
, ~he ~~.qie, the second bou11dary conditiol) has to be changed to take into account the finite Iengt
9f. tlile, neutral, regjons. ,We have already discussed the role of surface reoombination ·
seGt)'@~ l.4.4. The surface recombination velocities at the metal-semiconductor contacts rure ven

p-n Junction 99
h resulting in high recombination rates. Consequently, the excess cart er concentrati?n reduces
ero at these contacts. The boundary c~rtditions to find out the solution of Eq. (4.44) in the case
8 diode with alil n-region of finite leRgtih are therefore,
(a) Pn (xn) = Pne = Pno exp ( '~r J
Y• at x = Xn
at x = W 1
ere W1 = Xn + Wn, Wn being the width of the neutral n-region.
The solution of Eq. (4.44) now has the form
Pn -
Pno ~ Poo [exp ( ~ )- 1] sin:((:•~:.))
sm
L
p
(4.52)
Equation (4.52) shows the variation of the minority carrier distribution in the n-region. From
. (4.52), it can be shown that when (Wn!Lp) >> 1, that is the width of the n-layer is much larger
an the diffusion length, the expression for (Pn- _ Pno) reduces to Eq. (4.45) for an infinitely long
-region. This indicates an exponential deeay of carriers away from the junction. Another very
teresting situation is encountered for a sho.rt diode. For y

=-
xpre
s d us
cosh -
Wt - x
( Lp
qDi ~7 = _A_q- ~1-'~ [ x{~; ) - I J ~ sinh (~ Xn J
(4.54)
-region is given by
in the n
dg of th depletion luyer W J
So, the h le diffusi ill urrent nt th [ ( V J J oth (_.!L (4.55a)
- -A D dp,, = ~q~µP110 exp Vr - 1 c LP
I• -'• - q P dx , . ,. P • • • n current at the edge of the
, - . ~ n th the electron diftusio
Similarly if the p-region is nls? ~ fimte 1 g '
depletion layer in the p-region is given by
( WP J
. _ AqD 11 11po [exp (~J -1J coth L,,
1,.(- .,p) - L Vr
II
where WP = width of the neutral p-reg.ion. ddin these two components as
The total diode current is now given by a g
(4.55b)
1 =Aq D,Pno coth(f ( D,, 11 ,0 t(~)
LP
[exp(; J- ,]
= Aqn; (4.56)
Now let us look at two extreme cases:
Case 1
Long diode (also called long base diode): For y > 4, coth(y) ~ 1. Therefore if W,, > 4LP an~
w > 4Lm Eq. (4.56) reduces to the ideal diode equation given by Eq. (4.47). So the ideal diode
.,,;.,ation is said to be valid for a long diode satisfying the above restrictions regarding the widths
of the n- and p-regions.
Case 2
Short diode (also called short base diode): We have already seen that the minority carrier
concentration distribution in the neutral region of a short diode shows a linear variation. Since the
slope of this curve is constant, the minority car~ier diffusion current in the neutral region also remains
constant. Since cosh(y) ~ 1 when y is small, it can be seen from Eq. (4.54) that fp(x) is a constant

p-n Junctions 101
en i, ,,

102, Semiconductor Devi es: Modelling and Tecl' 111 ~ 1 0 10 ~ ~82Y'..--~"'"!""'."---
. recombine before readhing th
d
10
· to the n-region ·
For a Imig base diode all the holes injecte
. the neutral base region. How~vcr 1•
' · curreJilt in · ·.c •
n-cohtact, and QP/-r, liepresents the recombinauon , t the n-contact, s1gru1ymg a larg
P xists even a . e
the case of a short base diode, a hole current e .
1
t ·ons at the n-oomtact. Since th
. · 'ty earner e ec 1 b' · c
concentration of holes together with the maJorI
. 11 b a large recom mat1on Cl!lliifent
~ b ' . I l'true there wt e . . th at
surlace recom mation velocities are extreme Y ' o • ·n add1t1on to ose recombinin
h
b . · at the surface, 1 ·1 g
t e n-contact surface. Since the holes recom 1nmg
nt J (.x == Xn) WI
· · t d hole curre , I not be equ
P al
m the bulk, given by Qµl-rp, are supplied by the mJeC e h end of the chapter to show th
to Qpl-rp in a short base diode. It has been left as a problem at t e
at
IP (x - x,,) > Qµl-rp for a short base diode.
Example 4.5 . . 1016 3
. . . . · the n-reo10n IS per cm . lh
F or an abrupt p+n s1hcon diode, the dopmg concentrauon 10 0
h h 1 d.ff 1 · 1 e
width of the n-reoion is 2 µm. Assum ino th is width is much smaller tha~. t 4
eOO oKe'f h usiom ength
. h . o o . (') 300 K and (11) I t e area of th
1~ t e n-reg1on, calculate the reverse saturation current a~ . 1 . • 0 • • 50 2 e
diode is 100 µm x 100 µm. Assume that the hole mobility in the n-ieoion ts 3 cm /Vs at both
the temperatures.
Solution.:
From Eq. (4.57), we know that for a short diode
In a p+n diode, since NA >> ND,
2 [ DP D,, ]
lo = Aqn,. N W + N W
D II A p
Also we know from Emstein's relation, D = µ V7
At 300 K P P
'
DP = 0.026 x 350 cm 2 /s = 9. 1 cm 2 / and 11 1
= 1.5 x 10 10 per cm 3
Therefore,
10
= (100 x 10- 4 )2 x 1.6 x 10- 19 x 9.1 x (1.5 x 1010)2
2 x 10- 4 x 101 6 = 1.638 x 10- 14 A
At 400 K ,
DP = 0.035 x 350 cm 2 /s = 12.25 cm 2 /s
Therefore,
and n, = 5.185 x 101 2 per cm3 ( ee Ex. 1.1)
(100 x 10- 4 )
lo = 2 x l . 6 x 10- 19 x l?.25 x (5 . 185 x 101 2)2
2 x l0 4 x l016 =2.635 x .1 0- 9A
1
So, we see that for 1 oooc rise in temperature th .
of magnitude. ' e tever. e saturatio n current increases by five orders

-n Junctions
he plots of the forward curre
gre t dd .
coJJ1P ·dentical structures an opmg Q
• "(1 l
tJ!l\ffPO
l~ge characteristics of Ge, Si, a,Qd GaAs p+n diodes
ttations .
~vo materials, say material
for h . . . 2, having band gap ertergies E 81
and E 8 2
. Iy the ratio of t eir mtn
ecU e ,
concentrations n 11 and n 12
is given by
reSP f;q. (l.24)]
[from
A urning that the differences in the values of Ne and Nv are small,
Considering the band gaps given in Table 1.3,
T ::z exp
8
•
n; 2 kT
n~ (E 2 - E 81 )
Similarly,
(n;)Ge
(n; )si
l.12 - 0.66) 1
::z exp ( 0. = 4.83 x 10
026
> Uo)si >> (/o)GaAs and this gives the following 1-V characteristics.
I
Ge
Si GaAs

. d ·1ei1,,.v· - -
104 Semiconductor Devices: Modellmg an
· tion Diode
4.3.4 Ideality Factor of a p·D June . ·unction diode can be ~"'
. the current m a p-n J the diode current can tie'iw..... "1
We have seen in the preceding secuon that . s voltage (V >> Vr),
Eq. (4.48). For sufficiently large forward bia
·-111er
approximated as ( V ) (4.S3a
1 ~ / 0 exp ~ )
r odified equation which is Rh
. . iode follow a slightly rn tii
In practice, however, the charactensucs of a d
by )
(4.S8bJ
I "' lo exp ( m:r
. between 1 and 2).
d' de (Its value I ies . beca
where m is called the ideality factor of the
10
'd al diode is present use We have
. l d. de and an t e . ( )) . anal .
This difference between a practtca
10
( assumption c m our YSJS. In a
1
neglected the recombination withi~ th~ s~a~e .char;~/r:~on layer, there is another CODlpOncnt of
practical diode, because of recombmatton w1thm th P
current given by 1 Aqn ; W exp (-
V )
(4.59)
/rec - 2r 2Vr
. d' d current is actually the sum of Irec (given by
10
Thus, for a p+n junction under forward bias, the e . 'f · the relative dominance of th
Eq. (4.59)) and I (given ~y Eq. (4.58a)). The ratio Ire// s1gn~;1.:~ction, from Eqs. (4.58a), (4.5:)
two currents then determines the value of m. For an abrupt P J ,
and ( 4.59) we have
/rec = WN D exp(-~)
I 2L n- 2Vr
p I
We see from Eq. (4.60) that for large forward biases, that is V >> (2Vr), /rec

p-n J unctionis 105
1oomar--,--~-,,'T""-:--r:--~.....-~~~~----+-­
1oma
1 ma
eqlVFl/~lf
I
I
I
I
100 µa
10 µa
I (A) 1 µa
100 na
10 na
1.0 1.2
Figure 4.14 Forward bias current-v0ltage characteristies of germanium, silicon, and gallium arsenide p-n
junction diodes [1] (source: A.S. Grove, copyr:lglilt © 1967 by .!10hn Wiley and Sons, Inc., used by permission).
4.4.1 Time Variation of Stored Charge.
Let us consider a p+n diode with a long n-region. In order to analyze the transie11t behaviour of this
diode, we have to solve the time-dependen.t continuity equati0n giv.en by Eq. C3.30b~. From this we
get,
_ 8J~ = q[8Pn + Pn - Pno]
ax 8t -r P
(4.61)
where JP and Pn are functions of both, x, (position) and t (time).
For a p+n junction dipde with a long n-region, the total cur.rent can me approximated by the
1
injected hole current into the neutral n-region at x = Xn, that is, l(t) ~ AJp(~n, t), where A is the
cross-sectional area of the diode. On the other hand at x = oo, the lmle current is zero, that is,
l p(oo, t) = 0. Then, from Eq. (4.61), we get the total

. d rec/lllOlogY + .
1'>6 SemiconduetDr Devices: Modelling an d across the P n Junction (a
· ,iecte u Th lld
h le current 1nJ h rge storage euects. e first
Physically, Eq. (4!.62) states that the ~ is related to two c: h represents the fact that t~
therefore, approximately the total diode current d term is BQ,) 01 , W. ~c time, In steady state, Wh e
the usual recombination term Q,Jfµ· The s~con ase or decrease wit wever, injection of holes rn en
distribution of excess charge can either incre ecombination rate. ~o ~region, iif the rate of inf) ay
8Qpl at = 0, the injected current is equal to the r stored in the neutra ~er band, there is a reduct~w
result in an increase in the excess hole charge~. ation rate. On the 0 ~ Jess than the recombin ~On
(the injected cuocent) is greater than the rec~m) l~f the rate of infloW ts t at which charges fl atton
. h d h . 8Q 18 . negative ' 1 f the ra e ow I
m t e store c arge (that 1s, p t is . ual to difference o ate at which carriers fl .n
rate. Also, the rat~ of increas~ of charge .'s eqMore simply, if X be the r ·ves the rate of incr ow ~n
and the rate at which the carriers recombtne, 't tt'me then X-Y gt ease in
b
. per unt •
and Y be the rate at . which carriers recom ine btained as a f unction . of r
the number of earners. d harge can be o line
Now for a given current transient, the store c ept to a greater extent. Let us assurne
' 'fi the cone . . d
using Eq. (4.62). The following example clan ies d' de Since the diode ts. at a stea Y state
10
that a constant current I is flowing through a .' _ o the connect10n to the battery /
_ /-r. At ume t - • . . S( ) s· s
8Q,!8t = O, and from Eq. ( 4.62), we have Q P - p· hown in Fig. 4.1 a · mce the excess
open-circuited so that the current suddenly be~om~s ze;~;; :ime is needed for QP to become zero.
holes in the n-region must die out by recombmauon,
Equation ( 4.62) now reduces to
aQP = _ Q/t) (4.63)
8t -r p
Solving Eq. (4.63) using the initial condition Qp(O) = 1-rp, we get
QP(t) = /1:P exp (- :P J
(4.64)
In other words, as shown in Fig. 4.15(b), the stored charge dies exponentially with a time constant
rp, .that is, the lifetime of a hole in the n-region.
An important point to be noted in the above example is that although the diode cttrrent has
suddenly fallen to zero, the voltage across the junction does not immediately do so. Since the
excess hole concentration at the edge of the depletion region P~e is related to the junction voltage,
we can write using Eq. (4.43a).
Therefore from Eq. (4.65), we have
P;., = P,,o [ exp ( ~) - 1] (4.65)
V(t) = VT In [ p;,e(t) + 1]
Pno (4.66)
I~ we know P~e(t), we can find the junction voltaoe as a f . . ..
simple. Since / = o the slope of p'( ) b b unction of time. Unfortunately, 1t ts not so
'( ) h , n x must e zero at x x f O d
Pn x, t as the shape as shown in Fig 4 lS( ) Th f - 11 or t > (refer Eq. (4.46a)) an
H . · · c · ere ore ' ( ) I . . .
x. owever, neglectmg this minor variatio d . 'P 11 x no onger vanes exponentially with
b Y E q. (4. 45) , we have n an expressmo the t d
b sore charge at any instant as given

co
p-n Junctions 107
QP(t) = f P:1e(t) exp (- x - x") dx - A ,
L - qLpP11c(t)
" ,,
(4.67)
}(now that Qp(t) reduces exponentially .
an expression for p~e(t), and then sub:~ gi_ven b~ Eq. (4.6.4). Using Eqs. (4.64) and (4.67) to
tituttng this expression in Eq. (4.66), we have
V(t) = VT ln[- 1-rp ( t J ]
A L exp -- + 1
(4.68)
. . q pPno -r,,
erefore: tt is easily understood that if the ·un .
all. Thts can be achieved by deliberat J. Chon voltage has to fall to zero quickly, -r must be
· s · e 1 Y 1
cussed m ection 1.4.3. Gold and pl . ntrod ucmg · go Id or platmum · into the silicon " diode as
ombmat1on
. .
centres and effectively kill
atmutn creat
e .
d
eep
I
eve
l
s m
.
the band gap which act as
metry may also be modified by desi· . -r,,. Alternatively for fast switching diodes, the device
. . gnmg a p+n d. d . th .
eoion , 1dth ts less than the hole d'ff . 10 e w1 a very narrow base (n-reg1on). If the
0
• . 1 us1on le th
y short time 1s required to switch th d. ng , very few charges can be stored and hence, a
e iode off and on.
p~
Increasing time
0
(a)
(b)
Figure 4.15 (a) The time variation of current flowing through a p+n junction diode
(b) the resultant stored charge variation, and (c) charge distribution variation in the neutral n-region.
(c)
x
Reverse Recovery of a Diode
most switching applications, the diode has to be switched from forward conduction to
e reverse-biased state and back. As we shall see, in such a situation, a reverse current much
ger than the reverse saturation current (/ 0 ) can flow through the diode for a short time. Let us
nsider the diode circuit shown in Fig. 4. l 6(a) and assume that the input voltage Va varies as
own in Fig. 4.16(b). At t < t 1
, Va= VF and in steady state, the current IF flowing through the
rcuit is limited by the resistor R. Neglecting the small forward voltage drop Vd of the diode,
= IF = (VF - Vr1)/R :::::: Vp/R. At t > t 1
, the applied voltage becomes -VR. However, as already
inted out, the stored charge and hence the junction voltage Vd cannot change immediately as
own in Figs. 4.16(c) and 4.16(e). So just as the voltage is reversed, the diode junction voltage
mains at the same small forward bias value. Consequently, a large reverse current I = -IR =
VR - Vd)IR:::::: -VR/R flows temporarily as shown in Fig. 4.16(d). As the stored charge is depleted
ith time, the junction voltage reduces. So long as Q,, is positive, the junction voltage has a small

I
I
I
I
I
I
108 s .
emiconductor D .
evices: Modelling and Technology
Psitive Value. Th
liowever, once Q e ~urrent remains approximately constant at I = -VII R till Q fall
Voltage begins top be 0 ~~es negative, the junction voltage also becomes neg~tiv/ As ~:, Zero.
reduces. Finally divided between the diode and the resistor, the magnitude of th SOurcc
1
circuit beccune ' a most all the applied voltage is dropped across the diode and the CUrr c currcllt
called the stoli s equdal to lo . The time required for QP and the junction voltage to reduce etnt in the
h age elay t . f o ~
c arge depends on ll~e ts~· Evidently, t 5 d depends on 'l'p since the rate o removal of o is
the carrier h fetime.
8torCQ
R
(a)
O t---+--------- t
t1
(b)
't
IF = (VFIR) 1------1
O r--t---~---L t (d)
Transition
interval, f;
oF=~=~_J __
f1 I
I
I
-+ _J ______ -
Forward
bias
Minority carrier
storage t
• Sd
Figure 4.16 (a) A diode circuit; (b) the input voltage variation; (c} the . . . . . .
carrier stored charge in the neutral region; (d) diode curre t· corresponding vanation in mmonty
n · and (e} voltage drop across the diode.
(e)

p
p-n Junctions 109
We now plioceed to obtain an
lt>n for tsd in terms of. fp and the diode current by
. " Eq. ( 4.62) for this particular
JyJtlc, •
so d rernams constant ·11
t1 t = t 1 +
ti• We note that at t = ti, the diode current becomes
,,. I fl
atl
•tuting in Eq. (4.62), for 1 1
< t < 11
+ tsd, we have
(t) dQp(t)
+ dt (4.69)
rne Solution of this equation [Eq. (4.6
from the initial boundary condition).
was flowing through the diode till the time t = t 1 ,
(4.70)
P~,(t) = A:LP [(lr + IR) 1:P exp (-t ;,11 )- /;1:P.] (4.71)
By the definition of the storage delay time, P~e~t) = 0 at t = t 1
+ tsd· Therefore, from Eq. (4.71), we
get
(4.72)
Thus, the presence 'of a large reverse current l'ed.uces tsd· This is to be as expected since the reverse
current helps to remove the excess stored eharge and IR is the rate at which excess holes are
removed. Also, tsd is higher for higher IF, as in that case the initial stored charge itself is more.
4.4.3 Charge Storage Capaci~ce
There are essentially two capacitances. associated with a junction. One of them is due to the charge
dipole at the depletion layer (depletion capacitance) and has already been discussed in
sections 4.2. l and 4.2.2. In additiott, .as pointed out already, the junction voltage lags behind the
diode current due to charge storage and therefore we have another capacitance effect. This is
termed the charge storage capacitance or the diffusion capacitance Cd. While the depletion
capacitance dominates )VheQ the diode is ilil veverse biased condition, the diffusion capacitance
becomes important when the junction is forward biased. To calculate this diffusion capacitance due
to charge storage effects, let us consider a p+n junction with a long n-region at forward bias with a
steady current I flowing through it. Assuming that the junction voltage V> 3Vr, from Eq. (4.67) the
stored charge can be given as
00
f ( x-xJ , (VJ
Q = /-r - p' exp LP n dx = AqLpPn· ~ AqLpPno exp 1 }'
P ~ p - ne .. y,
7
Xn
(4.73)

ll~ Semiconductor D .
l
evrces: Modelling a11d Tec/1110 ogy
'I'he diffusion ca .
pacitance C" i therefore given by
_ dQ _ AqLµP110 exp(~) = /Tl!..
C" - dV - Vr Vr Vr
Td~ed small signal conductance of the diode (G = dlldV), calculated by differentiatin
10
e current eq ·
uatton (Eq. (4.48)), is given by
I
G =­
Vr
The diffus' .
ion capacitance can therefore also be expressed as
Cd = GTµ
A . d. d
n important point to note here is that C is directly proportional to the io e curre11t.
Th e above equations are valid for long " base diode. Let us now canst ·ct er a P + n diode •
short _n-region. We have already seen that for such a diode, the minority carrier. concentration
n-~egi?n shows a linear variation, as shown in Fig. 4.17. From this figure (Fig. 4.1 i), the
mmonty carrier charge can be obtained from the shaded area under the curve as
i
p~(x)
I
I
>•
I
I
Figure 4.17
Variation of the minority carrier stored charge in the neutral n-region of a short base p•n diode.
while the current Ip(x,,) is obtained from the slope of the concentration profile. This is found \q be
( ) dp/11
I P x,, = -AqDP dx _ = (iU 8
X - X 11
Now from Eqs. (4.77) and (4.78), we can write for a p+n diode
wi
where r, = 2
{;
p
I
Q,)
:::: I (x) = -
p II 'f
I
is called the transit time of the diode.

sing Qµ == 1-r, (instead of QP = 1-rµ) in Bq. (4.74), for a short base diode we obtain
p-n Junctions 111
Cd= I-r, = G-r, (4.80)
Vr
Jo fact, Eq. (4.80) is the equation for the diffusion capacitance for a diode where -r, = 'fp for a long
base diode and -r, = Wn 2 12Dn for a short base diode.
HELP DESK 4.5
---
WhY is r, called the transit time of the diode?
Let us consider the minority_ carrier profile in Fig. 4.17. If the time taken for the charges to
rnove from the edge of the deplet10n region (x = xn) to the n-contact (x = Wn + Xn) is -r, the total
charge which . rea~hes the contact ~n time 't' is QP. Therefore, the charge reaching the contact per
unit time (whi~h IS the current /~, ts Qpf-r. Comparing with Eq. (4.79), we see that -r = -r,. That is,
,r, can be considered to be the time required by the carriers to cross the n-region, and hence the
narne.
The small signal equivalent circuit of a diode is shown in Fig. 4.18. In this figure, the circuit
components are G, C;, and Cd given by Eqs. (4.75), (4.31), and (4.74) or (4.80) respectively.
v v G
Figure 4.18 The small signal equivalent circuit of a p-n junction diode.
4.5 BREAKDOWN MECHANISMS
When a sufficiently large reverse voltage is applied to the diode, the p-n junction breaks d0wn and
conducts a large current. The breakdwn process is not inherently destructive, that is, when the
applied voltage is reduced the diode again behaves normally. However, the maximum current must
be limited by connecting an external resistance R as shown in Fig. 4.19(a) to avoid excessive
heating. If the breakdown voltage of the diode is VaR as shown in Fig. 4.19(ib), the maximum
reverse current that can flow is
- V- VBR
I R-
R
(4.81)

112 Semiconductor Devices: Modelling and Technology .
. um power ratmg of the di
than the maxim . ~
It must be ensured that the product IR VaR is fess d . a p-n junction can occur by
10
avo1
'd b
urn up. The reverse breakdown en
countere
. Id · the space c
h
ar
ge region
·
Q
nc ts
·
mechanisms, each of which needs a critical efectnc fie tn Itages (a few volts) and the
low reverse vo . t h' h
zener b reakdown which usually occurs at b kdown occurnng a tg er Volt
mechanism called' avalanche breakdown is responsible for rea
p
,~~
=-,) I
n
Reverse
breakdown
current
(b)
{a)
. . {b) th diode characteristics showing the
Figure 4.19 {a) A diode circuit with res1st1ve load; e
breakdown region .
4.5.1 Zener Breakdown
VeR
I
Fowar:d et:1rrent
When two heavily doped p- and n-regions form a junction, then on application of reverse bias,
valence band of the p+ region can be aligned opposite to the conduction band of the n+ regio1
shown in Fig. 4.20. In other words, the conduction and valence band edges on either side o~
junction may cross even at relatively low voltages. So in the p-region, there is a large densiti
filled states and in the n-region there are empty states in the conduction band at the same en~
If the barrier separating the p- and n-regions is narrow (the width of the space charge laye
small), tunnelling of electrons can occur from p-region to n-region causing an appreciable rev,
current to flow. This is called the zener effect. Since the tunnelling probability depends on
width of the barrier, it is important that the barrier is abrupt and doping concentrations on I
sides are high (> 5 x 10 17 per cm 3 ) for the zener effect to take place.
p-regionl w --- n-region
7*----\c-+----.:.T u n ne II i ng
••••• ._-----Ee
Figure 4.20 Band diagram of a reverse biased n . .
p- Junction diode showing the zener effect.

p-n Junctions 113
The zener effect can be explained as the field ionization of the host atoms at t_he junction.
applied reverse ?ias across a very narrow depletion region results in a large electric field inside
space charge region. The bonds are broken at the critical field strength as the valence electro?s
ing the covalent bonds are torn out by the field. The electrons and holes which are created rn
process, move in opposite directions under the influence of the strong electric field in the
e charg~ region, resulting in t large increase in current. The critical electric field for .zener
kdown is of the order of 10 V /cm. Diodes, which are deliberately designed for particular
er breakdown voltages, are referred to as zener diodes.
Avalanche Breakdown
light~y dope? j~nct_ions, electron tunnelling is negligible. Instead, the breakdown in such cases
Ives t~pact •?mz~tton of atoms by energetic carriers. For example, if the electric field ~ inside
depletton region 1s large, an electron entering from the p-region may acquire sufficiently high
gy to cause an ionizing collision with the lattice atom creating an EHP. A single such event
ts in carrier multiplication; the original electron as well as the generated (secondary) electron
wept to the n-region, while the generated hole is swept to the p-region as shown in Fig. 4.21.
degree of multiplication can become very high if the carriers generated within the depletion
n also have ionizing collisions with the lattice. That is, an incoming carrier undergoes ionizing
ion producing an EHP; each of these carriers creates a new EHP; again each new carrier
uces an EHP, and the process continues. This is called an avalanche process since each
·ng carrier can create a large number of new carriers resulting in an avalanche of carriers.
Electric field
p-region
e- '\---+--+;; e-
~------,~1 _} , e-
h;
n-region
Depletion layer
w >I
Figure 4.21
Carrier multiplication in the depletion region due to impact ionization.
e shall now make an approximate analysis of this avalanche multiplication of carriers. Let
me that a carrier (electron or hole), while being accelerated through a depletion region of
W, has a probability p of creating an EHP by undergoing ionizing collision with the lattice.
or n· incoming electrons entering the depletion region from the p-region, Pnin secondary
ill be generated. Now these generated electrons move to the n-region while the ~enerat~d
avel to the p-region under the electric field. As the total distance traversed by this EHP is
they in turn generate new EHPs with the same probability and consequently there _are
tertiary electrons. In all, assuming no recombination, the total number of electrons commg
e depletion region in the n-region is obtained as
n = n- (1 + p + p2 + p 3 + .. -)
out rn
(4.82)

d rec/lflOLOvJ;S~Y---
114 Semiconductor Devices: Modellin an
Therefore, the multi11>lication factor is given by ~
p2 + p3 + .. ·) ;;::; 1 - p
flout (1 + P + . .
M = ~ -
h the depletion region ca11 iiJso be
. r travels throug
. . as a carne
The probability of an ionizing collts1on
ex pressed as
w
p :::: J adx
where a = 1omzat1on · · · coe ffi 1c1e · nt · Id be infin1 't e. That is,
If
taining M shou
For the avalanche process to be se -sus '
w
0
p == f a dx == 1
(4.85)
0
. and can be expressed as
Now, a is a function of the electric fi:d= IXo exp [-( ! r]
(4.86)
. . f h articular semiconductor.
where the constants lXo, b, and m are characten~ttc: o t e implified and actually the ionization
It must be pointed out that our analys_1s is ovehrs ore complicated manner. Qualitatively
· · eters m a muc m ,
probability is related to the Junction param . . h . creasing electric field and therefore on
. . . b bTt to increase wit m
we can expect the 10mzat1on pro a 1 1 Y . . . between the multiplication factor M and
the applied reverse bias. A widely used empmcal. re 1 ~t10n
the applied reverse voltage (Yr) near breakdown is given by
1
(4.87)
where n varies between 3 and 6 depending on the semiconductor material. In general, the critical
reverse voltage for breakdown increases with increasin? values of band gap, since more energy is
required for ionization for larger bandgap materials.
From the breakdown conditions described so far in this section and the field dependence of
the ionization coefficient, the critical electric field ( c8'c) at which ~he avalanche process takes place
and breakdown occurs, may be calculated as shown in Fig. 4.22. As can be seen from this figure,
the value of the critical electric field is only weakly dependent on the doping concentration till
tunnelling becomes the dominant breakdown mechanism. Now from Eq. (4.26a), noting th'
l~ml = 8r when V = -V 8 R, the breakdown voltage for one-sided abrupt p+n junction is given by
\!, = 4W - Es~/
BR 2 - 2 N
q D
From Eq. (4.88), we see that ~or junctions where breakdown takes place due to the avalanche
process, the breakdown voltage increases with reduction · th d . · 1ne
m e opmg concentration.
(4.88)

~ p~n Junctions 115
nche breakdown voltage is also fo d . .
I
a" 1111 erature incneases, the scatteri1ng (i)f tit! c!o .mcr~ase 'Wtth ten:iperature. 'fhis is because as the
ieOlP·jbute to bhe ionization prncess. llilal
rners mcreases. This energy loss obviously does not
co11tl . n to achieve the condition rf0r M tneaa,s a larrgeF voltage Row l\tas to be ~pplied aoross the
junct1°
t(;5 h>ecome infinite.
20
e
18
E.
;::::,
16
"b
....,,. ,... 14
c
~
12
-0
~
co 10
(!)
....
.0
_.
co
8
-0
Q) 6
t;::
ro
() 4
:;:;
·c
0 2
-----
One-sided abrupt Junctlo!il at 300 K
------- GaAs
---SI
--------------
Avalanclile
Tunr,1elling
),
0
1014
Figure 4.22 Critical field at breakdown versus doping conceriitration in Si and GaAs [2].
In a p+nn+ junction diode, the dopi•Rg conceatra:ti@Fl of tm.e n-FegioFl is 2 ~ l0 15 cm- 3 . If the critical
field at avalanche breakdown is 2 x 10 5 V/cm, fincl Ol!lt
(a) The breakdown voltage if the width 0f the n-region is 10 J!I.Nl.
(b) The breakdown voltage if the width of the n-region is 1 µm.
( c) Sketch the electric field diistFibution for both cases.
'
Solution: (a) For this s~ructure, the depletioFl region exists essent~ally only in the n-region.
At breakdown the peak electric field is l~~I ;=

[l' anu · -
6 Semiconductor Devices: Mode mg
8 V/ 2
15 10 cm
- 19 )( 2 x 10 ::: 3.037 )(
d N 1 6 x io-,, ~o-'4 h 1 .
..!.. = :L.J2_ = ~4 x lo-· · region), t e e ectrt
dx Es 11 .9 x · trati JO of the n, shown. From this-
. concen . (a)) as
is a constant (depe~ds only on the doptn~angular shi-.p~ as 1 ~ breakdown as
takes a trapezoidal shape (instead of the tn the nn + junction a
10 5 v /cm
calculate the value of the electric field for
8 x 0-4) ::: 1.696 >< •
1

p-n Junctions 117
5 . Oxide is now etched from the t, 't d
1ep · d b c c ack ~urface of the sampJe. Aluminium is then depost e
t h top an ott0m sur1ace 01, the 8 1
• .
11 bO amp e by vacuum evapopat10n (fig. 4.23e).
6. Photolithography is next ca""i d . 'th
1eP · . . . . ._, e Ol!lt agam (analogous to step 3) to define areas WI
ores1st m which the metal 1s to be lietain d
hO t C .
7' The sample is now placed in · . ·
teP · . t . th d f an acid solutLOn to remove metal from undesired regions.
res1s 1s en remove rnm eveFyw, . . . . d' d
hoto . d h . p· f if • 'ere and the samp,Ie contaimng many p-n Junction 10 es
alJze as s own m 1g. 4 . 23 . 11t 1s to Le d .. tl. • h
s re d h h u note UJat m this case, all the diodes share t e same
de an ave a common cat ode cont · ed
ath 0 . . . . act at the bottom surface. The sample can now be die
nto srnall pieces 1n order to obtam mdividual diodes.
p-Si
p-Si
(c)
(d)
Figure 4.23
Proce::;s showing steps to fabricate p-n junction diodes.
(f)
PROBLEMS
An abrupt silicon p-n junetioJil has NA =10 11 cm- 3 on one side and N 0 = 10 15 cm- 3 , on the
other. Assuming complete ioRization, calculate the Fermi level positions at 300 K in the
p- and n-regions. Alse araiw the equilib11h1m band diagmm for the junction and determine
the contact potential vbi from the diagr~rn·
An abrupt p-n junctioh in silicon is doped with N O = 10 15 cm- 3 in the n-region and
NA = 4 x 10 20 cm- 3 in tbe p-regioN. At room tem,perature, calculate
_ (a) the built-in potential.
(b) the depletion layer width ·alild. the maximum field at zero bias.

. d rec/lllOLogY .
Semiconductor Devices: Modelling an verse bias of 5 V.
axirnurn field at a ~e ward bias of 0.5 v.
'd h nd the rn fi Id at a 1or
(c) the depletion layer Wt t a h 111 a,drnurn te bitrary n-d ·
(d) the depletion layef width and t e . . + 0 1·unction of ar opingpror.1
. of a s11tcon P c
· uon
P4.3 The peak electric field at the J.unc h n-side.
is 1.5 " 105 volts/cm. Determine . h depletion region ~n t I .; the doping on thi .
(a) the total charge per unit area in et e•-side of the juncuon
s Side is
(b) the depletion layer width
19
on
-th
3
p
·
uniform and equal to 10 crn · ·}ayer 1 ·n· the p+-regtOO·
· fi
(c) the voltage across the depletion
which EF "' E, _,s re erred .to as th
. charge layer at . · point hes on the side f e
P4.4 In Fig. 4.2(c), the point.'" the spa~e . ShoW that the intrins!C o the
intrinsic point. At this point, n == P - n!. entration.
space charge layer with the lower doping cone regi·on where Dp = 10 cm 2 16 -3 in the n- ' . /s a nd
P4.5 A p+n silicon diode is doped with Nv == 10 cm t the reverse saturation current
2 1
and the
. -4 crn Cal cu a e
'l'p = 0.1 µs. The junction area 1s 10
·
forward current when V = 0.5 volts.
1 II where I is the total d'
1
. . . . · · is defined as P •
0de
P4.6 The hole mJect1on efficiency of a Junctt0n h long diode equations, show that
current. Assuming that the junction fo~Iow~ t le th of electrons in the p-region L ·
L · the d1ffus10n eng
' p IS
Ipf I = 1/[ I + ( Lp j L.

Applications of p-n Junctions
INTRODUCTION
e previous chapter, we have discu d b ·
d
. . .t . .d sse a out the basic properties of p-n junction diodes. From
iscussion, i is ev1 ent that such a · · . ·
. . b' d . h ~ Junction allows substantial current to flow through 1t only
1t is iase m t e 1orward direct· Wh ·
. . . ion. en reverse-biased, a very small current can pass
oh this diode. Thus ideally a p-n · t' d' · · ·
o . . . ' ' JUnc ion 1ode can be thought of as short crrcmt m forward
_and o~e~ circmt i~ reverse bias. When an ac sinusoidal voltage is applied as input to a
1t c?nsistmg of a diode and a load resistance in series, a rectified signal is obtained at the
ut since the current can flow only in the forward direction. That is, the output signal across
oad contains only the positive half cycles of the original sine wave and hence, has a positive
age value. By suitably filtering this signal, ac to de conversion can be achieved. This is
aps the most common application of diodes.
Also, this property of a diode of conducting only in the forward direction has been made
f in various switching applications. The time response of the diode may be a critical criterion
uch applications. As already pointed out in section 4.4.1, if a diode has to be switched on
off.rapidly, the minority carrier lifetime must be small and therefore either deep levels have to
eliberately introduced during fabrication of the device or the device geometry has to be
bly adjusted so as to allow minimum charge storage.
Apart from the use of diodes as switching devices or rectifiers, specially designed
unction diodes are widely used in various other applications such as voltage regulator, variable
itor neoative resistance devices, and optoelectronic transducers. All these applications are
, I:> • •
on the fundamental junction properties. In this chapter, we shall discuss how the p-n Junction
e suitably designed for some specific application.
VOLTAGE REGULATOR
ave discussed the breakdown mechamsms · of ct· 10 d es m · section · 4 · 5 m · Chapter 4 · It has been .
ed out that the breakdown voltage of a diode · can be vane · d b Y a d
JUS
' f mg the dopmO
0
119

No(x) ~ N00(~J (5.1)
rechnology
ll .. and voltag~ ....
120 Semiconductor Device'S: Mode mg . b eakdown ' 11;
ve a specific r ver, is a misnom:
. d to h a d' d howe . . f
concentration. When a diode is designe .zener JO e, uJtiphcat1on o c
. d The term J nche rn
breakdown diode or a zener dw e. . llY due to ava a . doped, 1
situations since the actual breakdown is us~a junction are heavi Yb
used as a voZtage
effec~ dominates enly when both sides oft e voJtage of VBR can eis greater than V 8 a,
Such a diocle with a tailored breakdotn as the input v.oJtageh nge in the value of
shown in the circui,t of Fig. 5.1. Then, so ~ng even if there is a c a voltage can also~
O
voltage across the diode nemains fi~ed at ;:d. This fixed breakdo1 voltage.
voltage. In other words, the voltage 1s regul 'fie known value
· a O
spec1
a reference voltage in circuits that reqmre
Vout
R
Diode
Vout == VeR
t
. . d th regulated output voltage signal.
Figure 5.1 A voltage regulator c1rcu1t an e
5.3 VARIABLE CAPACITOR (VARACTOR)
Varactor is actually an abbreviated form of V ARiable reACTOR. One property of a p-n junctio
that the width of the junction depletion region (and hence the depletion capacitalllce} is a function
of the applied voltage, is utilized in this application. As already pointed out in section 4.2.2, the
manner in which the depletion layer width changes with the applied reverse voltage depends on
the actual doping profile of the junction.
In general, let us consider a p+n junction where the doping profile in the n-region is give
by
where IV Do, xo, and n are constants for a partic I d · ·
p-n junction in the n-region. u ar opmg profile and x is the distance from the
Then, following the usual procedure f . . .
appropriate boundary conditions the d
1 . 0 1
~tegratmg Poisson's equation twice using
I' , ep et1 on region 'dth · .
app 1ed reverse bias vr as a function of th . wi Is obtamed as a function ot' the
e app 1 ied reverse bias V r as
W ex: (Vbi + Vr) ll(n + 2)
Consequently, us· E
d J . mg . q. ( 4 .33) and neglectin
ep etion capacitance is given by • g Vbi when a large reverse bias IS
C Acs
J == W ex: (Vr)- ll(n+2)

-----------~~--~~----~-----:...:_--~------~~~~A~p~p~lic~a~t~io~n~s~o[iflP~-n,:_:!_J~u~nc~t~io~n~s'.....-~12~1
f or an ab;upt junctio~i{1 S~ 0 : and therefore the depletion capacitance c is proportional to
1
(V/ 11 ~ as se~n rom E~. ( 4 . · im.llarly using Eq. (5.3), it can be shown that for a linearly graded
J·uncnon (n - l), C1 will .be p~oportiona) to (V,f113 • So the voltage sensitivity (dC /dV) is found to
reater for an abrupt Junction. 1
be g · · · b f h
The s~nsittvity c~n e urt er e~hanoed by using a hyper-abrupt junction, where the doping
ofile 1s tailored spec1fically to obta111 a value of < 0
A · 1
. & _ - 3/2 as
pr . f'
5 2
I h' . n . spec1a case 1s seen 1or n -
shown 1 ~ igC .. V~ 2
t rt ; .ase, using Eq. (5.3), the depletion capacitance variation can be
expresse as
1 oc r • t is varactor is used with an inductance L in a resonant circuit, the
resonant freq uency of the circuit is given by
1
2,c.fic
f, ::: ex: v
r
(5.4)
In other words, the reson~nt frequency of the circuit can be varied linearly by changing the
applied reverse voltage. This property is widely used for tuning in the radioffV receivers.
Figure 5.2
________ oi..::::;;.. ________::________-=-------~ x
Xo
Hyper-abrupt doping profile used in varactor diodes.
TUNNEL DIODE
s the name itself suggests, this diode uses the principle of quantum mechanical tunnelling of
ectrons through the potential barrier for its operation. This is essentially the zener effect as
'scussed in section 4.5.1, although very smal1 reverse bias is needed in this case to initiate the
ner action. This device is also known an Esaki diode after L. Esaki, who received Nobel prize in
73 for his work on this effect.
A significant difference between the tunnel dio,de and the other diodes is that in the case of a
nel diode, a junction is formed between two degenerate semiconductors. The term degenerate
plies that the doping concentration in the semiconductor has become so high that the interaction
ween the dopant atoms themselves can no longer be ignored. In such cases, the impurity levels
se to be discrete energy states and form a band instead. This band may overlap with the bottom

d rech11ology
122 Sem1co 11ducror Devices: Modelling 011 band for acceptors. If the
h
top of the valence density of states Ne, the
. d with t e ffecuve . d S .
of the conduction band for donors an . more than the e onduction ban . 1m1larly
· . · band 1 • • d the c '
electron concentration m the conduct10n . but moves 1ns1 e es inside the valence banct.
Fermi level no longer lies within the energy ga~ the Fermi level movboth p- and n-regions are
if the hole concentration becomes greater than ~· equilibrium where tant at equilibrium and lies
· f · ncuon a · cons .
The energy band diagram o. a _P- 0 JU The Fermi level EF is all reverse voltage ts applied,
degenerately doped is shown m Fig. 5.J(a). h n-regwn. When a sm E ) as shown in Fig. 5.3(b).
below Ev in the p-region and above Ee in t be e that for electrons ( Fn e energy and the barrier
. . I (E ) moves a ov t the sam .
the quas1-Ferm1 level for ho es Fp t tes above EFn a . n This is akm to zener
- 11 d b I E and empty s a he n-reg10 .
As there are ti e states e ow Fp the p-reoion to t h tunnelling phenomenon
O
· · II I tunnel from · •
width 1s very sma , e ectrons can · required
t' ate t e ·
to tnt I E creating more filled
II . se voltage is ct to Fn
effect except that a very sma iever f ther up with respe Thus the tunnelling of
As the reverse bias is increased, EFp moves ur . at the same energy· '
states in the p-region and empty states
· the n-reg10n b'as
in . h . easing reverse 1 ·
electrons from p-region to n-reg10n mere
. ases wit mer
p-region
n-region
p-region ----
n-region
EF
'

Applications of p-n Junctions 123
On the, other hand , when a mall forward voltage is applied across this junction, a si tuati~n
0 epictcd 111 h g. 5·3_(c) is 1 :cachcd. No': Ep,, moves up with respect to EFp• placing empty states m
thC p reg ion oppo tte to f i1 led states tn the n-region. Electron tunnelling now occurs from n- to
.region and the t.unn.el ling ~ncrea es with the increa e in applied voltage.
p I Iuwever, ~ ith 111crcasmg forward voltage, a point is reached where the conduction band
edge 111 the n-~egion approache. the valence band edge in the p-region as shown m Fig. 5.3(d).
The electron 111 the n-region now ee fewer accessi ble empty states in the p-region and hence,
tunnel ling reduce~ with furth er increase in the forward voltage. This is known as the negative
resistance effect since t~e current reduces with increase in applied voltage. Once the conduction
band edge 111 the n-region moves above the valence band edge in the p-region, tunnelling stops
and the device b~hav~s like a ~onventional diode. The current-voltage characteristics of a tunnel
diode are shown m Fig. 5.4. It I observed that the current decreases rapidly beyond a voltage VP'
termed as the peak voltage of the tunnel diode. The ratio of the peak current I to the valley
current I,. i . often us~d ~ a figure of merit for this diode. The negative resistanc: region can be
used for van ous applications such as oscillation, amplification and switching to name a few. Also,
as tunnelling does not have the time delays involved in drift and diffusion, tunnel diodes are very
useful for high-speed circuits. However, the applications of tunnel diode are limited by its
comparative low current drive.
Conventional diode current
v
Figure 5.4 /- V characteristics of a tunnel diode.
SOLAR CELLS AND PHOTODIODES
Optoelectronic devices convert optical energy into electrical energy and vice versa. The
phenomenon of converting optical radiation into electrical energy is called the photovoltaic effect.
1'wo important devices based on the photovoltaic effect are solar cell, and photodetector. The inverse
of the photovoltaic effect is termed electroluminescence, that is, the phenomenon of light emission
when subjected to electrical signal. The LEDs and Lasers form good examples of this effect.
Photovoltaic Effect
t has already been discussed in section 1.1.3 that if a photon with energy hv which is greater
an or equal to the band gap E 8
is incident on a semiconductor, absorption of light can take

124 Se1111co11ducror Devices: Modelling and Tech110/og
place wi1h consequent •eneralion of an EHi'· Jn other words, in order to generate Elll>s .
particular semiconductir, the
avelength of the incident radiation m~s~ be lower th:; a
characteristic al ue for the material called the cut -off wa ' • /e11g th ,1.,. The a b1hty of the mater. I a
absorb "_ght is also dependent on a~other parameter, cai,ed the absorptioll coeffici~nt a. ah: lo
unll of inverse of length while (I/a), called the effective absorp11011 le11gth, is essential\ the
measure ot the material thickness with in which the incident photon is absorbed by y a
semiconductor _ f · In f act, t h e fraction of the incident radiation . . which · is · a b sor b e d Wt ·th· m a dist the
x rom the surface · . .
1
d. . ts given by [I - exp(-ax)]. Therefore, if a ,s arger, more of the inc·d · ance
ra within iation d. is absorbed wi .th. m the distance x. Also, the fraction of the mc1 . "d ent ra d 1ation " abso I h., ent
, cm~' ,stance (I/a) is then evaluated as [I - exp(-!)] = 0.632. A n absorption coefficie r...,
radiation
corresponds to b th 63 nt of
10 is b b an a sorption length of l µm, which means at .2% of the inc·d
a sor ed with' l . ff" . I ent
semiconductors m µm from the surface. The absorpuon coe 1c1ents for cliff
semiconductors arthe plotted as a function of the photon energy in Fig. 5.5. For indirect banderent
E,, as can be seen , e fr value of a a t a given · photon energy is usually lower for materials with h. &ap h
have much larger v.'lm th~ plots for Ge and Si. However, direct band gap materials (such as ~~er
as seen from the plot~~:ro G~ven th~ugh _their E, may be larger than indirect band gap materia s)
layer of GaAs (than sil' ) . and St. This means that for a given photon energy, a much th. ls,
icon is needed to absorb the light.
inner
hv (eV)
1osr-1\3r I .0~_2T.o:....._~1.s~~~~1~.o~~~~o~.7~5~ 10-2
300 K
Figure 5.5
10 5
Ge (Ac= 1.24/Eg = 1.88 µm) 10- 1
'i E
Gao.3olno.1oAso.64Po 36
0
(1.4 µm) ·
-~ 10 4
c
1 .c
Q)
....
·o
a.
Q)
!E
"O
Q)
CdS
c
0 0
§ (0.51 µm
:.:;
103
I
I
e- ~
10 1 ~
-Q)
I
0
c
I
Q)
I
~
a.
I
.....J
~
10 2
ex-Si :
(0.82 µm):
I
10 1 I
0.2 0.4 0
.
6
0.8 1.0 1.2
1.4
W ave length
Absor~tion cooeffi .
(µm)
1c1ents as functions, of Phot
on energ
y
,
~or variou s semioond uctor materials [1].

Applications of p-n Junctions 125
When a p-n j~nction is illuminated with light of photon energy greater than E , photons are
orbed in the semiconductor ~nd EHPs are generated both in the a-region ancl the :-region of the
bSccion, For the EHPs to contnbute towards cu~ent in ~h~ external cir,cuit, the generated electrons
tJ~ holes must be separated before th~y recombine. This 1s aehieved if the EHPs are generated in
ne depletion layer, where the el.ectr~c field sweeps away the electrons and holes in opposite
jrections. The ?hoto-generated mmonty ~arriers, which are .generated within one diffusion length
oJll
che
·
deplet10n layer edge,
. .
can
d
also diffuse to the depletion region wi'tho
u
t
recom
b'
1m
·ng
.
They
e then swept across the .Jun~tion ue to the electric field present in the depletion region as shown
f ig, 5.6. Due to the dtrect.10n of the electric field being from the n-Fegion to the p-region, the
O
oJes flow towards t~e p-reg~on and el~ctrons to the n-region. Since the direction of this photoenerated
curren~ h is .oppo.s1te to t~at m a forward-biased diode, we can write an expression for
e cotal current m an 1llummated diode as
(5.5)
other words, the total current of the diode is lowered by an amount h when illuminated.
hv
-~-----------------------f----
qVR
Electron
diffusion
Drift space
I
• Hole
I
I
diffusion
Figure 5.6 An illuminated p-n junction showing the generation and subsequent separation of EHPs.
The 1- V characteristics of aa illuminated p-n junction diode are depicted in Fig. 5.7. An
esting point to be noted is that the 1-V characteristics pass through the first, third, and fourth
rants. Depending on the intended application, the diode can be made to operate so that either
er is delivered to the device (operating in the first or the third quadrant) or supplied by the
ice to the external circuit (operating in fourth quadrant). When the diode is used as a solar cell,
made to operate in the fourth quadrant and work as a battery. On the other hand, to make use
e diode as a photodetector, it is usually operated in the third quadrant. However, though the
elilying principle is the same, the actual structures are very different for these two devices. We
now discuss the operation of these two devices in the next two sections.

126 Semiconductor Devices: Modelling
'
I (rnA) Dark ~
'
I '
I
/ V(V)
0
With illumination
Figure 5.7
n junction.
. . f illuminate d p-
1-V characteristics o an
Example 5.1
4
eV respectively. What are the
112eVandE :=:l.4 2 8
o-34J d .
The band gap of silicon and GaAs are Eg == · , t h == 6.62 x 1 s an velocity
cut-off wavelenoths ,'.l in these materials? (Take Planck s constan
of light c = 3 x 10 10 emfs.)
e
c
Solution: At the cut-off wavelength Ac,
hv == Eg
or
or
Since 1 eV = 1.6 x 10- 19 J,
6.62 x 10- 34 x 3 x 10 10
he =
= 1.24 x 10- 4 eVcm = 1.24 eVµm
1.6 x 10- 19
Therefore, when Ac is expressed in µm and E 8
in e V, we have the simple relation
Therefore, for silicon,
and for GaAs,
,i = 1.24
c E g
,i _ 1.24 _
c - l. l 2 - 1.11 µm
,i 1.24
c = l.4 24
= 0.87 µm
5.5.2 Solar Cell
A so]ar , cell is basically a p-n junction, which c d 1
.
illuminated. Arrrays of such junctions are used to su an 1
e liver . power to the external circuit when
PP Y e ectncal power to space satellites and also

Applications of p-n Junctions 127
d
S l
. · s for these
r remote an rural area . o ar cells are preferred over conventional battene .
plications as they are environment-friendly and provide maintenance-free services for long tm~e.
,wever, the high co t of so lar cells has so far curtailed its widespread use for terrestnal
0
plication . .
Solar cells are u ually large area devices so that a greater amount of optical energy is
sorbed and output power is high. In order to increase the light-generated current h , a large
umber of the minority carriers generated outside the depletion region have to reach the edge of
e depletion region. This requires the diffusion lengths L
n
and L to be large. As seen from the
p •
'scussion on fabrication of diodes in section 4.6, the top layer is produced by diffusion or 1 ~nplantation
with a high impurity concentration. High impurity concentrations create latti~e
amage which introduces recombination centres. This makes the lifetime of carriers very short m
e top lay,er and consequently the diffusion length is small. Hence, in a practical solar cell, the
pmost laytr is fept very thin so as to allow more light to reach the base. On the other hand, the
ffusion lenglh in the substrate (or base) is large and the carriers generated in this region mostly
ntribute to useful photocurrent. Also, n+p structures, with the n+ layer at the top, are preferred.
is is because the diffusion constant of electrons in the p-base (D ) 11
is larger than that of holes in
e n-base (Dµ) of a p+n junction. Larger diffusion constant means larger diffusion length and
erefore an improvement in h, as more carriers generated outside the depletion region can diffuse
this high field region .. Usually, in a practical solar cell the surface concentration of the n-region
kept below 10 20 cm- 3 with a junction depth less than 0.2 µm. The surface of the solar cell is
ated with antireflection coating in order to minimize reflection losses. In general, the
tireflection materials used are Si0 2 , Ti0 2 , and Ta 2
0 5
. The series resistance of the solar cell has
be made very small so that power is not lost due to losses in the cell itself. To achieve this,
·n contact fingers are provided on the n-region. Figure 5.8(a) shows the structure of a solar cell.
Top finger contact
n
Top contact
Anti-reflection
coating
lsc i------­
lm
p-Si
(a)
Back contact
0
(b)
(a) Structure of a solar cell; (b) /-V characteristics of an illuminated solar cell showing the point
of maximum power.

·~1e~c~ll~ 11o~l~o~gyt_ ____________ ~---------....
128 S
I
1111 011d11 tor Devices: Modelling anc -
MO illumination. The AMI SPcct
· d t AM 1 or A n at the · rulli
lnr cell . are u uall y calibrate a
day with the su zenith and
I
repre cnts un light incident at the sea level on a ;;ar 2 On the other hand, the incident oprthc
incident optical power in this case is about 92.5 rn c; · h 'ntensity of the solar spectrurn ~ca1
P wcr fo r AMO is 135 mW/cm2 and is considered to e t e 1 lly used for solar cells 1·n JUst
· b t' · s genera sp~"&
u · ide the earth' atmosphere While AMO calt ra t0n 1 . . ns """\':
. · · t rrestrial app 11catto · 5 B(b)
sate I I 1te , AMI ts usually meant for cells 1n e . h wn in Fig. · ·. The three
The fo urth quadrant f- V characteristics of a ~ola~ cell ts s: the short circuit cu"ent 1 rn0st
important parameters of a solar cell are the open circuit voltage or• ion to the p-region, that i:C .and
t~ e filf factor F:. Since in a solar cell, current. flows fr~m the :-~efn Eq. (5.5) we obtain the ~~n a
d1rect1on opposite to that of a conventional diode, putting V
circuit c urrent lsc as
I = - I L
Again for I = 0, we have the open circuit voltage Vo, from Eq. ( 5 . 5 ) as
sr
0
rt
(5.6)
v
0
, = Vr In (1 + ~~ J ~ Vr In ("f. J (5.7)
. . t' at either of these two points s
H owever, no power 1s delivered when the solar cell 1s opera mg · o,
the operating point of the cell should be selected such that the output power becomes maximurn.
The output power is given by
P = VI ~ +L -/0 {exp(:,)- 1} J
(5.8)
The condition for maximum power is obtained from dP/dV = 0. Hence, differentiating Eq. (5.8)
and equating it to zero, we get the expressions for the voltage and the current at the point of
maximum power as
(5.9a)
(5.9b)
The optimum load resistance R 0
P for maximum power is thus given by rearranging Eq. (5.9b) as
The fill factor of the solar eel) is defined as
Rop = Vm = Vm + Vr
Im lo+ IL
(5.10)
FF= Vmlm = pm
vocll vocll (S.11)
where Pm = Vmlm is the ma,xilTium power output of the solar cell F IJ d . ed 11 FF
usually lies in the range 0.7-0.8. The efficiency of the solar
11
. • . or a we - estgn ce '
ce 1s given by

Applications of p-n Junctions 129
where p 111
= incidept optical power.
17 ::: V,1.f m = FF Vorl l
Pin
Pin
(5.12)
Thus, it is evident that to realize a solar cell with high efficiency, it is not only necessary to
hove high V ()(.' and lsc but also a high FF. Solar cells with 17 = 15% under AMl illumination are
J111Tlercially available.
co To improve the efficiency of solar cells, I has to be increased. This can be achieved by
increasing the collection of photo-generated canie~s. One way of improving the carrier collection is
to heavi1. dop~ the back of the. cell. so as to realize an n+pp+ structure. The potential barrier ~t the
back pp Junction forces the mmonty Cru:tiiers to be confined to the p-Fegion. 11he decrease m the
vailability of minority carriers liedl!lc.es 11ecombination at the back contact alild enhances the
~hance of collection of the generated earriiets. Other, te©hniques employed to increase h include
surface texturi~g, use of solar concen~ators, and so on. .
The efficiency of a solar cell depends, to some extent, on the material used. For a material
with larger band gap, V oc is usually higher as / 0
reduces drastically with increase in Eg [see
Eq. (5.7)). On the other hand, with a~ inc1ease in Eg, some part of the incident light for which h v
is now less than Eg, no longer contributes to Ji, thereby reducing fsc [see E

,, 1 ,'_}_i~e~c/~11~10~/o~&~'Y:...--------
130 Semico1Zductor D'evices: Modelling on

Appl/ t.alons of /N I J1111crions 131
1i.1::, bee 11 a urned th at nnl thus ~HP. whi h ure ,cnemtcd in the depletion layer and ~me
~fft1, 1t1 n le1H1th n\· a from it 111 the n-1;egion ontribute to the ph t current. P'rom ~q. (5.13a), we
11i,1t tor hi gh effic1c11c. · WP mu l bq 1111111 and tho doplcti n Juycf' width w must be large.
p~;,..,1c,d ly th1 ' means th at m~)st of the. incident photon~ arc absorbed within the depletion reg!on
i,cr than 111 the neut ral p- ,llld n-r gi~m,, A there exists a strong electric field in the deplct1on
31
;:gitH1, ,1:,; . oon a a~ HP 1 :- gcncra,ted ~ith!n this region, electrons are wept into the n-region and
hol e::- ,nro the p~reg1on e c11tua!ly co~tnbuting to photo urrent. Al o a large W results in a small
cap, 1 c1t,1ncc a!1d 1mpro: 1 es the s~ced ot re ponse of the diode. However, if Wis too large, the tran it
urne J ,1,1y ot the earners dominate and hence, a compromi e has to be made,
mt.:·. . _, · · HELP DESK s.1
Equauon (5. I 3b) suggest th at for a given quantum efficiency, the responsivity increases with
avelength What is the ph ys ical reason for th is?
Let us consider two ideal photodiodes, P 1 and P 2 , having quantum efficiency 1J equal to l.
Let u a sume that the same number of photons is incident on P 1 and P 2 per unit time. Therefore,
it folio,, that the photo-generated current is also the ame in P1 and P 2 , that is, hi = IL 1
• Let l 1
and ~ be the incident wa elengths on P1 and P 2 respectively, and ). 1 > ). 2 • Since each photon
incident on P: has hi gher energy than those incident on P1, the incident optical power on P 2
greater than the incident power on P 1 (Poptical 1).
p optical 2 > P op1ical I
it fo llows that
where R 1 and R 2 are th e respons1v1t1es of diodes P 1 and P 2 respectively. Therefore for two
photod1odes having the same TJ, responsivity increases with increase in wavelength.
Also note that one photon can generate only one EHP. If the energy of the photon hv > Eg,
the excess energy (hv - E:;) does not contribute towards IL, but is lost as heat in the substrate.
Therefore, red uction in wavelength below the cut-off wavelength only increases the input powe.r,
without increa ing output current, thereby reducing responsivity.
A convenient way of tailoring the depletion layer width is to use a p-i-n photodiode rather
than a simple p-n junction. Most of the reverse bias appears across the 'intrinsic' layer, which need
not be trul y intrinsic, as Jong as the doping is low. As the doping is low, the carrier lifetime is high
in this region and most of the photo-generated carriers are collected by the n- and p-regions.
Figure 5.9(a) shows the cross-section of a p-i-n photodiode. The curvature at the junction edges
leads to hi gher electric field intensity and a smaller radius of curvature results in a smaller
breakdown vo ltage. A guard ring of larger junction depth is usually employed in p-i-n photodiodes
as shown in Fig. 5.9(a) to increase the breakdown voltage and reduce the dark current.
Photodiodes, which are operated close to the avalanche breakdown voltage to enable
avalanche multiplication of photo-generated carriers, are ca lled avalanche photodiodes. The

•• th •
I 1111d h f1 I '
,holOClll'I' 11 • l(if Ji't •fl Jn
, ~ t I ti l , N I
. . ' l'S~ II I 111,1 ' I •111 Oii pt 1 ''" t4 ••
i I
nl. n ·h mutt P tl' ,t n I 11 ·' • 1 1111tll 11 < 11111 11 pl ·11l on
d te tor. H w t. sin , tht' nv it:1 11 ' I< 11,,11 11 11 ·II
• ' ht • It\ I 1
tlu tu~iti n in th 1 • p n:;wtl I lnG ~
pt1cal fibre
( ) t1on of a heterojunctlon lnP/lnGaAs
diode; (b) cross~sec
Figure 5.9 {a) Cross-section of sillc n p-1-n photo di d [2)
p-1-n plioto o ·
t the ph todiode is extremely sensitiv
· · - ·t' on · · 1 1 h
1 a · If th · 'd e
It is e ident from ur di us ,on in s . t'on coefficient. e met ent photo
. . I I . 1o h the ab 0 1 p I h h t n
to the , a elength f th in ,dent hg it 111 OL r:, •
1 . d if h v >> E 8 , t e P o ons get absorJ.ft,
- d the orhc1 ,t1n ' . d VC(J
energy hv < E ,. the Iioht i n t ab orbe ·
11
• • r'ite i very high an as a result the
~ .~ ::, .· . ·ecomb1nauon , . ,
ery near to the urfa e \. here the an 1 .e 1 .' . , . to choose a proper photod1ode material
. I . Tl fo ·e tt t nccess,uy . h d "
photocurrent 1s smal agam. ,e~e 1 '. to be detected. Heterojunctzon p oto zodes, with
depending on the parti ular optical ignal . . f I in this regard . The band gap of th
· f d · d tor are ve1 y use u e
multtlayers o compoun emicon uc '
1 f the incident light. Also the quantu
absorbing layer can be tailored to m~tch t~e ':avel_en~t~ ~hat of a homojunction device. This~
efficiency of a heterojunction photod1ode is h1ghe1 tha . . s
· h · · d' d ht can be m·1 de to reach the absorbmg layer through a higher
b ecause m a eteroJunct1on 10 e. 1· · ( • d ) h'~h
1g
does not
'
ab orb the incident rad1at1on
. .
so that surface
b an d gap matena 1 wm ow , w 1c . .
recombination is avoided. However, uch a diode may have a higher dark current due to lattice
mismatch at the heterointerface.
The Ino Gao_ As/InP heterostructure i widely used for photodetector applications, since
53 47
In Gao.4 As has a nearly perfect lattice match with InP. Indium phosphide is used as the optical
053 7
window and In Gao.4 As as the absorbing layer as shown in F ig. 5.9(b). Since energy gap
053 7
Eg of
Ino Gao.4 As is 0.73 eV, this photodiode can be used up to an optical wavelength of
53 7
1.7 µm and is
particularly suitable for optical communication in the range of 1.3-1.55 µm. At these two
wavelengths, the optical fibre exhibits lowest attenuation and hence, these wavelengths are deemed
to be particularly suitable for optical communication.
(b)
5.6 LIGHT EMITTING DIODES (LEDs) AND LASERS
In this section we discuss those p-n junction d · · ·
energy. This effect is called injectio l . l .evices, which convert electrical energy to optical
when forward biased lasers em1't cnole ectml~nhunescence. Though both LEDs and lasers emit light
, 1erent 10 t in h ED
t:, muc narrower wavelength bands than L s

Applications of p-n Junctions 133
e more directional. Thi is because the dominant operating process for LEDs is spontaneous
;on and for lasers it is stimulated emission. We shall discuss these two processes in the
wing subsection.
Spontaneous and Stimulated Emission
have already seen that a photon . of. appropriate energy can ~e absorbed by a semiconductor,
ting an EI-IP in the process. This is called optical absorption. Let us consider Fig. 5.lO(a)
h depicts two energy levels in a semiconductor E 1 and E2, where E 1 corresponds to the ground
and E 2
to the excited state. At room temperature, most of the el~ctrons are in ground state.
n a photon of energy greater than or equal to hv 12 = E2 - E 1 is incident on the system, an
tron in the ground state absorbs it and goes to the excited state. However, the excited state· is
ble. So, after a short time, without any external stimulus, the electron comes back to the
nd state emitting a photon of energy hv12· This process is referred to as spontaneous emission
is schematically represented in Fig. 5.lO(b). On the other hand, if a photon of energy hv 12
inges on the electron while it is in the excited state [as shown in Fig. 5.lO(c)], the electron can
timulated back to the ground state with emission of a photon having an energy hv 12 , in phase
the incident radiation. This is called stimulated emission. The radiation emitted from
ulated radiation is monochrom~tic because each photon has energy precisely equal to hv 11 and
erent because they are all in phase.
E2------
E1---•---
(b)
E2---•----
E1------
(c)
E2 •
E2
~hV12
~hV12
-+
~hV12
E1 E1 (in phase)
Schematic showing the three basic processes: (a) photon absorption; (b) spontaneous
emission; and (c) stimulated emission.
Light Emitting Diodes
s are p-n junctions that can emit spontaneous radiation in ultraviolet, visible, or infrared regions.
ible LEDs are widely used as visual information links between electronic instruments and their

,,d 1 ec
•
,.,. /1110/ogY anel o f a I most a I I clcctr
, Modef/0 1 8 0
tro l P · · c,n
134 Semiconductor Device :
kJOg
. n the con ,..,,,(l'lun1cat1on systems h,h
O • C0l" "
. . thef11 bltO . ibre-optic ;\J'I jrnportant apphcatio
user . Thu , it i a common sight to s~EP are used '~ g distances ·•Pt lied w the LED I · n '•
gadget . On the other hand, infrared . I signal over ~n I signal is to an electtkaJ. /'&ht '
silica fibre are used to guide the opuca an ,nput eJectri~a onverted bac 0 smission at the •&nal &·
infrared LED is in opto-i olator where hotod1ode an c signal tr•
SJ>Ced ,~
generated and subsequently detected by a ~pto·isolators aJloW
a current flowing through a load re ,stor·
The phosphorus mole fraction I
light and are electrically isolated.
fo r visible LED· ore and more phosphorus a ..,.}
1
d rnateria d JT1 • l . 1
~1 • 1·
GaAs, ,P is the most preferre
y is increase ' of the matena is direct
- Y • that ,s, a 5 b d gap . a
this ternary compound 1s denoted_ by Y,
0 < y < o.45, the an 45). As already pointed out
replace arsenic in the crystal la tuce. for 77 e V (at Y C' . O · • high in direct band Jr,
1 9
increases from i.424 eV (at Y ~ 0). to ( diative) transition ,s ·0 the wavelength r &a.
section 1.1.3, the probability of direct '.: used for J,ght emissio n ~ial recombination ange r4
semiconductors. Hence, GaAs,_J', (y < o.4S) . ect band g•P· So, sp . . centre,
627-870 nm. For y > 0.45 the material has an indir . . Jncorporatton of mtrogen results I
' · · ombinaoon. I I I t
have to be introduced to facilitate rad1auve rec
· traduces an
electron trap eve
d' ·
very c ose to th e
formation of such a recombination centre. I t in
h nces the pro
bability of ra iauve recombinat,·
o
bottom of the conduction band and _great I Y en a substrates while orange, green, and yell~
In general, red LEDs are fabricated on GaAs G A )' Jayer is grown by epita '
10
LEDs are fabricated on GaP substrates on which a graded a 1
~'5 ~ low loss windows · xy: In
opllcal communications, to take advantage of the 1.3 µm and · µ
QplicaJ
fibres,
At
InGaAsP
a low forward
substrates
voltage,
are used.
the LED current is dominated by the nonradiative
· ·
recombination
current, due mostly to surface recombination. At higher forward voltages, the radiati
diffusion current dominates and light is emitted as the injected_ minority carriers recombine with ;
maJonty earners through a radiative recombination process. Finally, at very high forward volta
the current is lim.ited by the series resistance. Thus, incorporating the series resistance loss !"·
conS1dermg our d1ScusS1on m section 4.3.4, we can write
ntl
where
I = Id exp
(
I d exp
( V VT
- IR J = ra d. iat1ve . diffusion current,
V - IR J ( V - IR )
VT
+ I , exp
2Vr
1, exp(V - IR J - ..
R - . 2Vr_ - nonradiative recombination current, and
- senes resistance of the di d
E . o e.
v1dently, to increase the o
The electrical in ~ wer output of the LED I
at high frequencies T~~t _signal to an LED (for exa~ '1 and R must be reduced
example, the de I . . is m turn modulates the . . p e, the applied volta ) . .
output. The ulti.:a;~mn layer capacitance and Injected current in the LE;e IS usually modulated
frequency of L hm1t on the speed f series resistance) . Parasitic elements (for
an ED [3] is . given . by o respons e d epends o n the can c cause . . a d e]ay in the light
arner lifetime r. The cut-off
(5.14)
J, - I
c- - 2nr
(5.15)

Applications of p-.n Junctions 135
~ iconductor Laser
5.6.3
. aJIY all the semicon~uct~r l~sers use direct band gap materials. The dominant process for
v1r 1 ~ nductor laser operat10n is stimulated emission. If the stimulated emission 1s to dominate over
sefl'l 1 c 0 00taneous emission. the photon field energy density must be very high and therefore an
1ne spl resonant cavity is to be used. In addition, if s~imulated emission of photons has to dominate
oP uca the absorption · o
f
P
h
oto~s, V:e m~st
h
ave more el~ctrons in the excited state than in the groon
d
o er fhiS is called population mvers1011, since under equilibrium the reverse is true.
state· population inversion in a laser can be achieved in the following manner. Let us consider a
. nction formed between two degenerate semiconductors. The energy band diagram of such a
J1 JU ' }'b . . h
p· ·on under thermal eqm 1 num is s own in Fig. 5.1 l(a). When a forward voltage is applied,
·unctt . . f h . .
J 005 are mJected rom t e n-reg10n and holes from the p-region into the space charge region.
: :n a sufficiently large ~orward volta~e is applied, high injection occurs, that is, there is a large
ntration of electrons m the conductmn band and holes in the valence band in the space charge
conce . th d. . f 1 . .
. n. This is e con 1t1on o popu atton inversion as shown in Fig. 5.1 l(b). For band-to-band
regJO • • . d . .
transition, the mimmum energy reqmre lS Eg. Therefore, we can write the condition for populat10n
inversion as qVF = EFn - EEp > Eg.
p
n
(a)
(b)
Figure 5.11 (a) Energy band diagram of a laser eiode junction under thermal equilibrium and
(b) under large forward bias showing population inversion. The shaded regions show states
which are occu1Died by electrons.
Figures 5.12(a) and (b) show two commonly used laser structures. The first structure is a basic
p-n homojunction laser that has the same material (that is, GaAs) on both sides of the junction. A
pair of parallel planes perpendicular to the plane of the junction are cleared and polished. Under
appropriate biasing condition, laser light is emitted from these planes. The other two sides are
deliberately roughened to prevent lasing in those directions. Such a cavity is called a Fabry­
Perot resonant cavity with a typical cavity length of 300 µm. The other structure, shown in Fig.
5.12(b), is called a double heterostructure (DH) laser, where a thin layer of material with a narrow
band gap (active region), say GaAs is sandwiched between layers of a material with wider band
gap such as AlxGa 1 _xAs. This is usually realized by epitaxy. In such a structure, the carriers are
better confined in the active region due to the heterojunction barriers. Optical confinement is also
better in DH lasers due to the abrupt reduction of refractive index outside the active layer. Since
the refractive index in the active GaAs layer is larger than the refractive indices of the
s~rrounding A1xGa 1 _xAs layers, the propagation of the electromagnetic radiation is confined in a
direction parallel to the layer interfaces. The threshold current density J,h defined as the minimum

. d Te~cl~11~io~lo~g~y:--------
1.1a_1s~e!!:m~ic~o~n~d~uc~t~o~r-D~e~vi~ce~s~:...:.:.M~o::d:.:e.::ll.:..:.11~zg:.....-a-11--
homoj unctiolil lasers. With
- ared to h · .
& DH lasers comp than that foF om0Junct1on
current density required fi or l asmg
.
ts
. lower
.
• or
eases at a s
I
ow
er rate
om temperature.
DH I ers 1ncr
· n at ro
increase in temperature, J,h for as ontinuous operatio h laser spectn1m has broad
lasers and hence DH lasers are pre
fi
e
rred for c
emission domma
· tes
'
t e
be about l@-5@ nm. As the
At low currents where the s.pontaneo~; maximum intensity maY r and above J,,,, the spectral
spectral distribution, and the full width at h~ 'bution becomes narrowe
current approaches threshold, the spectral d1stn
width is usually of the order of 0.1-1 nm.
Top contact
p-GaAs
n-GaAs
Top contact
p-AlxGa1-xAs
p-GaAs --?'f""'--:::::,-__
n-AlxGa1-xAs
Coherent radiation
Bottom contact
(b)
Coherent radiation
(a)
nd (b) double
Figure 5.12 Structure of (a) p-n homojunction laser a
heterostructure (DH) laser.
PROBLEMS
PS.I
PS.2
. . h b rption coefficients of Si and GaAs
At a particular wavelength of incident radiation, ~ e a s;h t are the thicknesses of Si and
are 4 x 10 3 per tm and 3 x 10 4 per c~ r_espect1ve_ly._ ? a
GaAs necessary to absorb 80% of the mc1dent radiation·
A 5 µm thick silicon sample is illummated · wit · h monoc h r omatic Jioht o havin° . 0 hv = 2 eV.
The mc1dent · · power 1s · 10 m w · ( a ) What is the total eneroy absorbed m the sample per
O . EHP
second? (b) How much energy per second is dissipated as heat? (c) How many s are
generated in the sample per second?
REFERENCES AND SUGGESTED FURTHER READING
[l] Melchior, H., Demodulation and Photodetection Techniques, in F.T. Arecchi and
E.O. Schulz-Dubois (Eds.), Laser Handbook, Vol. 1, North Holland, Amsterdam,
pp. 725-835, 1972.
[2] Lee, T.P., C.A. Burrus, and A.G. Dentai, 'lnGaAs/lnP p-i-n Photodiodes for Lightwave
Communications at 0.95 to 1.65 ~tm Wavelengths, IEEE Journal of Quantwn Electronics,
QE-17, p. 232, 1981.
[3] Sze, S.M., Physics of Semiconductor Devices, 2nd ed., Wiley, New York, 1981.
[4] Singh, J., Semiconductor Dev_ices, McGraw-Hill, New York, 1994.
(5] Streetman, B.G. and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice Hall, New
Jersey, 2000.
[6] Bhattacharya, P., Semiconductor Optoelectronic Devices, Prentice Hall, Enolewood Cliffs,
New Jersey, 1994.
o

?
Bipolar Junction Transistors
---- 6.1 INTRODUCTION
The Bipolar J unctio~ Transi~tor .

. and Technology
·ces· Mode/lmg
1 ror D evz ·
138 Semiconc. uc th two junctions (JI) is now forward biasect
I Ch Of electrons (£,,). If one 0 t:cal~Y all the electrons injected by the forwardanb~i n
a
.ff · en° · d prac 1 d · · as~
I us1.on . o (J.,) is reverse b1ase ' . before they reach the secon ~unction. At J
other Jun:uon the- p-reaion will recombinhe slope of the electron concentration profile is a2l, H
. · 10 to e · I to t e · · bl ' rno
Juncuon hich is proport10na f each other. No apprec1a e current flows at h
tron current, w · dependent o b k t e
e I ec J·unctions are tn diodes cmm.ected back to ac ·
I
Thus the cwo . lent to two ) .
;;:inal a~d the strucwre_ is ~qu~v;(b ), if the width of the p-region (?ase is . very small (less th:
ver as shown in Fig. . . the p-reoion from the n1-reg10n (emitter) reach 12. Th
Howe O
' · · ted in to • d · · e
L ) most of the electrons inJeC d Jetion region of this reverse biase Junction by the la .
ele~trons are then swept ac:o~~n~~ ::ilected in the Oz-region (collect~r~. So, even though 1:·
electric field present and ar fL y at the n2 terminal due to the prox1m1ty of the two junctio1
reverse biased, a 1 arge
current
f
ows
. toF action. The n1-region wh1c
· h
em1
't
s e
I
ectrons when J I
. · · l feature o transis · · JI d i.
This is the pnnc1pa . d the narrow p-reo1on is ca e b1e b ase o
f
t
h
e transista
. sed is called the emitter an
forwar d b 1a ,
o
n1
\
p n2
' ' .....
---
J1
J2
(a}
. here (a} the width of the p-region is much greater than the diffusim
Figure 6 2 The npn con fi gura t ions w · · I th f I
· d (b) th 'dth of the p-region is much less than the d1ffus1on eng o e ectrons. T
length of electrons an e wi . . h
electron concentration profile in the p-reg1on (base) 1s also s own.
n~
\P
\
\
\
\
\
6.3 CURRENT COMPONENTS IN A BJT
Figure 6.3 shows a one-dimensional n-p-n transistor structure. As shown in the figure, the emitt
base, and collector widths are WE, W 8
, and We respectively. The neutral base extends from x = 0
x = W 8
, while the neutral emitter and collector lies at -(xE + WE) < x < -xE and Xe <
(xe + We) respectively. The doping concentrations in the emitter, base, and collector are NDE•
and NDe respectively. The transistor has a cross-sectional area A, and is uniform along the cro.
section. The applied voltage across the emitter-base junction is denoted by V 8 £, while the appl
voltage across the collector-base junction is Vne· The assumed directions of flow of the termi
currents, 1£, 1 8 and l e are also shown in the figure.
Since the transistor has two junctions, namely emitter-base (EB) and collector-base (C '
and each of these junctions can be either forward or reverse biased, we can have four diffeni
modes of operation for the bipolar transistor. They are:
(a) Normal active mode- The emitter-base junction is forward biased and CB junction
reverse biased.
(b) Saturation mode-Both EB and CB junctions are forwaFd biased.
(c) Inverse a~tive mode- The emitter- base junction is reverse biased and CB junction
forward biased.
(d) Cut-off mode-Both EB and CB junctions are reverse biased.

~Bi O B
- (XE + WE> -XE We Xe Xe+ We
~·
E 0
n
IE
Bipolar Junction Transistors 139
.
I
I
I
I
I
I
I
I
I
I p n J -
I ~
I
I
le
I
I
I
I
I
c
Figure 6.3
One-dimensional schematic diagram of an npn transistor.
1,f In order to obtain e~pressions for the. terminal currents, we shall use the minority carri~r
. blJUOil5 and currents m the neutral regions. This is because, for minority carriers the dnft
ent can be neglected, as we assume that all the applied voltages appear across the space charge
region and ther~ is negligible electric field i~ the neutral regions. The continuity . equ.ations ~e
efore sunplrfied We have already seen m Chapter 4 that under bias, the mmonty carrier
ntration at the edge of the depletion region gets modified by a factor exp (VIVT), where
y == v
1
for a forward biased j unction and V = - Vr for a reverse biased junction. Also, at the emitter
collector contacts, the large surface recombination velocity reduces the minority carrier
entration to the thermal equilibrium values. Using these considerations, the distribution of
· nty carrier concentration in the BIT for the different modes of operation is as shown in
fig. 6.4. The polarities of V BE and V sc for each mode of operation are also shown.
I Pn
E
JSI>·
B C
I
O W
ormal active
E B c
Pn
Pn
VBE
+ E
0
Pn
E
Pn
B
0 w
Saturation
B
0 w
Inverse active
c
Pn
c
Pn
+
Vee
Fig e 6A
• ..J:J~ • ........itl""' base and collector regions of an npn transistor
'ty carrier concentratiOn pr"""'"" '" ..... " "'' • •
for different potaritieS of V BE and V BC·

Due to the concentration gradients of the minority carriers in the neutral re .
flow of diffu ion currents. The minority carrier electron and hole current compor!:::'' Iller,
jun tion are denoted by I,,e and Iµ . respectively .. When the EB juncti? n is forward bi It the I\
0), hole are injected from the base to the emitter and lpE is n~gat1_ve (that is, in ;:4 (i, 1
t ..
·-direction). On the other hand, when V 8 E < 0, the hole concentration m the emitter rC(f ~ i
the thermal equilibrium value as the minority c~rrier hot.es are swept to th~ base, givin~ ~
po i ti ve I pE· When V BE > V nc, the concentration gradient of electrons m the base g l'lsc to,
injection of electrons from the emitter to the base, giving rise to a negative J,,E· (No:Utc, Ill
direction of current is opposite to the direction of electron flow). However, when v that
dire tion of the concentration gradient changes and electrons may be injected from b:!c < VBc, !ht
re ulting in a po itive !,,£· (There is a special case when Voe ~ V 8 c, which is disc~ Cln11ttr
ection 6.6.2). For the CB junction also, there exist electron and hole current components later
by / 11
and !pc respectively. U ing si milar arguments as in the case of the EB junction 1
~
to be positive when V 8 c > 0 and negative when V 8 c < 0. The current component f,,c i~ 'IS SCCfi
negative when Vo£> V 8 c, and posi tive when Voe < Voe· (Note that positive or negative va1CJ'~:
th~ current components only refer to their directions of flow. For positive hole current. the,: Of
hole i in the positive x-direction while for positive electron current, the flow is in the~
x-direction).
We have already seen in section 6.2 that for proper action and operation of a transistor
of the electrons injected into the base at one of the junctions should reach the other ju~
This implies that there is dependence between / 11 £ and I,,c, However, I,,£*- I,,c. For example, When
electrons injected from the EB junction flow towards the CB junction, they partly recombme With
the majority carriers (holes) in the ba,se, and therefore I,,E *- I,,_c· The difference, I 8 R = -(JnE-1,.c) is
referred to as the pase recombination current. An equivalent hole current flows "in from the base
terminal to compensate for the holes lost during the base recombination proce~s. Therefore, the
base current consists of the following components: hole curren.t at tqe EB junction (Jpe), hole
current at the CB junction (/pc), and base recombination current (/ 8 R). The emitter current is due to
the hole current at the EB junction UpE) and the electron current at the EB junction (in£), while the
collector current is due to the hole current at the CB junction (/pc) and the electron current at the
CB junction Und · Hence, considering that /£ and l e actually flow in the negative x-direction (refer
to Fig. 6.3), we can write
Rearranging Eq. (6.1) we get
I E = -Une + lpE)
Is= l pc - I p£+ loR = fpc - lpE - (/,,£ - Inc) (6.l)
l e= -Unc + lpc) J/:
Equation (6.2) states that the total current flowing into the transistor is equal to the curreP'
flo~ing out, and is only the Kirchofil''_s C~1Tent Law as applied to BJTs. Figure 6.~ shows':
vanous current components and the d1rect1on of flow of carriers in the normal active m~
operation, that is, when V 8 E > 0 and V 8 c < 0.
(61)

Bipolar Ju11crio11 Trn11sis1ors 141
E
i-----0 c
Electron flow
f igure 6.5 Current components in an npn transistor In the normal active mode of operation.
Wh ha e \ e neglected the majority carrier current components in Eq. (6.1) while developing
---
10ns for the tenninal currents?
exp
We have not neglected the majority carrier current components. It is only that considering
only the minority carrier components at the junctions, it is possible to obtain the total current at
the contacts. We are therefore able to avoid solving the continuity equation for the majority
carriers, which i ery difficult to handle. We have also used a similar procedure for diodes. As an
example, let us consider the emitter current in a BIT, which is composed of a majority carrier
(electron) current Un-coJ and a minority carrier (hole) current Up-con) at the emitter contact. The
electrons injected at the emitter contact, while flowing towards the EB junction, partly recombine
in the bulk emitter. Since InE is the electron current at the EB junction, which is injected as a
minority carrier current into the base, we can write InE = In-con - 1 8 £, where I 8 E is the recombination
current in the buJk emitter. Similarly, the holes injected into the emitter partly recombine, while
flowing towards the emitter contact. Since an identical number of holes and electrons are involved
in recombination, we can write Ip-con = IpE - f 8e, where lpE is the hole current at the junction.
Therefore, we see that In-con+ Ip-con= InE + lµE• or that the sum of the majority and minority carrier
componems at the contact equals the sum of the minority carrier current components at the
Having defined the various ourrent components in a BJT and their relationships with the
external currents, we shall now derive expressions for these components in terms of the various
geometrical and doping parameters of the device. The procedure followed is similar to that used
for diodes in Chapter 4. We shaJI first obtain the minority carrier relationships by solving the
COntinuity equations in the emitter, base, and collector regions. The diffusion currents at the EB
and CB junctions are then obtained from the slopes of these relations.
Let us first cQnsider the base region. Under steady state condition, that is, on,Jot = 0, the
COntinuity equation in the neutral base can be written using Eq. (3.32a) as

142 Sem1co11ductor De ices: Modellurg and Technology
The solution of this

1rnilMIY the electron current at the CB Junction can be written as
(
dn ) A D [ (
Bi olar Junct,lon Tramistors 143
I,, = AqD,. Tx . w, "' --1.11. n~e cosech ~:) - n~c coth ( ~:)] (6.9)
· ·1 r procedure that is s I ·
10 w1ng a simi a . '.. b ' 0
ving the continuity equation for holes in the emitter and
fo\ ctor region u mg appropr mte OURdary conditions (say' Pn = Pno at the emitter and collector
0ol e ) we get
c;ontllct , ( d
8nd
lpE = -AqD 1 ,E ..f!.u.) _ AqDpEP~e h ( WE J
dx - - cot --
x• -x« LpE LpE
(6.10)
(6.11)
where h . .
DpE and Dpc = t e mmonty carrier diffusion constants in the emitter and collector
re pecti vely,
LµE and Lpc = the minority carrier diffusion lengths in the emitter and collector respectively,
and
, and p',c = the excess minority carrier concentrations at the edges of the depletion region
in the emitter and collector respectively. These are given by
/? 11£ I
and
P;,c as (Pn - Pno ),.,, = (P.olx=x, [ exp ( ~:) - I J :L[
= exp (Vi:) -I J (6.13)
The various current components given by Eqs. (6.8)-(6.11) can be substituted in Eq. (6.1) to
obtain expressions for the terminal currents IE, 18 , and le as
IE= aII [exp(~:)- 1]- a12 [exp(~;)-1]
(6.14)
1 c = a, 1
[ exp ( ~) - I] - a22 [ exp ( ~: ) - 1]
(6.15)
18 = (a 11
_ a 21
) [ exp ( ~:) - I] - (a12 - a22l [ exp ( Vi: ) - 1 ]
(6.16)
where

144 Modelling and Teclmolo y
a22 = Aqnf [LDN coth ( 1 8 ) + l Di coth (;c )]
n A n pC DC pC
The tenninal currents can then be calculated from Eq . (6.14)-(6.16) for given va
Voe, provided the value of the required device parameters are known. We can also lee of. lr 1
,
and l e increase with increase in Vo£, but reduce with increase in Voe· The irnp)j ,that boui ~
relationship are discuss~ in detail in su? eq~ent s~tions.
cations of th~
Although the equation developed m this section appear complex and difficult to
can be implified 1f the particular mode of operation is known. Also, if the widths of ~le,~
base and collector are small compared to the respective minority carrier diffusion I
Clnhte,
the BJTs in pre ent day ICs, further simplification is possible. We shall now dcrno.:::' as I
the next section for the normal active mode of operation.
this III
6.4 APPROXIMATE EXPRESSIONS FOR CURRENTS IN NORMAL'
ACTIVE MODE OF OPERATION
The BIT is biased in the normal active mode in most analog applications. The expressions fi
. . l . . d I rthc
different current ~ompone?ts m a ~ract~ca transistor opera~mg un . er norma active bias CQ lie
simplified by makmg certain approx1mat1ons. For a rev~rse bias applied across the CB .iunction. die
minority carrier concentration at x = W 8 can be approximated to be zero. On the other hand, for
forward biased EB junction, the minority carrier concentration at x = 0 will be extremely ~
Therefore, m Eqs. (6.8) and (6.9), the term involving n~c can be neglected with respect to the term
involving n ~E· Hence, we can write an approximate expression for the emitter current due to
injected electrons as
Similarly, the electron current at the CB junction can be approximated as
(6.18)
(6.19)
For well-de igned BJTs, the base width W 8 is much smaller than the electron diffusion length L. in
the base, or W 8

--~~~~~~~------------~~~~----~B~ip~o~la~r~J~11~n~c~,,~on~ ~!ra~1~1~·i~t~o~,~~ll~4S.
~ the el no mjected into th b
-~ ,trfloeeornbmmg I o. it ignifi th a e fi m th mitt r reach th collector j unction
311" ut r t th I ·tron c nc ntrntion m th ba tall linearly a
.,11 fur. 6.6 and
.. 11 ,n -
o''
ut the ba e as m a
,,o~O
(llrO.. ~
~ s:a - 11;E
dx l 8
hort base diode (refer to e tion 4.3.3).
Excess electron concentration
~x
Figure 6.6 Excess minority carrier charge distribution in the base of an npn transistor.
HELP DESK 6.2
Why does the electron concentration fall almost linearly from the emitter to the collector side of
the base, although there is negligible recombination?
We know from the continuity equation that the current flowing out from a particular rregion is
equal to the difference between the current flo~ing in and the recombination current in the region.
If recombination is negligible, the current outflow is almost equal to the current inflow. If the
current is a diffusion current, it further implies that the slope of the carrier concentration curve at
the input is almost equal to that at the output. Therefore in the base region, in the absence of any
drift current component, the electron concentration faJls linearly so that the current is almost a
constant from the emitter end to the collector end.
The approximate expression for the base recombination current l 8 R is given by
can be obtamed from Eqs. (6.18) and (6.19) as
lsR = -(/nE - Inc)
, AqD.11;£ [ cosh ( :•) - 1]
/ BR = AqD 11 nPE [coth ( Ws J - cosech ( : 8 )] = . ( W ')
L,, L,, n L smh _J}_
II
L
II
(6.21)

146 e111teo11d11cror D,v,ce : Modelling and Tech11ology ~
Now, f r x

81 "J(}/ar iUIU.tw,, 7 ram1 tton 147
I :::::: = !qn,EWB Qfl8
-
- Q,,9
(6,29)
2( WJ w2 -- 'f',g
_/L
2D,,
,, ::::. \'j, _D"' is called the ba e trans;, time .
.. ,~~ ... d abo t transit time in ,
o express, fi tran it ti . a ~ base diode m ~tron 4A,3, The simrlarity
me I quite obviou .
2D,,
IIELP DESK 6.J
---
1·,. · · e sed l 8 p = I E-1 Eto develop the b ,
fr Eqs.

148
c
B
t la
Vea
B
Vee
B
Figure 6.7
(a)
(b)
An npn transistor In (a) common base, (b) common emitter, and (c) common COl!ecb
configuration.
where l cBo = mall leakage current flowing in the reverse biased CB junction when IE::: 0 (th t fa.
the emitter contact i open-circuited).
The fir t two ubscripts (CB) in f cBo refer to the two terminals between which the current
flowing and the third subscript (0) refers to the open-circuited third terminal.. Neglecting the~
leakage current Ic 8 o, we see that a is the ratio of the output current le to the mput current IE in th
common base configuration, and is therefore referred to as the common base current gain.
The parameter a is dependent on two factors, namely the emitter efficiency r. and the base
transport Jacror a r. The emitter efficiency r is defined as the ratio of the current ~ue to electrons
inje ted from the emitter into the base Un£) to the t tal emitter current (/£). That IS,
y = In£ = ---
/ £ I µ£
+-
In£
(6.32)
An emitter efficien y clo e to unity indicate that aim t the entire emitter current is due to
the "u eful" injection of electron from the emitter to the ba e. The ba e transport factor °" is
defined a the rati of the ollector current due to electron (/ nc) to the current due to electrons
inje ted from emitter into ba e I,,£), That i ,
In -- 1 - I BR
ar = --
{~.33)
I ,,£ I,,
If aim t all the electron inje ted into the ba e re ch the c llect r junction without recombining.
a T become clo e to unit . From Eq . (6.30 , 6.32), and (6.3 ) we ee that
a = ya 7
It ma be noted that ideally the maximum alue of ar and y are unity. However, in all dlll::al
ttuation , the_ are le than (though ery clo e to unny. Thu • the value of a is aJso clOM *ililllllY
in mo t \: ell-de 1gned BJT .
The ther important parameter I the common eminer current gatn usually rep
or h FE) defined a
/3 = a
1 - a
c

close to unity, /3 of transistors c
Bipolar Junction Transistors 149
A (I. 1 Eq . (6.2), (6.31), and (6.35), it cana~ be quite large and often hes in the range I00-500.
V Ing
e shown that
I c = /31 s + (/3
. + 1 ) lcno = /3ln + IcEo (6.36)
I EO == (/3 + 1) I CBO IS the leakage
here c . l . current flow. b t
,11 he base termma open-circuited. mg e ween collector and emitter terminals
,1/1U 1 1 NeaJecting the leakage current le
cu;ent Us) in the common emiu!tc:efisee that /3 is the ratio of the output current (le) to the
1nP 01 current gain. n iguration, and is therefore referred to as th~ common
ern111er
, HELP DESK 6.4
---
Show that a can be expressed as /3/(l + /3).
f rom Eq. (6.7), we can write
/30-a)=a
Rearranging, we get
or
a(l+/3)={3
a= f3
l + f3
We shall now derive expressions foF a alild /3 ilil teJiJililS of rl!le physical parameters of the
device. From Eqs. (6.10) and (6.18), we have
- Aq~pEP~E coth (7£) DpELnNA ooth( WE)
~ ~ - L~
AqDnn;E ( W8 J - ( Ws J
- Ln coth Ln DnLpEN DE ooth Ln
(6.37)
For a practical transistor, assumililg b@th the base alild emiitter widths to be ml!lch smaller than the
respective minority carrier diffusion lengths, hyperbolic cotangemt terms in these equations can be
approximated as (UW). Thus, we get
IpE
JnE :::::
DpENAWB
D11NDEWE
(6.38)
The emitter efficiency y can now be obtained by substituting Eq. (6.38) into Eq. (6.32) as
(6.39)

(6,40)
ppr a 'bing
trnn p rt fa t r
before, approximating cosh(W 8
/Ln) using the condition Ws

Bipolar Junction Tran istors 151
q. { . 4).
in Eq. (6.36) .
nnd from Eqs. (6.29) and (6.44), we have
. ~ that th e, pre ion fol' n can b
f3 Ila !.£ :::::
,,'t: · /J e ext I · l'fi
(6.44)
't' II
I B 1:,8 (6.45)
fh.U·· t. 1
,,. time n.Jant namely the el reme Y s1mp t ted under certain conditions to a
ectron )'£ 1 t' · .
r;1t1 \\'' ha, e s n in this section that both e ime. m tfue base and the base transit time.
r:iti 1n. ar
onstants dependi'ng onl
y on
a
tn
and {3,
h
w. htch are defined in the normal active mode
P Brr is perating in the normal . e P ysical parameter~ of the BJT. This implies that
,,·h n a
active mode, its current gain is independent of the bias
lt •t!! , .
\ '~
E,xan 1 ple 6.1
P n bipolar jun tion transistor T 1 has tme ~ollo ·
An n
11
wmg parameters:
1
---- - ~:--~~~~~~~~~--=E=m~i~tt~er~(n~-~ty~pse)~~B~as~e~(~p~-tryp~e~)~C~o~lle~c~to~r~(~n~-t~yfpe~)~
\\ 1dth uim) 1.0 0.8 3.0
!)oping concentration (cm- 3 ) 1019
1017 5 x 10 15
Minority carrier diffusion constant (cm2/s) 2
1inority carrier lifetime (µ s) 0.01
Cal ulate the emitter efficiency Y, base traHsport factor a 7
, common base current gain a, and
common emitter current gain {3 for this transistor.
20
0.1
10
1
Solution:
The minority carrier diffusion leF1gths in the emitter, base, and collector are given by
LpE = J2 x 0.01 x 10- 6 cm= 1.4 µm,
L 118 = J20 x 0.1 x 10- 6 cm= 14 µm, and
Lpc = J10 x 10- 6 cm = 31.6 µm.
Since Wr is comparable ta LpE• we cannot use E

I
152 Semiconductor De,vices: Modelling and Technology
Since W 8

Bipolar Junction Transistors 153
· I = the r er e saturation C\lrr I
I · · n O t, current ources wh· cnts of the EB and BC junction diodes respectively. n
11~,tl· th "'
t,, en the CB terminals :Ch stand for the coupling between the two junctions. The
Jtt. un:_ mm n ba e current gain as rt!at~d to the diode current at the EB junction thr?ugh
~ ~ r,,nrd th di current at the C~ F~~ Sn~1tlarly, the current source between the EB term1na.ts
t .i to tri al tran i tor h . ~ nctton through the reverse common base current gam
• ~ ,mme • av1ng ldenti I . d d
' . . r ~. al Th. mean that th tr . ca emitter an collector structure, the gains aF an
~ 1d ntl • d 1 th 11 ctor . e .ansistor Will behave in exactly the same way 1f the biasing
· irt r an e c e Junction is ·
• 1~ • ·Jll d h e a and a hav d'u interchanged. However, practical transistors are not
tri • • 1n en. F R • e tuerent values .
•, tttll N ,,.
m 6·8• fig, the emitter, collector, and base currents in a BJT can be modelled as
IE== IF- aRIR (6.48)
le::: aFIF :..1R (6.49)
18 = IE - le= (1 - aF) IF+ (1 - aR) IR (6.50)
In 1 m dern BIT, all. the _three regions (that is, emitter, base, and collector) have very small
'dth·. urning . th~t ~eir widths are much smaUer than the respective diffusion lengths, the
'':
;t
·iy urrier dt tnbutions can be approximated by linear relationships as shown in Fig. 6.9
Jlll HELP DES~ .6.2). In this figure, QE, Q8F, Q 8 R, and Qc refer to the stored charge in the
l . r due to h le mJected from the base, the stored charge in the base due to electrons injected
~d eel h .
. ih emitter the stor c arge m the base due to electrons injected from the collector, and the
~!11 harne in the collector due to holes injected from the base respectively. Note that the total
·t j han!e in the base is the sum of Q 8F and QBR· With the help of the equivalent circuit and the
1
. re rit ~ier di tribution shown in Figs. 6.8 and 6.9, it is now possible to model the currents in
111:rr i r all p
ible combinations of V 8 E and V 8 c. We first proceed to analyze the. two .limiting
8
when one junction is short-circuited and a bias is applied only across the other Junction, and
ch en e th o
oeneral a e when non-zero voltages are applied to both the junctions.
-XE 0
W 8 Xe
n•
® @ : n- ©
I
I
I
I
I
I
I
I
I
I
I
le
Is
+
+
VBE
. . . the emitter, base and collector of a BJT.
Figure 6.9 Stored minonty earner charges m
Vee

154 Semiconductor Devices: Modelling and Technology
Case 1
VoE -:;; 0, Voe= 0
This is the state of the forward operation of the transistor. For Voe == 0, Eq. (6.47) gives 1
Therefore from Eqs. (6.48)-(6.50), we get R:::: o.
(6.si)
IO = IE - I c = ( 1 - aF) IF
(t:.
I . \\1,53)
1 he forward common emitter current gain (/3F), defined as the ratio of collector current t b
. o~ •.
current when V BC = 0, is given by ""\:
(6.s 1)
f3 - !£_ - aF
F - Jo - 1 - a F ( 6.54)
Also, we note that for V BC = 0, QBR = Qc = 0.
Under these circumstances, the collector current can be expressed as
I = a I = AqD dn = AqD n;E = AqD,z11; [exp ( VBE )-1] = ls [exp(VoE )-1]
c F F n dx n WB NA WB Vy Vr (6.55)
where
Equation (6.55) is essentially same as Eq. (6.29). Now ~he base current for this case is the sum of
the recombination current /BR and the injected hole current into emitter lpE· Here, I 9
E can be
expressed as
dp AqDPn; [ (VBE) ]
I E = AqD - = -----'----- exp - - 1
P P dx N DEWE Vy
(6.56)
(6.57)
Noting that QnB = QBF for this case and using laR = (QnB/r 11 )
as given by Eq. (6.25), we have
(6.58)
Using Eqs. (6.54), (6.55), and (6.58), we obtain the expression for f3F, which is identical to the
expression for the common emitter gain f3 given by Eq. (6.43).
Case 2
VaE = 0, V 8 c * 0
Th~ is the confi~uratio~ for reverse operation _of the tran~istor. For VoE = 0, from Eq. 1::1;
IF - 0. Also, QE - QaF - 0. The stored charge in the base is represented by Q 8 R and the
current is due to electrons injected into the base from the collector. Therefore,

(~ '
case 3
Voe• 0, V 08
o
Jn order t ana!yze rhis con~iti n we u e superposition of the current obtained undtr tti r vr
t n o cases discussed prev1ou ly. Thu using Eqs (6 49) ( 6 SS d ( 6 1. 9
1trn1 1 c • • f • ) , an ,J ). we can wnte
[ ( ]
Is exp(Vn,J - 1
le= aplp - IR= 1 8 exp ~E ) - 1 _ a~r (6.6{JJ
From the expression of f3R, we see that C11R = ~R/(1 + fiJ

1 "'
•6
,m,I ondu tor l
d recltrwlog
t!VI e. : M()deltltt an ,
d the emitter current. it can
·oflcctor current an led d' od
r tn the ymmetry of the expreH I n for the c ted by twv coup I e and O
n that the equivalent circuit o a BJ' can now be rehp:e ~n uit the currents flowing through
rding to t 1 circ ' nt source · l
n urrent t1ourcc n hc,wn in lg. 6, JO. Acco r cd by the curre 1 1 CT· Fr
bnck-t .. buck diodes ore J lf3n and I !{3 1 1,, ' he curren~ ~JI:i~ can be expressed as
thl ' c rcuit, the ollector, emitter, and base curren •
le= !er -
1.,c (6.
fJR
le= ler
lee
+ - f3!'
(6.
I lee
In = !3r + f3n
(6.~
let
c
B
le
tiK
Vee
+ {JR
+
Va£
t~
fJF
t
lcr == Ice - /Ee
let E
Figure 6.1 o Three-parameter Ebers-Moll equivalent circuit of a BJT.
om paring
qs. (6.65), (6.66 , and (6.67) with Eqs. (6.61 ), (6.63), and (6.64) we can see that
[exp(~:)-exp(~: )]
I r= I
=ls[exp(~/)~1]
le
II! = [exp(~:)- 1]
Is
Thu , the bers-Moll modeJ help to obtain the values of the terminal currents for an
combination of Voe and Voe, pr vided the values of only three parameters, namely ls, 'PF, and fi
are known.
The vaJues of these parameters can be extracted very easily through simple experiments. 1
we short-circuit the collector- base junction (that is, Vi 1 c = 0) and vary Vo£, for VsE > 3Vr, ~ sei
from qs. (6.61) and (6.64) that le and In vary in the manner given by

Bipolar Junction Transistors 151
l e "" ls exp (Xav.!l.T) I (
and ls • /3: exp ~:)
·f , e plot ln(/c) and ln(/s) versus v
~o' • 1 8
(Note that the lines are parallel
11
0 nEl, ~c shall get two parallel straight Jines as shown in
. 6, • · • Y in
f18· d in Chapter 7 .) The intercept of th a
sm
aJ l
range of VBE· The reason for
'
this shaJJ be
1
dt O ;he ratio of l e and ls gives f3F· A sunu: c;_/c). versus VsE curve, when extrapolated, gives
:~\
0
e aJuate f3R· penmen! where VsE = 0 and V8c is varied can be
In I
le
In I
,
I
I
,
I
I
I
,
,'
,,'
,,
,
Vsc = O
I
n-
Is
f3F
0 region 1 region 3
region 2
Figure 6.11 ln(/c) and ln(/s) versus VBE characteristics of a BJT when Vac = o.
VsE
r~. :. _ IIEl.,P DESK 6.5
The EB Jtmction of an npn transistor is forward biased by V 8 E, while the collector terminal is left
floating. (a) What is the open circuit voltage developed across the CB junction? (b) What is the
value of VCE at this point? (c) What is the mode of operation of this BJT?
(a) From Eq. (6.65), when le= 0, fer= 1Eclf3R· Substituting the expressions for lcr and lee,
we have
Therefore •
P. exp ( ~) + I
{3R + 1

158 Semiconductor Devices: Modelling an
(b) The above equation
d f ec/utOlogy
gives (V )
Va J ::::: aR exp -!1/-
exp Vr
(
vr
or
Therefore,
Ve£= Vrln(it;)
. sitive that is, the BC junc~ion is fi
(c) From the solution of (a), we see that_ Vnc ,s po .' tor is found to be ht the orw~
biased. Since both the junctions are forward biased, the transis
8aluration
mode of operation.
Example 6.2
Calculate (a) V BC and (b) V CE when the collector terminal of transistor T1 ( see Example 6.1) is kep
. I
fl oatmg and V 8 £ = 0.6 V.
Solution: The expression for Vac when fc = O has been derived in HELP DESK 6.5. To calcuI
the_ open circuit base-collector voltage Vac, the value of aR should_ be known. Since the mies~
emitter and collector are interchanged in the reverse mode of operat,on, Eq. (6.42) can be USCd ,
calculate aR by replacing the parameters of the emitter with that of the collector. Therefore ~
1 1
= ---------- = 0.2726
l + 10 x 10 17 x 0.8 + 0.8 2
2 x 5 x l 0 15 x 3 2 x 14 2
(a)
Therefore, we have
V
Vsc""' Vrln [aR exp(VsE )] = 0.026 ln [o.2726 ex (
7
0
·6
J] P 0.0 26 = 0.566
Also from the HELP DESK 6.5,
(b)
Ve£= Vr ln(- 1 -J
1
aR = 0.026 In( Q.2726 ) - 0.034 V
rno, Vsc is only slightly less than V BE·
Thus, we see that when the collector is float' o
6.7 STATIC OUTPUT 1-V CHARACTER ISTICS
The output characteristics of a BJT
value of an input variable
r~late the output curren
the output characteristic ' usual_ly the mput current. Thus ~ t to the output voltag
section we shall d" s estabhsh a relationship bet , or the common-emitter
' 1scuss the output h · ween le and V ~
common emitter confio i::,u.r . at1ons. . c aracteristics of ' a n npn tramsistor CE ,or in the a conli

i
Contmon Base Contigura=ti~~-----_!!__Bip_'po~l~ar~J~un~c!f.tio~n~T~ri~an~s~is~to~rs~l~S9
6,1·' . on
,, in Fig. 6.12(a), the output 0
ch
A
110'"
(lle variation of the output curre
aract
t enst1cs
· ·
of a BJT in th
,,1otS I We shall now explain th n le versus the outp t I e common- base configuration
r ot £· e natu u vo tage V fi · t
cJl~e . on of the BIT, as discussed in. th re of the characteristics fr cs or a constant mpu
pera e previous sections. om our understanding of the
0
0
2
Electron concentration
3
4
5 (a)
Vea
0
(b)
Wa
igure 6.12 (a) Plot of le versus Vea and tlile COITesponding (b) m· 'ty .
F base ef an npn trans· t ( mon earner concentration profile in the
IS or ,or constant /E·
We know from section 6.3, that IE consists f
ttansistor with emitter efficiency nearly equal to 0 m:;;, components, I,£ and lnE· In a well-designed
IE = - I - ( A D dnp )
nE - - q n dx x=O (refer to Eq. (6.8))
dnP .
Thus, if le is fixed, dx will also remain at a constant value. Figure 6.12(b) shows the
x=O
cB w 1 e mamtammg E
minority carrier distribution in the base of a BIT for various values of v h'l · · · I as
dn
d:
constant. We can see that is comstant in all the plots.
x=O
Now, from Eq. (6.1 ), le = -(Inc+ lpd· We know that
-Inc= (-AqD. a;:)
x=W,
= -lnE - IBR = IE - ~nB
Since IE is held constant, this means that the rale of decrease in electron concentration [-(dn,,fdx)]
at x = W reduces with increase in stored charge in lite base (Q.8), which is actually the area under
8
the minority concentration curve in Fig. 6.12(b). Also, it is clear that -I.c, which is an important
component of I c, reduces with increase in Q,,s,
In fact, when QnB - I 't' - E,
n
dn = 0 and Inc = O.
dx x=W•
n

Step 1: V o = 0.
11 the electron concentration i
the base to be sma '
n the
Hence 11;c = 0. Assuming recombinati n in . _ o from Eq. (6.20), we can w.
. ~· 6 12(b). Smee 1 pC - ' v
I
rite
base varie linearly a shown in plot 1 m Fig. · . t 1
in the I c versus OB P ot shown ·
le = - Inc = AqD,i1z~EIWn, Thi value is shown as pom
in
Fig. 6.12(a).
Step 2: Vcs >> 0. , ,.., -n (plot 2 in Fig. 6.12(b)) 11t.
h CB J·unction. Now, npc "' pO • • ...1 • tne
A large reverse bias is applied across t e . d by a linear vanat1on anu at this Pi'
electron concentration in the base can agam
· be approximate n~
AqD" (n;E + npo)
h by
oint 2 in Fig. 6.12(a)
as s own P
l e=
Ws
· th further increase in the magnitude of v
The collector current l e cannot increase any further wt . all OB·
· 1 d 2 1s very sm ·
As np0

~---~B:======::~~=-=-=-=----------.2B:!Lip~o~la~r:.:.l~u~n~ct~io~n~T~ran~s~is~to~~;.s___11~6'.!l
Saturation
6
IE= 6 mA
1
5
4
Active 3
2
1
0
Fi~ure 6.13
10 20
Cut-off Vea (V) --~
Output characteristics (le versus Vcs) for npn transistor in common base configuration for
different values of IE.
6.7.2 Common Emitter Configuration
Similar to the case of common base mode, we now proceed to explain the output characteristics
Uc versus V cE) in the common emitter configuration by varying the output voltage (V cE) in steps.
The input current (1 8 ) is kept constant in this configuration. Figure 6.14(a) shows the output
characteristics while Fig. 6. l 4(b) plots the minority carrier concentration curves in the base for
various values of V cE, while keeping 1 8 constant.
le 4
5
Electron concentration
'----~r-1
--..:ttE-+-- 2
2
1
(a)
Figure 6.14

~2 Semiconducror Devices: Modellmg alld Tecl1 11olog - ------......
. d of three components
We have already discus ed in section 6.3 that IB is compo e . efficiency alm ' natn.ely
lpE, Ipc and IBR· We shall assume that the bipolar tran istor has emitter .t ost equal to
. . . h ld t t we can wn e
Untty, and lpE is negligibly mall. Thus, when IB is e cons an'
? ( We J l ( )
Q
AqD cn~coth -- I
P Lpc ~ - 1 = constant
IB == / BR+ I = ---1!!!.... + exp V
pC -rn LpcN DC T
Therefore, if the CB junction i reverse biased (that is, VBc ~ 0), the ~econd term is almost
d h
·nority earner concentration
constant and hence QnB• which i given by the area un er t e mi . . . curve
in Fig. 6.14(b), is al o almost constant. On the other hand, increasingly for~arhd biasing the CB
junction increases the value of the second term in this expression for 18 an ence results in a
reduction in QnB· This is reflected in the plots in Fig. 6.14(b). .
This section further explains the output characteristic curves an~ the ~mority carrier
concentration plots as shown in Fig. 6.14, where V CE is varied in steps while keeping IB constant.
Step 1: VcE = o.
This implies that y 8
c = vBE· Also now n' E = n /c· Although, it would seem that Inc_= 0, this is not
the case. This is because the variation i~ the Pelectron concentration in the base ts not linear, as
shown in plot 1 in Fig. 6.14(b). The slope of the electron concentration at x = WB implies that in
addition to electrons being injected from the emitter, electrons are also injected from collector to
base. Also, holes are injected from the base to the collector. Therefore, le is negative as shown by
point 1 in Fig. 6.14(a). (Note that it is not possible to have a flat electron cmncentration curve in
the base when n~E = n;c. If the distribution were flat, it would mean that there is no electron
injection either from emitter or collector. Since there is a large quantity of excess charge in the
base, electrons are constantly recombining. With no supply of electrons, it is not possible to
maintain the steady state condition of excess stored charges in the base.)
S1ep 2: VcE = VT In( ~R J
As already discussed in HELP DESK 6.5 and Example 6.2, the collector current is zero at this
point [plot 2 in Fig. 6.14(b) and point 2 in Fig. 6. 14(a)). This.implies that the electron current is
exactly equal and opposite to the hole current at the BC junction, that is, \Incl - \I cl = O. The
situation in the collector is similar to the example in section 3.7.
P
· HELP UESK. 6.6
When a transi~tor is in saturation and 1 8 is fixed, show that for small values of VcE (< 0.2 V), VsE
increases and V 8 c reduces with increase in V CE while for laroer values of v v remains almos
- t:> CE• BE
constant and the increase in V CE is equal to the reduction in VBc·
When 1 8 is fixed at a constant value (say / 81 ), from Eq. (6.64), we have
181 =

~ 81f!'lar Jwu:11on Tran.ustors 163
(A), as V CE is increased, [1 + 2£_ ( v,£ )]
I~ eQ· . /3R exp - Vr reduces. therefore exp(~g_J , and
entlY V 8 1; has to increase to keep th
T
~ eQll eir product a constant How-, h V O 2 V
c O ( VCE: )] ..,.. er, w en CE > . ~
J!E- exp - Vr ~ 1 . Therefore from
J -1' PR Eq. (A), Vae becomes almost constant. Equation (A)
[
be rewritten as
,an al o f•v(~)-1L Is[exp(Ye;)- 1
=
1
Is,~ PF PR p: exp(~; )[1 exp(~:)] + ;; (BJ
f3R ( VcE )] .
Jn £q. [ f3F Vr ases with increase in V CE· Therefore, exp :: and
(B), l+-exp-- mere · . (V)
uently V BC must reduce to keep their
conseqO
,, YCE :;:,, . 2 ' BC - BE - CE, aizy increase i n v CE resu I ts . rn an equal reduction in Vsc·
y and v _ v v . product constant. Since V 8 E becomes constant for
Step 3: Vr In ( ~R) < VCE < VBE·
_ v d V V . . . . . · · an respec 1ve y. mce
T he condition is depicted by point 3 and plot 3 in Figs 6 14(a) d (b) 1• I s·
Vnc == V BE c£, ,an BE > CE• V BC IS positive, 1mplymg a forward biased BC junction. Also.
1
since VBE > Vsc, npe > nµc· The slope of the minority carrier concentration distribution curve in the
base depends on n~E - n;c. Now,
(n~E - n~c ) « exp(~:)- exp(~;)= exp(~: )[1 -exp(-~: )]
We have already seen in HELP DESK 6.6 that for small positive values of VcE• V8E increases with
increasing V cE· Thus, the slope of the electron concentration curve increases with increase in V CE•
resulting in an increased I Incl· From HELP DESK 6.6, we have also seen that the condition of
constant 1 requires that in this range, VBC' is J:e:(iuced with increasing VcE• thereby reducing IIpel.
8
As le = !Incl - IIpcl, this would mean that le ill.et.eases continuously with increase in VcE in this
range. However, the rate of increase reduces with increase in V cE· As discussed in HELP
DESK 6.6, beyond V CE== 0.2 V, VsE aqd co ~ llipE are almost constant. Since n;,c

. Mode/ling
Semiconductor Devices.
164 . sed When V sc is s11fl'! •
btn · -.,,1c1Ct\
. n is re erse tor current reaches a in ...· t~
V ' nctJO lleC -.111\'1
Step 5: Va> BE: . . that the ac .Ju 6
.1 4 (b). The. co 6
. 14
(a)) and do~ not change
Now v c is negative, 1mplym~
1 t 5 in fig, . t 5 in Fig, ent from pomt 4 to Pint S~
B h n 10 p o potn . curr .
negative, n~c ~ -11p0 as ,s ow )/ W ] (refer to the increase 10 . an increase m 1 c due to ''Ear! 1
value of le = [AqD" ~llpE + nSP? ce ~i' E ,..,.. llpO• I owever, there is }
· h · e 1n V 10
r P • rs 1 • .
further wit mcreas c ..· . 1 trans1 to , V charactensttcs obtaitled
Fig. 6.14(a). is :er~ smalld ?: 1~::r section 6·:\ation, the le versu: hoi n in Fig. 6.15. As cx.Ptc/~
Effect," which is d1scusse mmon-base confio~ us values of In as. n active and cut-off region CQ,
As in the case of t~e cie replicated for vano hows the saturattorticular I B is the active region ff
a fixed value of ls.can a ~o I The figure also st constant for a pa ino V CE so that le< /3la ~ n
le increases with mcreasmg h~·h I remains almos duces with reduc do of operation. . • tit
operation.
. Th
e reg1
·on over w ic c
tion region,
. I
c
re
the cut-o
ff rno e
this region, le= /3ls, ~n _the s~tura I < lcEO represents
region of the charactensttcs w ere c
saturation
!£34
Active
la2
(/3 + 1) lcao
Figure 6· 1 5
Cut-off
Output characteristics Uc versus VcE) for npn transistor in common-emitter config
various values of la.
Why is the term 'saturation' used to denote the region where I c is actually less than i
possible value for a particular I 8 ?
To explain the ongin of this term, let us consider the circuit shown belo
transistor has been connected in the common-emitter configuration. In the given circ

11af ·~~t~in the operating point-(/ .- ... v'"' vc va1ue, resulting T.in~~ ac =----------------------=-------=-------=-~--
~er 0 to t characteristics together c,. CE) corresponding to ~rresponding increase in I B· In
o otP 0
With a I a particular I h lso shown
~e 0 cUon of the load line with the char .oad line. As usual, the B• ~e av~ a .
1n1e'.etor is operating in the active regio actenstic curve for the partic l op/eratmg pomt is at thhe
o 1 • • I th n, le - /31 h . u ar B· We see that when t e
ifO f orther increase m B, e operating . - B, t at ts, I c increases I' 1 . H
jitP rresponding to I - I Ptnt reaches the . tnear Y with la, owever,
I int Al, co . . e - esa1 and v _ saturahon region of the characteristics
(pOult in any mcrease ·~ !e· and ~e has satura~ - V ~Esat· N?w any further increase in I B does not
reS of the charactensucs got tts nam at Its maximum value Th' . h h ·
region e. · 1s 1s ow t e saturahon
Ra
Re
Vee
~
lesa, -
/&4
183
IB'l
VITT /91
(a)
(b)
VcE
6.8 EARLY EFFECT
For real tran~istor:s, there are some deviations from the characteristics predicted above by the
simple analysis. In the common-base mode, for large reverse voltage applied across CB junction, le
was predicted to be independent of Vc 8 , that is, dlddVcs = 0. In reality, le increases with an
increase in V CB· This is because as the reverse bias across CB junction increases, the depletion
layer width also increases. This effectively reduces the neutral base width from W8 to WB. Hence le
increases due to an increase in the slope of the minority carrier concentration as shown in
Fig. 6.16. On the other hand, decrease in base width reduces 18 due to less recombination in the
base. Consequently a increases with increase in V cs· The actual output characteristics of an npn
transistor in CB mode is shown in Fig. 6.17(a) reflecting this increase in le· For the output
characteristics in the common-emitter configuration, the effect is more dominant as the collector
current is seen to rise significantly with an increase in VeE· This is shown in Fig. 6.l7(b).
The modulation in the neutral base width with V CB was first investigated by James Early and
is therefore called Early effect after him. The dependence of le on Ves can be modelled in the
following way
~-----C]j_c cJlc cJWs (6.68)

166 Semiconductor Devices: Modelling and Technology
npE
c
O c
~ 0
(.):;:::
-
a> ro ....
Q) -c
~ ~
~ c
x 8
w
0 Wa
I
. t tion profile due to modulatior:t at n
Figure 6.16 Change in the slope of the minority earner con~n ra
base width with change m Vea·
~Wa
x
eu1ra1
le
le
/E5
IE4
/E3
lei
0
IE,
IE= 0
Vea
(a)
0
------------------------- ~
la= O
I
--------------------------1
VcE
(b)
Figure 6.17 Practical output characteristics of an npn transistor in (a) common base amd {b' COJl\lJ)OO
emitter configuration. The dashed lines show the ideal characteristics where the collector Cl!.lliT'ent Is um
to be constant in the active region.
Since for a large reverse bias applied across CB junction, le approximately equals aplE, ,llll!• 111u
conductance in common base mode (g cb) with constant emitter current can be eX!press:~B:~.
Assuming emitter efficiency y = 1 and using Eq. (6.4 1) we can write

Bipolar Junction Transistors
161
\111
I r
ill,, ilu , of Wi/L11, th c mmon base output conductance gcb can therefore be simplified as
(6.70)
Vea~ VcE
ommon emitter output cond . .
uctance 8ce with the (mput) base current constant can
_ die
8ce - dV. == die
CE l,=constant dVcB !,=constant
(6.71)
-::; l , it can be shown that f3 ~ (2L;JWj) [Refer to Eq. (6.45)]. Using this relation and
1
\ 1en from Eq. (6.71), we get
fr ::i Pf B,
lgcel = [B 0/3 oWB = 2/c dWB
awB avCB WB avCB
(6.72)
HELP DESK 6.8
that the output conductance in the common base configuration is smaller than that in the
---
ShOW
•
On emitter configurat10n.
comm
From Eqs. (6.70) and (6.72), it can be easily seen that the ratio of 8cb to 8ce is given by
We know that usually f3 >> 1, therefore 8cb

168 .
Sen11co11d11 tor D evi t'S,• Moclt•ll/ 11 ,
uul Tt• •/In()/ > '
Now a .
summ thnt in th I " . 'N
nctiv ~ r gion v,,, l fl t:( ,or l\ 011stunt 1 11 , trom r..q. ( ,7 3
) \\'
di
v.°; V11 , VA
From E (6 (6,7~)
extr 1 q. ·75 ), We see that if the comm n emitter charu t l'istic in the active
apo ated the 1 'Ift -
th .
Id b V ( • V . reato
th ' ercept on the voltage nxis wou e nt - A nee A ts usually II w
an e operating voltage V cs) as hown In lg. 6.18. llllleh 1..::;
I
le
0
Figure 6.18 Graphical extrapolation of the /-V characteristics to extract the value of Early voltage (V
A),
Now, from Eq. (6.74), we have
or
w
v
w (O) BC
B
f dWa = ~A f dVac
WH(O) 0
Now from Eq. (6.56), since l s is inversely pr.oportional to W 8
, we have
ls = ls(O) == ls (O) [1 - Vsc]
1 + Vac VA
VA
If r ~ 1 for the bipolar transistor, so that f3F is determined by ar, then f3F ex: (l/W 8
) 2 •

Bipolar Junction Transistors
169
other nan '
d if fXtr ~ 1. so that fJF is d e te
rmme
. d
by r, then f3F oc (1/Ws), Therefore,
0i e /3 - /JF(O) ( v )
F - ( ~ /3 (0) 1 - .J1f...
1 + Ys&,.) F VA
VA
!JO Jl
equO effeCl·
esrl
(6.79)
(6,77) and
Figure 6.19 Common emitter output characteristics of a BJT depicting breakdown.
From the discussion in the previous section, it is evident that as V cs is increased, the neutral
base width decreases. Finally, for a particulaF value of Vc8, the depletion region at CB junction
extends all the way up to EB junction and the neutral base width becomes zero. This is called base
punch-through. At punch-through, the collector current increases sharply as the electrons are swept
directly from the emitter into the collector and the transistor action is lost. This is a breakdown
condition and needs to be avoided. For an n+pn+ transistor, assuming that the CB depletion region
exists mostly in the base, the voltage applied across CB junction at punch-through can be
a proximated as
(6.80)
In most cases, however, avalanche breakdowJ!l of the collector-'base junction occurs before
the punch-through condition is reached. Interestingly, it is found ·that the breakdown voltage in

echllO[OgY
Modelling and
. the cornmon
!
1~10L~S'.!:em~ic~o::;nt.::1u:.:c:..:.:to:..:r_..:D:.:e:..;.v,;..ic_e_s:__ II r than that u1
IY rna e h
. considerab . nction, t e curren
common emitter mode (Vceo) is ·tuation . tied across CB JU uttiplication fa
Let us now analyze these two t verse voJtag~ ~p~ by the cotlector.; ed as
In the presence of a l~rge re ion is rnult1phe (6.31) is rnodt I
of the collector-base depleuon reg t aiven by £q.
. . h 11 ctor curren o )M
in such a s1tuat1on t e co e I c == ( ale + I coo
As in Eq. (4.87), M can be expressed as
__ 1_-::
M == - (~0L)"'
1 - ,,
YBR
where m is a constant.
d ( 6
. 82 ), we get
Eliminating M from Eqs. (6.81) an ]11111
f eso + af g_ VaR
Ves == [ 1 - - l e
tion the maximum value of R
base configura ' CB . . Ca
From Eq (6 83) we see that for the common I e of voltage across the Junction (V CBo) ~ .
. . , . f 1 - 0 This va u
obtained in the limitmg case o E - ·
emitter open (that is, le == 0) is given as
Vcso -
_[i _
]
Ji m
1 eso VaR :: VaR (6.84
l e
.
that can be applied across the CB J\lnctio
I the maximum vo 1 tage
However, for a nonzero £, f · s is less than V cso·
without {':\Hsing avalanche multipl ication ° .earner figuration the current amplification in ~ tio
On the other hand, in the common em'.t~er clan t · t'on ~n the maximum voltage that !NI.. 1.!
I
. 1· . . oses add1ttona res n c I ~ UI!
to the avalanche mu tip 1catwn imp . f E ( 6 81) that if the input current q: ~ ·
applied across CB junction. It can be readily seen rom q. · \Af.
common emitter configuration is made zero, so that IE == I c, we get
M l cao
l e== l - aM
This means that l e will increase indefinitely if aM = 1. Since a is only slightly less th2Uli
this condition to be satisfied it only needs M .to be slightly greater than unity. By contr·S4Ng r,
common base configuration, if the input current I£ is zero, M needs to be infinitely hi
collector current to increase in a similar manner. Thus, the maximum collector-emitter
can be applied with base open (V cEo) is much less than V CBO·
~et us now obtain an expression for V CEO· From Eq. (6.83), noting that a = /31
can wnte
Vc 8 = l - l + _f}_ _ CBO V
[
f3 ( I ) I ]llm
l + /3 le le BR
For a large value of Ve£, Vcs is approximately equal to V Th . th 1· . .
CE· us m e 1m1tmg c

Bipolar Junction Transistors 171
Vet o -
VnR
(1 + P)"m
(6 84) and (6.87), we can . .
~,,ng E q · . ea&1 1 Y verify that V CEO < V CBO·
cofllP
IC 6.3
(6.87)
~orflP
t ansistor P = 80. Assuming
~ bipolar r ,n = 4, find out the ratio of V cso to v CEO·
for V ing Eq. (6.87), we get
. ,, .
o/11110 • VBR V
V CEO = 4f'::": = B,!.
r~e r e fore,
ts1 3 · while v CBO = v BR
v. CBO _
3
Vceo -
In most bipolar transistors, the doping concentration in the collector is less than that in the
Thi helps to prevent base punch-through and reduce Early effect, as the depletion width now
b 3 e. d more into the collector rather than into the base Also with a lower collector doping
exten ntration, VsR increases (refer to Eq. (4.88)), and ther~fore the device can withstand a larger
---
concctor bias voltage.
colleC
6.10 CAPACITANCES IN A BJT
F' urc 6.9 shows the presence of stored charges in the various regions of the BIT. As in the case of
~gdes di cussed in section 4.4.3, these charges give rise to a capacitive effect. We shall now
d 10 .c h .
develop a model tOr t ese capacitances.
Let us fi rst consider Vse ¢ 0, Vsc = 0. For this condition, in Fig. 6.9, Q 8 R = Qc = 0, and the
stored charges are given_ by QE and QBF· Now, from the ar-eas of the shaded regions which represent
the charges, we can wnte
and
Q = Aqp~EWE = Aqn;WE [ (VnE )- 1 ) ( 6 . 88 )
E 2 2NDE exp Vr
(6.89)
where 'rr, is the forward transit time
(6.90)
'fp =
(6.91)

d Technology
172 Semico,,ductor Dtvices: Modelling an d ·s jndependent of b'
ture an , ias. 'We
·cuJar device struc f om Eqs. (6.90) and (6 SS)
We can ee thnt "Cp is a constant for a paru h EB junction (Co&) r · as
can now define tne diffusion capacitance for t e [ (~1:.JJ
d ls exp \.'- tFlcc
:---- === ~ (6.92)
C DB = dQp = -r F _:!I c;_ ::::: ,r F __!::..---d_V_n_E_ r
dV 8 E dVnE V :f. o, and following the sarn
. . · that is, VnE = O, nc · f th CB · . c
S,m,larly, considering the reverse operat 1 ?"· for the diffusion capacitance O e Junction
procedure as above, we can obtain an expression
(C 0 c) as
(6.93)
where "CR is the reverse transit time of the transis~or. t
I
regions, which gives rise to the
. . b'I h rges in the neu ra I . .
. !n add1t1~n to the stored mo 1 e c a ·n the EB and CB dep etl~n regions, wh~ch
d1ffus10n capacitances, there are ,he fixed charges ! ~ the junction capacitances are similar
gives rise to the junction capacitances. The expresswns or ·ans for the EB and Cl3 junction
to that for a diode given by Eq. (4.31). Therefore, th~ expressi
capacitances denoted by c,E and C,c respectively are given by
and
where
C1E ~ C1EO ( I -
C.1c = C.1co 1 -
VnE
Vb;£
J -m£
Vnc
( VbiC
J
-mc
(6.94)
(6.95)
C.1Eo and C.1co are the values of the EB and CB junction capacitances at VsE = 0 and
V 8 c = 0 respectively,
VbiE and VbiC = the built-in potentials of the EB and CB junctions, and
m£ and me = the factors dependent on the nature of grading of EB and CB junctions.
The complete Ebers-Moll equivalent circuit, including parasitic capacitances and series
resistances, is shown in Fig. 6.20.
c
8
Re
C'
1
,EC
Ra {3R
J Ice
{3F
RE
E'
T' CJCs
Jlcr
F . E
igure 6.20 Ebers-Moll equivalent circuit of a BJT . I .
inc uding capacitances and series reslstan

~IIING OF BIPOL4a TRANSISTO~ipolar Junction Transistors 173
Jl . the bipolar transistor ig ft · h
[jl ,rcu1. • ut chan es much more o . en used as an electrically controllable switch, whtc
ti od to 10 P . F g 6 2
l(a) I F~pidly than a mechanical switch. This will be clear from
u1t bo,vn m tg. . m·t~ n tg. 6.21(b), the output characteristics of the transistor
• • ed 111 the com-?'1o~t e h 1 erthcobntiguration, together with the load line are shown.
i ho, a circm w ere e ipolar . h
" 1 c • ( lmost V transistor has been replaced by a switch. When t e
1
O
f 1- lll::oe Vin his owb a . t A . p·or less) in Fig. 6.21(a), the transistor is cut-off and the
. , nt i own y porn m tg 6 2l(b) A h' . Th
I
ung nds to the switch in Fi. · · t .t ts.pomt,lc~Oand Vou1= VcEz Vee· e
rresPo ed th t . 1
ffi ~· 6 -2l(c) bemg m the open circmt. On the other hand,
\ i~ in rea~ th so h a ct!~:t'su . ciFe~tly high, the operating point moves to point B in the
u n region ° e c ~ed " ttchs 10 tg. 6.2l(b). Since le< {31 8
in the saturation region, the
e current reqmr 1or e transisto t .
. ~ ttlurn bas r o go to saturation is
;
Vee
le
Vee
Ra
Vout
Vee
RL
r ,.
RL
Vout
1s~un
(a)
(b)
Vee
VcE
(c)
e 6.21
(a) A circuit using BJT as a switch, (b) common emitter output characteristics of BJT with load
line, and (c) an equivalent circuit where the BJT is replaced by a switch.
I
- I - Vee - VcEsat
RL
C - Csat -
S VcEsat is small c~ 0.2 V), we can write le~ VcclRL and Vout ~ 0. This is similar to the
,on when the switch is closed in Fig. 6.21(c). Thus, we see that in Fig. 6.2l(a), the transistor
· ' ves as a switch and the flow of current through a load resistance can be controlled by a much
lier input current (since 1 8

174 Semiconductor Devices: Modelling and Technology
Let us consider the circuit shown in Fig. 6.22(a). The input waveform, ~
Fig. 6?2(b), changes from Vin= - VR to Vin =. VF at t = .o and remains .a.t that .value till t ~ t 0 wn i~
Vin again changes to -VR. At t = o-, the transistor was m cut-off cond1tton with V 8 E == -V 1, Whe~
and the excess minority carrier concentration in the base Qnn ~ 0 (th; small negative'\ 18 ~ O,
neolected) a shown in Figs. 6.22(c), (d), and (e) respectively. At t == 0 • the change in thal~c is
b • k e I
voltage to VF results in a forward base current. Consequently, V 8 E change~ quic ly from -V ;P111
but then increases to a small positive value, as the stored charge builds up m the ease. The si{ 0 . 0,
is similar to the switching of a diode as discussed in section 4.4. The base current in the Uatio~
inter al O < t < ti is almost a constant and is given by
entire
VF - VBE
VF
IFB = ::::: -
RB RB
Vin
VF
f 1
t
(b)
Vout
-VR
fa I~
/Fa
{a)
0
f 1
I
~
r
-
t
(c)
-/Ra --------
VaE
0 ~:::::::==:::=:::::,,,.;.--!---~ t (d)
t1 I I
Ona
IFa•n
fcsat•ta
I
I
le :
I
~ fon*-
1
fcsat
0
I
I
I
I
I f I
~ off~
I
I I
I
I
I
I
I
I
f 1 I I :
I I t I
!,...; dis .~
~sd*
I I
I
I
I
I
I
I
J
Figure 6.22 {a) An inverter circuit using a BJT; {b) the input voltage waveform; (c) varfa
{d) variation in la: (e) excess minority charge variation in base; (f) variation in le, showing tf:ie
delays associated with switching of the BJT.

'd · th h Bi olar Junction Transistors 175
jod cons1 enng e c arges st
d11S per ' Qred only in the bas ( . .
r'( dQ e that lS, for y = 1), we can wnte
~d :::: I QnB
t FB - r:- . (6.96)
11 ( 6 , 96) is another form of Eq. (4. 62 \ a
cq~ouo. equal to the difference between th'/ nd essentially states that the rate f . of base
" 1s . c rate h. o mcrease
cn9rge theY recombme (Qni/'tn). The solution of E at w LC~ o~arges flow in (IFs) and the rate at
,v11 1 clt q. (6.96) Is given by
Qns(t) == 1 Fs'Cn [1 -exp(-_!_)]
-rn (6.97)
fhUS the base charge increases with ti
tation l e = QnBl'fiB [from Eq. (6.29)]mase ahnd th~ collector current also increases according
t1te re 1 . 8 own m Fig 6 22(f) h · ·
10 Jlowever, at t = t 0 n, c reaches Its saturatio al · · , w ere -r,8 ts the base transit
orne· ts· Therefore, substituting t == t a d nQv ue 1 csat· The corresponding charge is given by
1
QnB::: Csat ' on n ns(t) = lcsat'GB in Eq. (6.97), and using Eq. (6.45),
e h ave \\'
1on == 'tn In
l
1 _ lcsat
/3/FB
(6.98)
See from Eq (6.98) that a higher valu f I eel · ·
We can · e o FB r uces the delay trme. For example, if
5/csat 1 (1 25
while if IFB = /3 , ton = -r,, n · ).
IFB = 21csat
/3 , ton = 't'nln(2)
Although the collector current is limited by the circuit, the base charge continues to increase
in accordance with Eq. (6.97), and if ti is sufficiently long, it reaches its ultimate value of
QnB = IFa"n· This is shown in ~ig. 6.22(e). At t = t1, when Vbi changes to -VR, the direction of the
base current changes. As earners flow out of the base, the stored charge in the base reduces.
However, Va£, which is related to the stored charge in the basel reduces slowly and reaches O V at
t = r 1
+ toff· In the period t 1 < t < (t 1 + t 0 ff), the base current is almost constant at
-VR - VBE VR
- /RB = =--
Rs
RB
Beyond t = (t 1
+ t 0
rr) , the value of VsE quickly falls to - VR ~d llien Is= 0. Now, ~ the period
1 1
< t < (t 1
+ t
0
fr), the decay of the stored charge in the oase is _governea by the relation
dQnB _ - I _ QnB (6.99)
dt - RB 'P.n

~J I uJI'&,, [1 ex1i{ J] (
I -r,,J1 ,J(JcJ
Q,,nU) I ,111,, ~x1 - 1,, ,
r ,mwritt 011 sw I ,, h m• to
,tor CQJn oul o 1 tu~ ti( 'ed1
As the tored chnrgc de nys, I.he trnns 8 1 th trttn iHWf r ·,no 116 11 ~n V n ftt,, t
116 Semlco11ductor Devlct•.r: Modt•l/111
(
only when Q,, 8
= I sni i-, • The 11
dtirat i n for wh ~ 1 vaJ u f4 cu JI ·d the .i;toral{ ' "lay ttme (t
input voltage ha been reduced to a ne; nuv+ • in ..,q. (6, J 00), we Pt "1J
1
Therefore, substituting Q,, 8
= I 5111 f 1 n and I t, •ii
I RIJ ·I· I FIL
1 .. := r,, In Su I 111
/Rn + p
. h 'ncrcasc in !Ro· ' his ; to be expected sfoee
1
From Eq. (6.101), we see that fsd reduces wit • b' c charge. N w, at t - t1 + t Q a
larger reverse base current results in a faster reduction in . a d b. y ub tHuting these voria'1' "IJ
. ~ n be bta1nc uea I
0, and therefore an expre s10n or torr ca . uired for the transistor to fi n
Eq. (6.100). The discharge time (td1s) is defi ned a the time re~ e r 1 . can now be obtag~ ro,n
· f d · · b 1 1 An expression .t' a,s Jned ~·
saturation to cut-a f an 1s given y tdJs = off - sd· q
f 5nt J
!dis = -r,, In ( 1 + /31 Rll (6.102)
In all the expressions given by Eqs. (6.98), (6.101), and (6.,102), ";e ~nd. tha~ the delays are
proportional to -rw Therefore, in switching transistors, the minority earner hfet1me m the base must
be made as low as possible. One way of reducing the lifetime is by doping the base with
impurities such as gold which give rise to energy level near the middle of the band gap. However
with reduction in -r,,, the f3 of the transistor reduces [refer to Eq. (6.45)]. To overcome this, the b~
trans~t time should also be reduced as far as po sible, by reducing the base width. It may be
ment1?ned here that another component of delay, which is due to the charging of the junction
capacitances, has been neglected in the above analysis.
HELP DESK 6.9
:'11y does_ it take a. long time for V 8 E to change by a small voltage when the EB juncti .
. orw~rd biased, while VBE changes almost instantaneousl b 1 on JS
Junct10n is reverse biased? Y Y a arge voltage when the EB
3 Let the doping concentration in the base of an . . .
cm . Therefore, the minority carrier conce tr t' npn silicon bipolar transistor be 1
the base is given by np0 = 2.25 x 103 n ~ ion at thermal equilibrium at room tern e in
per cm . Now, when V BE = 0 . 6 V ,
n pE - npo exp (VBE -V J = 2.37 x 1013 3
r
per cm
while when VBE = - 5 v n _ 0 Th
t h • pE - · us, to chan v f
a:l~ :::e: ~dteen orfders o~ magnitude, while !~enBt romhO to 0.6 V, npE and thereford
rs o magnitude Th. . BE c anges from O t 5 V
forward biased) is a much slow~r is explams why the change in V ( oh - npB
process. BE w en the EB

on, shown below, a square W&\le ~
teS.· Neglecting the effect of th .
18
applied as input to switch the Bff between ON and
e Juneti ·
an capacitance, the total delaf in one cycle may be
by tc1e1ay = ton + tsd + 'dis· Calculate
I} t,,,/tdelay,
(ti) ts/tde1ay, and
{c) tdi/tdeJay·
u111e V cEsa1 = 0.2 V and f3 = 50.
Vee= 5 V
o--- -------------- ---
10 kn
1 kn
i-----a Voo1
-10V
oluJion: From the above figure,
ld
w, from Eq. (6.98),
m Eq. (6.101),
J Vee -VeEsat 5 - 0.2
esat = = mA = 4.8 mA
Re 1
I FB ::::
VF = .!_Q mA = 1 mA
Rn IO
-VR -10
- I RB= -- = -mA=-lmA
R 8 10
1 1
4_8_ = 0.1 't'n
1 -....£lli_ 1 - .
/3/FB 50 X 1
ton = 'tn In I = 't'n In ___
I I RB + I FB = r In
tsd = 'tn n I n
1 + 1
4 8 = 0.6 't'n
/ RB + /Jat 1 + 5~
m Eq. (6.102),
I (1
I Csat ) I ( 4 · 8 )
!dis= 'tn n + {3/RB = 't'n n 1 + 50 X 1 = 0.09't'n
refore, tc1e1ay = (0.1 + 0.6 + ©.00}-tn = @. 19-tn

6- 1.teshilfs that the storage delay time is by far the largest compone t
n of deJa Y.
CESS FLOW FOR AN npn BIPOLAR JUNCTION
llNSISTOR IN INTiEGRA TED CIRCUIT
e shall now discuss th.e process flow to realize a bipolar junction transistor in an int
Gircuit. This is schematicaUy presente d m · F' 1g. 6 . 23 . Th e m1tia · · · l su b strate 1s · p-type silicon egrateo hav·
a resis~ivity of approximately 5 Ocm. The steps followed are:
ing
Thermal oxide of thickness 0.5 µm is grown on the substrate.
Step 2:
Photolithography is carried out to open a window in the oxide.
:,Step 3: Arsenic or antimony is ion-implanted (or diffused) through this window to form an n+
region [Fig. 6.23(a)].
Step 4:
Si0 2 is removed and an n-epitaxial layer is grown on the entire surface [Fig. 6.23(b)J.
f}.ep 5: Unlike in the case of discrete devices, a transistor in an integrated circuit has to be
· erly isolated from adjacent transistors for the circuit to function. In this particular example, a
reveFse-biased p-n junction is used to isolate the transistors. The isolation regions completely
surround the n+ buried layer to form islands of n-type silicon as shown in Fig. 6.23(c). This is
achieved by ion-implantation followed by a high-temperature drive-in to push the boron all the way
through the epitaxial layer.
.-...~-·"'0'"p
Step 6: The base region is now defined by photolithography. A boron implant followed by driveh1
is used to produce a base (Fig. 6.23 (d)).
!·'.··:.,10~,;~"tep 7: Emitter and collector contact regions are next defined by photolithography and
Jiosphorus implantation is carried out. The n+ diffusion in the collector is needed to produce a
low-resistance ohmic contact (Fig. 6.23(e)).
,Step 8: The contact windows are opened over emitter, base, and collector regions as shown in
. • 6.23(t).
Aluminium is evaporated over the entire surface. Afterwards, aluminium interconnections
tho eomponents of the cwcQit are deiAed. ~he final structure is shown in Fig, 6.29(g),

(b
( '
(d)
(e)

18f) &,111Jwrul11ctor /Jrvl tt : Model/In and Technolo
Alon with th n~n trnn istor, u p-n junction diode is also realiz~ in. Pig. 6.23.
dnplrtg for th u nn lstor is u. cd to realize the p-n Junction. The diode is isolated ~ base
tru11 h1tnr by lh fJ tub tet1flzcd In tcp S. The im~urit.y l ,ncentration curves for the CrnittcrOtn the
und oll tor r' don• of the tran i tor are shown m F,,.,. 6.24. • base.
B
c
\ 1010
c:
~
~
c
~
8 1010 p n
Depth
Flgute 6.24 The impurity concentration distribution curves in the emitter, base, and collector regions Of the
transistor.
However, for modern transistors in high-speed digital circuits, the process flow is
considerably modified. The main features include oxide isolation instead of junction isolation and
u e of doped polysi1icon to realize emitter and base regions. These process modifications resolt in
high packing density as well as reduction of parasitic sidewall capacitance and base res·
The importance of these parameters is discussed in the next chapter. The cross-sectional ·
of ·uch a transistor with oxide isolation, polysilicon emitter and base is given in Fig. 6
n
n+
Ff {lur'i 6.25 Cross-section of an improved bipolar transistor with oxide isolation, polyslll
bc.1so. (Source: P. Ashburn. Copyright © 1988 by John Wiley and Sons Inc. used by
p

PROBLEMS
B. la · r.s 181
ipo r Junction Transzsto
a of an npn transi tor is estimat d
J f he ,.,in ar = 1. On the other hand c~ ~o ~e 2 00 considering only the effect of r and
f 6 ' a urnof~he same transistor is found,to ;sidermg onl~ the effect of arand assuming. r== 1,
ttie p re taken into account? e IOO. What 18 the actual f3 of the transistor tf both
rtr and r a
rransi tors T1 and T2 are identical .
6,Z fw.oter efficiencies are unity in both cas In all respect~ except in their base widths. T~e
f efTlll The transistors are biased in the es: The ~ase width of Ti is 1 µm and that of Tz ~s
2 µrn· hen the collector current . tcttve region of operation. The base current of Ti is
18
l O µA w t ·s 1 mA
mA. Determine the base current of T 2 when the
coJJector curren I .
a of an n+pn+ transistor is 100 whe th .
p6,3 fhe ,., _ 1
V Th tr 1
b . n e collector-base junction is reverse biased with
V co + Vbi - · d t~ n~u ; . as~ width, that is, the undepleted portion of the base for this
cas~ is 1.2 ~m an e ep etton ayer width at the CB junction is 0.3 µm. Determine the /3
f he transistor when V c 8 + vb. = 9 v A .
o t . . ! · ssume a 7 = 1 and note that V CB 1s the reverse
vo ltage apphed at the CB Junction wh1'le v; · th b ·1 · · · · ·
bi ts e UI t-m potential of this Junction.
p 6
.4 The BJT Ti, .who~e parame!ers are given in Example 6.1, has an area A = 10- 3 cm 2 . The
emitter-base JUn~tt~n of ~i IS forward-biased and the collector base junction is left open. If
the hole current mJected mto the emitter is JpE = 10 µA,
(i) Determine the voltage at the collector-base junction.
(ii) Sketch the minority carrier distribution in the base.
(iii) Calculate the value of the emitter current.
(iv) If now the collector-base junction is shorted, without changing the ,·oltage at the EB
junction, what will be the value of the collector current assuming W 8
does not change?
(v) Sketch the minority carrier distribution in the base for case (iv).
(vi) Calculate the base current for case (iv).
P6.5 In an n+pn+ transistor with uniform base doping, the neutral base width (that is, the
undepleted portion of the base) is 1.2 µm when Vc 8 = 5 V. The depletion layer width at the
collector- base junction for this case is 0.3 µm. Find the value of the collector-base voltage
at which the entire base gets depleted. Neglect the built-in potential as well as the depletion
layer width at the emitter-base junction.
P6.6 In an n+pnn+ transisistor, the n+pn regions are identical to the BJT T1, whose parameters are
given in Example 6.1.
(a) Assuming that avalanche breakdown at the C1J junction does not occur before base
punch through, calculate the base punch-throug voltage (Vn)·
(b) What is the maximum electric field at the CB j
(c) If the critical electric field for avalanche breakd
possible value of V CB for this transistor?

_18_2~_S_en_u_ ·co_,_id_u_ct_o_r_D_e_v_ic~e~s.~·~M~o~d~e~ll~in~g_=.:an~d:....:t~e~cl~tn~o~lo~g~y----------------~~~----~-
REFERENCES AND SUGGESTED FURTHER READING
[l] Sze, S.M., Physics of Semiconductor DeiVices, 2nd ed., Wiley, N.Y., 198 L
[2] Roulston, David J., Bipolar Semiconductor Devices, McGraw Bill, New York, 1990.
[3] Streetman, B.G. and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice Hall Inc.,
New Jersey, 2000.
(4] Ashburn, P., Design and Realization of Bipolar Transistors, John Wiley and Sons, New
York, 1988.
[5] Antognetti P. and G. Massobrio, Semiconductor Modelling with SPICE, McGraw Hill Book
Co., Singapore, 1988.

Advanced Topics in BJT
C
hapter 6, the basic peratjng principle I f .
In · h o an ideal bi Jar · ·
discussed, ! h1s ~ apter ~nalyze the transjstor action u po . Juneti?? transistor have been
obtain Jts high frequency characteristics 1
~ dynamic corulltions and then proceeds
:~aractedstic of a tea] transistor often differ ~ ~fi addit10n, the d!~ion po~nts out that the
second order effects.
gn candy from an idealized device due to various
7.1 OPERATION OF THE BJT AT filGH FREQUENCIES
In C~~pter 6, we have mostly ~iscussed the operation of the bipolar transistor under static
cond1t1ons. However, · I one l of the important applications of the BJT is in small s1gna · I amp lifi ers,
where a smal 1 s1gna vo tage or curren! is superimposed on the de value. The term 'small signal' is
.used when the peak value of the ac signal component is much smaller than the de value. In this
section, we shall study the operation of the bipolar transistor under small signal conditions with the
help of models specially suited for this purpose.
7.1.1 Charge Control Model
In the previous chapter, we; have considered the BJT to tie a ~nt-controlled or a voltage
controlled device. We shall now describe the BJT as a charp-controlled device. The charge-control
approach is useful in the modelling of tenninal currents of ~ ~lar Junction transistor for smallsignal
or large-signal transient operation. In this approach, the ~ are mddelt'ed in terms of the
stored charge and transit time.
As in the case of the Ebers-Moll model discuSSed in
charge in the base into two components, namely Q11p
are the stored charges in the base for the forward ( 'BB
Vac ~ 0) modes of operation respectively. •
s . Let us first consider the forward m~ of ~atkip,
ection 6.6 that when the transistor is in die acttve .Dl04Dll
183
_a.lifAtitiiJ.ciitl~jb

. d Ll . d Technology
184 Semiconductor Devices: Mo .e mg an Then the total base
. . . the base.
. inority carrier hfetrme in
expressed as IoR = QoFl'fn, r" bemg t~e m F can be expressed as
current in the forward mode of operation (/ n)
(7.1)
n' p
n' p
where rfff = effective lifetime for the forward operation given by
,.,. - __ ___,...
F
~eff -
'l'n
I I
IpE
- 0JL_(l + 1/pE'J ==
1;
fy-
= I BR + II pE I - 'f,, I BR f eff
1+-
InR
· (V -'V) I] -rF is a constant independent of
Since both / E and /BR are proportional to [exp BE' r - , eff • th
applied bias. Als;, rfff is approximately equal to 1'r1 if ~BR >> lpE· The collector current m e
forward mode of operation (If) can now be expressed usmg Eq. (6.29) as
(7.2)
(7.3)
where r;a = (Wg/2D,,) is the forward base transit time of the electrons injected from the emitter.
The emitter current in the forward mode (/~) can now be written as
IF _ IF + /F _ QBF + QBF _ Q
E-c a-F
( 1 + 1 J
F-BFFT
'l',B 't'eff -r,B 't'eff
Let us now consider the reverse mode of operation, where V 8
E = O, implying fJ.
Expressions for the terminal currents in the reverse mode of operation can now be b:.::.~ ... ..,.
replacing Q8F with Q8R and the forward parameters -rf8 and 1":ff with the parameters or
(7.4)

Advanced Topics in BJT l85
p,rnd n. nu~ely 't'fa and_ -r:rr in Eqs. (7.1), (7.3), and (7.4). Also the emitter and collector
rn 1in 11 ' are mt.erchanged tn rever e operat'
. ion.
or u mor gen rnl annly 1 • considering electron injection from both emitter (forward mode)
II ·t r rev rse mode) into the ba e ·
, We can wn te
(7.5)
I = I~ + I~ ::: QBE.. _ Q (-1- + 1 J
't'F BR R !?
tB 't'rB 't'eff
(7.6)
IE = If+ 1: ::: QBF (_!__ + _l_J- QBR
F F R
-r,B 't'eff 't'rB
te that in the abov equations, the superscripts F and R refer to the forward and the reverse
es of operation respectively.
Equations (7 .5)-(7 · 7) express the terminal currents in a BJT for a static situation, that is,
n the .junc~ion .volt~ges and the currents do not change with time. Let us now incorporate the
-varying situation m our analysis. If v 8 E (the instantaneous base~mitter voltage) varies with
, clearly QBF is also going to vary with time, giving rise to a component of base current
Qldt). Ignoring the stored charge in the emitter, the instantaneous base current in the forward
e, ;t can be written as
(7.7)
·F _ QBF dQBF
la - -- + --=-'-
't'~r dt
(7.8)
above equation is the same as Eq. (6.96), which was used while discussing the switching of
istors. Now, if the time rate of change of voltages and currents is small, the so-called quasiapproximation
holds. Thus, even though Q 8 F changes, the slope of the electron distribution at
pstant in the base is almost fixed. Therefore,
Eqs. (7.8) and (7.9), we have
·F QBF
le= -F-
't',B
(7.9)
·F QBF + QBF dQBF _ QBF dQBF
lE = F F + dt • + dt
't'rB 't' eff 't' F
(7.10)
1 1 1
-.-=7+7·
't' F 't'rB 't' eff
t should be noted that when the junction voltage varies with time, the stored charge in the
BF has two components-one associated with the de bias Q8F and the other with the small
ac variation q F, 8
so that Q 8 F = Q 8 F + q 8 p, We can represent the ac component as
BFoeiwt, so that
(7.11)

,q-,,
• 11) I tt
d It
'ci • (7. 9) und (7 .10), the ac components of the collector and emitter
(7.12)
le == q,{F (1 + jan; )
'fp
(7.13)
Ltr r·nt uin a(

Advanced Topics in BIT 187
«anststor. e can ee from Eq. (7.17) thatf 7
is nearly equal to fa ·
t gain an '\; itb the operating frequency. Since aF ::: (r~lrfB)
e ha.,"e.
l
2ITT{e
(7.18)
-::0...
-
I
-------r---------------------~--
I
• I I
3dB , • ,
I I I
I l I
I I
log (f)
Figure 7 .2 Variation o'f a and p with frequency.
,1...,...~ ... ,
~ ,..__.Y. fT is considerably lower. Considering the stored charge in the emitter, it can be
n'ry) where -rF is the forward transit time defined by Eq. (6.90). The cut-off
rexlnred due to the presence of parasitic capacitance and series resistance. A
...... expression of / 7 can be obtained by considering the small-signal equivalent circuit,
e next sub-section.
iva!e:nt circuit of a BIT based on the Ebers-Moll model is shown in Fig. 6.20. For
~OSJ.!;toi- hiased in the normal active mode, this equivalent circuit can be simplified as shown in
small-signal equivalent circuit of a BIT, which is derived from Eq. 7.3(a), is shown
Fig, 7-3(b • c. is the parallel combination of the base-emitter junction depletion
C3]::tae11tarice C;c and the diffusion capacitance CvE· We have already discussed CvE in section 6.10.
Eq. 6..;92 ), we have
(7.19)

. and Tecl1nolog~l.Y----­
~l~88~..:S~e~n~zi~co~n~d~u~ct~o~r.!.D~e~v~ic~e:!s.:.. · !:M~o:.::d.::.:el~ll_n~g__
8---'--------,
------ c
E
(a)
c
B
C,r
f,r
Cµ
l gmVBE
Figure 7.3
E~J_--_l.-----.----
(b}
. . . BJT and (b) simplified equivalent circuit when the 8JT Ir
(a) Small-signal equivalent circ~1t o~ a I active mode.
operating in norma
where
-rF = forward transit time and
gm = (dlcldVoE) is the transconductance of the BJT.
Since, in the forward active region, le :::::
expressed as
l e
gm= Vr
Is exp (VaiVr),
the transconductance c
Thus, we see that the transconductance and therefore CD£, is actually
operating current of the bipolar transistor. We can now express C,r as
'!Fie
c7C = C1E + CDE = C1E + 'rFCm = C1E + -­ Vr
In Fig. 7.3(b ), Cµ = C 1 c, where C 1 c is the base-collector junction depletion capacitance.
the diffusion capacitance associated with the BC junction has been neglected since this j
reverse biased in the normal active mode.
The small-signal base current ib and collector current ic due to small-signal input Vi
can be expressed as
. dl 8
lb= vb -
e dVBE
VBC
= vbe

Advanced Topics in BJT 189
·e that
(7.23)
uming gm >> mCµ, which is valid for most cases, we have
/3(m) = ~c = (g,nf grc) = f3F
1
b 1 + jro ( C, :. C µ ) 1 + jro ( c, :. c µ )
(7.24)
t high frequencies, we can neglect the unity term in the denominator of Eq. (7.24).
efore, the cut-off frequency fr, at which the magnitude of f3 is unity, is given by
(7.25)
the sake of completeness, the product of the collector series resistance and C-B junction
acitance (RC) delay should also be included. Thus, the expression for the cut-off frequency can
er be modified as
1
2trfr ~ [ ... F + RcC1c + ~; (C1E + C1c)r
(7.26)
variation of fr with le is shown in Fig. 7.4. At low values of le, the third term in Eq. (7.26)
inates and hence fr increases with an increase in current till it reaches a peak value (frmax).
. ever, fr reduces again when the collector current becomes very high. This is due to an increase
F due to the base-widening at high collector current (Kirk Effect). This is discussed in detail
r in section 7.2.3.
Even though fr is often used as figure of merit for the ac performance of BIT, it is not a
istic criterion for judging the practical circuits. This is because it is measured with a
rt-circuit load. Also it does not take into account the base resistance (R 8 ). Hence, an alternative
e of merit, /max is often quoted. This is defined as the frequency at which the power gain falls
nity and is given by [ 1]
fmax =
fr ]112
[ StrC1cRs
(7.27)

190 Semiconductor Devices: Modelling and Technology
Figure 7.4 Variation of fr with collector current.
7.1.3 Design of High Frequency Transistors
In a high frequency transistor, the emitter and collectoP junction areas should be kept as small as
possible to reduce the capacitances. The base width should also be small, to reduce the transit time.
Also, the doping profile in the base can be tailored to reduce transit time, as we shall see in
section 7 .2.1. In addition, care should be taken to reduce series resistances associated with each
terminal to reduce the parasitic RC time constants. In fact, the doping concentration in the extrinsic
base regions can be made higher so as to reduce base resistance. In bipolar transistors, due to a
phenomenon called emitter crowding (discussed later in section 7.2.5), most of the injection of the
carriers into the base occurs at the edges of the emitter region. Thus, to maintain sufficient current
and reduce the emitter area at the same time, the perimeter-to-area ratio of the emiti:er must be
increased. Several thin emitter stripes, connected electrically by metallization and separated by
interspersed base metal contacts are often used. This type of structure, shown in Fig. 7.5, is often
referred to as interdigitated geometry. Two special types of bipolar transistors used for high
frequency operation are the Polysilicon Emitter Bipolar Transistor (PEBT) and the Heterojunction
Bipolar Transistor (HBT). We shall discuss about these devices in Section 7 .3.
Emitter
Base contact metallization
~-----{---~
Base
p
n
(a)
Emitter contact metallization
Figure 7.5 (a) Cross-sectional and (b) top view of interdigitated BJT structure showing thin emitter stJipeS
interspersed with multiple base contacts.
(b)

1.i
--~--~~-----------
SECOND ORDER EFFEcrs IN BJTS
-------------~----------..:_~A~d~va~n~c~ed~Ti~op~i~cs::.,::. in~B_J_T ___ 1~9l
I ter 6, we had as urned several 'd . . . . h'
n chap h II throw I. oht o t eaJ conditions m order to simplify the analysis. In t
. n we a
is
l o n some of the ~ . . . t b n
ectJO 'dered ' ear 1. ,er.
con
euects which exist m real transistors but have no ee
t
1 Non-uniform Doping in the B . · T. e
7.2. ase--Jmprovement 1n Base Transit 1m
di cussions so far we have assumed th . . . d t y
In our . particular . region . ' of the device . H at the dopmg concentrations . m the BJT o no 1· ed var · n
w 1 tl11n a . · owever, as we have seen m the process flow out m
1
e,:tion 6.12, the base region of the BJT is formed by diffusion or ion-implantation and the doping
~oncentration m the . base, as shown in Fig. 6.24, is not uniform. In such a case, the base ~ansit
tun · e is greatly . modified 1 . because h of . the presence of an in-built electric field. Let us consider . a
typical impunty pro 1 e In t e quasi-neutral. base region as shown in Fig: 7.6. It sho_ws two distmct
sections, one from 0-xi, where the net doping concentration (NA - ND) increases with x (region 1)
d
an the other from
. X1-Wa,
1 where the net doping concentration decreases with x (region 2).
th The
.
. -built field in region opposes the diffusion of holes to the left and in region 2, opposes etr
; w to the right. Thus, the electrons injected from the emitter encounter a retarding field as they
~er the base. On the other hand, the electrons in region 2 are subjected to an accelerating field.
~ most real transistors, the retarding 1iielcl region forms only a very small fraction of the base.
T~:refore, the doping concentration in the base can be approximated by the accelerating field
region only.
N(x)
O X1
Figure 7.6 . fil . the base of a BJT (The hatched regions are the depletion
Typical doping concer::f~~2 :~o~i:~~ side of the neutral base).
(7.28)

192 Semiconductor Devices: Modelling and Technology
Vr
(729)
tl(X):::: -­ Xo
. . account both diffusion and drift
We can write the expression for the electron current, taking mto
due to the built-in field as ]
d [dn n

Advo,w,,d 'l'o JI B {11 !JJ'f' 19
• I •
,,. b) fo 17 ..- J, the base tr:un 1t time 1
,~ r uniform dot In
cJoso to i t' • E pr s 111
throe l ,·m , w obtuit,,
, lh impurltv > •
11
th .
t n ·utrntlo11 cv ·rywhcro in the bu8e N 11
, that is. 11 is
x1.,on ntiut t rin h1 q. (7. ) a a H~rleR and c nsidering the 1r t
1
111 a :,:2 [ ry - I T ( l _ ry T t)] il,,
po ~ltiv vnlt, s f 77 the
' exp nentlal term can be neglected. There~ re, we can write,
w2
1'111 111 - ''=:; (r, - 1) ..
D 11
w;
17
D,,71
O when ·11 >> 1 ( 'HY 5), th" ba e trun it time ls les
than that obtained for uniform doping in the
ll C,
Variation of /3 with Collector Current
m our di cu i n in ection 6.6, we have seen that when a transistor is operating in the normal
tive mode, the base current and the collector current are both proportional to exp (V 8
efVr), Thus,
plot f ln Uc) and ln Ua) versus Vne keeping Vac == O (popularly known as Gummel plot) is
pected to be two parallel straight lines. The f3 of the transistor should therefore be a constant,
hich depends nly on the emitter and base doping concentrations and widths. However for a real
nsistor, the Gummel plot deviates from linearity and consequently f3 reduces at both low and
gh V 8 e, A typical Gummel plot is shown in Fig. 7.7(a) and the resultant variation of /3 with le is
picted in Fig. 7 .7(b).
At low I c, the reduction in /3 is caused by the less than expected fall of I 8 with reduction in
. This is explained by considering the recombination of carriers within the base-emitter junction
letion region as already discussed in section 4.3.4. For small V 8 e, the base current can be
ressed as
ls= !Bo exp (-V.-
VaE)
11E T
ere"£ (>l) is the diode ideality factor for the BE junction.
refore, for low V 8 E or low le, we have
(7.36)
le exp(t) =
/3 = 18 ~ exp( ~iJ
(7.37)

_19_4 ___ S~e~n~1i~co~n~d~u~cr~o~r~D=e~v~ic~e~s~ : !M~o~d~e~ll~i,~,g~a,~td:..,.:Te~c~h~n~ol~o~gy::-.~~~------------~----~---------.._
-~
-0)
.Q
L ----+--~~-- -----r VaE
(a) .
1
Slope =1 - - nE
Slope = -1
log (Id
log (/KF)
(b)
log (le)
Figure 7.7
(a) Gummel plot showing the variation of In (/c) and In (/a) with VaE and (b) correspolilding
variation of f3 with le.
Thus, we see that at low collector currents, f3 reduces with decrease in le.
On the other hand, at hi gh V 8 £, the collector current is seen to increase at a less than
expected rate with increasing V BE· This is caused by the high level injection of carriers in the base.
In most of our discussions so far, we have assumed a low-level injection, meanh1g that the majority
carrier concentration does not change in any region. However, when a large number of electrons
are injected into the base, this assumption no longer remains valid, especially since the base doping
concentration is not very high. In order to maintain the charge neutrality, an increased hole
concentration is observed in the base. Considering the base to be uniformly doped, we can
therefore write
p(x) = NA + n(~)
Note that Eq. (7 .38) always remains valid. However, for low-level
therefore we take p = NA.
From our discu_. ion on q~asi·Fermi l~vels in section 1.4.1 and noting th
between EF,, and EFv 1 qV, V betng the applted voltage across the junction, tb.l;
edge of the depletion region of the E- B junctior,1 can be written as
(7.38)

~--------------------~!.!d~v l KF represent the low
gh current regions respectively.
Injection in Collector
tor currents, the current gain of the BJT drops due to yet another mechanism kn wn
This occurs when there is a heavy injection of electrons across the CB depleti n
normal active mode, we have assumed that the minority carrier concentration in th
ro at x = W 8 (section 6.4), that is, any electron impinging upon the CB depleti n
y swept across. However, this assumption will be violated if any carrier has to fl w
on. A current density l e requires an electron density at least equal to l clqv at, wher
ing limited velocity. For moderate V 8 £, J is small and so the approximation h ld
, with large V 8 £ , this electron density becomes comparable to the background
ation. The Poisson's equation across the depletion region can now be modified a
(7.42)
the electrons adds to the acceptor charge on the base side of the CB depletion
acts from the donors on the collector side. The effect is equivalent to increasing the
ncentration and reducing the collector doping concentration. Therefore, when
rrent is increased while keeping V cs constant, the depletion region shrinks on th
ng in an increase in the neutral base width W 8 . Consequently, f3 decreases and

the base transit time incren es. On th oth r h md, the effective reduction in the collector doping
concentration results in the d pleti n r gi n xt nding further into: the c~llec~or. In an npn
transistor with an n+ buried c 11 ctor. nt ry high currents, the depteuon region m the collector
may extend alI the way to the buri d Ile tor, which hus serious consequences.
7.2.4 Heavy Doping Effects in the Emitter
From our discussion in section 6.5, it can be easily shown that the common emitter current gain
(assuming ar ~ 1 is essentially the ratio of the emitter Gummel number to. the b~se GummeJ
number. So, it seem that a ery high doping of emitter will improve the transistor gam. However
1n reality, the high gain predicted by Eq. (6.43) does not materialize. On the other hand, f3 becomes
significantly less and also depends on temperature. This can be explained by the ~eavy doping
effects, which have not been considered so far. Heavy doping effects are charactenz~d by three
mechanisms, namely mobility degradation, Auger recombination, and band gap narrowing.
Mobility degradation
In Chapter 1 section 1.4, we have seen that mobility depends on the time interval between
collisions (mean free time) for a carrier moving through a semiconductor. For a heavily doped
semiconductor, mobility is primarily determined by ionized impurity scattering.' It has been
experimentally found that for both silicon and GaAs, carrier mobility decreases drastically once the
doping concentration in the semiconductor exceeds 10 19 cm- 3 . Since the mobility and the diffusion
coefficient are related by Einstein's relationship, the diffusion coefficient DpE also decreases for
heavily doped emitter. From the relations in section 6.5 using the narrow base approximation in the
emitter, it may appear that the current gain should in fact increase with fall in DpE due to a
reduction in IpE· However, this is not actually the case, as described in the next section on Auger
recombination.
Auger recombination
Carrier lifetime in a heavily doped semiconductor is also significantly less thalil that iii a lightly
doped material. This can be explained by an additional recombination process, which becomes
dominant when the doping concentration in the semiconductor is high. This is a three particle,
band-to-band recombination process in which the energy and momentum released by the
recombination of a hole-electron pair is transferred to a free electron or hole. This is known as
Auger recombination named after the scientist who first studied this phenomenon. The lifetime
associated with Auger recombination process (Auger lifetime) is inversely proportional to the
square of the doping concentration in the semiconductor. An empirical relationship for the lifetime
of holes in the emitter is given [2] as
where
N DE = donor concentration in the emitter per cubic cm..

Advanced Topics in BJT 197
rion (7,43) signifies that for th
rnbination is the dominant rec e ~tnitter doping concentration above 10 19 cm-3, Auger
'th h ornbinati h ·
s WJ l e square of the dopin on mec amsm and the minority ~arrier lifetime
The reduction in both diffusio g concentration in the emitter.
to reduce significantly. Thus, th: COefficie?t and lifetime causes the diffusion length for the
w diode approximation no longer hassumption that WE ,
e>
Q)
c
w
>,
~
Q)
c
w
Density of states
(a)
Density of states
(b)
Energy band diagram for (a) moderately doped semiconductor showing a single dopant energy
level and (b) heavily doped semiconductor showing band gap narrowing effect.
In heavily doped semiconductors, dopant atoms lie close together. So, instead of discrete
gy levels, an impurity energy band is created as shown in Fig. 7.8(b) for n+ material. Also,
nts now disrupt the perfect periodicity of the crystal lattice, giving rise to a band tail. The net
It is that the band gap changes from E 8
to (Eg - !J.E 8
). For p+ material also, a similar effect is
ved. Only in that case, the band gap narrowing takes place at the valence band. edge. An
irical relation for 1).£ 8
in the heavily doped emitter is given [2] by

(
NJ)/, )
''.. t8.7 111 meV
17
" 7 X JO
(7.45)
l'hti~, 1\ 1· 1\ h •1\\1 l cl >p d mi ttot\ b ·euuse of band gap narrowing, the intrinsic carrier
'II , , 111! ~ II " th I\\ It t• (1111( In t' -'l\S , tu n, exp (!1Egl2kT) . While for the base, n/8 remains
'II\ \I t , 11 1 , , .'~Ull\ t1 I . l, 11 • n11d I u lpe, we can n w write
I I~/!' n~ ( D.Eg)
--,-- oc
2
oc exp - -
p,, . " tE kT
(7.46)
l qtmttl t\ thul t 1·· lu ·es lue t band gap narrowing. Also, temperature strongly affects
/1. As th t •mt r tlUt 11

(7.48
LBJT
n i ered th n enti mu npn ip Jar tran istor, where the emitter, base
or regions are all mad f the run material. In this section, we shall discuss some
tional BIT cru tures \ here the emitter i made of a dissimilar material. Although the
for fabrication of these devi es i m re complicated their performance, especially at
ting frequen ies, is mu h uperi r t th on entional BJT.
olysilicon Emitter Transistor
discus ion on high frequenc transistors in section 7 .1, we have seen that the junction
capacitances (CJE and C 1 d and the base resistance R 8 play a crucial role in determining
ormance of a BIT. The capacitances ha e two components, namely planar and side
pheraJ). Let us consider a square emitter having an area a 2 and depth WE· Since
"tances are proportional to their respective areas, the side wall capacitance to
acitance ratio is proportional to {(4aWE)/a 2 } = (4WE)/a. Now this ratio increases
reduced showing a dominance of the side wall capacitance for smaller size
us, for effective scaling of C 1 E, the emitter junction depth (WE) must be reduced along
itter side of dimension a. However, a shallow emitter causes a reduction in the common
ent gain /3. As illustrated in Fig. 7 .10, the slope of the minority carrier distribution in
mes steeper when the emitter depth decreases. Consequently, lpE increases and /3
his is also reflected in Eq. (6.43), which shows that a reduction in WE causes a
{3.

200
Pr,!
~ t..t.--- W1 ----~
!"~~---- We----~
Figure 7.10 Minority carrier concentration distribution fn the mttter cf t:/:1,0 Jrt
emitter width ,
, ,.,.
• •
1 , 1
, emitter tra 1 r,
This problem can be overcome by usmg a po Y I icon Jr 1 ' Jj ~ 1
polysilicon emitter, after opening the emitter window, a layer of poJyc.ry ~ ,rt, hmtat'
1 1 '-
by CVD technique. This polysilicon layer is then patterned and doped by ,.10'JJ· ttnpha1f , ,
subsequent annealing, this polysilicon Jayer acts as a 1,ource of dopa11t and a,. _ emitter ~
1
realized. The process steps are outlined in Figs. 7.11 a, b), and c , AJ; h vn Jn ~ 1,11 dJ~ tbJ
is followed by oxidation, opening of windows in the oxide1 metamzadon,, ~tKl ~ pattemi~
the metal in order to take contact from the poJysWcon emitter. In the poly J11con enutt« tran 1 1
the single-crystal region of the emitter, which determines the side waJJ capacitan.ce1 has beer) made
shallow. On the other hand, the slope of the minority carrier distribution, as b wn in Fig, 7,12 ii
less steep as the excess injected hole concentration faIJs to zero only at the po!i iJicon-metaJ
interface. Hence, the common emitter current gain f3 jmproves. In fact, P i furthet improved due to
the presence of a thin (-10 A) oxide layer between the single crystal and poly ilicon region. This
oxide layer suppresses the hole injection from the base to emitter. On the othe.r hand, the oxide
layer increase~ the emitter resistance, degrading the circuit performance, particularly for small
geomet?' devices: Therefore, the trade-off between f3 and Re ha to be decided carefuJJy by
controlling the oxide thickness.
m
p
n
(a)
,Z:" ~ .....__
n_• _ _,.f
p
n
(c)
SI02
~
t t
l
As Implant
t t
~ ~~
p
n
(b)
(
+ t / Polysllcon
Figure 7.11 p recess steps tor realizing a

Advanced Topics ,!!!.!!:!T
201
Pofysmcon
: Monocrystalline siUcon
p
p'n
Figure 7.12 Minority carrier distribution in the polysilicon emitter of a BJT.
IIeterojunction Bip"lar Transistors (HBT)
discussed in section 7 .2.4, we have seen that the current gain of a BIT cannot be increased
f.! Jy by increasing ~e emitter d?ping. One way to improve the current gain f3 will be to suppress
sim~ ,iection of holes mto the emitter, while keeping the electron injection in the base unchanged.
the UlJ h. ed ·r th . . d to
· can be ac 1ev 1 e emitter and base of a transistor are made of two sem1con uc r
ThiSn·als with different band gaps. Such a junction is called a heterojunction. This section details
rnate . . . .
the basic conce~t of heteroJunctions. Consider a heterojuction where matenal 1 refers to a
ntlconductor with band gap E g1 and material 2 refers to a semiconductor with band gap Eg1,. Let
; > Egz• as shown in Fig. 7.13(a). In addition, let us assume that the two materials have the same
eJ~tron affinity, that is, X1 = X2: Then, if material I is n-type and material 2 is p-type, an uneq~l
barrier is formed at the conduct10n and valence band edges when the two materials are brought m
contact as shown in Fig. 7 .13 (b). Therefore, the forces acting on the electrons and holes are
different and the potential barrier for holes is greater than the potential barrier for electrons by M g
(== E - 1
Egz). This is impossible to achieve in a homojunction (where we have the same band gap
00
b~th sides of the junction).
Vacuum level __ t ___________
---f---------·
qx1
!---~---------· !; Ee t
Eg2
l_
EF
Figure 7.13
(a)
-------------·
,
I
-------------- ., I
,
Vacuum level
., ------------
_/ Ect
I~-----~----~-------------------- t EF
T jrAE. E,
Emitter
(b)
Base
(a) Energy bands of two materials having same electron affinities but different band gaps;
(b) energy band diagram when these materials form a heterojunction.
I
I
I
I
I
I
I
I
I
I
1
I
1
~
1
~

. . . tran
1 1 tor, a uming n
tmate retauons for the collector cu
iblc re ombination in the b
r a hcteroJunctton b1po ar rrent and b curr nl n bo wrtttcn ase, tht
AqD"n!1 exp(Vs )
l e = WsNA Vr (7.49)
(V"E)
AqDPn~
Is == W N exp -V.
E DE T
where the ub cripts 1 and 2 refer to material l and 2 re pecti ely.
ince E 1
, > E 8
2,
(7.SO)
As urning Nci = Ne2 and Nvi == Nvi, we can write
2 2 ( 6.Et '
nn = n;2 ex.p - kT I (7.51)
Thus, from Eq . (7.49)-(7.Sl), the current gain f3 of an HBT (fJhcJ can be written as
n = " £ DI! exp __
D W N (6.E R J = n exp (6.E __.!. J
1-'het D W kT 1-'hom kT
p B A
(7.52)
where
f3tiorn = current gain for the corresponding homojunction transistor.
Howe er in reality, the situation is not so simple since the electron affinity of the two
material i not same. For example, let us consider an AlGaAs/GaAs heterojunction, which is the
mot widely used system for HBT applications. Here, AIGaAs has a larger band gap (depending on
the percentage of Al, Eg can vary in the range 1.42-2.16 eV) but a smaller electron affinity as
h iWD in Fig. 7.14(a). For such a case the energy band at the junction is shown in Fig. 7.14(b). It
c n b seen from the figure that there is a spike and notch formation at the conduction band edge
and step formation at the alence band edge. The spike impedes the flow of electrons from the
___ f __________ Varuum level ___ f __ ____ ___
qz,
I I
__ t____________ , , I :
QX1
t.Ec
--i-_-_-_-_- __-_-_-_-_
Vacuum level
/,,------i-----·
,,1 (J;t'2
---+--Ee
I
• - I fg2
.----+--------l------· E,
:r .iv
Eg1 ~-~
~l _)_tAE•
(a)
Emitter
(b)
Figure 7 .1'4 (a) Energy bands of two materials having different electron affinities end baf'K\
a.nd diagram when these materlala fonn a hetlfQjunctlon.

d cmced ro, i "' ,ur 20
e of the d
OnlJ nUlt
ry of AlGaAs and
ce b nd I g.i en by
in the condu tion bund ( • ) i:; ·qu I to th
aA , that i ·, Ee = Xi - Xz· on~ ·qll ntl · ti '
M-==AE -
1
JJ i les than that predicted by "'q. (7 .52).
f3het = ~ NnrNv1:.
~
E
(D.Ev)
m N N exp kT
CB VB
or thi us -, f3 i 11 n b
e inJected electrons are collected in the notch in Ee, Thi. m ren:- ·s th'
d ~e.grad~s fl This can be countered by u ing a graded h terojun ·tion,
~ r.ce:::::12~ of umimurn m AlGaAs 1s increased slowly as we move nwa from th ·
(7 .•
ens ou~ the conduction band by removing the pike und there r du ·s
e ec ns m the conduction band. Hence, Eq. (7 .52) remains vulid.
-As/GaA~ heterojunction, 6.Eg = 0.374 eV, and at roo,~ r·.mp ·rntu '
• e arge improvement in emitter efficiency can be traded t r h1 >h ·r b \, '
e fre.q en response of the device. We can see from Eq. (7.52) that u to th "
!'Ol ing M~, the current gain of an HBT, which has a hi gh r doping in th'
, st.JU be much more than that of a conventional BJT with hen ·mitt ~r
osr HBTs, the doping concentration in the base i ab ut tw rd •r' of
• the emitter as shown in Fig. 7.15. For a higher doping c ncentruti n of
of the depletion layer at the CB junction into the base i le . T h ' "arl
be higher, and the base width can be reduced without cau ing pun h­
. dth results in an increase in the value of fr. A higher ba " d ping , 1~
Emltter
I
I Q)
I Vl
I ro
l 0)
1
: p
Collector
n
17
n
0 15 L--1.--0~2- __J_~0~.4-..L-,;0.~6-.l--lOD.8-'-1.1.0
0 .
Depth (µm)
:Figure 7 .15
Typical impurity concentration distribution in an HBT.

204 Semiconductor Devices: Modelling and Technology
. by Eq, (7 .27) is further increased
means a lower base resistance. Thus, the va
tue of !, given · · 7 2 2) ·
mnx""" t (discussed m section · · are much
Also since
.
the base doping
.
1s
.
h1oh,
.
the
h'
1g
h inJ'ection euec s
wding
.
an d th
erei, .co r
e
increases
.
th
0
'
duces current cro . e
less. Such a reduction in base re istance also re . Jower capacitance across the Rr·
. d t' ge of HBTs is a tc.
current handling capability. Another a van a
junction due to the lower emitter doping. . homojunction BJT having a heavily
1
Interestingly, it is possible to consider . a convenllo;a a narrowing effect in the emitter (as
doped emitter as an inverse HBT, if we consider the b?n hg ~mitter is Jess than that in the base
discussed in section 7.2.4). In that case the ~and gap 10 t el HBT, the band gap in the emitter i~
causing a reduction in the current gain /3, while for an ac~ua band gap narrowing in the emitter of
larger, causing an improvement in {3. Also, W~ have seen t at leading to thermal runaway. On the
a homojunction BIT causes f3 to increase wit~ te~peratur~n temperature as can be seen frolll
other hand in a HBT, f3 actually reduces with mcrease t d by using HBT.
Eq. (7.52). Thus, the problem of thermal runaway ca~ ~e av~~:ckley in his patent application in
The concept of HBT was first pr~posed by Wtlha:tith the advent of MBE and MOCVD
1948. However, the first HBT was realized much later, d for realizing various high speed
techniques of deposition. Today HBT is a mature technology u~e . circuits that use HBTs.
10
circuits. The lowest delays in digital circuits have been reporte
P7.1
P7.2
P7.3
PROBLEMS
· · d · · decreasino exponentially as we go
In an npn bipolar transistor, the base opmg is o
away from the base emitter junction and is given by NA(x) = N1exp{-(x/xo)}, where
N 1
= 10 16 cm- 3 is the concentration at the base-emitter junction and Xo = 0.2 µm.
(a) Find the value of the built-in electric field.
(b) Find the base transit time r, 8 .
(c) What would have been the value of r, 8 if the base doping was uniform (= Ni)?
(d) Compare and comment on the two values of r, 8 obtafoed in (b) and (c).
[Given D 11
= 20 cm 2 /s, W 8 = 0.4 µm. Assume L 11 >> Ws]
Show that for any arbitrary doping distribution in the base, where the doping concentration
reduces from the emitter side to the collector side of the base, the base transit time is less
than that in a uniformly doped base.
(a) A constant electric field of -4 KV/cm exists in the nonuniformly doped h• of $1
bipolar transistor having a base width of 0.3 ~lm and a doping concentratiQn of toll
the edge of the emitter-base depletion region. What is the doping concentration
of the collector- base depletion region? (Assume th,t the depletion wfdth
the base are negligi bly small.)
(b) If the average value of diffusion constant
transit time for this transistor? Compare it wi
uniform base doping concentration.
P7.4 The band gap narrowing in heavily
!).Eg = 18.7 In (N 0 17 x 10 17 ) meV, where

matenal. If the emitter of an npn .
Ad anced Topic i11 BJT 105
in f3 from its ideal value, if only thtran I tor is doped to 1020 cm-3, \ hnt \I ill be the hange
f e band g ·
tran port nctor == 1. ap narrowing effect is con idered? ume ba e
5 for an npn transi tor, the neutral b .
r1· electron in the base are 1000 crn2Nase Width WB == 2 µm. The mobility and lifetime of
s anct 1 ·
(i) tran it time of electrons throuo µs respectively. Assuming r == 1, calculate the
0
(ii) a-cutoff and ,8-cutoff frequenc· h the neutral base ·
•es of the transistor.
6 The base width of a bipolar transist .
p1, µm x l µm. The doping or ts o. 5 µm and the emitter is a square of dimen ions I
1'7.7
µ = 400 cm 2 /Vs and the depletioco~centra~ion in the base is 1017 cm-3• Assuming
c~rrent density variation along th n Ei3e~ Wt~th to be negligible in the base, plot the emitter
single base contact as depicted
10
· ep· Junction for la == 0.1 mA, if (a) the transistor has a
depicted in Fig. 7.9(b).
ig. 7·9(a) and (b) the transistor has two base contacts as
In a heterojunction bipolar transistor (HBT
of the base is 0 .8 eV. The do in
)'. the band gap of the emitter is 1.1 eV and that
. 0
1s .
3 eV belo
w
E
c an
d
m
. Ph g concentrations are such that in the emitter, the Fermi level
t e base 1 · t · o 5 y ·
emitter · is · 4 . 05 e y an d t h at of th b IS · · e below Ee. If the electron affimty of the
emitter-base . abrupt Junctton. . . e ase is 4.0 eV, draw the energy band diaoram t> at the
REFERENCES AND SUGGESTED FURTHER READING
[1] Taylor, G.W. and J.G. Simmons, Figure of merit for integrated bipolar transistors, Solid
State Electronics, Vol. 29, p. 941, 1986.
[2] Alamo, J. Del, S. Swirhun, and R.M. Swanson, Simultaneous measurement of hole lifetime,
hole mobility, and band gap narrowing in heavily doped n-type silicon, IEDM Techn ical
Digest, p. 290, 1985.
[3] Sze, S.M., Physics of Semiconductor Devices, 2nd ed., Wiley, N.Y., 1981.
[4] Roulston, David J., Bipolar Semiconductor Devices, McGraw Hill, New York, 1990.
[5] Streetman, B.G. and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice Hall, New
Jersey, 2000.
[6] Ashburn, P., Design and Realization of Bipolar Transistors, John Wiley and Sons,
New York, 1988.

Thyristors
8.1 INTRODUCTION
In the previous chapter , we have already seen that a diode remains off (that is, it passes negligible
current) when a re erse bia i applied and turns on under the application of a forward bias. Thu
a diode can be used as a switch, which can be put off or on by reversing the polarity of the voltag~
applied across it. Similarly, a bipolar junction transistor can be used as a switch by changing the
base current to drive the de ice from cut-off to saturation. However, a number of switching
applications require a device that will remain 'off' (that is, in blocking state) under fmward bias
and will switch to an 'on' (or conducting) tate under the application of an external signal. The
thyristor, also known as semiconductor controlled rectifier (SCR), is one such device which
remains in a high impedance state under forward bias condition (forward blocking) until a
switching signal is applied which switches it to a low impedance state (forward conduction).
Thyristors are important semiconductor power devices, which may have current ratings greater than
1000 A and voltage ratings as large as 10,000 V.
The SCR is basically a three junction p-n-p-n structure, as shown in Fig. 8.l(a), with an anode
terminal connected to p 1 , a cathode terminal connected to n 2 , and a third terminal (gate} ~onnected to
the internal p-region (p 2 ) . The p 1 -n 1 , n 1 -p 2 and Pr n 2 junctions are referred to as J 1 , J 2 , and J 3
respectively. The doping concentration distributions of the different regions are shown m Fig. ~.1{b).
Let us first consider the operation of the two-terminal p-n-p-n device, that is. one with fl ·
terminal. Subsequently, we shall discuss the use o1 the gate to control tl)e o~attiQDiS...,mlN
8.2
The typical current-voltage characteristics of the two t
Fig. 8.2. As we can see from the figure, there are five di
Fig. 8.2 as (a) forward blocking, (b) negative resistance
blocking, and (e) reverse breakdown. We shall now describi
regions individually.
206

Thyristors 207
1 ] G (Gate)
J, J2
A
0--- P1 n,
(An ode)
I
I
I
L.
P2
J3
n2
I
K
-
1 (Cath ode)
(a)
>,
-·c
:J
ci
E
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
(b)
figure 8. 1
(a) Basic structure of a thyristor and (b} the doping concentration distributions in the various
regions.
-c
~
...
:J
(.)
t
lh
Forward conducting
Negative resistance
·-------L. ______ __
~ -V~aR~==:=::;===========~~~~=-=--=-=-=-=-f-=--=-=-=-~-~--~-~-+·~~vAK
Reverse blocking
Reverse breakdown
vh
Forward blocking
~ Voltage
vBF
Figure 8.2 Current-voltage characteristics of a p-n-p-n device.
8.2.1 Forward Blocking State

208
la1 = le2
le, = la2
Figure 8.3 Two-transistor equivalent circuit for a p-n-p-n device.
where I refers to the terminal current of the device as well as the emitter currents of th .
. . e Individ
bipolar transistors.
UaJ
In Eqs. (8.1) and (.8.2), the subscripts 1 and 2 refer to the pnp and the npn tra .
respectively and all the other current symbols have usual meaning. Again, from Fig 8 3 1
.t ~sisters
. • , IS Clea
that the terminal current I at the anode and the cathode is the sum of I Cl and JC2. Therefo f r
re, rom
Eqs. (8.1) and (8.2), we obtain
and hence,
1 = lei + / C2 = (a1 + e»i)l + lcso1 + lcso2
1
= _I c_s_o_1_+_I_c_s_o_2
1 - (a 1 + a 2 )
From Eq. (8.4), we see that as long as a 1 and ai_ are small, the current I remains small. The small
values of a 1 (and ai_) imply that virtually no holes injected across the forward-biased junction J
(or the electrons injected across forward-biased junction J 3 ) survive to be swept across the rev.erse~
biased junction J 2 by transistor action. Thus, the device is in the forward blocking mode as
depicted in Fig. 8.2.
8.2.2 Triggering and Forward Conduction of the p-n-p-n Diode
We have already seen (from our discussion in section 7 .2.2) that the current gain varies with
collector current in a bipolar transistor. For very low current, the recombination in the EB depletj,on
region dominates and a is small. As the current increases, injection begins to dominate resulthti,
an increase in a. Also, with increase in VAK• the reverse bias across J 2 increases, resul~ ·
increase in the width of the depletion layer, which is shown in Fig. 8.4(a). CoQSCQI
increases due to a reduction in the neutral base width. Also, the avalanche multipqcatio
becomes significant at higher values of VAK• which effectively increases th~ yalue
As a result of one or all of these effects, a 1 + ai_ approaches unity. fr
that this results in a large increase in the terminal current. In physical t~
means that many holes now reach p 2 and many electrons reach n 1 •
since a large supply of electrons at n 1 allows a larger injection of holes
the charge neutrality. Similarly, a large supply of holes at p 2 allows a 1
across J 3 . This large supply of electrons and holes shrinks the depletiQ
(8.3)
(8.4)

71 1 ri,wr 209
"- ""'4.t

210 Semicondu tor Device : Modelling a11d Te /111olog
8.3 OPERATION OF A THYRISTOR
We have already d1 cus ed the variou mechanis.m by which the p-n-p-n. st~ucture ca.n switch from
it forward blocking tate to forward conduction tate. Essentially th1s mvolves mcreasino th
current till the tran i tor regenerative mechani m takes place and can be achieved simp~ be
increa ing VAK· Alternatively, it can be triggered by holding VAK constant and raising thy
temperature (or hining light) to facilitate generation of more carriers. In a thyristor, this i:
achieved by applying an external signal to the gate terminal. When the device is biased in its
forward blocking state, a small current applied to the gate can initiate the switching to forward
conduction. A po itive gate current supplies hole to p 2 , the base of the npn transistor, which
results in increased injection of electrons from n 2 • The transistor action thus starts in the npn
transistor. These injected electrons reach n 1 after a delay (equal to the transit time through the
ba e). This allows increased hole injection from p 1 and the process becomes self-sustaining. In
most thyristors, the gate current is small (a few mA), while the total device current I can be very
large (many amperes). Evidently, the switching can be initiated at a lower value of VAK by
increasing the gate current as shown by Fig. 8.5.
lg2 > lg1 > lg0
Figure 8.5
Current- voltage characteriistics of a thyristor.
Once the device has switched to conducting state, it is not necessary to maintain the gate
current, that is, the device operates independently of the gate current. Act11ally, tlie gate loses
control after the regenerative process has begun. Thus for most devices, a gate current pulse with
duration of a few microseconds is sufficient to ensure switching. A simple applieation bf; th
is to deliver a variable power to a load such as a furnace, or a tieator er sw».ll' a ·
shown in Fig. 8.6. The amount of power delivered to the foa

----­~--...,_------------------~.....J.Ti~h~yr~u~t~o~rs~2!1!.!,l
v,,
Ip
(a)
Figure 8.6 Thyristor-contr
(b)
Oiled power delivery to a load.
I order to wi tch the device back t .
O
Its forward bJ k.
a cnucal value, called the holding . oc mg state. the current has to be reduced
i..el..i\\ current I Th. .
15
·. r . Th i en ure that the n 1
and p b ' H· is u uaJly done by rever ing the polarity
,r ~-" I f 2 ases are complet I .ed f
~ lete remova o carriers can be ach· d e Y empt, o carriers. However as
·J' teve only by rec b. . ffi
• ed Otherw1 e. if a forward voltage 1·s . om matton, su 1cient time must be
1'lo'• · app 11ed befi II h · ·
~- oain turn on. The turn-off time of h . . ore a t e charge has recombmed, the device
3
...:i.~
~ a t ynstor is usually 5-10 times the carrier lifetime in the
'hJSe
In ome specially designed thyristors gat tu ff
' e rn-o can be used. Accordingly if the gate
1 110 1 reYersed, holes are extracted fr h . .
10 ... ~ • • om t e P2 region. If this rate of hole extraction is
..
,~ 11 1 1ent1Y
-
large. the regenerative
. .
action stops and the d
evice
·
can tum o
ff
.
H
owever this
.
oate tum-
L,ff apabilny can be util ized only over a limited volta c . d . ' e
ge range 1or a given ev1ce.
8.4 BIDIRECTIONAL SWITCHES
I
I
I
I
I
.-\ idirectional switching device can switch from its blocking state to conducting state for both
s1tive and negati ve applied voltages and is therefore useful in ac appJications. A bidirectional
p- ·p-n \,'Itch is also known as a diac (Diode ac switch) and the basic structure is shown in
Fig. 8.7(a J. It can be viewed as two p-n-p-n devices with the anode of the first device connected
ro 1he cathode of the second and vice versa as shown in Fig. 8.7(b). A diac is a two-terminal
device. When a positive voltage VAB is applied across the6e two terminals, only the Pi-n1-prn2
de\'lce comes into picture and produces the forward 1-V characteristics as depicted in Fig. 8.7(c).
Analogously, when the polarity of VAB is revers~ the P2-n.-p 1 -n 3 device comes into play, and
generates the reverse J-V characteristics shown in Fig. 8.7(c). The symmetry of the configuration
ensures identical performance for either polarity of applied voltage.

• and fec/lflOil~o~gyl..---­
!2~12~§_S~el~tli~cO~l~ld~u~ct~O~rD~e~vi~ce::;s~: .!M~o~d::.e~llt_n.;:..g __
p2
P2
P1
(a)
On
-------
On
(c)
Figure 8.7 (a) Basic structure of a diac; (b) equivalent circuit for diac showing two p-n-p-n de~·
(c) current-voltage characteristics of dlac.
A bidirectional three-terminal device is called a triac. The basic structur~
Fig. 8.8. The 1- V characteristics of a triac are similar to that of a diac. However, ·
switching can be achieved in either direction by applying a low voltage, low current
the gate and one of the two terminals A and B. This allows control over the breakove
a thyristor.

TB
J4
Th ristors 213
n2 03
P2
~ Gate
n,
P1
I 04
Js
r A
Figure 8.8 Basic structure of triac.
REFERENCES AND SUGGESTED FURTHER READING
[I] Sze, s.M., Physics of Semiconductor Devices, 2nd ed., Wiley, N.Y., 1981.
[Z] Roulston, David J., Bipolar Semiconductor Devices, McGraw Hill, New York, 1990.
[J] Streetman, B.G. and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice Hall,
New Jersey, 2000.
[ 4 ] Baliga, B. Jayant, Modem Power Devices, John Wiley & Sons, New York, 1987.

, f' on Field Effect Transistor and Metalemiconductor
Field Effect Transistor
~r- \\ have n idered bipolar devices (p-n junctions and BJTs) where both
- (el trans and holes) participate in the conduction process. Eor example, in
- Jun ti n, lectrons are injected from n-region to p-region and holes are
p- _ on ·o n-region. The total current is actually the sum of these two components.
II n \ di u w1ipolar devices, where primarily one type of charge carrier
ndu tion pro ess. This chapter discusses three such devices, namely metalnon.
, junction field effect transistors (JFETs), and metal-semiconductor field
r· 1viESFET ). The most important unipolar device in VLSI circuits-metal oxide
field effect tran istor (MOSFETs)-is dealt with in the next two chapters.
TAL-SE1\illCONDUCTOR JUNCTION
o d tor (M-S) junction is the oldest practical semiconductor device. This ~
ecn mg or non-rectifying. The rectifying metal-semiconductor junction is also kn
'wd , \\bile the non-rectifying junction is called an ohmic contact. We shall ~\
di gram of a metal- emiconductor junction.
9-.1 Ener Band Diagram of M-S Junction
the energy band diagram of an isolated metal adjacent to
1 lated n-type semiconductor. The metal work function (that is, the
the va uum level and the Fermi level), qm, is usually diffe1rent from
214

Junction Field Effect Transistor and Metal-Semiconductor Field Effect Transistor
215
1
0
. n q.,,. ,1, Figure 9. consi d·r· 'd ers the case where ,P .. > ,P ' . The electron affint .'ty n of teve the 1)
1 •
runcu (that is, the energy ,erence between the vacuum level and the conducuo . h the
,, 1l co" ..,ductor . a lso shown in the figure. 1 . When the metal makes intimate contact l qm W.' ~b 'um
J n
1~' ,v is flow of charges resu ts in aligning of the Fermi levels at therma e . th
dfo' ,a · . · 1in e
c 11' ·co" .ducto uon .' t · 3.9). Also, . smce ( lhe . vacuum level represents the potential . vanation n . ti 1m te
l 10 sec . must be continuous a discontinuity in the vacuum level would imp Y a the
1 10
1refef ysteJll, it These two requirements give rise to a unique energy band diagr~m 1'. r for
0
~.S \ field) . hown in Fig. 9.l(b). For such an ideal system, the barrier height at the iunou?n the
ctfl as s h . b d (di ) 1s
,1,
5
ystem 00 0
f electrons from t e metal to the semiconductor conduction an .,,,. Th tis
0
f . J·eeti the metal work functioe and the electron affinity of the semiconductor. a '
,he v• ill ence be twee Al
(9.1)
dl«er
q'l'Bn ::: q

'
,t, I 111 • I • ,, 1,, I II n I undu ·t r work
' th
ti I
I n 11 ,1 t
111 Lh 1 Jl
~I/II
nil
\II' 11
lt1
N, ) 9.2)
Nn
01
ncJt1 tor surface. In thi
th" I' Ju tion in the electron
wh n, ,,, < ., is shown in
rn tul t the semiconductor
I I~·
I ~"'
X.)
(9.3)
Metal
p-type
semiconductor
· Ee
q(

1,0
->
,!?.
d5
tJo
....
?
..c:
....
4)
·e
co
al
0.8
0.6
0.4
n-GaAs •
0
n-Si
0.2
Ag
Au
Mg Hf Al w Pd pt
.o~---'--..L~~---LL.1_____ t_1_~-l_1-_J
6.0
0
3~
5.0
Metal work function q¢m (eV)
Figure 9.3
Measured barrier heights for different metals {1] on n-SI and n-GaAs.
Figure 9 .1 ( c) shows the charge distribution of a metal n-type semiconductor junction with a
gative surface charge on the metal and positive charge on the semiconductor. This charge
stribution is identical to a p+n junction with a corresponding identical field distribution as shown
Fig. 9.l(d). Similarly, t_he metal p-type semiconductor junction as shown in Fig. 9.2 behaves as
n+p junction. As in the case of a p-n junction, we can now assume that any applied voltage V
pears across the depletion layer. Therefore, the voltase drop in the depletion layer when the
-S junction is biased is given by (Vb, - V), where V is positive for a forward .. biucd junction and
gative for a reverse-biased junction. The energy band dJaarams for metal/n-type and metal/p-type
miconductor junctions under different b' ·~·~
We can now obtain the expressions fol' th
the same manner as used in the case ~
across this M-S junction, the depleti

I 1et /llW"' .,
218 Semi onductor Device : Modelling af/C
Metal/n .. type sernlconducto(
qVb1
v
(a)
q BP
-------c
q (VD( - V,-)
(b)
Figure 9.4
(c)
semiconductor junctions under
I t 0
II t e and metal p· YP .
Energy band diagrams for meta n- yp d b' and (c) reverse bias.
(a) thermal equilibrium, (b) forwar ,as,
. . by
and the electric field as a function of position is given
lt (x)I =

Junction Field Effect Tra · . • 219
~ nststor and Metaf-Semtconductor Field Effect Transistor
. rn for a metal n-type semiconduct . . . . I tr
p11J1 15 . d t d . fl . or Junct10n. At thermal equthbrium (Fig. 9.5a), e ec ons
11ec semicon uc or ten to ow into th . . ~
r tile . e metal and there is an opposing flow of electrons ,rom
l rortl I into the semiconductor. As both h ·
ffleta . . t ese components are equal and opposite there 1 no net
r11e The electron concentration m the . . '
,,~nt
~ n, Ne exp[- (Ee-k;)i,:j•~::c::~[~;,]~ ~:n:~:r~n;ij ~ven (9 .B) by
q (Vb; -
VF)
--- --· EF
j fl'HS > Js-m
_.,.....,_
----Ev
(a)
(b)
figure 9.5 Current transport in 'metal/n-type semiconductor junction at (a) thermal equilibrium, (b) forward
bias, and (c) reverse bias.
The electron current density due to flow
.
of electrons from semiconductor to metal (J
s-+ m
) is
proportional to the density of electrons at the boundary (n ) . 5
Since the electron current density from
metal to semiconductor (J m-+s) is equal to the electron current density from semiconductor to metal
(J s~m ) at thermal equilibrium, we can write
where
C 1 = proportionality constant.
When a positive voltage VF is applied to the metal, the potential barrier for electrons in the
semiconductor is reduced by qVF as shown in Fig. 9.5(b). Replacing Vb; with (Vb; - VF) in
Eq. (9.8), we find that the electron density at the semiconductor surface now increases by
exp(ViJV 7 ) , implying an increase in the electron cun:ent density ls---+m by the same factor. However
since ¢en remains at its equilibrium value, the electron current density from metal to semiconductor
Jm-H does not change. Thus, the net current under this forward bias condition can be obtained as
the difference of these two current density compon.ents given by
(9.9)
(9.10)
Analogously, when a negative voltage -VR 1s
exp{-(VR/V 7 )} while lm-+s does not changQ
obtained by replacing VF with -VR in Eq.

:2~20~~S~e1~11~ic~o~nd~u~c~to~r~D~ev~ic~e~s~ : ~M~o~d~el~l1~ ·n!g~a~n~d~Tl~e~cl~zn~o~lo~gy~~~~------~~~~~-----~--.....
where
A .. = effective Richardson's constant (with unit P.'(K 2 cm 2 )) and
T = absolute temperature.
•• d th " · · d · 1 · about 110 for n-Si and 32 ~
A depen s on e euecttve mass of the earners af. its va ue is . . 1or
p-Si. The current-voltage characteristics of a metal-semiconductor Junction under thermionic
emission condition is therefore given by
where
(9.11)
l, = AA .. T, exp (-~; J (9.12)
where
A = area of the M-S junction.
Thus, we see that for the cases discussed in this section, the characteristics of an M-S junction are
similar to a p-n junction and the junction has rectifying properties.
Example 9.1
A metal-semiconductor Schottky diode (MSl) fabricated on n-GaAs with No = 10 16 cm- 3 has a
reverse saturation current density l s = 5 x 10- 8 A/cm 2 at 300 K.
Solution:
(a) Calculate the barrier height and the depletion region width at thermal equilibrium
assuming A** for n-GaAs to be 4.4 A/(K 2 cm 2 ).
(b) Calculate the minority carrier diffusion current density and show that the Schottky diode
current is mostly due to majority_ carriers (electrons). Assume the hole diffusion
coefficient to be 10 cm 2 /s and a minority carrier lifetime of 1 x 10- 8 s. Also,
Ne = 4.7 x 10 17 cm- 3 for GaAs.
(a) From Eq. (9.12) we can write,

Junction Field Effect Tra •
11
s1sror and Metal·Se111/ o11du to
""hC diffu ion length for hole i
(b) J
given by
L" = .fi5;;;;; :::: l O 8
>< 10- == .16 x 10·4 cm
q. (4. O) we know that for a
:i, 111 •, ex pre ed as,
I '()' IS
long ha e p•n diode, the min rity carrier diffusion curre
J 11 I
qD 1 ,n; 1.6 x 10- 19
J = - ~ >< 3.2 x 1012
P LP ND 3.16 x 1o-4 ><
10 , 6 = 1.62 x 10- rn A/cm2
. 0 g th alue of Js and Jp, we can s h
chottky diode is mostly due ee ~ a~ l s >> JP. Hence, it can be concluded that
enl 1n (
to maJonty carriers.
ll111PM'.
~orf
9.Z·
3
Ohntic Contacts
I are used to make contacts with · . . . A~ • • • 1s,o
ce rneta . . . Vanous regions m a semiconductor u.c;Ylce, 11 t a
'' . nr to ha e M-S Junctions which conduct equally in both directions. Such M-S junctio are
,,ced ohmic contacts. A metaVn-type semiconductor junction may be ohmic when 'Pm < ¢,. The
,II• dia•ram for such a system under thermal equilibrium is shown in Fig. 9.6. A,, can be seen
t,and 1 Fi; 9.6(b), the band bending at the semiconductor surface results in accumulation of
fr0' e
1e1:rron ·
These electrons can easily
·
flow from the semiconductor to the metal. Also, the
b
barrie,- t
11
c
1ecrron
flow from metal to semiconductor is quite small
'
and can be
.
easily overcome
•
Y a sma
be
apphe e . d voltaoe. O In the case of metal p-type semiconductor junctions, ohmic contacts may
formed when

_22_2 __ ~S~P~11~1ic~ ~11=d~1t~f~o~r~D~e~v~i~e~s~ : ~M~o~d~e~l/~1n~g~a~1~1d~Te~c~/,~110~/~o~g:....-~~~-----~---~~--~---------
-C2 (¢0,, - V)]
I ex exp jii;
[
where
C 2 == con tant.
. tor is moderately doped and the
rom ~qs. (9.11)- (9.13), we can ee that when the semiconduc. rectifier. On the other hand
barrier height i large, the metal- emiconductor junction behaves J~ke a , JI the current can fl ow · '
. b . h . ht ,s ma ' in
tf the emiconductor is heavily doped and/or the arner etg
. h . . J'k h ic contact.
e1t er d1rect1on, that 1 , the M-S j unction behav~s
I
e an ° ~ -t e silicon, but a rectifying
or example, aluminium forms an ohmic contact w~th P yp t to n-type ilicon using
ch ttky) contact with n-type silicon. To form an ohmic contac
aluminium, the n-region must be heavily doped.
(9.13
9.3 JUNCTION FIELD EFFECT TRANSISTOR
, . . f pie that occurs as a result of an
T he term field effect' describes the change m conductance o a sam d . .
· d h the conductance mo u 1 at1on 1s
applied fi eld, normal to the sample surface. To understan ow
achieved, let us consider an n-type silicon sample with cross-sectional area A and length L. The
conductance of this sample is given by
G = ....:..q_nµc.....;.;...,,A_
L
(9.14)
Now, the value of this conductance can be changed either by changing A and L, or by changing the
electron concentration 11. In a junction field effect transistor (JFET), reverse-biased p-n junctions
are used to change the cross sectional area of the conducting region (channel). A metal
semiconductor field effect transistor (MESFET) is similar to JFET except that instead of p-n
junction, a rectifying metal-semiconductor junction is used to modulate the width of the channel. In
a metal oxide semiconductor field effect transistor (MOSFET), the carrier concentration in the
channel is varied by applying an electric field . Modulation in conductance by any of the above
method causes a variation in the channel current.
9.3.1 Basic JFET Structure and Principle of Operation
The ba ic structure of an n-channel JFET is shown in Fig. 9.7. The JFET is a three-terminal device.
It consi ts of an n-type semiconductor sandwiched between two p+ regions (gate). The two ohmi
contacts to the n-region are called the source and drain. Let us assume that the cbaft
uniformly doped and has a doping concentration ND while th~ -p+ft$i~~~iilJJPVffi..a

Figure 9.7
Basic structure of a JFET.
Vas= 0 and V 05 = 0. Under these conditions, the channel resistance can be expressed as
L
Ro=--- - ---
2qN Dµ 11
Z(a - W 0 )
(9.15)
L = channel length,
Z = channel width,
2a = total channel thickness,
µn = eleGtron mobility,
q = eleetronic charge, and
Wo = zero-bias depletion width at the p+n junction given by
(9.16)
region width 1s constant throughout the length of the channel as shown in
2: Vvs > 0. Let us now apply a small positive voltage between the drain and the source, V 05 .
r the intlueFlce of the elec;tric field generated between the source and the drain, elec;trons flow
the source to the drain. The direction of the conventional current is from drain to source and
ed the drain current Iv. It may be noted that only electrons (majoFity carriers in the
t~e part in this conduction mechanism. So long as the applied V DS is small compared to
-in potential (Vb;) of the p+n junction, we can assume that the depletion region width
approximately constant throughout the channel at its zero-bias value, W 0 • The channel
· arl¥ constant (= RQ) in this region and Iv increases linearly with Vos·

. ,d Tecllllo,1/to~gL..Y----
224 Semiconductor Devices: Model/mg a, The depletion region width can be
. d in Fig. 9.8(b).
but becomes position-dependent a . depic~ ))owing manner:
expressed as a f unction . o f po L ' t' 10 n in the io
W(x) ==
2£s (V/Jl + V(x)}
qND
(9,17)
G
VGs == O
s
-
n
D
Vos= 0
(a)
s
-
D
0 < Vos = V0sa1
(b)
s
-
D
Vos = V0sa1
(c)
s
D
(d)
Figure 9.8
The gate-channel depletion region widths in a JPET at (i!i')
(c) Vos = V0sa1t and (d) V 05 > ~ ...............
where V(x) and W(x) are respectively the potential drop an
the channel at a distance x from the source end.
Now, the elemental resistance (dR) associated wHh an incn
given by

R=- l J dx
2qµ,,N 0 Z a - W(x)
I
l
Q
~epleti0n region width W(x) is greater than Wi at al'I points in the channel except at
' end it follows that R is larger than Ro. So the cha~nel rresistance increases with increase
and the CllFlient falls below its ini,tial lin ' . .th V corresponaing to a constant
i resistance €= Ro). ear nse w1 vs
$/,IP 4:' Vos,= Vvsat· As Vvs .is f;urther increased, the depletion regions eventually merge~ thereby
'pfnchill8 off the c~annel. Smee th~ depletion width is maximum at the drain end, this has to
occUJT first at the :r~m end as shown m Fig. 9.8(c). Even though the channel ceases to exist (that is,
ti§ thickness has a en t? zero) ~t the drain end, the drain current is sustained as the electrons are
t across the deI1>let1on region by th . . . .1+ •
swep . . . e very high field present m the pmch-0
Th
11 region. e
situation is somewhat simllar to the case of a reverse-biased collector-base junction of a BJT that
is operiating ii~ normal active ~ode.
':I1he dr~I1il voltage at wh~ch. pinch-off occurs (Vosat) can be obtained by putting W(x) = a and
V(»)::: V.osat 10 Eq. (9.17). This IS called the saturation drain voltage and its value is given by
qNoa2
VDsat =
2 s
- v;b. = V - v;b.
E I p I
(9.20)
where
Vp = pinch-off voltage and it is the voltage across the depletion region at the pinch-off
condition €W = a). The pine-h-off voltage VP is expressed by the relation
V = qNoa2
p 2£ s
(9.21)
The regions of operation where V vs < V Dsat and Vos > V Dsat are called the linear and saturation
regions respectively.
Step 5: Vvs > Vosat· If Vos is increased beyond Vosat• all the excess voltage (Vos - VosaJ is
dropped across the pinch-off region. This causes the pinch-off point to shift towards the source as
show.n in fig. 9.8(cd). However, the voltage at the new pinch-off point is still V osat and as a
consequence, the drain current remains almost constant. A small increase in current is observed,
which is due to the effective reduction in the channel length as the pinch-off point moves towards
the source.
Vos :;t 0. Steps 1 through 5 are carried out keeping V GS = 0. Forward biasing the gatene1
junction is usually avoided iF1 OJideF to ensure that ~he gate current is negligibly small. On
er lfland it: Vos is made negative, the depletion Fegion widens at all ;points in the channel and
onel resistance incFeases. 1'1\tus, foF am!}' gh1en Yalue of V Ds, the drain current is now less
~p.emding Ya1ue for Vas=@ V.
'P.. 6:

226 Sem1co11d11c1or Dev,c s: Model/mg and Teir~c"!!_hn~o~l,~ogy_~ ·~----­
O) . faroe enough so that th
1
mJoe. Thi ~ alue o f v • •ol~
for Vo• = 0 V when 1he magnttude of V GS l. GS < .
' V. (he depJet1on region ° Gs ts c 11
aero~ rhe depletion regJOns 15
equal w ,,. . d fi ed as the gate- to-source voJta a ~
0
he thmhold i•oltage cv,. . The threshold ,ollage I e n Since the vohage drop }
h . f>eCorne equal to a. . Cross "'hitt
cause t e depletion region wrd1h W to b. it can easrly be hown th th
deplclron region i• lhe sum of V,,, and lhe apphed reverse ia '
ai
~ = ~ - ~ . ~~
. ·ave (Vp > 0), while Vtti is u
It can be ~n from Eqs. (9.21) and 9.22} that VP 15 post tb express1on for VDsat c SuaJJy a
nega11ve (V,. < 0 vollage. For an applied gale oltage VGs• ;:o Eq. (9.22), we have an now be
obtamed by replacing V,11 by ( Vb, -
VcsJ in Eq. (9.20). Also us o
9.3.2 The 1-V Characteristics of JFETs
V = V - (Vb, - VGs) = Vcs - Vm (9.23)
Ds3t p
Let us at first consider the linear region of operation of the ~T. From the JFET structure shoWn
m. Fig. 9.9(a , in the absence of any diffusion curren~ lhe drain current lo can be expressed as a
dnft current of electrons in the foJJowing form
1
0
= A(x)qnvd(x) = 2[a - W(x)] ZqNovd(x)
(9.24)
Vos
V(x)
Vos --------------------------
Figure 9.9
Source x = o
(b)
(a) The JFET in the linea .
r region of operation; (b)
channel.

e cane
t .be constant thr ·
o.Gluces from th oughout the channel in the absence of recombination.
oe1ty.
.
If we consid
e source
E
to th
e
d
ram
.
en
d
, this
.
must be compensated by an
ertd as shown in Fig ; q. (9.25), this implies an increase in the electric field
9
qs. (9.24) and (9. 2
S) · (b) by th~ increase in the slope of the V(x) curve.
' we can wnte
ID == 2qN DµnZ[a - W(x)] dV dx (9.26)
the expression for W(x) fr om E q. (9.17) while . replacmg . Vb; with Vb; - VGs, we can
IL ID
0 0
V
05
[
dx = 2qN 0 µ 11
z J a _
ng Eq. (9.27) and using Eq. (9.21), we have
lo= 2qN °i"Za [ Vos _ ~ VP {( Vb, - \: + Vos r
2Es (Vb; - VGs + V(x)) ] dV
qND
_(
r}]
VM ~PVcs
(9.27)
(9.28)
e applied drain voltage is very small, that is, V 05

228 Semiconductor Devices: Modelling and Tech110Logy --- -------.
. . . . n differs from that give
However in practice, the current in a JFET in the saturation ieg10 el JFET (solid lines) ~by
h . t' f chann . l h
Eq. (9.30). Figure 9.10 show the actual /-V c aracten tc o an .n- dotted lines). It can bes e
theoreucal plot are al o included in the ame figure for compan ~n ( ses slowly with the d~n
· d' d b t
that for Vos > Vosat• lo t not really a constant ~s pre icte u
increa
A already pointed ou~
rain
.
5
voltage. This i due to the reduction in the effective channel length. urce. Thus, the distWtth
increase in V b d V h · h ff · t h'ft t ds the so ance
DS eyon Dsat, t e pmc -o potn s 1 s owar L Therefore, although
between source and pinch-off point is now less than the channel length d · to this reduction . the
voltage at the new pinch-off · potnt · 1s · fixed at V Dsnt• t h e current · mere ases ue tn the
effective channel length.
1.2
1.0
I
i
1
0.8
~
.s
..,s> 0.6
- 0.5 V
--------------------------------- -- - ----
0.4
0.2
-1 .0 V
-1.5 V
----::_:_-=-=:-==-:tr
-2.0 V
~-------------------------------------
_______ _
'-------------:-r_=----------
- ----------------------- -2.5 v-------------
0
2 4 6
Vos (V)
8 10 12
Figure 9.10
Actual current-voltage characteristics of an n-channel JFET (solid lines) and theoretical plots.
showing constant current in the saturation region (dotted lines).
For high values of Vos, avalanche multiplication of carriers '
causes an increase in the drain current. The electric field in this regj
with an increase in Vos· This can cause secondary electron-hole
the increase of drain current by a factor M called the avalanche
similar to the collector current multiplication that occurs in th
Finally at a particular value of Vos, the avalanche breakdown
occurs and the current increases abruptly as shown in Fig. 9.
voltage across the gate-channel junction at the drain end must
the junction. That is,

*rs
section, we have seen th t
fbin small signal drain an~ the drain current is d
vding de values, Vos and V gate Voltages, vd and ve~;dent .on the gate and drain
e small signal component ThGs, the resultant drain cg, sp~tl~ely are superimposed
. e small signal d . urrent is given by iD = (ID+ itt),
. a I
ram current can now be expressed as
+ a1D
'd = avD
DS Vd d V -
Vos VGS V g-gdvd+gmvg (9.32)
----
olv
is the channel condu t
- oVvs v c ance (or d · a1
GS
ram conductance) and g = _D_ is the
m aVGS
md,uctance.
vru
ml values of V DS, gd can be directly eva} d .
uate by differentiating Eq. (9.29) as
DS
gd = G0 [ I - ( Vb; ~P Vcs r]
(9.33)
e saturation region, gd . is close . to zero as the drai·n c urrent 1s · a 1 most constant at I and 1 · s
ndent of Vos· By differentiating Eq. (9.28) with
r
respect to V
Dsat
os,
r]
we get
Km= Go [(VM- \ + Vvs -( VM ~PVcs (9.34)
1 values of Vos (

trate is semi-insulatiAg (SI), that
\L'
~re.,, a MESRET on GaAs. 1'he su 8 • d by dopir, 1
g GaAs ·
gb (> H> 8 ohm-cm). Th1is is usHad1Y ~chiev; of lightly doped n-o:•th
, oped mateFiat. On this Si sMbs~ate, a ~ ,J[!l ~a; er can also be formed As
to form the channel. Instead of epitaxy, this n 1 i tact on the g t by
fimic contacts on the source and drain and Schott /dy c.on d Al +o a e are
. . . + Ol!lFCe ram an 1 r gate. To
1ting suitable metals, for example, Au-Ge 1 1 or s . d t · the s /d .
centact format10n, . n+ implantation may also b e c arne . ou m · ource h' rain
fuetal depos1t10n. · · Since mo diffusion is mvolve . d , geo metnca 1 to d
1 erance . h' h 1s f very igh
\1ESFETs can be made. Consequently, these d ev1c · es are use m 1g requency
Semi-insulating GaAs
(b)
'pn of the MESRE:1' is qNite similar to the JPET discussed in section 9.3. However,
l geometry of MESFETs necessitates a variety of modifications to be made to the
JFET operation in order ~hat it may be used for MESFETs. The most common
to the increase in the electric field ( l") with reduction in the channel length. In
· pti~n of a constant mobility is no longer val id and an approximation for the
Y.d = µn

MESFETs, MES 1 and MES2 use metal-semiconductor Schottky diodes similar to MS l
1~ 9.l as their gates. The channel thicknesses for MESI and MES2 are 0.2 µm and
.4 µm respectively. Calculate tlile threshold voltages for both MESFETs.
o'lulion:
From Example 9.1, we already know that the value of Vb; for this Schottky gate is
.672 V. From Eq. (9.2t), for a MESFET with channel thickness a, we can write
V = qNo a2
p 2£_,.
V =
rom Eq. (9.22) we get,
1.6 x 10- 19 x 10 16 x (0.2 x 10- 4 ) 2
p 2 x 13.l x 8.854 x 10- 14
= 0.276 V
Vt11
= vb, - vp
= 0.672 - 0.276 = 0.396 V for MESl
1.6 x 10- 19 x 10 16 x (0.4 x 10- 4 )2
V
p = 2 x 13.l x 8.854 x 10- 14
= 1.1 04 V
vth = \l'.bt - vp
= 0.672 - 1.104 = -0.432 V for MES2
w.e see that MES 1 is a normflllY 'off' (enhancement type) device while MES2 is a
n' (depletion type) device.

Source
Drain
Gate
n• AIGaAs
Undoped AIGaAs
"' .... ,. ,.•. s.,s,,,,,.-.-.: ..c>..'" ~ c:x
"' · - · / . - · ~ -- · , J ___.,,
2-DEG
Undoped GaAs
SI GaAs
(a)
Metal
AIGaAs
GaAs Energy ( e V)
Ev
(b)
Ee
fracture and (b) energy band diag ram of an AIGaAs/GaAs HEMW.

a . ' gm in 'the saturation region is equal to the 8d in the linear region for
~ ga~ ~ltage.
channel JFET with ND = 10 16 cm-3, NA = 10
19 cm-3, a = 1 µm, L = S µm,
P.,m, and µn = 1200 cm 2 1Vs, find (a) pinch-off voltage, (b) threshold voltage,
Dsat at Vas= O V, (d) /Dsat at Vas= 0 V and (e) gm in the saturation region at Vas= O V.
n n-channel GaAs MESFET has the following parameters:
fan = 0.9 V, ~D =_/0 17 cm-3, a = 0.3 µm. Calculate the threshold voltage assuming
Ne = 4. 7 x 10 cm .
REFERENCES AND SUGGESTED FURTHER READING
[l~ Cowley, A.M. and S.M. Sze, Surface states and barrier height of metal-semiconductor
system, Journal of Applied Physics, Vol. 36, p. 3212, 1965.
[2] Sze, S.M., Physics of Semiconductor Devices, 2nd ed., Wiley, N.Y., 1981.
[3] Streetman, B.G. and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice Hall, New
Jersey, 2000.
[4] Shur, Michael, Physics of Semiconductor Devices, Prentice Hall, New Jersey, 1990.

MOSFEts
. t ears are due to its ability to incorporat
ilj,id sirides of the semiconductor industry tn. recen y d · inteorated circuit (IC) M e
and Jililore eevices operating at higher and higher spee s 1 ~ an e
· MOSFET) ircu1ts occupy 1 ess s1 .1. icon area · etal a r1
~emicon.cduetor ro::r.n field effect . . transistor ( k' c o them the 1 .d ea 1 c h 01ce . f or very la nu
ume
·
less :power than thetr
·
b1polaf
·
counterparts,
h MOSFET
ma me
is by far the most widely
.
u
rge
d
e integrated (VLSI) ctrcmts. In fact, t e . . se
jconductor device today and is used in fabrication of central . process mg umt (CPU) and
Off!"' in computers, Sigital signal processors (DSPs) for cornmun1cat1on purposes, and !Cs for
ariety of other applications.
In this chapter, we shall discuss the operating principles of the MOSFETs and develop
f.~ous models for their cl!lrrent-voltage (I-V) characteristics. Figure 10.1 shows the cross-sectional
iew of a MOS'FET, wbiich is a four-terminal device. The terminals are the ource (S), the drain
), ·the gate (G), and the bulk (B). As we can see, at the heart of the device is a metal oxide
:Sernicondu~tor ~MOS) ~tructure, . from which the MOSFET deri ves its name. For proper
i,afulerstandmg of the device operation, we shall at first take up the two terminal MOS diode for
ussion, followed by the MOSFET by including the additional source and drain term inals.
Cross-sectional view of a four-terminal MOSFET
234 .

Ohmic contact
Figl!lre 10.2
Cross-sectional view of a two-terminal MOS diode.
function of the semiconductor material ( ) 5
is dependent on the doping
ooncentration and cafl be calculated from the position of the Fermi level with respect to the bottom
e, eonduction band. Thus, for a p-type semiconductor, s can be expressed as
(10.1)
f = electron affinity,
= baad gap of the semiconductor,
= electronic charige (= 1.6 x 10- 19 C), and
th .pnergy difference between the Fermi level and the intrinsic level E; given by
~B/v.
'PB= Vr
NA N :::: "'.. e r
}J,l --;;-
( ) !A i (10.2)

Eg
- = Ll V
q
1 x 10 16 )
¢ 8
= 0.026 In
(
10
= 0.35 V
1.5 x 10
"' _ -v.:
+ Eg + ¢ 8
= 4.05 + (.!.:!J + 0.35 = 4.95 V
'f's - ~s 2q 2
Operation of the Ideal MOS Diode
s at first consider an ideal metal-SiOz-pSi system, which may be defined as a system which
es the following conditions:
The metal work fanction (i/>m) is equal to the semicoaductor work function ( m - t/>,) = t/>m -[ X, + :; + t/>n] = 0

(10.3)
·- ----
.
II
--- -------
"' qx;
Egl2
- ----------- E·
qq,8
I
EFs
r------Ev
11(
:,
Eg/2
---
·~
.~-------
·~ qq,g
- Ee
{a)
Figure 10.3 Band diagram of an ideal MOS diode at VGa = o v drawn using (a) m, Xsio2' Xs and
(b) 'm, X~-
(b)
Similarly, the silicon-oxide barrier energy is the energy required to move an electron from the
silicon conduction band to the conduction band of the oxide and is given by qX~ where
X~ = Xs - Xsio2 (10.4)
It must be noted that ¢;n and X~ are constant for a particular material system and do not change
with the application of bias. As it is more convenient, we shall use the constants 'm and x~ to draw
the band diagrams in this chapter.
Ideal MOS diode at VaB > 0: Figure 10.4 shows the band diagram of an ideal MOS diode with
· applied bias V GB > O V. The applied voltage V GB is the sum of two potential drops-l/fox• which is
dropped in the oxide and 'l's• which is dropped in silicon. This is reflected in the figure with a band
bending 1/fox in the oxide and 'l's in silicon. A point to be noted in the figure is that the metal Fermi
level EFm is at a lower epergy level compared to the Fermi level in the semiconductor EFs by a
value qV GB· This is because the metal is at a higher potential with respect to the semiconductor by
Vds volts. (Note: The energy band diagram reflects the electronic potential which is the negative of
6l~trostatic potential.) We shall show that this is indeed true. Adding up the energies in the band
mn we have
Eg , E ,w
Er,_m + q

Egl2
----- ------ 'E,
~(PB
If---...+--- E,;s
.---,1---Ev
Figure 10.4 Band diagram of an ideal MOS diode at VGa > 0 V.
eal MOS diode, we have q;n = q

Using Eq. (10.7),
Pµ, = Ppo exp (-:,,) = 10 16 exp (- 1 ii) = 2.1 x 10 14 cm- 1
- n; (V's) = (1.5 x 1010)2 ex ( 100) = 1 x 106 cm-3
nps - exp v: 16 p 26
Ppo T 10
JtJow, = q(ND - N; + P - n) = 1.6 x 10- 19 (-1 x 1016 + 2.1 x 1014 - 1 x 106)
= 1.6 x 10- 19 (-0~979 x 10 16 ) = -1.566 x 10- 3 C/cm 3 ~ -q~A
(ii) For V's = 200 m V
sing Eq. (10.6),
Pµ, = p po exp (-;, ) = 10" exp (- 22060)
= 4.56 x 10 1 '.! cm- 3
ing Eq. (10.7),
n~ (V'·) (1.5 x 1010)2 (200) = 4.93 x 107 cm-3
nps = -' exp - =
Ppo Vr l
016
exp 26
- ) - 1 6 x 10-19 (-1 x 10 16 + 4.56 x 10 12 - 4.93 x 10 7 )
.......... .-... = q(N 5 - NA + P - n - ·
= 1.6 x 10-19 (-0.9995 >< 1016) = -1.599 x 10-3 C/cm3 ::::; -qNA

w ==
2£ 5 1/fs
qNA
(10.9)
. . h depletion layer width W increases.
~ tential mcreases, t e . d
Therefore, as the semiconductor sur1ace po . er unit area in the sem1con uctor, Qs,
From the depletion approximation, the total charge density p ·t area in the depletion layer. This is
is approximately equal to the number of acceptor io~s p~r unb1
d ·ty Q and 1s given Y
often referred to as the bulk charge ensz a,
Qs ~ Qa == -qNAW ==
-qNA
(10.10)
:From the above ~uation we see that the semiconductor charge also increases :'ith l/fs·
We shall n~w evaluate the potential drop across the oxide l/fox. co~resp~ndmg to a drop of I/ls
·n the semiconductor. For this purpose we shall use Gauss law, which 1s wntten as
g> D · ds = J p · dv (10.11)
s
wliere the electric displacement vector D is related to the electric field ~- through the relation
. e = e8 under static conditions.
""· Gauss law states that the total normal electric flux coming out of a closed surface equals ~e
;ft ch,rge enclosed by the surface. Let us consider Fig. 10.5, which shows an imaginary Gaussian
sdtrace enclosing part of the MOS capacitor. The electrical field lines originate from the positive
cbilrges in the gate and terminate on the negative charges in the semiconductor. Deep inside the
~conductor, the electric field goes to zero. Hence, there are no flux lines coming out of tqe
~m. of the Gaussian surface. Also, there are no flux lines coming out of the sides, sin~
' fiel~lln~r,1;1n paral~el to th~m. The o?ly ~u~ lines intersecting the Gaussian surface.
If ''lox ts the electrtc field m the oxide (1t ts a constant since there is no charge 1
assuming unit surface area, from Eq. (IO.I I) we have
vol
Eox 8ox = -Qs

e showlmg the ct.i
lines eut the lmagina ' arges and electrilc field lines at v Gs > (i) v. The electric field
ry Gausslarn surface only at tlile top.
of the oxide is t 0
x, then ti @r a driop of ll'ox across it, we have
. ill Eq. (10.12), we have
(10.13)
Eox . th
Cox = - IS e oxide capacitance per unit area.
lox
· JbF applied voltage V GB is the sum of the potentials dropped in the oxide and serni'conductor,
e may write using Eqs. (10.10) and (10.13)
v.
qNA W ~2qNA£sl/fs
GB = 1/ls + I/fox = 'l's + = V's + (10.14)
c:OX
c:OX
1*om ;Eq. (10.14), we see that as lf1s increases, VGB increases. Conversely, as Vas increases,
ffi f//ox and 1f!s increase. With the increase in 1/'s, the band is bent further, and when 'l's =

(b
r and charge distribution in the semiconductor at the onset of strong inversion.
n(x) d,J
~ ID the depletion region and the electron charge [ Qn ~ - q l
the electron concentration at the semiconductor surface. For '1/fs :$ 2¢B, we have
Q 0 . This is because, in this range Qn

3_ x l 1.9 X 8.85 x 10- 14 x 0.7
1.6 x 10-19 x 1016 = 0.304 µm
.. E0 x 3.9 X 8.85 x 10-14
(u) Cox = - = ----=-:....:......:~
tox 1000 X 10-8 = 3.45 x 10-8 F/cm2.
From Eq. (10.16),
~2 x 1 6 19
(Vi11) ideal = 2 X 0.35 + · X lO- X 10 16 X 11.9 X 8.85 X 10- 14 X 0.7
3.45 x 10-8 = 2.11 v
Alternately at v GB = (V th) idea),
Therefore,
= 1.6 x 10- 19 x 10 16 x 0.304 x 10- 4
= 1.41 V
3.45 x 10- s
(Vth) ideal = lf!ox + lfls = 1.41 + 0.7 = 2. 11 V
How does V th depend on NA and t 0 x?
. : HELP DESK 10.1
The threshold voltage Vth fa1creases with increase in NA since both lfls (= 28 )
l/lox (s= 42qN 'A es (2 ) 8
I Cox ) at threshold increase with an incFeas© in NA- With increase in ;ox• the
value of Cox decreases and consequently lflox increases. Hence, V th also increases with increase
(; .
and

t --------
Q'l's .f -""---r---- Ee
Eg/2
, ... __ _ ----- - - --- E;
qa
- - - - ---1--...L..---- E Fs
...____
____ Ev
Figure 10. 7 Band diagram of an ideal MOS diode at V Ga < 0 V.
[in short, when V GB = 0, 1/ls = 0 and the bands are fl at giving rise to the flat band condition.
application of positive voltage on metal induces negative charges in the semiconductor.
ally this is due to holes being repelled from the semiconductor surface. On further increase of
rs, ttle negative charges are due to the minority carrier electrons, which are attracted to the
· onductor surface and remain there, as they cannot cross the insulator. When O < lfls :::; 2¢ 8 , the
· onductor surface is depleted of carriers giving rise to the depletion co11ditlon. The region of
er:ation (/) 8 < lJls ~ 2

qt/Im+ qVfox = q¢> 8
+ ~ _ ,
2 q V's * qzs = q

Vps = 0, that ts, for the depletion or
condltions, Va 8
> VFB· So, to get the identical condition in the semiconductor as in the
e, an extra voltage of V FB must be applied. In other words, wherever we have V GB in the
s of id~ diode, we may use VGB - VFB• or we may write
VGB -
Qs
VFB = 'l's - C
OX
e condition that 'l's = 2q, 8
when VGB = Vt11, we have from Eqs. (10.10) and (10.20),
(10.20)
(10.21)
· . 10.S(a), we see that when V GB = 0 V, there is a potential drop across the oxide as well as
'conductor, that is, I/fox * 0 and 'l's * 0. Is it not possible to account for the work function
ce by 'f//ox alone, so that 'l's = 0, and the flat band condition exists?
it iS' net p.ossible to manage the work function difference by I/fox alone. From Gauss law
[)], we know that in the absence of any charge in the oxide, any electric field in the
~esult in a corresponding electric field in the semiconductor. Thus if &'ox * 0, an electric
®.,Cenductor must exist so that 'l's * 0.

E
---L 2q -- "'
'l'B = -0.55 - 0.35 = -0.9 V
Vth = V'FB -f (V. \
thll ideal = -0.9 + 2.11 = 1.21 V
Operation of MOS Diode w"th ~ 1 · 'l'ms *' O, Q 0 x -:/:. 0
tion to the metal-semiconductor w . .
oe of traps at the semiconduct _ . ~rk funct10n difference, another non-ideality is the
s and charges and their loc t'or oxide mterf~ce and charges in the oxide. The different types
a ion are shown m Fig. 10.9.
Oxide trapped
charge (0 01 )
\ ~ ~
@ Mobile ionic
© charge (Q~)
+
t
Interface trapped
charge (Qi 1 )
Fixed oxide
charg} (Or)
[±] ffi
Si
Figure 10.9 The different types of traps and charges and their location [1].
~ silicon surface is a discontinuity in an otherwise periodic crystal lattice. From quantum
Infos, it can be shown that the discontinuity at a clean semiconductor surface gives rise to a
Bltr- of allowed states in the forbidden gap. These surface states are due to the unsatisfied
ent bonds at the surface (also known as 'dangling bonds'). The density of the surface states is
lhe density of the dangling bonds, i.e. about 10 15 cm- 2 . On oxidation of the surface layer,
th:e surface atoms are bmmd to oxygei:1 resulting in a sharp reduction of the density of
e interface of silicon and its oxide to about 10 11 -10 12 per cm 2 • In a silicon surface of
mi~ntation, the i11terface state density is a.bout an order of magnitude smaller than in < 111>.
~'et ices are fabricated oR sHicon subswates which have orientation. A low
"€?)' hytlr.ogen anneal is often used to reduce the delilsity of states farther by ffle
liends at the interlace. These Ynt¢rfac-e }tafes- r.esicle within 25 A of th:e Si±-sl~2

Interface trap demsity, 10 11 cm- 2 eV- 1
(!) 2 4 6 8 10
I I I I I I
Conduction band edge
o.--~...:..::..--===--~~~~--i
0.2
> 0.4
Q)
~
e>
a>
c
0.6
w
E;
0.8
1.0
1.1 L.__.-==::::::::::::::==--_J
Valence band edge
Figure 10.1 O A typical distribution of D it in the band gap of silicon [2).

== -~xo = - QOX Xo = - QOX Xo
eox cox tox
p
p
Oox
0 tox
Oox
x 0
fox
Metal
Xo x
Metal
Si
Oxide
e
€
0 x
x
(10.22)
---Ee
---E;
EFm -----1- - - - - -~--EFs EFm
Ev qVFa
t--------Ec
t-------E;
-+-------EFs
Ev

lo,
Qm = - 1 J x pm(x )dx
lox
0
(l0.25a)
Q 01 = - 1 -
lo,
J x p 01
(x) dx (10.25b)
lox
0
a MOS diode with ms =I= 0, and non-zero values of Qr, Qnv and Q 01 , using Eqs. (10.19),
fL0.24), and (10.25), we have
(10.26)
be noted that Qm and Q 01 do lilOt represent the total mobile and oxide-trapped charges,
, but an equivalent charge, which when located at the Si--Si0 2 interface would have the
M the actual charge distribution. Equation (10.26) is a general expression for the flat
g,, and the threshold voltage can be calculated by substituting the value of VFB in
~
I is similar to MD3, except that MD4 has a fixed oxide charge density given
""' 2 , while Qm = Q 0 t = 0. Calculate the threshold voltage.

V and W max = 0 30
·
4 µm (Example 10.3) and for MD3, ¢ms = -0.9 V
l , (10.26), and (10. lS)
;1.6 x 10- 19 x 8 x 1010
cox + (2 x 0.35) + 1.6 x 10- 19 x 10 16 x 0.304 x 10- 4
COX
C cox
ox - -
t
= 3 x 10- 8 Fl cm
2
ox
1 ox =
3.9 x 8.85 x 10- 1 4
3 X 10 _8 = 1.15 X 10-5 cm= 1150 A
-V Characteristics of the MOS Diode (Capacitor)
t use the current-voltage ([-V) characteristics to characterize a MOS diode, since no
s through the diode in the steady state. It can, however, be characterized as a capacitor.
MOS diode is mostly referred to as a MOS capacitor. The capacitance-voltage or C- V
· tics can therefore be used to obtain a lot of information about the device. A typical
ot setup is shown in Fig. 10.12. A de bias (Vc 8 ) is applied to the MOS capacitor. The
meter measures the capacitance by applying a small ac voltage (typically 50 m V) on
de bias and measuring the reactive current. By changing the de bias using a ramp
plotting the capacitance as a function of de bias, the C-V plot is obtained.

-----------,
~~H-.---,,
--------., t
1:1--------....J
I •------------------
---------1 I I --------------------~
-------- ___ ,
r.ma:.i~·,p ~---+t--r---~1
y
setup to measure tf:le capacitance-voltage ( C-V) characteristics of MOS capacitors.
(10.28)
- dfls and
d'f/fis
~uivaleat circuit of the MOS capacitor as shown in Fig. 10.13 consists of two capacitors,
Cox in series. Of the two capacitors, C 0 x is a constant for a particular MOS capacitor while
endent OR bias. We shall roow discuss the nature of the C-V plot in the different regions of
G
1
Cs
I
Cox
--,,---

'l!h'I Hepletion region: V FB < v 08
< v.h; 0 < Vis ~ 2 t/!n
aepletioa coadi~ion, the semicondliletor charge is composed mostdy, of the uncovered
~ acceptor i@Rs and is given by iEt!j. (H!U O). J Jiierefore, we have
c, = - dQ, = J qN,e, = e ~ = !:!.- (10.29)
dl/fs 21f!s s ~ ~ W
Thus, the capacitance is tJiie same as that of a pn junction depletion width w or a capacitor having
two metal plates separated by a distance W. Hence, from Eqs. (1 0.28) and (10.29), we have
1 1 W
-=-+c
c ox es
(10.30)
Now, as Van increases, W increases and therefore C reduces. At threshold voltage, that is, at
Van= Vth, the 6lepletion width is maximum or W = Wrnax, and the depletion region stops expan~ing
further. Therefore, the capacitance per unit area reaches a minimum value (Crrun) at Vea = Vth given
by
1.ihe variation of capacitance with applied voltage is shown in Fig. 10.14.
( 10.31)
Cl Cox
Accumulation
Low frequency
High frequency
Deep depletion
~ ~~~~-±--t;~..;._~~~ ~~~VGB
O Vih
Jitw ~V characteristics of MOS ca19aoltors smowlng tine meas~~ements at low frequency (lF)~
·~-"'!ll>~r.:.'., hl,gh frequency (HF), and deep depletlon (DD) cor.1d1t1ons.

...... ~ + o.304 x 10- 4
- 3.45 x 10-s 11.9 x 8.85 x 10- 14
Cmin = L73 x 10-s :F/cm 2
c c c w
sing Eq. (10.31), ~ = _Q!_ = 1 + ox max
Cmin Cmin Es
~:etion width W ma"' decJ'eases with increase in NA- Also, with increase in t 0 x, C 0 x decreases.
m.erease in either NA or t 0
x results in a decrease in the (C 111 axfCrru 0 ) ratio.
· often useful to have an expression showing the variation of C with V GB· Substituting the
Js and Qs from lEqs. (10.9) and (10.10) in Eq. (10.20), we have a quadratic equation in
~
(10.32)
(10.33)
1 ;,+. 2C~x (VGB - VFB)
qNAes

Slope
1 2
C'2
A2qt:sNA2
NA1 > NA2
2
A2qt:s NA1
~--------~ VGa
(1/C' 2 ) versus V GB plots for two diodes having different substrate doping concentrations.
A. point to be noted is the effect of VF 8 on the C- V characteristics. From Eq. (10.34), we ee
depends on (V GB - V p 8 ) , that is, if we have two diodes with identical N A and C 0 x but with
tent flat band voltages, the capacitance per unit area will be the same at the same
FB)· Suppose the capacitance per unit area of an ideal MOS diode (that is, V FB = 0 V) at a
V 681 is C 1 • Then a MOS diode having identical N A and C 0
x will have the same capacitance
it area (C 1 ) at an applied voltage of (VGnI + Vp 8 ), since the value of ( VG 8 - Vp 8 ) for both the
is VGBI· This implies that the C- V characteFistics of a diode wi th Vp 8 * 0 V will experience
el shift of V FB with respect to the corresponding ideal diode curve. The C-V characteristics
y.ch diodes are shown in Fig. 10.16.
uong inversion region: V GB > Yth; 'l's ~ 2 tf>n

generation/recombinatim1 processes are extremely slow. For example, in a
ted on a sign quality silicon substrate, it may take a few seconds for the
orm after it is biased in the strong inversion condition. (This problem does not
w.llere electrons can be drawn from the n+ doped source region). So we see
Ute measurement cm1ditions, we may get different C-V plots in the strong
as follows:
o.w frequency signal (few Hertz) is used to measure the capacitance and V GB is
nged slowly. Due to the ac signal on the gate, the semiconductor charge should also
at the same rate. In this case, the electron concentration in the inversion layer is
e to change with the applied small signal. Since C 5
is extremely large, the use of Eq.
0.28) shows that C = Cox· So the capacitance increases to the maximum value as
own in the LF plot in Fig. 10. 14.

-----,-------·
C min
Figure 10.17
0 +
VGs(V)
Comparison of the natur 0 f C
~ - V plots obtained from our analysis (dashed line) with those
obtained experimentally (solid line).
c~V Plot for Qit '* 0
We have already seen that the C- V characteristics of a MOS capacitor are shifted by V when
-.I h h . . FB
compaFcw t0 t e c aractenstics of the corresponding ideal device (Fig. 10.16). When the fixed
oxide charge density is Qr per cm 2 , the resultant shift due to it is equal to - Qr/Cox· The presence of
interface trapped charge, Qit, has a similar effect, giving rise to a shift of - Qi/Cox· However, there
are certain differences. While Qr is always positive, Qit can be either positive or neg~!ive,
depending OFl whether the states are donor-like or acceptor-like. Also Qr is fi xed and does not
depend on bias and thereby it results in a parallel shift from the ideal C-V curve. On the other
hand, Qit changes with bias and hence the shift from the ideal C- V curve changes continuously
from the accumulation to the inversion condition. This can be clearly understood from Fig. 10.18,
which shows a p-typc silicon substrate with acceptor-like states distributed at the sl!lrface. We
assume that all states below the Fermi level are filled giving rise to negative charges, while all the
states above the Fermi level are empty and therefore neutral. As shown in Fig. 10.18(a), when the
'...SiliCQll surface is in accumulation, some states near the valemce band lie under the Fermi level,
swing rise to a small amount of negative chaFges. As we move t@wards inversion, the bands bemd
~nw.ards, and more and more states aFe filleGi as shown in Fig. 10. ~8(b). The rest!ilting C- V
!C (Eig. 10.19) shows a very small positive shift in accumulation, gradually increasing to a
value in inversion. The threshold voltage of the MOS device is increased as the
~ p0sitive charge on the gate is balanced by increasing Qit rather than increasing Qs. This
~ e reasons why it is almost impossible to create aR inversion layer in GaAs, which has a
'ty of acceptor-like surface states.

c
Acceptor-like
, interface states
',,,/
' ' ' ' ' ' ' ' ' ' ' '
Ideal (no
interface states)
_ _____ L---------~ VGa
Figure 10.19
Shift in C-V plot due to surface states.
e~~ shows a perspective view of a four-terminal n-channel MOS1'""'ET and the respective
Jt! t>r m-channel and p-channel MOSFETs. In addition to the MOS structure, the MOSFET
~ + diffused source and drain regions. The space separating the source and drain is called
q~ the MOSFEr. Figure 10.20 also shows the important parameters of the MOSFET,
~ artnel length L, whichl is the distance between the two p-n junctions, the channel
gate 0xide thickness t 0 x, the source and drain junction depths r 1
and the substrate
ttation NA· In this section, we shall use these parameters to develop n-channel
ls. A p-channel MOSFET has p+ doped source and drain regions and an n-~
all the analyses in this chapter are for n-channel MOSFETs, they can
MOSFETs by changing the polarity of the terminal voltages. In M
usually referred to with respect to the somce. We shall be foll
apter, that is, the model equatJkms will be de¥eloped with :re

(a)
G 518
n-channel MOSFET
D
._, J
p-channel MOSFET
(a) Perspective view of a four-terminal n-channel MOSFET and (b) symbols for n-channel and
P-channel MOSFETs.
(b)
Let us first qualitatively discuss the operation of the MOSFET. The MOSFET consists of two
""''IKff junctions connected back to back. We · have already seen in the discussion for a MOS diode,
• when the gate-to-bulk voltage exceeds the threshold voltage (that is, VGB > Vm), an inversion
layer is formed. An inversion layer is also formed in the MOSFET channel, when its gate-to-source
ltage exceeds its threshold voltage (that is, V Gs > V t1J It may be noted that the threshold voltage
r a MOSFET need not be the same as the value for the corresponding MOS diode, as in one case
· is referred to as the gate-to-source voltage while in the other it is the gate-to-bulk voltage. When
rJ;S < V th• the MOSFET channel is either accumulated or depleted and there is no conducting path
tween the source and drain. When accumulation condition exists in the channel, the only current
hich can flow is the reverse leakage current of the p-n junction diodes. When the channel region
is depleted, a diffusion current exists, with electrons flowing from the source to drain under the
• ce of a concentration gradient of electrons. This current, called the subthreshold current,
exponentially as Vas is reduced below V tlr The subthreshold current is discussed in detail
f next chapter.
\vhen V GS > V th• the silicon surface is inverted and an n-type conducting channel exists
the n+ source and drain regions. Now if a positive voltage is applied to the drain with
the source (that is, VDs > 0), electrons flow from the source towards the drain under the
of the electric field. The above-threshold current in MOSFETs is therefore primarily a
ebt. 'J;he inversion layer behaves as a resistance a~d ~ Vvs·is increas~ ini.tially ~m O V,
current I increases linearly. This is shown m Fig. 10.2l(a). Wtth mcreasmg Vos,
tirte!-voltage (I- V) characteristics deviate from linearity. This is because, with
...., .._,\...........
. IA, , fixed v Gs, the voltage ~crpss the oxide and conseguently the cl~b
pm ffl~ $ ·m e dta p of tije t anncl.

lo
l0sat
~ ----
Depletion region
(b)
(c)
Figure 10.21
Various regions of operation of a MOSFET.

Increasing V Gs
Figure 10·22
2 4
Drain bias (Vos)
1- V characteristics of a MOSFET.
We shall now ~roceed to develop analytical expressions for the J-V characteristics of
©SFBTs. Before takmg up the derivation of expressions for the drain current, we shall discuss
- ut the threshold voltage V th, which is one of the most important parameters of any MOSFET.
Threshold Voltage of MOSFET
a MOSFET, since all voltages are measured with respect to the source, the threshold voltage is
ured as a particular value of gate-to-source voltage and not a gate-to-bulk voltage as in a MOS
~e. The threshold voltage (Vth) of a MOSFET is defined as the value of the gate-to-source
voltage which is just sufficient to produce a surface inversion layer when VDs = 0 V.
Due to the application of a substrate bias with respect to the source and drain, the channel
region is no longer in thermal equilibrium. For an n-channel MOSFET, V BS is usually less than or
ual to zero, (V 85 ~ 0), that is, the source and drain junctions are reverse biased, to avoid the
rw. of a substrate current. We have seen earlier in section 4.3.2 that in such a situation, the Fermi
~l splits into the electron and hole quasi-Fermi levels separated by an energy (in eV) equal to
a~plied bias across the p-n junctions (in V). For a reverse bias of iVR, the electron quasi-Fermi
EFn moves down in the p-region, and at the edge of the depletion region, (Ep - Epn) = qVR,
EF is the Fermi level in the bulk.
a MOSFET, considering the p-n junctions at the source and drain, we have
EF - EFn = - qV 8 s and
EF - EF11 = q(Vvs - Vas)

EFm--'--l
-----Ee
----------- E;
/______ Q¢B 'f=Fp
-- __ V._i_ /" ,,. Ev
-q BS
- __ ,.,/___ -------------------· EFn
q¢a I
Band diagram in the channel region of a MOSFET at threshold condition.
N
A -
_ (EF + qV85 - E; + ql/fs )
n. exp
I
kT
Ep - E; + qWss + \//,) = kT In ( :; ) = qi/) 8
= ~
I
V's = 2

AVth=V.h-V I
t tho == Y('\J2

charge model (Level 2 in SPICE)
r region characteristics. Let us at first derive a relation for the l-V characteristics of a
FET in the linear region of operation, that is, when a continuous inversion layer exists from
urt e to the drain end of the channel. To help us in deriving a relation for the drain current
t u, define a quantity Vc 8 (y), which is the channel voltage with respect to the bulk at a
ce y from the source. When a drain voltage is applied and a current flows from source to
Vea also varies continuously from source to drain. At the source, V CB = - VBs and at the drain
..- V,as· The electron quasi-Fermi level at the semiconductor surface, EFn• also varies
}y from the source to the drain and is related to V CB by the relaion EFn(y) = EF -
~ ms ean be understood by considering a p-n junction at the semiconductor surface
~t-t}me inversion layer and p-type bulk which has a reverse bias of V cs· This
• [g d~w.n by q V cs with respect to EF.

------Ee
Band diagram for a MOSFET in a direction normal to surface at a distance y from the source.
To compute the magnitude of the drain current, it is necessary to determine the amount of
mobile electron charge in the channel. Using the relations derived for MOS capacitor and taking
ri:Y) = 2tp 8 + Vcs(y), we shall now calculate the mobile charge density at a distance y from the
soJJCce. F.rrom Eq. (10.20), the total charge density can be calculated as
Qs(y) = -Cox [Vas - VFB - 2s - Vca(y)]
(10.42)
Using Eq. (10.10), the bulk charge density is given by
(10.43)
lectron charge density Q,,o,) is now obtained as the difference of the total charge and the bulk
Therefore,
Qn(y) = Qs(y) - Q9(y)
= -Cox [VaB - VrB - 2B - Vcs(y)] + ~2qNAes [2s + Vc9(y)]
= -Cox [VoB - Vps - 2(/>9 - Vos(y) - r~2(/,B + Vcs

(10.45)
X,.,,, d V, (y) XJ',nv
ln6') = Z J In (x, y) dx = - Zµn ~~ qn(x, y) dx
0 0
= Z Q ( ) dVca(Y)
µn n Y dy
(10.46)
Bq. (10.46), the irotegral of the electron concentration over the depth of the channel has
tffl to be th~ total m1mber of electrons per unit area iry/ the channel. Now since there is no
fable hole Cl!lfifent iro the channel, In must be constant all the way from the source to the
die channel. U tla·is were not the case, there would be rapid build up of electrons in a
the channel, which is lilOt sustainable. As Qn decreases from source to drain, in order to
ns.t@n~ the electFic field increases from source to drai n and is maximum at the drain end.
is. fOnstaat along the channel, we may write
l
l
f f n (y) dy = In I dy = - ID L (10.47)
0 0
CijJt~nt Ia is considered to be positive when the current flows into the drajn
J /9 = -In in iEq. (H).47). Now ifirnm Eqs. (10.46) and (10.47), we have
L
ID=-- Zµn l
Q dV. (y)
CB d
I., " dy y
0
(10.48)

~ 'YI (2,Ps + Vos - Vss ) 312 - (l,P1, - VBt) 3 PV] (10,Sl:9'
to as the bulk charge
~r, tli1s ~°?el has some dr:del and is av~il~ble in the Level 2 MOSFET model
CO).\ S~a,ce ts mveJJted its macks. In denvmg Eq. (10.51) it was assumed that
•n the sun, · ' potential 1
·-~ ace Just enters stron .
· ~ pmne
· d
at (2
'
8 + V c 8 }. Ln reality, this is the
, Y'.s: .must be greater than th' g inversion. If the electron charge in the channel is
) b · is value It ·
, ut tt may be more by a £ . · is true that l/fs will never be much larger than
del consistently underesti ew-ttmes the thermal voltage V 7 . So we may say that bulk
·m,ted. On the other hand l/1. mates I/ls· N0w, if l/fs is underestimated, I Q 8 l is also
- .IQ 1
1 - jQ 8
1 is definitely ~v ox ~nd consequently IQsl are overestimated. This implies that
i! erestimated Th f h b 1 · 1
· ates the electron concentr t. . · ere ore, t e u k charge model con.sis tent y
timated. Fortunately th a 10 ~ 10 the channel, which means that the drain current is also
, e error involved · · h. 1001. · h
ers the exact surface t . . is wit m w. A more accurate model, wh1c
po entia 1 Is called h h .
· al techniques ancl · . . c arge s eet model. However, this model resorts to
Is not covered m the present scope of the book.
enc
fitlilJ'Yln°'1Jn
•
region characteristics·
· In th
e ana
l
ys1s
·
so far, 1t
·
has been assumed that an mvers10n
· ·
itfe'X:tsts all the way from the source to the drain. This is true for small Vos· However, as Vos is
ed, the _ene:g~ leve! EFn near the drain moves lower. This means that the value of "!Ifs
,:,.{'1-,1PE1tiired to mamtam mversion, should be larger. A higher I/ls results in higher IQ 8
1 and lower IQsl,
aue to lower 'l'ox· Therefore, with increasing Vos, the electron charge density near the drain given
l>y IQnl = I Qsl - I QBI reduces. Ultimately, at a particular value of Vos, called V Dsat• Qn goes to zero.
Under this condition, the channel is said to be pinched off near the drain. This might lead one to
donclude that the drain current drops to zero. However, this is not true. In fact, once the electron
c\~ge at' the drain end becomes very small, the electric field parallel to the interface increases, and
gradlial channel approximation itself fails. Therefore, the pinch-off condition at Vos = V Dsat actually
~ the failure of the gradual channel approximation rather than Qn going to zero. However, for
pWJ)OSe of modelling, V Dsat is defined as the value of Vos for which the gradual channel
roximation gives Qn = O. Since pinch-off occurs initially at the _dr~n end of the channel wllen
v we can now obtain a relation for V Dsat by subst1tutmg Qn(Y) = 0 and V c8(y)
- Dsat,
etat - y 85
in Eq. (10.44). Therefore,
VGB - VFB - 2B - Vvsat + Vas= r~24'a + Vvsat - Vas (10.52)
;sq. (f0.52) as a quadratic equation in Vvsat• we have
y 2 [l+ ~~4-(V._G_B __ ~VF_B_)]
IHl!fj;,10-f" V"'Dsat = VGs - Vps - 2'PB + 2 - 1 + r2
(10.53~

(IO.SS)
o:te V Dsat, the pinch-off poi Rt moves towards the source, leaving a
e'tweem this point and the clrain. The voltage (V DS - V DsaJ is dropped a~ross this
er, and the high electric field helps to sweep the electrons entering this region to the
1current in this region of the characteristics remains almost constant, a small increase
m the channel length modulation, that is, the reduction of the effective channel length
ch-off poi,nt moves towards the source. The modelling of the current in the saturation
etailed in the next chapter.
pp (10.51) is a relatively accurate description of current in the long channel MOSFET.
Cli,. this equation is Fatheli cumbersome to use in manual calculations and slow to evaluate
·ncor.porated in circuit simulation packages such as SPICE. A simplified version of
t.5.1, is obtained if we assume that 2> V vs· Then we have,
312
312 312 ( Vvs )
312 ( 3 Vvs )
11~+ VDs) = (2n - Vns) 1 + 2

• VDsat == Vas - Vth (10.60)
satmation drain voltage .
fi when the MOSFETgiven by Eq. (10.60) in Eq. (10.58), we get an expression
goes t0 saturation Iv as
I
Zµ C
Dsat == n ox [V. _ V. ]2
2L GS th
'
sat,
(10.61)
law model gets its name from h.
n the gate voltage.
t is square law type dependence of the saturation drain
ysically, the square law model c .
e ·on width is const t d . an also be denved by assuming that all along the channel
a Therefore the bult:h;ne ts e~ual to the actual depletion width at the source end of the
·. b ~ t't . V g density QB does not depend on the position along the channel
given y SUoS 1 utmg CB(y) = -V in Eq (10 43) H
BS . . . ence,
(10.62)
ectron charge density Qn(y) is now obtained following the same procedure as in the bulk
model. Therefore,
= -Cox [Vas - VFB - 2¢s - Vcs(y) - Y ~2

Helt alt oug quite accurate, is not really suited for quick calculation of results.
, tlie square law model relations are quite simple, but not very accurate. The
model was developed to fiU the need for a model wmich is simple, and at the same
ur..ate.
derive the Level 3 model, we introduce a variable Vcs(y), which is the channel-to-source
. This is related to the channel-to-bulk potential through the relation V cs(y) = V c 8
(y) + v
85
•
the relation for the bulk charge density given by Eq. (10.43) can now be expressed in tenns
) as
(10.67)
V 8 s >> V cs(y). Using this approximation
'
/
Q9(y) = -rCox\J 2s - Vss · 1 + Vcs(y)
,1, V
2'1'8 -
BS
(10.68)
'Ebe electrom charge density Qn(y) is now obtained as the difference of the total charge and the bulk
f· Therefore from Eqs. (10.42) and (10.68), we have
~,.,(y)= Qs(y)- Qs(y) = -Cox[Vas- VFB- 2s - Vcs(y)]+ YCox '\J2

constant, we can rewrite iBq. (10.72) as
·····"''""'
IJ) = ZµnCox r E
'L - Jt VGs - Vth - aVcs(y)]dVcs Vcs(y) may be valid for a large portion of the channel
IJllld is therefore more accurate than the Level 1 model which assumes 2¢8 - V8s >> Vvs· The Level
, model is therefore a far better approximation of the Level 2 model than the Level 1 model.
ample 10.9
OSF.ET MFl is operated with the substrate shorted to the source, that is, Vas = 0 V. The
I length and width of this device is given by L = 5 ~tm and W = 20 µm. Calculate V Dsat and
pbtained in SPICE Level l , Level 2, and Level 3 models for V cs = 5 V. Assume
800 cm 2 /Vs.
· n: For MFl,
:V111 = 0.84 V, r = 1.683, and

VDsat = 5 - 0.84 = 4.16 V
1
a= + 2
1 (1.683)
r;::-;; = 2 . O l
vO. 7
5 - 0.84
Vvsat = 2.01 = 2.08 V
o~l uses a lot of approximations and is the simplest of all the MOSFET models. It
etl fof a rmigh approximation of the circuit performance. On the other hand, the
es much more computation time and may even result in convergence problems.
jood compromise and can be used in most cases, except when highly precise
w for a Self-aligned nMOSFET

(c)
Polysilicon gate
,-----, -----,______ _
Gate oxide
(d)
Source/Drain implant
iiiiiii iiiiiii
n+ -------
Source Drain
(e)
Phosphosilicate glass
Source Drain
(f)
Contact metallization
Source Drain
(g}
i;?rocess steps for fabricating a self-aligned MOSFET for integrated circuits.

ation is now catified out to realize an oxide thickness 0 ~ about 1 µm. Since
ed during oxidation, only about half of this tllickness (that_ is, ~-5 µm) protrudes
ee while the rest lies below the original surface as sl:l~wlil m Ft~. 10.25(c). This
er planarity of the fabricated device. Oxiclation is bloc~ed m the regmns ~rotected by
e, as the oxidizing species cannot reach the silicon surface m those places. This process is
also referred to as isolation by local oxidation. Silicon nitride is now removed from the
ea using chemical agents such as phosphoric acid. Boron thresho!d tailoring implant is
out to adjust the tl:lresh.old voltage of the MOSFET (this will be discussed thoroughly in
W 11).
4.: Gate oxidation is now carried out to realize a very thin, high quality, defect-free oxide.
sis the most critical step in the MOSFET processing and extreme care must be taken to ensure
·~h quality of the gate oxide. Polysilicon is now deposited over the entire surface by chemical
ur deposition. Using lithography again, polysilicon is now patterned by wet or dry etching to
e the gate [Fig. l0.25(d)]. This step determines the channel length, which is one of the most
rtant parameters in MOSFET. Dimensional control of gate lithography and poly-etching is
efor:e another key step in the process flow.
p 5: After the gate patterning, ion-implantation is carried out for source and drain. No
'thegraphy is requil'ed to undertake this step and hence the process is termed as self-a.ligned. The
e1d oxide and the gate act as masks against implantation and consequently then+ source and drain
automatically align~ to the gate [Fig. 10.25(e)].
~ 6: The next step is chemical vapour deposition of phosphosilicate glass [Fig. 10.25(f)]. This
~~ as a barrier against alkali ions (which may cause instabilities in device performance). This
iS is p.eated to around IOQ0°C to flow and smoothen the contours of the device. This results in
metal step coverage.
1 ally, a passivation layer (usually silicon nitride) is deposited on the finished device.
a: hy is carried out and only ~he bondpads are exposed in the process.

-~ p
,- ., "'apaoitance Nt ~ea.
Hold voltage pe\ unit area.
~;ID1:esn1ffl6 voltage taki , as Utning Vp11 = 0 V.
the experimental C-V' :g the Wopk iunctim1 i1nto acemmt.
tiof fixed oxicile charg:? araeteristies 0f this capacitor show a V,p 8 = -1 V, what is the
8 or-like interface states
a MOS capacitor on n-Si s bare present, 'how do they affect tliie high fre~uency C-V plot of
u Strate? Ex I . . h .
+ · p am w1t diagrams.
(a) An n polysilicon gate Mos .
voltage Vth =:= 1 v at 300
K. T capac!tor wa~ .to be fabricated so t?at it had a thre~Jilold
concentration of NA ==
2 x he -~va1lable s1hcon wafers were uniformly doped with a
1016
would be so small that th cm · It was assumed that the oxide and interface charges
After t: b . . ey would not affect V th· What is the required gate oxide thickness?
(b) a ncation of the MOS .
then subjected to bias heat c~paci~or, V th was measured to be 0.65 V. Th~ capacitor was
so that all the b'l . stress_. First, 1t was heated to 250°C with +30 V applied to the gate,
After coolin ;o 1 e IOns (which are positively charged) moved to the Si-Si0 2 interface.
f 'th f o V th wa~ measured to be 0.5 V. Again, the capacitor was heated to 250°C, this
.•me ~WI N- fapphed to the gate, so that the ions were attracted to the polysilicon- Si0 2
mter1ace. ow a ter cooling v'. ·
I Wh ' • th was measured to be 0.7 V. Estimate the values of (2.(/q and
Qm q. ere were all the mobile ions located initially, assuming they were all concentrated in
a plane parallel to the interfaces. A sume Qi 1
and Q 01
to be negligible.
P10.4 (a) A MOS diode is fabricated on a p-type silicon substrate havi ng a doping concentration
of NA = 5 x 10 15 cm- 3 • The gate oxide thickness t 0
x is 200 A. If n+ polysilicon is used as the
gate material for this device and it has a fixed oxide charge density given by
Qrlq = 1.0 x 10 11 cm- 2 , calculate
(i) the maximum depletion width (Wmax).
(ii) the fl at band voltage (VF 8 ) .
(iii) the threshold voltage ( V th) for this device.
(b) A MOSFET is fabricated on the same substrate with the same gate oxide thickness and
fixed oxide charge as in (a) above. This MOSFET also has n+ polysilicon gate and is
operated with Vas= -2 V. The channel length and width of this device is given by L = 1 µm
and W = 5 µm. Calculate V Dsat and f Dsat using SPICE Level 3 model for Vas = 5 V.
Matched p- and n-channel MOSFETs are to be fabricated in the same silicon wafer (that is,
Vthp = - Vthn, for Vss = 0). To do this, an n-silicon sample with doping concentration
N 0
= 10 15 cm-3 is taken and a p-well is diffused in it. Identical p- and n-channel MOSFETs
are now fabricated in the n- and p-regions respectively of this wafer. The gate oxide
thickness is 1000 A, Qclq = 3 x 10 11 cm- 2 and aluminium gate is used. What is the doping
ocentration of the p-well to obtain m~tched devices? What are the values of Vth for th~
if VBS = 0?

EBRENCES AND SUGGESTED FURTHER READING
1, B.E., Standardized termir'lOlogy for oxide charges associated with thermally oxidized
,Uiieon, IEEE Trans. Electron De~ices, Vol. ED-27, p. 606, 1980.
ea], B., The current understanding of charges in the therma1Iy oxidized silicon structure
'
umal of Electrochemical Society, Vol. 121, no. 6, pp. 198C-205C, June 1974.
@ve, A.S., Physics and Technology of Semiconductor Devices, Wiley, New York, 1967.
Sze, S.M., Physics of Semiconductor Devices, 2nd ed., Wiley, N.Y., 1981.
Streetman, B.G. and S. Banerjee, Solid State Electronic Devices, 5th ed., Prentice Hall, New
Jersey, 2000.
Qmg, ID.G., Modem MOS Technology: Processes, Devices and Design, McGraw Hill Book
pmpamy, Singapore, 1984.

Advanced Topics in MOSFETs
10, we have discussed the b . .
based on certain assu f asic operation of the MOSFETs and various modelling
assumptions no Ionge mp 1 .ons. J:Iowever, as the device dimensions become smaller, many
r remam vahd r d .
Ier devices of toda .t . · n or er to obtam more accurate results, especially for
Y, 1 is necessary t O ·d
ect matter of discus · f h consi er some second order effects. These form the
smn ° t e present chapter.
EFFECT OF GATE AND DRAIN VOLTAGES ON CARRIER
MOBILITY IN THE INVERSION LAYER
mte models discussed in Chapter 10, we have assumed that the mobility in the inversion layer
constant and is not influenced by either the gate or drain voltage. However, this is strictly not
, ,ad appropriate corrections must be incorporated in the models for greater accuracy. As we
already discussed, the conduction in a MOSFET takes place in a very thin inversion layer
a~ent to the Si-Si0 2
interface. The mobility of the carriers depends on the surface roughness,
introduces additional scattering, as well as the presence of interface states which can trap
fard their flow. The carrier mobility in a MOSFET channel is therefore strongly dependent
ocessing techniques. The mobility for electrons in the inversion layer of an n-channel
T can vary in the range 400-900 cm 2 Ns while for holes in a p-channel MOSFET, the
n can be 100-300 cm2/Vs. As we can see, these values of mobility on the silicon surface
lower than the values obtained in bulk silicon.

Figure 11.1
L-..--~'..-------~ VGs
V th
Typical variation of / 0 with V GS keeping Vos constant.
An interesting observation in Fig. I I. I is that the straight line deviates from linearity at
gate voltages. The reduced slope implies a reduction in mobility at higher gate voltages.
ecrease in mobility is due to the higher transverse electric field, which is in a direction
ij'culaP to I.me actual flow of electrons, resulting in more collisions of the elec;:trons with tne
d 'blrf.n ~.•fact, the variatiom h1 mobility due to the transverse field ( 0\) can be expressed as
µ- tLo
1 +a

»~ ~ter l ttiat th . .
~t. ~ :tcl~ta.onsh1p between drift velocity vd, o garriets a
1
nraoo,:Js a oons._:w ol~tiriic fields (

tE .. (H:7), when ~

tlie 'Values of v Ds and 1
level 3 model t:.C· Dsr ~hen V Gs = 2 V for an n-channel MOSFET with V th = 1.0 V,
field dependent mo;~.~ ve ocity saturation into account and (b) level 4 model, which
1 tty. Assume L 1 z 5 5 o 2/V
and Ne= 5 x 104 V/ - µm, = µm, t 0 x = 20 nm, µn = 0 cm s,
cm.
(a) From the given val f
.. . th' ues O ~c and µm we get vsat = 500 x 5 x 10 4 cm/s = 2.5 x 10 7 cm/s.
tuting ts value of v in Eq ( 11 6
) h
sat · . , we ave
( 2 - 1)2 + (1 x 10-4 x 2.5 x 10 7 2
) = O 858 V
1.05 500 .
ow, Cox can be calculated as Cox = cox = 3.9 x 8.85 x 10-14 = 1.72 x 10-7 F/cm2
1 ox 2 X 10- 6
ubstituting these values of Vvsat and Cox in Eq. (11.4), we get
l0sat = 5 x 10- 4 x 2.5 x 10 7 x 1.72 x 10- 7 [2 - 1 - (1.05 x 0.858)] = 2.13 x 10-4 A
(b) Using Eq. (11.11), we get
VDsat = 1 x 10- 4 x 5 x 10 4 [ 1 +
~ 'roting this value of V Dsat in Eq. (11.4), we get
2 (
2 - l) - 1] = 0.876 V
1.05 x 1 x 10- 4 x 5 x 10 4
lDsat = 5 x 10- 4 x 2.5 x 10 7 x 1.72 x 10- 7 [2 - 1 - (1.05 x 0.876)] = 1.72 x 10-4 A.
A comparison of the V Dsat values obtained from Eqs. ( 11.6) and ( 11.11) in Example 11.1
tbat the VDsat value calculated in level 4 model is higher than that obtained in level 3. This
ause in the level 3 model, vd = µntfy is assumed, so that V 5 a 1 is reached when ~ = tfc = v 5
a.f µn.
other hand, in level 4, which uses Eq. (l 1.7) to calct!llate vd, the drift velocity vd = (v 58
/2)
""""' 8c, and v d saturates at el~ctric fields much greater than

11.iK:-1:1.'to!M'.;i.;i
(>ft .3, when the drain voltage exceeds V0s •., the pinch-otf,
'j)otttl) 'moves from the drain towards the source, and a depletion
and the drain. This movement is referred to as channel length
t~on is due to pinch-off, the same voltage V Dsat is now dropped
n~ length L', while the exces dram voltage (Vos - V Dsat) is dropped
of width ld = (L _ L'). If vel city saturation is the reason for current
lower v,,_ corresponding to the effective channel length L' is dropped in the
b!P.llltni'!t * 0) and the velocity aturation point (y == L'). In either case, the drain
increase in drain voltage when Vos > V Dsat· The change in drain current is
ltllf,.•lllPoer channel length devices, as in this case the effective change in channel
- L') is a larger fraction of the initial channel length. The dram current in the
~ ~refore be obtained by substituting l' for l in fosat· Since in most cases Iosat
wt.:r...Al,#,fttal to L, we have for V DS > V Dsat
(11.12)
correspond to the applied drain voltage V 05 . Empirical equations have been used in
2 models in SPICE using a parameter A, where ).. i given by
(11.13)
1'3) in Eq. (11.12), we get the level 2 SPICE relation for I O in the saturation
_
I o -
I Dsat
1 - JlV 05
(11.14)
(11.15)

: Space
I
: charie
: region
I
I
J,_
o~~~~~~~L~
L I L y
Typical plot ferr surface electric fi I I< d >I
,e d variation in a MOSFET operating in the saturation region.
Now, since the drop in the depleti 1 .
.. nj the width of the depletion lay onh ayer is equal to the product of the average electric field
... er, we ave
/_!_(

0r

m• drain
p-type substrate
SchemaUc diagram showing the Impact Ionization at the drain end and consequent flow of
secondary holes to the substrate.
SJ?bere may t>e shar,p increase in drain current at high drain voltages due to another
pli bifmenon,. called punch-through. This is similar to the base punch-through in BJTs, and occurs
w!il'll the dram ~nd the source depletion regions overlap. When this happens, the gate loses control
ani:1 a large dram Cl:lJilieet can flow even when the gate voltage is below threshold. It is quite
obvious. that the punch-thrrough voltage (Vp,), defined as the drain voltage at which punch-through
occurs, 1s smaller for shorter channel devices.
11.5 SUBTHRESHOLD CURRENT
In all the drain CUlil'ent expressions derived in section 10.3.2 in Chapter 10, 1 0 becomes zero when
Vas= Vth. All these expressions have been derived assuming the diffusion current to be negligibly
small compared to the drrift current in the channel. However, when V Gs ::::: V th• the electron
concentration in the channel is very small and this approximation no longer remains valid
(Remember: The drift current is proportional to the carrier concentration). For VGs < Vth, or when
(;s - Vss) < 1/fs < (2 8 - V 8 s), lfls being the amount of band bending at the semiconductor surface,
the diffusion current is much larger than the drift component. It should, however, be stressed that in
the transition from strong inversion to weak inversion, both drift and diffusion components are
comparable. Figure 11.5 shows the nature of variation of the drift and diffusion components of
drain cmrent with gate voltage in a MOSFEf. The drain current when V Gs < Vth is referred to as
ilie subthreshold or weak inversion current. Considering only the diffusion component of current,
tlie Jubthreshold current can be expressed as
I = A D [n(O) - n(L)]
/J q n L (1 1.21)
the source and dFain ends of the channel

---VGs
oh of ttie drift and diffo1sion components of drain current with V GS· The total drain current
is also shown (solid line).
assmne that l/fs is the surface potential corresponding to a particular gate-to-source
GS· Im a long-channel MOSFET, in the subthreshold region, the potential across
eti9.n lay,ei: at the semieolilductor surface (l/fs) can be assumed to be\almost a constant
source t@ the clr,ain end. Therefore, the voltages across the source-to-substrate and
substtate juaeti@ns arie (l/fs + V 8 s) and (l/fs + V 8 s - VDs) respectively. Using Eq. (4.43b) for
ons, we now lrlave
n(@~ = n; exp ( V's + VBs) = NA exp ( V'.~ + Vns - 2

eJ.ation for the b I...- •.. 1
hlati
su tuceshold current in terms of the surface potentt'" 'l's·
on, we prefer to have a relation in terms of the gate voltage Vas· We
:ve
1
9P such a relation. Using Eq. (10.20) for the s_µbthreshold region, we
V,GB - V - 11r QB
FB - 'f's - -
cox
(11.26)
(11.27)
depletion capacitance given by
Co= - dQB = ~[)2c qN 1/f J = )2csqNA
d I/ls d I/ls s A s 2£
(11.28)
W that when Vas= Vth, 1/fs = 2 8 - V 85 . If the MOSFET is biased at a gate voltage Vas
is slightly less than V th by '1. Vas, the corresponding surface potential I/ls will be less than
Vss by tllJ's (say). Now we may write
d Vas b. Vas Vas - Yrh
m = -- = -- = ------
d I/ls b.1/fs I/ls - 2¢a + Vss
(11.29)
v. - v.
Ill - 2 A. + V = GS th
'f' s 'YB BS m ( 11.30)
(11.31)

v.,) (Vas -
lo= Ion exp mVr
zµ.c •• [ V. V. - a Vos J Vos
L GS - th 2
ZµnCox [ V. - V. ]2
2aL Gs th
for
for
for
VGs $; Von
VGs > Von; Vos $; Vosat (11.35)
VGs > Von ; Vos> Vosat
-
Weak
15
inversion
region
region
Model / 0 versus V Gs characteristics showing smooth transition above and below Vth.
e: ~ important parameter for a MOSFET is the subthreshold slope S, which is
e lD ate voltage required to reduce the subthreshold current by one decade
of Vo1t (or millivolt) per decade. The value of S should be as small as
a ~~ transjtion between the ON and OFF states of the MOSFET. From
sloP.e,

:2 3mVr == 2.3Vr (] + Co + Cit)
l Cox Cox
(11.38)
& of m is l, tbe minimum p,ossible value of S is 2.3 times V,7, that is,
m fper decade at i:eom temperabuFe. Typical valit1es @f S Ue fail d1e range of
llllltattl~ BKcept for a small de11>eneence on substrate doping oom,entratian through Co,
ependent of device parameters.
~hold current expressions discussed so far have been developed for long channel
mf.i~:r, short channel devices, the surface potential is not constant along the length of the
llitllil subthreshold currents show strong dependence on v DS· Also, due to the significant
iiMltiftlie drain voltage, the gate voltage has less control of the surface potential. So a larger
iil&lilffl~te voltage is required to reduce the drain current by the same amount as in a long
irilllJltle ice, implying an increase in subthreshold slope. Figure 11.7 shows the effect of
iliin1iiJ'i'imannel length on the subthreshold characteristics of MOSFETs. We see that as the
length is reduced from 7 µm to 1.5 µm, keeping all other parameters constant, the
iOld slope increases and also becomes a function of V DS·
10-S
-- --
t 0 x = 130 A
S = 90 Vas= 0
-- Vos= 1.0V
----· Vos= 0.5 V
s = 62 mV/decade

2Es (VDs + Vbi)
qNA
(11.39)

~stant field sealing lawa and Ulelr effect on device and circuit parameters
MOSFET, parameters
Channel length
Channel wldU,
Gate area, Source/Drain Junction area
Gate oxide Ullckness
Source and drain Junction dei:,ths
Subsuate doping concentration
Voltages
Electric field (8 = Voltage/distance)
Carrier velocity (v = µ8 or Vsai)
Depletion layer width w = ~2esV
qNA
Capacitance (C = AEoxffox or C = Aes/W)
Current (/ 0 cc (Z/L) Cox V2)
Channel resistance (Reh= VII)
Delay time (td cc CV//)
Power dissipation (P = V/)
Power-delay product (Pfd)
Power density (Pd = PIA)
Packing density (PD cc 1/A)
Reference device
L
z
A
fox
Xj
NA
VGs, Vos, Vas
v
w
c
Scaled device
Ua
Zia
A/clta,.la
xjla
aNA
VGsfa, V 0 sfa, Vasfa
«tx, ctr
v
Wla
Cla
Ila
Rct,
tcla
Plif
Pfic?
In the present discussion, while considering the effect of scaling on Iv, it has been implicitly
assumed that the threshold· voltage (V th) scales by the same factor a. However, this is not true.
Considering the expression for Vth given by Eq. (10.39), we find that the terms VF 8 and 2tf> 8 do not
cbange in the scaled device. Since V 8 s = 0 in CMOS circuits, even assuming (VFB + 2tf> 8 ) to be
negligibly small, the threshold voltage only reduces by a factor fa in the scaled device. Also, the
i$.Pbthreshold cUll'ent does not scale properly. Since the built-in potential of the junctions does not
All.$~ in the sealed device, it is in fact necessary to increase the substrate doping concentration to
Ff lev~ls than suggested by the scaling laws in order to avoid short channel effects. These are
e of the reasons why the scaling laws cannot strictly be followed.
NONUNIFORM DOPING IN THE CHANNEL
in the previous section that for pr0per, scaling, the substrate doping concentration
~ 9tc,te"asecl. HoweveF, i,ncreasiRg NA results in an incFease in the oody effect puameter
unction caP.~~tanoes. 'fo overcome this, in practical devices the substrate doping
t low, but' the doping conoentra,tion in the channel region close to the Si-Si0 2
plantation. Tbis is lmow.n as threshold tailoring implant, as ~e

7
s
<
Actual implantation
-
5 NA(x) profile
'?
E
- N s
0 4

•· In this case, the maximum d .
n for the step doping distribution. Wiepletui>n layer width has to be calculated ft:om Poisson's
c field variation for this distr.ibut' e can do that graphically using !Big. 11.9 which shows the
um value (W max) at threshold 1
•:~ When the depletion width in the channel reaches its
ng the choice of 'l's in order to ;v:iu:t: sttirfa0e potential b.e 1Jls· 'fheie is some controversy
umes (2~ 8
- V 8
.s) is used [as in E Vth for MOSFETs with n@nuniformly doped substrates.
}itle others have used the act qi · d( 10 : 37 )1, where 'PB is calculated from NB• some have used
i, ua opmg c · h · N ( W ;-.
Flirthennore, some others contend that stro . o~centratlon at t e depletion edge, A max!!·
surface equals the dopant concentration at ng mvers.ion occurs ~hen ~he free carrier density at the
the depletion edge, which gives
8 (X)
1/1, = ¢, + V 7 In [NA

n-channel MOSFET with n+ polysilicon gate has a substrate d.opi~g co~centrati?n of
015 cm-3 and a gate oxide thickness of 20 nm. A boron implantation is ~arned out m the
annel region for threshold tailoring which can be approximated by a box of width 0.2 µm and a
ace coneentration of 5 x 1016 cm- 3 • Neglecting the effect of Qi, find the values of Vth at
(a) V 8 s = 0 V and (b) V 8 s = -5 V.
Solution: (a) We first assume that the depletion region lies partly within and partly outside the
!dmplantation box (Case III). Therefore, it should be possible to calculate the maximum depletion
"'dth using Eq. (11.45). Assuming that the value of ¢> 8 refers to the surface concentration Ns, we get
= 0:026 ln( 5 1016
x J
B 1.5 X 10 10 = 0.39 V
wever, substituting this value of ¢ 8 in Eq. (11.45) yields a negative value of {2 8 - V 8 s -
gx!'/2/!sJ(Ns - Ns>1 and consequently a non-feasible solution for Wmax is obtained when V 8 s = 0.
means that our assumption is not justified and the maximum depletion width actually lies
pletely within t!ie implantation box in this case. To confirm, using N 5
= 5 x 10 16 cm- 3 , from
. (10.15), we have
2 x 11.9 x 8.85 x 10- 14 x 2 x 0.39
1.6 x 10-19 x 5 x 10•6 = 1.43 x 10-s cm = 0.143 µm
8, ~, > ~max and Case II is valid. We now calculate Vth using Eq. (10.39) assuming the
n~ntrati0n to be 5 x 10 16 cm- 3 .

1 6 x 10- 19
~jA + O.?S + 1.. x _1
72
L 5 x H> 15 x 1.08 x 10-4 + 4.5 x 10 16 x 0.2 x 10-4] = 1.18 V
10
THRESHOLD VOLTAGE OF SHORT-CHANNEL MOSFETs
the distanee between source and drain of a MOSFET is reduced, the longitudinal electric field
!Parallel to the Si-Si02 interface) may become comparable to the transverse electric field
(pen,endieular to the Si-Si02 interface). In that case, the potential variation in the channel at the
tbfeshold condition is not only dependent on the transverse electric field, which is controlled by the
gate and substrate bias, but also by the longitudinal electric field, which is controlled .by V vs·
Uruike in long-channel MOSFETs, where the surface potential is almost constant, there is now a
two-dimensional varia(ion of potential in the channel region, and the gradual channel
~ pproximatim1 is no longer valid. This effect is well explained with the surface potential plots
~own in Fig. 11.lO(a). For a long-channel MOSFET (Curve A), the surface potential is practically
constant along the channel, showing a broad minimum. For a short-channel MOSFET, on the other
hand, the surface potential shows a sharp minimum (Curve B) and the value of the minimum
surface potential increases with decreasing channel length for a fixed drain and gate bias. Thus, the
proximity of the source anGi drain reduces potential barrier at the source r~sulting in an increased
channel current. Consequently, the threshold condition for a long-channel MOSFET given by
Eq. (10.37), that is, lfls = 2!f - Vas must be modified. In a short-channel MOSFET, the minimum
surface potential at threshold should be (2 8 -
Vas) to ensure that strong inversion exists in the
entire channel. Since the minimum surface potential increases due to reduction in channel length, it
)follows that a lower gate voh:age is required in shorter channel MOSFETs to achieve (l/fs)min
2q, 8
- V 85
• Thus, the threshold voltage reduces in the shorter channel device.
One of the important effects in short-channel MOSFETs is Drain Induced Barrier Lowering
. nis can also be explainee using the potential plots in Big. 11.lO(a). If ~he drain voltage in
-chann.el MOSFET is incre~sed, theFe is a further increase in the minimum surface potential
due to the penetration of field lines from tlile drain to the source end. Thus we find that
,eauefic.!m in ~hanne1 length or i.ncrease in dFain voltage, reduces the threshold voltage
·~m~'!©W ~ Iow~r value of Va~ is required to ma:intili·n the same potentii l oanier. a't
e of variation of ~ $Jold olta~e short-channel MOSPETs w~th channel

L = 1.25 µm Vos = 5 V
~ c
L = 1.25 µm
L = 6.25 µm
Vos= 0.5 V
© 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
y/L >
(a)
0.5
0.4
->
-::;
0.3
L decreasing
0.2 [....____,____ L-1 ------''
0 1 2 3
Drain voltage Vos (V)
(b)-

CoxL3
, e usecf to fit model tes l •
' u ts with e~pe imental data.
i'l'r&te appreach to oetai
btlin the sUri'ace potentia~ ~ (~ lh

V. - Vi + 2AI + F ~2EsqN A (2

x
Wo
!)·Substrate
!vas
...
Figure 11.12 Modified trapezoid for charge sharing used in SPICE.
[ii the level 3 m~del in_ S~ICE, in addition to the DIBL factor given by Eq. (11.48), a charge
stia'ft'1g fact©F assuming elhptical source-drain junctions is used. Thus, the threshold voltage
~fe:ssion is
v th(SC) = v th - (1 - F) y ~ (2 a - Vas) - crVvs
(1 1.56)
tt.9 SMALL SIGNAL ANALYSIS
In our discussion of the MOSFETs in the preceding sections, we have only considered de biasing.
Let us now consider the effect of small changes in the applied voltages on the gate and depletion
layer cmarges. Figure 11.13(a) depicts the channel region of a MOSFET under strong inversion.
G
G~
s
+ + + + + +
D
lc95 b.Vs
C gs
+C 95 b.Vs
Os + !lOs
y
(b)
(a) MOSFET chammel Im stromg lrnvei:sl011; {Ii>) e

&Qa c)Q
c = --=----.Q.
,s a~
s
av.
s
V0 , V 0 , V, = constant
(11.57)
~ si~ signifies that when !). Vs is positive, f).QG is negative. This is because the
ss the oxide decreases due to !). Vs and hence the gate charge decreases. It is important
t e 1 s is not associated with any Feal parallel plate capacitor structure. It is simply a
pacitance per unit area which allows the change in gate charge per unit area to be f).Qa
source voltage is changed by !). Vs,
ogously, we can de?ne a capaci.tance per unit area, Cgd• associated with a change in the
altage and correspondmg change m the gate charge. Finally we investigate the effect of
" g V 8 • This is easier to understand in weak inversion, where Qn is negligible. Then
ing V 8 causes positive charges to flow into the substrate terminal, which will be ealanced by
1>9site change in Q 0 • Thus, the capacitance per unit area associated with a change·in the drain
substrate voltage are given by
(11.58)
Meyer's Model
'.We can now draw the Meyer's model [6] of the small signal equivalent circuit for the MOSFET
~ g into account the capacitances discussed here. This is shown in Fig. 11.14. The three
itances shown in Fig. 11.14 are defined as
C' - cJQGT
GS = avGS '
Vav and Va 8
constant
C GD ' _ = aQGT
avGD ' Vas and VGB constant (11.59)
C' - c)QGT VaD and Vas constant
GB = avGB'

D
B
Meyerr's e · 1
qu,va eli'lt MOSFET circuit showing three capacitances.
L
for = total gate eharge = z J QadY
, C' o
Cas, GD, and CGB = total gate-to-source gate-to-drain, and gate-to-bulk capacitances
~peetively.
'
Comsidering that the MOSFET is operating in the linear region, and noting that Qa = -Qs,
using Eqs. (10.62) and (10.64) we can write
L
L
fJar = - Z J (Qn + QB) dy = ZC 0 x J (V 08 - Yih - Vc 8
) dy + ZL ~2£ 5
qN A (2 8 -
Vss)

(Vos - Vth )(Voo - Vthl] + z1.:,JiesqN A (2s - Vss)
~ oo - 2Vth - -Vos + Vov - 2Vth
aetined in Eq. (11.59) can now be evaluated as
, ZCoxZ!::_ [l -_ CVGD - V.bJ2 z]
Cos== - 3 (VGs + VGD - 2Vth)
2C ZL [ (VGs - vth)2 ]
c' - ox I - z
GD - - 3 (VGs + VGD - 2Vth)
(1 l.65a)
(l l.65b)
'lilready mentioned. C' is zero when the MOSFET is in strong inversion as the change in tho
ate voltage will noi°tave any effect on the gate charge. However, in weak inversion, C'Gs can
buline> VDs, we can write VGD ~ VGs· Therefore, Eq. (11.65),
tewritten as
_ c' _ c0"zL
C GS , - GD - 2
onset of saturation, Vos= VGs - Vth, so that VGD = Vth. Then Eq. (11.65) reduces to
Cas = ~ COXZL l
Cao= 0
(11.66)
(H.67)
r since changing drain voltage has virtually no effect on , . .
• remains constant at the val . b QGr, CGD = 0. For s1mtl81!
s die variation of the three ;e g,_ven Y Eq. (I l.67) m the saturation regie;
apacttances as a function of V GS·

Saturation
V111 Vos+ V111
Variation of Cc.a, Cc.s. and q 30
with V GS from Meyer's model.
mple Meyer's mod e I may not be adequate in some situations. Also, 1t . may give . nse · to
rs w h en used for . trans· ten t ana I ys1s. · More rigorous models such as Ward , s m od e 1 [7], may
e necessary to use m such situations.
Small Signal Equivalent Circuit of MOSFET Amplifier
t us now consider the small signal equivalent circuit of a MOSFET shown in Fi
O
• 11.16. The
izAal drain current can be expressed as
(11.68)
ere gm, gds• and gbs are the transconductance, drain conductance, and substrate transconductance
Wie MOSFE1' respectively, and are given by the following expressions
(1 1.69)
ijere, v
8
s, vds• and vbs are the small signal gate-to-source, drain-to-source, and bulk-to-source
voltages respectively. Let us consider a MOSFET amplifier circuit shown in Fig. l l.16(a), the
sn.iall signal equivalent circuit of whioh is shown in Fig. l l. l 6(b ). Assuming that the MOSFET is
iased in the saturation region, Ccw = CaB = o. From Fig.ll.16(b), we see that ig = jmCc;sVgs and
8
• Therefore, the current gain is given by
A= id = gm
I ~ coc:~S
(11.70)

A. NOSFET amplifier circuit; (b) small signal equivalent circuit for the amplifier.
(b)
~Si.aition region, from Eq. (10.61), we get
_ aID _ ZµnCox (V. _ V. )
gm - aVGs - L GS th (11.71)
the expressions for Ce,s and 8m from Eqs. (11.67) and (1 1.71) respectively in
we obtain
A.= 3µn(VGs - Vth)
1
2mL 2 (11.72)
define a cut-off frequency (fr) for this amplifier as the frequency at which the current
liiP•:s unity. From Eq. (11.72), we see that
(11.73)
{ 1.73) illustrates that fr is inversely proportional to L 1 , thus underlining the importance
llilddmmel length in modem VLSI technology. This dependence is due to the increase in
jjmDC:e and reduction in drain current when L is increased. On the other hand, both drain
and capacitance increase proportionately when Z is increased. Hence, we find that fr is
of die channel width.
~ISSC::d the operatioo of the MOSFETs having the basic structure given
w MOSFET configurations are used for enhanced performance or
f ~~ devices ig-e detailed in this section.

~AS~~eL = load capacitance and
VDD = power su,pply voltage.
(11.74)
Oil the other hana, in the steady state, the standby power (Pstandby) dissipated by the circuit is due
to the subthreshold current of the transistor which is 'off'. Therefore, substituting Vas = 0 and
Vos>> Vr in Eq. 01.31), we have
~tandby oc exp [- Yih J
mVT
where
m = subthreshold current parameter given by Eq. (11.32).
(11.75)
For a circuit operating at high frequency,/ is large. In order to reduce Pactive, either Vvv or CL
(or both) has to be reduced. However, if V.oo is reduced, vth also needs to be scaled down, and
conse(!Juently Pstandby increases. Thus, for effective reduction of power dissipation, the load
capacitance, which is dependent on the input capacitance of the load transistors must be reduced.
In this context, Silicon-on-Insulator (SOI) MOSFET has gained a lot of importance. The basic
structure of an SOI MOSFET is depicted in Fig. 11.17. The device is fabricated on a thin film of
single crystal silicon, which is separated from the silicon substrate by an oxide layer. Since the source
and drain junctions extend all the way to this oxide, the junction capacitance is very low. Also,
because of the oxide isolation between the active region and the substrate, parasitic capacitance is
minimal. It has been shown [8] that reduction in power dissipation by 66% can be achieved using the
p-substrate
Figure 11.17 Basic comflguratlom of SOI MOSFET.

5.0 V
4 5 6

130
-0
Q)
"O
>
120
110
.§. 100
Q)
a.
0
cii
"O
90
0
.c
en 80
~
.c
-.0
~
en
70
~PD
FD~
60
50
0
Figure 11 .19
50 100 150 200 250 300 350 400 450 500
Thin-film thickness (nm)
Subthreshold slope as a function of silicon film thickness in SOI MOSFET.
11.10.2 Buried Channel MOSFET
It has already been discussed in sectim1 11.7 that the threshold voltage of a MOSFET can be
modified by carrying out ion-implantation in the channel region (usually known as threshold
tailoring implant). When the type of the implanted impurity is opposite to that of the substrate, a
buried channel may be for.med. The basic structure of a buried channel MOSFET is shown in
Fig. 1 l.2Q, where arsenic implantation has been carried m1t in a p-type substrate. As can be seen
from Fig. 11.20, theFe are two depletion r,egions associated with the buried channel device. One is
formed around the n-p junetioR at x = xi" 1'he ether is fmmed at the mdde.....Si interface. When. V Gs
· J'OSitive, the n·type silieon surface is in aeewnu.lation a'lild theFe exists a conducting channel
~n the source and the drain. As V GS is reduced, the depletion regiott at the oxide-Si interface
form.

p-swli>strate
Vas
Basic sfructure of a buried channel MOSFET.
d,tteting cllam1el lies ilil between the two depletion regions instead of at h
tt>F surl'ate as ilil a conventiona1l MOSFET, and hence the name "buried channel". 1
~ e
ent str:n flows in the device even when V Gs is zero, it is called a normally on buri~
OSFET. However, as V c;,s is reduced further, eventually at a particular value of v
ffie pinch-off voltage CVp): the two depletion regions merge and pinch off the conducti~s,
l. This is anak)gous to the operation of a JFET or a MESFET. · Depending on the dose an:
(lepth of the arsenic implantation, Vp can be tailored and be even made zero. A pinch-off
:Vp = O signifies that the two depletion regions merge when Vas = 0 and the channel is
off. ln this ease, the device is a normally off buried channel device. Figure 11.21 shows the
~~uacteristics of a normally on buried channel MOSFET.
6
Increasing VGs
4 S 8
Drrailil bias W os)

NI~ If a threshold tailoring boron implant for the above MOSFET is carried out, such that the
implanted region can be represented by a box of uniform doping concentration
NA = 4 x 10 16 cm- 3 and thickness xs = 0.1 µm, what will be its new threshold voltage for
Vas= O?
Pll.3 Usiag Yau's model, find out the threshold voltage of a MOSFET with NA = 10 16 cm- 3 ,
Tj = 2 µm, t0x = 200 A, and channel length L = 1.0 µm. Assume Vas= 0 and neglect Qt.
P11.4 Use the modified Yau's model (SPICE level 2 model) to calculate the threshold voltages of
n+ polysilicon gate n-channel MOSFETs with (i) L = 10 µm, VDs = 0.5 V, (ii) L = 1 µm,
VDs = 0.5 V, (iii) L = 10 µm, VDs = 5 V, and (iv) L = 1 µm, VDs = 5 V. In these devices,
assume NA= 10 16 cm-3, rj = 1 µm, t 0 x = 500 A., Vas= 0 V, Vbi = 0.8 V for source and drain
junctions and take the oxide and interface charges to be negligibly small.
Pll.S A buried channel MOSFET is fabricated by implanting phosphorus ions in the original
substrate of the MOSFET in P.11.2. If the implanted region can be represented by a box of
uniform doping concentration ND= 8 x 10 16 cm- 3 and thickness Xs = 0.1 µm, what will be
its pinch-off voltage (the voltage at which the channel just ceases to exist) for Vas = O?
REFERENCES i\.ND SUGGESTED FURTHER READING
[1] Sze,'S.M., Physics of Semiconductor Devices, 2nd ed., Wiley, N.Y., 1981.
[2] Troutman, R.R., VLSI limitations from drain induced barrier lowering, IEEE Trans.
Electron Devices, Vol. ED-26, pp. 461-468, 1979.
Arora, N., MOSFET Models for VLSI Circuit Simulation-Theory and Practice, Springer­
Yerlag, Wien, 1993.
&Jletti,, F.,and G. Massobrio, Semiconductor Modelling with SPICE, McGraw Hill Book
Singapore, 1988.

;s~miconductors, [1999] technology analysis and forecast, IEEE
sue: 1, pp. 52-56, Jan 1999.
an T.H. Ning, Fundamentals of Modern VLSI Devices, Cambridge University
u~-, 199s.
,.6., Modem MOS Technology: Processes, Devices and Design, McGraw Hill Book
oinpany, Singapore, 1984.

.
Appendix I
Crystal Structure of Silicon
here exist a variety of crrystal structures in nature. The simplest crystal structure is a cubic lattice
wheJie the atoms are located at the eight comers of a cube. In a face-centred cubic (FCC) lattice, in
addition. to these corner atoms, atoms are also located at the centre of the six faces of the cube. In
a zinc blende crystal lattice, there exist two interpenetrating face centred cubic (FCC) sublattices
witk ome atom of the second sublattice located at l/4th of the distance along a major diagonal of
the first sublattice. GaAs and InP have zinc blende crystal structure where one sublattice is made of
the group III element (Ga or In) and the other sublattice is made of group V element (As or P).
The diamond lattice is a degenerate form of the zinc blende structure with identical atoms in each
sublattie~. Silicoa belongs to this category of diamond lattice.
A unit cell in the zinc blende crystal structure is shown in Fig. A-1 . From this figure, the
coordinates of the atoms are found to be
z

(Al
r. = ro . (1 ± £)
odopw1l s,
here
e = misfit factor. t f t · ·
. . d a strain and the amoun o s ram 1.
The inm-oduetion of a dopant in the .silicon lattice mtr~. u~e: n indication of the maximum dopan
inmcated by t,ne magnitude ~f the m1~fit faTchto\~:so ,. t i\~sble A-1 lists the misfit factors and th
amount that caa be electromcally active. e o o.wm·g· .
tetrahedral radii for some of the common dopants m silicon.
Table A-1'
Tetrahedral radii and misfit factors for silicon and some common dopants
ro (A)
e
1.1
(i).Q68
1.18
0
Sb
1.36
0.153
B
0.88
0.254
Si
1.18
From this table, it can be seen that phosphorus has a smaller misfit factor in silicon tha
wo». The presence of large amol!liil't of boron in silicon lattice causes strain-induced defec
ing to considerable crrystal damage. Thus, in practice, a maximum carrier concentration of onl
5 x 10 19 cm- 3 can be maintained i1n boron-doped silicQn structures, while an active carrie
tt:ation of 10 21 cni- 3 can be easily achieved in phosphorus-doped silicon structures.
t us now discuss some of tke properties of the crystal planes commonly encountered
· ~iif p p-b~se4 1C te~,J!mol~gy. Any plan.~. is defined by the int~rcepts it ~

(A4)
z
(010)
, t
I I
I I
I I
I
I
I
I
I I
: ,... __________ _
I /.
I
, ,z -' ; ,
/, ,,,, .........
f I ,,,,-
1/""',;,.,...---,;
Dr=--_,.__.... _ _,
c
x (100)
Figure A-2
Major crystal planes in a unit cell.
It can li>e easily verified from Eq. (A4) that the separation between set of (111) planes is the
smallest. Timerefore, the crystal growth is easiest while chemical etching is slowest along this plane.
Also, the tensile strength and modulus of elasticity are both higher for this plane in silicon and
therefore this is the natural cleavage plane for silicon.
The density of atoms in a crystal plane is defined as the number of atoms in a plane divided
by plane area. Frrn Fig. A -2, this density can be easily calculated. For example, in (100) plane,
the cont:Fibution frrom the four corner atoms is 1/4 each (since each atom is shared by four planes)
while the co:ntrribl!ltion from the face centred atom is 1. Since the plane area is a 2 , the density of
atoms in (100) plame is 21ra 2 • Similarly, it can be verified that the density of atoms in (ll l) plane is
4/(Ji,a 2 ). This larger density of atoms results in a higher fixed oxide charge for (ll 1) silicon
surface compared to the ( I 00) plane.
The angle between any two planes (h 1 k 1 l 1 and h 2 k 2 l 2 ) is given by
h1hi + l1l2 + k1k2
cos6 = -;::=====:::::::::::==::::::::===========-
J(hf + kf + lf )(hi+ li + ki)
(AS)

(A6)
;.:.,.::.;.::.i~~'"""'"L,L,c.~-----------------------r---
54 74°
{100) silicon substrate
Figure A-3 V-gro0ve etching in {100) silicon showing the exposed {111} side walls.

Appendix Il
Pr-eperties ot Some Important
Semicomdwctors at 300 K
Property
Lattice constant (A)
Band gap ( e V)
E1.!ctron mobility ( cm 2 /e V)
H.:>le mobility (cm 2 /eV)
Dielectric constant
Effective mass for electrons
Effective mass for holes
Effective density of states in
conduction band, Ne (cm- 3 )
Effective density of states in
valence band, Nv (cm- 3 )
Si Ge Ga As InP
5.43 5.64 5.63 5.86
1.12 (I) 0.66 (I) 1.42 (D) 1.35 (D)
1350 3900 8500 4600
450 1900 400 150
11.9 16.0 13.1 12.4
0.98 1.64 0.067 0.077
0.19 0.082
0.16 0.044 0.082 0.64
0.49 0.28 0.45
2.8 x 10 19 1.04 x 10 19 4.7 x 10 17 5,7 x 10 17
1.04 x 10 19 6.0 x 10 18 7.0 x 10 18 1.1 x 10 19
Electron affinity, x(V)
4.05 4.0 4.07 4.38
]Rtrinsic carrier concentration (cm- 3 ) 1.5 x 10 10 2.4 x 10 13 1.79 x 10 6 1.3 x 10 7
Intrinsic resistivity (Ohm-cm) 2.3 x 10 5 47 10 8 8.6 x 10 7
Breakd_own field (V/cm) -3 x 10 5 -10 5 -4 x 10 5 -5 x 10 5

Appendix Ill
ies of Some lmportard Dielectric
· Materials at 300 K
Si3N4
Si0
Properties
2
3.1
Density (gm/cm 3 2.2
)
2.05
1.46
Reftactive index
7.5
3.9
DielecMc constant
-5
9
Band. gap (eV)
Bre8rk,down field strength (V/cm) 10 7 107
>1014
-10 14
DC resistivity (Ohm-cm)

Appendix N
Values ot Some Physical Comstants
-- Quanti~ Symbol Value
Boltzmann constant k 1.38066 x 10- 2 3 J/K
Electronic charge q 1.6 x 10- 19 c
Planck's constant h 6.62617 x 10- 34 Js
Permittivity in vacuum qi 8.854 x 10- 14 Flem
s~ of light in vacuum c 3 x 10 10 emfs
Thermal voltage at 300 K Vr 0.0259 V
Electron rest mass mo 9.1 x 10- 31 kg
Electron volti eV 1 e V = 1.6 x 10- 19 J
Angstrom urtit A l A= 0.1 nm = 10~ µm = 10- 8 cm= 10- 10 m

Description
Lattice Constant
Ar:ea
Richaridson 's Constant
Speed @f light in vacuum
Capacitance
Depletion capacitance of a p-n junction
Diffusion capacitance of a p-n junction
CB junction capacitance in a BJT
EB junction caioacitance in a BJT
Oxide capacitance
Gate-to-sol!J,Tee capacitance in a MOSFET
Gate-to-driain capacitance in a MOSFET
Gate-to-bulk capacitance in a MOSFET
Diffusion coefficient
Diffusion coefficient for electrons
Diffusion coefficient for holes
Interface trap density
Acceptor eneFgy level
Conduction h>and mi1nima
Donor eaergy level
Valence band maxima
:Energy bandgap
emu energy
· nsic energy level
Mi~ation energy
·e field
Unit
A
cm 2
A/(K 2 cm 2 )
emfs
F
F
F
F
F
F/cm 2
F
F
F
cm 2 /s
cm 2 /s
cm 2 /s
number of states/cm 2 .eV
eV
eV
eV
eV
eV
eV
eV
eV
V/cm
Hz

le saturation current of the diode
as~ current
Base recombination current
Collector current
Leakage current in the reverse biased CB junction
with the emitter open
Leakage current flowing between collector and
emitter terminals with the base open
Drain current in FET
M~nor~ty carr!er electron current component at the EB junction
Mmonty carrier hole current component at the CB junction
Minority carrier hole current component at the EB junction
Current density
Drift current density
Diffusion current density
Electron current density
Hole current density
Boltzmann constant
Diffusion length for electrons
Diffusion length for holes
(Channel) length
Effective mass of electron
Effective mass of hole
Mass of free electron
Current multiplication factor due to impact ionization
Electron concentration
Intrinsic carrier concentration
Electron concentration in n-type semiconductor
Electron concentration in n-type semiconductor
at thermal equilibrium
Excess electron concentration in n-type semiconductor
Electron concentration in p-type semiconductor
Electron concentration in p-type semiconductor at
thermal equilibrium
Excess electron concentration in n-type semiconductor
Doping concentration
coeptor concentration
~tiv.e de~ ~ §fj
A
A
A
A
A
A
A
A
A/cm 2
A/cm 2
A/cm 2
A/cm 2
A/cm 2
JIK
cm
cm
cm or µm
kg
kg
kg

on~, n
ll~lilsity, of tates lft walenee band
concentration
' .
concenwation in n-type semio0nd1:1ctor
Je concentration in n-type semic0Rduct0r at themnal
equilibrium
Etcess hele concentration in n-type semic0nductor
Hele concentration in p-ty,pe semicenductor
Hole concentriation in p-type semic0nducto11 at thermal
equiili01iium
Excess hole e0m:entrati0n in p,-tyF)e semioonductoir
Electronic charge
C;harge
]nterface-trapped charge
Fixed oxide charge
Mobile ionie charges
Oxide trapped eharge
Resistance
Subthr,esheld sl0F)e
1iime
Storage delay time
Temperature
Thennal velocity
Drift velocity
Saturation velocity
Voltage between x and y terminals ·
Built-in p0tential
Breakdown voltage
Breakdown voltage in common-emitter mode with base open
Breakdown voltage in common-base mode with emitter open
Threshold voltage
Flat band voltage
Thermal voltage
(Depletion layer) width
(NeutFal) base wi

lt
Volt
cm 2 /Vs
cm 2 /Vs
cm 2 /Vs
Ohm-cm
Ohm-cm- 1
s
s
s
s
s
s
s
Volt
Volt

l·odex
Avalanche breakdown
bipolar transistor, 169
p-n junction, 113
Avalanche multiplication factor, 114, 169
Avalanche photodiode 13 1
Band bending, 221, 237
Band diagram, see also Energy band, 78, 214, 237
Band gap
definition, 8
of common semiconductors, 8
Band gap narrowing, 197
Band-to-band transitions, 32
Barrier height, 215- 217
Base(BJT)
current, 140
graded, 191
minority carrier distribution, 139, 145
recombination current, 140, 146
resistance, 189
transit time, 147, 191
transport factor, 148
width, 138
Base-width modulation, 165-166
Beta (/3) of a BJT
out-off freql:lency, 186
definition, 148
dependence on biasing, 193
dependence on temperature, 198
expression, 150, 151, 169
Bias voltage, 87, 153
Bidirectional switches, 211
Bipelar junction transistor (BJT), 13:7-iO.§
ciicuit symbol, 137
configµrations, 147-\18
c~llts, 138
. .t"~1rmW::,

chemical, 3
covalent, 3-4
1g. ' • 247
it,
metallic, 3
Breakdown
avalanche, 113, 169
zener, 112
Breakdown mechanism, 111
Breakdewn field, 114-115
Breakdown voltage
BJ1', 169-171
MOSFET, 2841-285
p-n juncbion, 114
temperature dependence, 115
Built-in field, 191
Built-m potential, 78, 84, 86
Bulk Charge Density, 240
Buried channel MOSFET, 307-308
Buried layer,, 178
Capa0itmce
abrupt p-n junction, 89
arbitraey junction, 90-92, 120
charge storage, W9-ll 1
collector junction, 171- 172
depletion, 89, 120, 253
diffusion, U O
emitter-base junction, 171-172
MOS diode, 251-258
MOSFE1', 300-303
parasitic, 185, 305
Capacitance-voltage meastuement, 2.i J
Canier concentration
equilibrium, 12-22
excess, see Excess carriers
~ent, 95, 99, 110
ipf.insic, 12
e dependence, 20, 27
~non, 32, 94
· n, 31, 94
• l
Ohanne1 229 283
oonduotaAce, 91'
doping, 222, ~8
length, 223, 2 260
pinch-0ff, 225, 225
resistance, 2 23 •
thickness, 223
width 223'. 2!~dulation, 282-284
Ohannel len.gth ee Electron; Hole Charge
Charge cameris, s
neutrality, 26 ations
Charge control equ
BJ'F, 183-.186 105-108
junction diode,
Charge stor~ge . 105-108
. n Junction,
map- 174-178
in a transistor (BJT): . (CVD) 56
Chemical vapour deposition '
Circuit Symbols
BJT, 137
diode, 96
MOS.PET, 259
Thyristor, 2 11
CMOS, 305
Coherent light, 132
Collector (BJT)
breakdown, 169-170
current, 140-156
region, 138
resistance, 189
Collisions (scattering), 37
Common base
breakdown voltage, 170
configuration, 147
current gain, 147-148, 153
Common-collector configuration, 147-148
Common-emitter
breakdown voltage, 170
configuration, 147-148
current gain, 148- 151, 154-155, 169
Complementary error function (erfc), 49
Compound semiconductors, 4
Concluctance
channel, 229, 283
diode, I 10
output (BJT), 166-167
Conduction band
description, 7
effective density of states 17
effec~ive mass, 14 '
electt:on concentration 17
Cenciluctien pr0cess, see :itso Diffu.sion .
Conductivity, 2, 62
'
Contact, metai-semiconductot 20tl\
tac tentiill, see als B-iu ·

'bn, 65-66
61-62
-voltage characteristics
, 158-166
, 226-228
osFET, 264-212, 279-284, 306, so8
n junction diode, 92-99
J>.-n-p-n diode, 206--207
Schottky diode, 218-219
solar cell, 125-128
thyristor, 210
tunnel diode, 122-123
ff frequency
BJT, 186-190
MOSFET, 304
t-off mode (BJT), 138
-off wavelength, 133-134
N measurement, 251
hralski techniqe, 45-46
'
pro •~so
sealec:l;.tube, 51
source materials;
Diode, see also p-n junction
ac equivalent circuit. 111
breakdown, 111-116
current-voltage characteristics, 92-104
ideality factor, 104
laser, 132-136
light emitting, 132-133
long-base, 100, 110
metal-semiconductor junction, 214-222
p-i-n, 131-132
p-n-p-n, 206-210
Schottky, 214, 222
short-base, 100, 110
tunnel, 121-123
varactor, 120-121
Zener, 120
Direct semiconductor, 9-10
Direct (band-to-band) transitions, 9
Direct recombination, 32-36
Donor
doping, 5-6, 12
impurity, 12
ionization coefficient, 23-24
level, 12
Dopant
n-type, 6
p-type, 6
Doping, 5
Double heterostructure laser, 135-136
Drain, 222, 234
Drain Conductance, 229, 303
Drift
component in p-n junction, 97
current, 61-62
velocity, 37-38, 61

Bpi tax~
Hquid-phase (iuPE), 4 1, 49 49
maleeular beam ~MB'E), 47 •
vapeur. phase ~VPB), 4 7-4 8
Equivalent eittGuit
B!T, 152, 156, 172, t8
8
diede, 11 t
MOSPET, 301
MOSFET amplifier, 303-364
p-n-p-n device, 208
Esaki diode, see Tunnel diode
Etching
anisotropic, 313-314
of Si0 2
layer, 57
Excess carriers, 30-37
Extraction of carriers, 32
Extrinsic semiconductor, 12
fT (cut off frequency)
BJT, 186-189
MOSFET amplifier, 304
Fabrication process
BJT, 178-180
MOSFET, 272-273
p-n junction diodes, 116-117
Face centred cubic (fee) lattice, 311
Fermi-Dirac distribution, 14-16
Fermi Level
extrinsic semiconductor, 21
intrinsic semiconductor, 19
FET, see Field effect transistor
Fibres (optical), 132, 134
Field-dependent mobihty model, 280-281
Field effect transistor
heteroJunction FET, 231-232
JFET, 222-229
MESFET, 230-231
MOSFET, 234-310
Fill factor, 128-129
Fixed oxide charge, 247-248
Flat-band condition, 246
Flat-band voltage, 246, 250
Float zone technique, 45-46
Flux, 66-67
Forbidclen gap, 7
F0rward-blocking state (thyristor), 207_208
Forward con.ducting state (thyristor), 208-209
Four-layer diode, see p-n-p-n devices, diode
Gallium arsenide devices
HBT, 201-203
HEMT, 231-232
Laser, 135-136
MESFET, 230-231

::r, 2:22
FBT, 230
OSFET, 234
,Thyristor, 210
tdth-off, 211
Ga,µi sian ploVdistributionlprofille, 49, 76
Gauss law, 83, 240
Generation of carriers
optical, 32
rate, 32-33
thermal, 31, 32
Oeneriation-Fecom0ination process 32
Oraded jl!lRebion, 86
'
Gradual cnaRnel apll)r@ximation, 264, 295
Growth of single crystals, 45-46
Gummel number, 149-150
Gummel plot. 193-194
Hall
coemcient, 64
effect, 64-65
field, 64
measurements, 65
voltage, 65
Heavy doping effects, 196--198
Heterojunction devices
HBT, 201-204
HEMT, 232
Lasers, 132-136
ph@torliode, 131-132
High f.Fecquency capacitance curve, 253, 256
High fJJequency bipolar transistor, 190
High mobility semiconductors, 42
Hole
concentration in valence band, 18
effective mass, 14, 38
mobility, 38
as a partiele, 4-5
quasi-Fermi level, 31
HypeFabrupt junction, 12[
Index 1!1
Integr~t~d circuit fabrication, 45-59
lnterd1g1tated geometry, 190
lnte1rfaee states, 247,
l'nter.fJace t!iap density, 248
Interface-trapped ohavge 248
lnterfacial layer, 248 '
Interstitial atom, 49
Im~nsic carrier concentration, 12, 19
Intrms1c Fermi level, 21-22
Intrinsic semiconductor 12
Intrinsic temperature, 27, 43
lnvers~ active mode of BJT, 138-09
lnvers1on(Population), 135
Inversion condition, 244
Ionic bond, 3
Ion implantation, 51-53
lonizallon coefficient, 23-24
Ionization of impurities, 22-26
Isolation methods in, IC's
oxide, 274
p-n junction, 178
1-V characteristics, see Current voltage characteristics
JFET, 222-229
Junction, ee p-n junction
Junction breakdown, 111-116
Junction field effect transistor, see JFET
Junction 1solation, 178
Kmetic energy, 11
Kirk effect, 195-196
Laser
double heterostructure, 135-136
homojunction, 135-136
structures, 135-136
Lattice, crystal, 311
Lattice scattering, 39-40
Lattice vibFations, 39
iLEID, see L1gM emitbiag diodes
Lifetime
Auger, 196
concept aad definition (of minority Cfillfiers),
33-35
effective, 184-185
Light emitting diodes (LED), 132-133

c co ct, 2~1 Ii
hm's law, i . ttcn 83 SS
One-side~ abrupt JUn~ ol~ ceit~ 128
Open .. cirouit. velt~ge 10-s t '
Open-tu1'e d1ffi.ls10n, .
Opmcal abs011Ption coefficient, 124
Optica1 communication, 1_32, 134
Optical excitation/generation, 31 - 36
Optical lithogrraph~, 5 6
Optoeleet:Fonic devices
Laserrs, 132-133, 135 - 136
LEDs, 132-134 0-BZ
photeaiedes, 123, 13
solar celils, 123-13© .
©verlapping energy bands (m metals), 8
Oxidation rate, 54-55
Oxidation of Si, 54-55
Oxide charge, 247-250
Oxide etching, 57
Oxide isolation, 274
Oxide masking, 56-57
Oxide thickness, 54-55
Parasitic capacitance, 187, 305
Pattern transfer, 56-57
Pauli exclusion principle, 7
p-channel MOSFET, 258-259
Peak current (tunnel diode), 123
Phonon, 9
Phonon scattering, see Lattice scattering
Photo-generated current, 125, 128, 129, 130
Photodectetors, 130
Photodiode, 123, 130-132
Photoelectric effect, 29
Photolithography, 56-57
Photon, 9
Photoresist, 56-57
Photovoltaic effect, 123
Pinch-off (channel), 225, 260, 267, 271, 279, 308
Pinch-off Voltage, 225, 308
p-i-n photodiode, 131-132
Planar technology, 59
Planck's constant, 14, 17, 18, 317
Planes, crystal, 312-314
Plasma enhanced chemical vapour deposition
(PECVD), 56
p-n junction
abrupt, 76-85, 87-C}Q
breakdown, 111-116
current-voltage characteristics, 92-105
forward bias, 87-88, 95
gracled, 86
reveJJse bias, 87-88, 95
.~..-.,,, .. ~-.,,1._.,:,~.; sient analysis, 104-1 U
sitiori region, 80

Quantum efficiency, 130
QuaFtz
erucible, 45
€umace, 54
Quasi-f'ermi levels, 31-32, 98
Quasi-neutrality, 71
Radiation damage, 306
Radiative Recombination, 32, 134
Radiative transitions, 134
Raeie fa:ease, 172, 189, 198-199
eollecter, 172, l 89
negative, 123
series, 172, 187, 189
Resistivity, 2, 62
Resonant cavity (Fahey-Perot), -135
Resonant frequency, 121
~everse blocking (p-n-p-n diode), 207, 209
R~verse saturatiolil €UFTent, 95-96
Richardsoa constant 220
R.'unaway, thermal, i 98
Saturation region (PET), 227-228
267-268, 282-283
Satu~Mion veloeity,, 41, 279-281
Scalmg in MOSFE'iF, 22@-291
Scattering me0hanisms, 39
Solmuky diode, 214=.22~
Selecnive doping, 49-53
Self-aligned MOS transistors, 272-274
Semiconductor controlled rectifier 206
Semiconductors
'
compound, 4, 8
duect, 9
elements, 4
extrinsic, 5
mdirect, 9
intrinsic, 5
Short-channel MOSFETs, 295-299
Short-circuit current (solar cell), 128
Silicon dioxide (Si0 2
)
charges, 247-248
dielectric isolation, 274
gate oxide, 54, 235, 274
growth and deposition, 54-56
maskmg, 56-57
passivatrng layer, 56
Silicon nitnde, (Si 3 N 4 ) , 56
Silicon on Insulator (SOI) MOSFET, 305-306
Smgle crystal, 6, 45
Small-signal equivalent circuit
bipolar transistor, 188
MOSFET amplifier, 304
p-n junction diode, 111
Solar cell
efficiency, 128-129
fi ll factor, 128
1- V characteristics, 127
matenals, 129
Solid solubility, 49
Space charge, 77, 80
SPICE Models
BJT, 152
MOSFET, 264-271 , 279- 284
Spin, electron, 23
Spontaneous emission, i 33
Square-law model for MOSFE'if, 2€i8- 2'70
Step junction, see Abrupt junctioR
Stimulated emission, 133
Storage delay time
BJT, 176-177
p-n junctien diode, 1(!)8- 109
Substitutional impurity, 49
Subsm:ate bias (MOSFE'f), 2611
Substtate cm ent, 261, 284
Subtfuresholcllii cuJ:ilient, 285-289
Subvllliesneld slepe, 288-289
SuJfaee mabMity, 277

Unipolar devices, 214- 310
Unit cell, 6, 311
Vacuum level, 29-30, 214 • 237
Valence band
description, 7
effective density of states, 18
hole concentration in, 18
Valence electrons, 3-4, 7
Valley current, 123
Vapour phase epitaxy (VPE), 47-48
Vapour pressure ( of As, P), 4 6
Varactor diode, 120-121
Velocity
drift, 37-38,
saturation, 41
surface recombination, 37
thermal, 37
Velocity field characteristics, 4 1
Visible LED, 133-134
Voltage regulator, 119-120
Wave functions, 7
Wet chemical etching, 57
Width of depletion region, 84, 86, 88, 240
Work function- difference, 216, 245- 246
X-ray lithography, 57
Zener breakdown, 112-113
Zener diode, 113, 120
Zinc blende lattice, 311

m1conductor
--- D vices
Mod lling and Technology
~.
t • • "• :.: ' ·'~"' ·~ ~
"'"'-... " :, ,,, ,,, -"-"!'", ••.~ ..- '
"'-· ~ I, ,: - '" '" '7t'" I •·· ",
- - 4', ~ --1~ -· -
• .!. ~--~- -~
Nandita DasGupta
An1itava DasGupta
NAN I'l' DA UPTA, Ph.D. (Il TMadras)
i Prof ssor in the Department of Electrical
]!ingin ring, IIT Madras. With more than
fift r s ar h publi ations in various mtern
a tional journals, she has more than ten
ur of teaching experience. Her research
int r sts include Semiconductor Device
T chnology a nd Modelling, and Micro­
El ctro-Mechanical Systems (MEMS).
MITAVA DASGUPTA, Ph.D . (IIT
Kharagpur), is Professor in the Department
of Electrical Engineering, IIT Madras. An
awardee of the DAAD (German Academic
Exchange Program) fellowship (1991), he
has more than ten years of teaching
experience. He has published more than
fifty research paper s in internat10nal
journals of repute. The areas of his interest
are Semiconductor Device Technology and
Modelling, and Micro-Electro-Mechanical
Systems (MEMS).
1m d prim ril at the undergraduate students pursuing courses m semiconductor
ph r i and miconductor devices, this text emphasizes the physical understanding
und rl ring principles of the subject. Since engineers use semiconductor devices as circuit
1 m nt , d vie mod ls commonly used in the cir,cuit simulators, e.g. SPICE, have been discussed
in d t il. d anced topics such as lasers, heterojunction bipolar transistors, second order effects
in BJT , and MOSF.ETs are also covered. With s uch in-depth coverage and a practical approach,
practi ing ngineers and postgraduate students can also use this book as a ready reference.
~g--~
• The chapter on Device Fabrication Technology enables easy visualization of device components
and semiconductor device modelling.
• Numerous worked-out examples highlight the .need for intelligent approximation to achieve
more accuracy in less time.
• "HELP DESK" sections throughout the book contain questions (and their solutions) that reflect
common doubts a beginner encounters. .
~ 295.00
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