Hardware/Software Codesign

Hardware/Software
Codesign
SS 2012
Jun.-Prof. Dr. Christian Plessl
Custom Computing
University of Paderborn
Version 1.0.3 – 13.04.2012

• motivation and introduction
– goals and main questions in HW/SW codesign
• course synopsis
• lecture organization
Overview
2

HW/SW codesign
• what is HW/SW codesign?
– integrated design of computer systems that consist of hardware and
software components
– supported by a systematic computer-aided design process
• objectives
– handle increasing complexity of computer systems
– find better solutions than with a manual process
– reduce design time and validation time/cost
– explore design trade-offs (performance vs. energy efficiency vs. … )
3

Performance vs. size trade-offs for cryptography
• soft- and hardware implementations of different cryptography
algorithms
Schaumont 2010
4

Power efficiency of AES encryption
• same application / different implementations
• vastly different power efficiency depending on specialization/
generality
Schaumont 2010
5

performance
energy efficiency
RISC
sweet
spot
DSP
General purpose vs. application specific
ASIP
FPGA
ASIC
effort to change application
development effort
concerns
extremely high NRE cost
high volume/fixed function only
high engineering effort
high unit-cost
high production cost
competition from off-the-shelf SoC
competition from RISC processors
operating system support
low energy efficiency
IP protection
6

Mix of technologies in most systems
• no “one-size fits all” solution for economical and technological
reasons
– different requirements
– reuse hard- and software implementations
– distribute development cost over a variety of products
• majority of computer systems use a variety of HW and SW
technologies
– programmable processing cores (RISC, DSP, uC, …)
– fixed co-processors/accelerators (e.g., cryptography, multimedia, …)
– reconfigurable accelerators (FPGA, coarse-grained arrays)
• designing and programming such platforms is challenging
– HW/SW codesign addresses this challenge in a systematic way
– example: Texas Instruments OMAP processor (system on chip for mobile
computing systems)
7

Texas Instruments
Example: SoC for mobile computer system
TI OMAP 4430 system-on-chip
8

Texas Instruments
Example: SoC for mobile computer system
input/output controllers
memory
controllers
dual core ARM
embedded RISC
GPU
memory
controllers
TI OMAP 4430 system-on-chip
security co-processor
input/output controllers
multimedia
co-processor
DSP
display controllers
input/output controllers
9

Texas Instruments
Example: SoC for mobile computer system
• HW/SW codesign issues:
input/output controllers
memory
controllers
GPU
memory
controllers
TI OMAP 4430 system-on-chip
security co-processor
input/output controllers
• how to design such a platform?
• how to partition the application’s functionality to
dual core ARM multimedia
components? embedded RISC co-processor
DSP
• how to determine if a particular mapping is good?
• how to generate tools that support such a platform?
display controllers
input/output controllers
10

software
platform
programming
hardware
(platform)
Schaumont 2010 (adapted)
C
RISC
max flexibility
min efficiency
general
purpose
C/ASM
DSP
HW/SW codesign space
Application
C/HDL
ASIP
domain
specific
C/HDL
FPGA
platform
selection
application
mapping
HDL
ASIC
min flexibility
max efficiency
application
specific
11

improve performance
improve energy efficiency
reduce power density
implement more
in hardware
Schaumont 2010 (adapted)
Driving factors in HW/SW codesign
manage design complexity
decrease time-to-market
reduce design & verification cost
implement more
in software
12

• hardware/software partitioning
– what functionality should be programmable?
Main questions in HW/SW codesign
– what functionality should be implemented in fixed in hardware?
– how to create tools (compilers) that can exploit fixed functions?
• system partitioning
– how to distribute functions to different components?
• design space exploration
– what system implementation alternatives exist?
– what are their characteristics (performance, power, cost)
• architecture synthesis
– how to translate software to hardware?
13

• abstract and model
– treat design of HW/SW system as optimization problem
General approach
– abstract and formalize problem and design options (e.g., using graph
problems, integer linear programing, dynamic programming, …)
• optimize or …
– exact or heuristic methods
– determine optimal parameter settings and their sensitivity
• … explore
– explore design space and trade-offs
– computer aided design automation guided by human decisions
14

• introduction
– target architectures
– introduction to compilers
Topics we will look at in this lecture
• high-level hardware architecture synthesis
• partitioning
– hardware/software partitioning
– system partitioning
• design space exploration
– estimation of design parameters
• instruction set extension
15

Relation to other lectures in CS curriculum
• Bachelor level courses
– GRA/GTI
§� fundamentals of digital logic and computer architecture
– Embedded processors
§� architecture of embedded processors, micro controllers and DSPs
§� compilers for special purpose processors
– Embedded Systems
§� modeling languages, hardware verification
• Master level courses
– Reconfigurable Computing
§� FPGA technology (architecture, methods and applications)
– Architektur Paralleler Rechnersysteme
§� parallel programming models and languages, high-performance computing
16

Benefits from attending this course
• Learn about
– challenges and approaches in modern system design
– target architectures
– useful optimization methods
– a current and active research area
17

• Lecture Friday, 11:15-12:45, O1.267
• Exercises Friday, 13:15-14:00, O1.267
– mix of pencil and paper and programming exercises
– try to solve the problems yourself
– discussion of the problems in the exercises
• Contact: Christian Plessl
Course Organization
email: christian.plessl@uni-paderborn.de
office: O3.110, phone: 60-5399
• Web page
http://homepages.uni-paderborn.de/plessl/lectures/2012-Codesign
• Course Materials on the web
– lecture slides, exercise sheets, selected papers
18

Literature and acknowledgements
• this course is based on materials from the following books…
– Patrick R. Schaumont, A practical Introduction to Hardware/Software
Codesign. Springer 2010. doi:10.1007/978-1-4419-6000-9
(available in full text within UPB network)
– Jürgen Teich and Christian Haubelt. Digitale Hardware/Software-Systeme.
Synthese und Optimierung. Springer, 2007.
doi:10.1007/978-3-540-46824-0
(available in full text within UPB network)
– Giovanni De Micheli, Synthesis and Optimization of Digital Circuits.
McGraw-Hill, 1994.
• … and on lecture materials from the Bachelor-level lecture “HW/
SW Codesign”
– taught by Christian Plessl (2009-2010) and previously by Marco Platzner
19

• v1.0.3 (2012-04-14)
– corrected minor typos
• v1.0.2 (2012-04-10)
– updated for SS2012
• v1.0.1 (2011-04-01)
– added more slides illustrating the FPGA toolflow
Changes
20