R2A20115 Application Note - Renesas Electronics

R2A20115 

Application Note 

1. Introduction 

APPLICATION NOTE 

R2A20115 is a power-factor correction (PFC) controller IC, which employs continuous conduction mode as PFC 

control mode. Various kinds of functions such as constant power limit, overvoltage detection, overcurrent detection, 

soft start function, feedback-loop open detection, and the function holding its operation through momentary outage 

(PFC hold function) are incorporated in a single chip. These functions reduce external circuitry. 

The constant power limit function significantly reduces "coil vibration", which is caused by the operation of a 

conventional overcurrent detection circuit when the system is overloaded. 

The PFC hold function enables quick recovery by keeping PFC operation active for a certain duration (hold time) 

during momentary outage/power failure. The hold time can be adjusted by an external capacitor. 

This IC provides the separated pin used for detecting overcurrent, so that, the preset current value range for overcurrent 

detection becomes wider than before. 

The shutdown function with latch mode is also implemented. 

A soft-start control pin is provided for the easy adjustment of soft-start operation. 

And also the dynamic over voltage protection function integrated in this IC reduces overshooting of the output voltage, 

which might occur for the duration of startup, recovery after momentary power failure and just after a sudden variation 

of a load. 

2. Block Diagram 

RT 

CT 

CAO 

IAC 

CAI 

CLIMIT 

CGND 

EO 

FB 

PFC-ON 

9 

10 

7 

12 

5 

8 

4 

14 

13 

11 

VREF 

0.1μ 

Multiplier 

2.48V 

VAMP 

0.52V 

3.6V 

0.65V 

0.81V 

0.79V 

CAMP 

27.5V 

VCC 

16 

DELAY 

EO 

Discharge 

FB 

10.4V 

H 

UVLO 

L 

8.9V 

CLIMIT 

Shut down 

VREF 

5V VREF 

Generator 

Gate Driver 

+/– 1.0A (PEAK) 

R03AN0002EJ0100 Rev.1.00 Page 1 of 13 

Jan 25, 2011 

SS 

OVP Block 

Logic 

OUT 

Disable 

AC-Det 

UVL 

VREF In 

GOOD 

Out 

5V Internal Bias 

VREF 

28μA 

Circuit Ground 

6 

1 

15 

2 

3 

VREF 

OUT 

SS 

GND 

DELAY 

R03AN0002EJ0100 

Rev.1.00 

Jan 25, 2011

R2A20115 Application Note 

3. Example Design of a Peripheral Circuit of R2A20115 (Reference Design) 

Note: This shows the example of IC peripheral circuit design. So that, the circuit parameters/constants might differ 

from them shown below, depending on types of parts, locations of parts, board patterns and so on. Please 

examine and evaluate the operation of your actual circuit and board sufficiently. 

In calculations achieved in this section, symbol names of parts, such as "Cout", "Cpfc", etc. are utilized based on the 

example diagram depicted below. 

L 

Rcs 

Isum 

Rmo 

Rmo 

12V 

+ 

Cout 

CGND 

CAI 

Vout 

Reo1 

+ 

10μ 

C-Amp 

+ 

– 

Imo 

Ceo1 

16 15 14 13 12 11 10 9 

VCC 

OUT 

1000p 

R2A20115 

1 2 3 4 5 6 7 8 

Rclimit1 

0.1μ 


Jan 25, 2011 

Reo2 

Ceo2 

SS 

GND 

Figure 1 

Css 

EO 

DELAY 

Vout 

Rfb1 Rfb2 

Cdelay 

Rmo 

FB 

CGND 

Rmo 

Rcs 

IAC 

CAI 

AC_Rectifier 

Cpfc 

Note: Calculations carried out in this section are summarized in Excel sheets. If necessary, please contact a Renesas 

sales office. 

Rac 

Rpfc1 

PFC-ON 

VREF 

Rref-cai 

Rpfc2 

CT 

CAO 

Ct 

RT 

CLIMIT 

Rt 

Ccao2 

Ccao1 

Rclimit3 

Rclimit2 

Rcao1 

Rcao2 

Cclimit1


It shows the design example according to the specifications of power supply describe in table 1. 

Table 1 Specifications of Power Supply (Example) 

Item Setting (Range) Symbol 

The range of AC input voltage AC80 V to 265 V Vac(min) to Vac(max) 

The range of AC input frequency 40 Hz to 70 Hz fac(min) to fac(max) 

Output voltage 395 V Vout 

Rated output power 500 W Pout 

Power limiter 600 W Plimit 

3.1 Switching Frequency (fout) 

The noise frequency appearing on an output terminal of the system higher than 150 kHz is regulated, so that, in general, 

the 2nd harmonic of the switching frequency should be set at the frequency lower than 150 kHz. In this case, the 

switching frequency should be lower than 150 kHz/2 = 75 kHz. By taking account of margin, the switching frequency 

results in 65 kHz. 

3.2 Boost Inductor (L) 

Ripple current (�I) flowing in the boost inductor L is obtained by the formula (1). 

Generally, the inductance value L should be set such that the boost inductor current is 20% of peak value of input AC 

current when minimum input AC voltage (Vac(min)) and rated load are applied. By this consideration, the inductance 

value L can be obtained by the formula (2). 

√2 ⋅ Vac(min) ⋅ (VOUT – √2 ⋅ Vac(min)) 

ΔI = ⋅ ⋅ ⋅ (1) 

fOUT ⋅ L ⋅ VOUT 

√2 ⋅ Vac(min) ⋅ (VOUT – √2 ⋅ Vac(min)) 

L = ⋅ ⋅ ⋅ (2) 

fOUT ⋅ 0.2 ⋅ 

√2 ⋅ POUT 

Vac(min) 

⋅ VOUT 

AC Input Peak 

Current 

Inductor Current 

Figure 2 AC Input Current and Inductor Current 

By assigning (numerical) values, the inductance value L results in 703 �H from formula (2). 

As is often the case with actual design, the inductance value L can not be selected ideally as given by the formula (2), 

due to the limitation in size, necessity of using an inductor diverted from other products, so on. In order to get sufficient 

characteristics of DC superimpose using with as small core as possible, it is necessary to make the inductance value 

rather small. So that, by taking this into account, the value of 150 �H is adopted as the inductance value L in this 

application note. In this case, ripple current (�I) results in 8.28 A from the formula (1). 


Jan 25, 2011 

ΔI


3.3 Output Capacitor (Cout) 

The capacitance value of the output capacitor (Cout) is calculated based on the hold up time of output voltage (tkeep) 

and the minimum output voltage (Vout(min)) by the formula (3). 

2 ⋅ Pout ⋅ tkeep 

Cout = ⋅ ⋅ ⋅ (3) 

Vout 2 – Vout(min) 2 

Cout will result in 811 �F based on the following conditions. 

� Hold up time (tkeep): 12.5 ms (a half of minimum AC frequency) 

� Allowance of output voltage variation: –20 V. 

Ripple current (ICripple) is obtained by the formula (4). 

2 

2 

2 ⋅ √2 ⋅ Vout Pout √2 ⋅ Vac(min) 

ICripple = – 3 ⋅ + 

⋅ ⋅ ⋅ ⋅ (4) 

Vac(min) Vout 3 ⋅ Vout 

ΔI 

2 

In case of EVB, the formula (4) gives 4.38 A as the value of ripple current. 

On the EVB, as the capacitor (Cout), of which capacitance value is near/close to the calculated value (811 �F), parallel 

connection of two capacitors, each of which capacitance/blocking voltage and ripple current allowance is 470 �F/450 V 

and 2.64 A respectively, is used. As for the ripple current, calculated ripple current in each capacitor is a half of 4.38 A 

(2.19 A), which is smaller than ripple current allowance of it. 

3.4 PFC-ON Terminal Voltage 

In order to detect the level of input AC voltage, the voltage is applied to PFC-ON terminal, the voltage which is passed 

through the full-wave rectifier from AC input voltage, and then divided by resisters and then smoothed by smoothing 

capacitor. The voltage is obtained by the formula (5). 

VPFC-ON = 

2 ⋅ √2 

π 

Rpfc2 

⋅ 

⋅ Vac(rms) 

Rpfc1 + Rpfc2 

⋅ ⋅ ⋅ (5) 

The values of division resistors should be set such that VPFC-ON should be larger than 0.82 V at the minimum input 

AC voltage (Vac(min)) and should not exceed the voltage of PFC-ON terminal absolute maximum rating. In the case of 

EVB, the division resistors consist of 720 k� and 14 k� (10 k� fixed resister and variable resistor (20 k� at 

maximum)), so that, VPFC-ON is 1.37 V at AC 80 V and 4.55 V at AC 265 V. 

It is necessary to smooth the voltage waveform passed through the full-wave rectifier, so that, the smoothing filter 

should be designed such as to have sufficient attenuation at twice of AC input frequency. In the case that the minimum 

input AC frequency is 40 Hz, the filter should have sufficient attenuation at 80 Hz (2 � 40 Hz), so that, by setting the 

cutoff frequency at around 10 Hz, the value of smoothing capacitor (Cpfc) can be obtained by the formula (6). 

1 

Cpfc = ⋅ ⋅ ⋅ (6) 

Rpfc1 ⋅ Rpfc2 

2π ⋅ fc ⋅ 

Rpfc1 + Rpfc2 

By the formula (6), Cpcf results in 1.16 �F. In the case of EVB, it is set to 1 �F. 

PFC-ON terminal is for monitoring AC voltage. So, time constant of RC circuit consisting of Rpfc2 and Cpfc should be 

as small as possible, because too large time constant causes the delay of detecting brownout and sag. It is not 

recommended to use the output of main bridge diode as input signals of PFC-ON and IAC terminals. Because the 

output node of the main bridge diode is connected to the capacitor, of which the value of capacitance ranges from some 

tenths of �F to some �F, for smoothing ripple current in the boost inductor in general, and if charge in this capacitor can 

not be fully discharged in case of small load applied, the detection of the waveform of the full-wave rectifier might not 

be carried out normally and then the operation of the system might be unstable. 


Jan 25, 2011


3.5 Circuit Design of Current Control (Constant Power Limiter Portion) 

Because the resistance values, Rac, Rcs, Rt, and Rmo depend on one another, as expressed in the formulas (7) through 

(11), there can be various combinations of them. So, if the result of calculation largely exceeds the range of 

recommended value, please calculate them again. The table of the recommended value range for each resister are listed 

in the table 2. 

Table 2 Recommended Value Range of Resistors 

Item Min — Max Unit 

Rac 620 k — 2 M � 

Rcs 0.01 — 0.1 � 

Rt 10 k — 100 k � 

Rmo 1 k — 10 k � 

3.5.1 Resistor on IAC Terminal 

IAC terminal is for inputting AC voltage waveform as the current signal converted from the voltage waveform passed 

through the full-wave rectifier by the resistor, Rac. IAC terminal should not exceed 600 �A (absolute maximum rating) 

at maximum input AC voltage. 

Rac > 

√2 ⋅ Vacmax 

600 μA 

⋅ ⋅ ⋅ (7) 

3.5.2 Resistor on RT Terminal 

When the input AC voltage decreases, the input AC current increases in inverse proportion to it under constant load. 

Even in the situation that the input voltage decreases temporally, such as the case of the duration of starting up, 

brownout, and sag, the input AC current is controlled to increase. In such a case, the audio noise/coil vibration of the 

boost inductor or over-loading on each device might occur by the operation of the over current protection circuit. To 

avoid these, the function to set the upper limit on the current on CAI terminal is provided. Maximum value of CAI 

terminal current is in inverse proportion to RT resistor value. When power limit (Plimit) is in operation at minimum 

input AC voltage (Vac (min)), CAI terminal current is obtained by the formula (8). Please set the RT value to satisfy 

formula (9) according to the result of the formula (8). 

2.425 ⋅ (Rpfc1 + Rpfc2) 

Icaimax = ⋅ ⋅ ⋅ (8) 

2 

Vacmin ⋅ Rac ⋅ Rpfc2 2 

4.95 

RT < ⋅ ⋅ ⋅ (9) 

Icaimax 

3.5.3 Current Detect Resistor 

Please determine the resistance value of the current detect resistor Rcs in consideration of the power consumption of it 

with maximum load at minimum AC input voltage, namely, please determine the value of Rcs to satisfy the formula 

(10). 

Rcs < Vacmin 

Plimit 

2 

⋅ (Rated Power Consumption of Rcs) 

⋅ ⋅ ⋅ (10) 

3.5.4 Resistor on CAI Terminal and CGND Terminal 

The resistance value of the resistor, Rmo to be connected to CAI terminal or CGND teminal is obtained by the formula 

(11). 

Plimit = 

1.715 ⋅ Rmo ⋅ (Rpfc1 + Rpfc2)2 

Rcs ⋅ Rac ⋅ Rpfc2 2 

⋅ ⋅ ⋅ (11) 


Jan 25, 2011


3.6 IC Operating Frequency 

IC operating frequency, fout is determined both by the resistor on RT and the capacitor on CT terminal. It is 

approximately calculated by the formula (12). 

fout = 

1.69 × 106 Rt [kΩ] [KHz] 

× Ct 

[pF] 

⋅ ⋅ ⋅ (12) 

Using the values, fout (65 kHz obtained in subsection 3.1) and Rt (62 k� obtained in subsection 3.5.2), the calculated 

capacitance value of Ct result in 420 pF by the formula (12). On EVB, the value of 390 pF is used as Ct. The value of 

Ct should be larger than 100 pF in order to reduce the influence of parasitic capacitance and noise. 

Actual value is different from calculated one at high frequency because of IC internal delay. Please confirm it's 

operation using an actual board. Maximum operating frequency is 400 kHz. The figure depicted below shows the 

reference data of operation frequency related timing resistor and capacitor. 

Operational Frequency [kHz] 

1000 

100 

10 

1 

1 10 100 1000 

Timing Resistor [kΩ] 

Figure 3 Operational Frequency 

Timing Capcitor 

Ct 

560 pF 

1000 pF 

3300 pF 

5600 pF 

0.01 μF 

3.7 Output Voltage Setting 

The voltage divided by resisters from output voltage is applied to FB terminal. FB terminal is controlled to keep its 

voltage at 2.48 V. So, please determine division resistors to satisfy the specification of output voltage. On the EVB, 

Rfb1 is set at 680 k� and Rfb2 is set at 4.3 k� (3 k� + adjustable resistor (max 5 k�)). 

⋅ 2.48 V Rfb1 + Rfb2 

Vout = ⋅ ⋅ ⋅ (13) 

Rfb2 


Jan 25, 2011


3.8 Over Current Detection Circuit 

The over current detection circuit monitors voltage drop in the current detection resistor, Rcs. Division resistors, 

Rclimit1 and Rclimit2 are connected between VREF terminal and the current detection resister, Rcs, and the 

intermediate point of the division resistors is connected to CLIMIT terminal. Over Current Protection (OCP) circuit 

will start working when the output current increases, namely, the voltage drop in Rcs increases, and as a result, CLIMIT 

terminal voltage becomes lower than 0 V. The detected current is the current superimposed inductor ripple current on 

AC current. Formula (14) shows AC peak current (Isum (max)), and formula (15) shows inductor ripple current (�IL). 

Then, peak current including ripple current can be obtained by the formula (16). 

Isummax = ⋅ 

Rmo 4.95 

Rcs RT 

ΔIL = 

√2 ⋅ Vacmin 

L 

1 

Isumpeak = Isummax + 

2 

⋅ ⋅ ⋅ (14) 

√2 ⋅ Vacmin 1 

⋅ 1 – 

⋅ ⋅ ⋅ ⋅ (15) 

Vout fosc 

× ΔIL 

⋅ ⋅ ⋅ (16) 

The cause of coil vibration/audio noise is that the over current protection circuit detects over current and then suspends 

gate driver pulse. It is possible to avoid it by having the power limiter activated before the over current protection 

circuit. To prevent the activation of the over current protection circuit, even if the current reaches to Isumpeak, please 

determine the values, Rclimit1, Rclimit2 satisfying formula (17). 

On EVB, Rclimit1 and Rclimit2 are set at 22 k� and 10 k�, respectively. 

Rclimit2 

Rclimit1 

⋅ Vref – ⋅ Rcs ⋅ Isumpeak > 0 

Rclimit1 + Rclimit2 Rclimit1 + Rclimit2 

V 

⋅ ⋅ ⋅ (17) 

The waveform of current to be inputted to the over current protection circuit is the waveform in which the current in 

"sine" shaped waveform with the same cycle time as that of input AC voltage and the current in "sawtooth" shaped 

waveform with the same cycle time as that of switching operation are superimposed . In general, in order to avoid 

unexpected operation of the over current protection circuit, the filter consisting of Rclimit3 and Cclimit1 should be 

connected to the terminal for over current detection. However, the cutoff frequency of the filter is lowered due to the 

resistors, Rclimit1 and Rclimit2. And then, this should be noted, over current detection might not carry out correctly 

because of the filter, of which cutoff frequency is lower than that of expected. The cutoff frequency, Fclimit is obtained 

by the formula (18). 

1 

fclimit = ⋅ ⋅ ⋅ (18) 

Rclimit1 ⋅ Rclimit2 

2 ⋅ π ⋅ Cclimit1 ⋅ + Rclimit3 

Rclimit1 + Rclimit2 

The value of Fclimit should be set at the value at least three times larger than the switching frequency. 

At the same time, it should be noted that this value should be set at the value such that the source current of VREF 

terminal should not exceed 5 mA, which is the maximum rating. 


Jan 25, 2011


3.9 Rise Up Time of Output Voltage 

The time for charging to the output capacitor is controlled by the operation of the constant power limiter, so that, the 

rise time of the output voltage depends on the operation of the constant power limiter. In such a case, the rise time of is 

approximately calculated by the formula (19). 

tss = 

Vout 2 – (√2 ⋅ Vac) 2 

1 

⋅ Cout ⋅ 

2 Plimit – A ⋅ Pout 

⋅ ⋅ ⋅ (19) 

Where "A" is the compensation factor, which is 1 in case that the load is constant power load. On the other hand, "A" 

varies from 0.6 to 0.9 in case of constant current load, because the output voltage dominates the power dissipation on 

load, so the value of "A" can not be a constant value. 

It is possible to make the rise time longer by using the soft start function. The rise time is the duration in which the 

voltage of CAO terminal reaches to the normal voltage after discharging of SS terminal. This can be calculated 

approximately by the formula (20). 

Vac 

3.5 – 3.1 ⋅ 

Vout 

tss = Css ⋅ ⋅ ⋅ ⋅ (20) 

Iss 

On the EVB, Css is 0.47 �F. In this case, Rise up time is obtained by the formula (19). 

3.10 PFC Hold Time 

PFC hold time (thold) is calculated by the formula (21). It should be noted that PFC hold time depends on input AC 

voltage. 

Where, 

thold = t1 + t2 – t3 

t1 =–Rpfc2 ⋅ Cpfc ⋅ ln 

0.79 V 

VPFC-ON 

1.2 V 

t2 + t3 = CEDLAY ⋅ 

Isrc-delay 

1.16 V 

Isrc-delay = 

RT 

2 ⋅ √2 ⋅ VAC Rpfc2 

VPFC-ON = ⋅ 

π Rpfc1 + Rpfc2 

⋅ ⋅ ⋅ (21) 

⋅ ⋅ ⋅ (22) 

⋅ ⋅ ⋅ (23) 

0.81 

Rpfc1 ⋅ Rpfc2 

t3 =–Cpfc ⋅ ⋅ ln 

⋅ ⋅ ⋅ (24) 

Rpfc1 + Rpfc2 

V 2 ⋅ √2 ⋅ VAC 

– 

π 

0.4 V 2 ⋅ √2 ⋅ VAC 

– 

π 

⋅ ⋅ ⋅ (25) 

⋅ ⋅ ⋅ (26) 


Jan 25, 2011


AC Input Voltage 

passed through 

the full wave 

rectifier 

The Voltage on 

PFC-ON 

Terminal 

The Voltage on 

DELAY 

Terminal 

0.79 V 

t1 


Jan 25, 2011 

t2 

thold 

0.82 V 

t3 

0.4 V 

1.2 V 

Figure 4 The Illustration of Hold Time 

DELAY terminal should be connect to a capacitor (the capacitance ranges a few hundreds to a few thousands pF) even 

if the PFC hold function is not used. In case of DELAY terminal left open, the shutdown capability might be activated. 

Depending on the situation of usage, larger capacitance might be needed, so that, please confirm it with your actual 

board carefully. 

3.11 Frequency Characteristics of Voltage and Current Amplifier 

Voltage and current amplifier are consisting of transconductance (gm) amplifier. It does not need to feedback for input 

side. 

Therefore, it is possible to minimize influence on input circuit by feedback circuit. 

Gain of gm amplifier is calculated by product of transconductance and output impedance. For example of voltage 

amplifier, the gain, Gv is obtained by the formula (27). Where Gm-v is transconductance of voltage amplifier. Rvo is 

output resistor of voltage amplifier itself. 

The outline of the characteristics of gain for various parameters are shown in figure 5, and frequency characteristics of 

amplifier is shown figure 6. 

1 

GV = Gm-v ⋅ 

⋅ ⋅ ⋅ (27) 

1 1 

1 

+ + jωCeo1 + 

Rvo Reo1 

1 

Reo2 + 

jωCeo2 

Gain 

Reo1 

larger 

Ceo2 

larger 

Reo2 

larger 

Ceo1 

lager 

frequency 

Figure 5 Outline of Gain Characteristics


Gain [dB] 

80 

60 

40 

20 

0 

–20 

–40 

–60 

–80 

2π ⋅ Ceo2 ⋅ 

1 

Rvo ⋅ Reo1 

Rvo + Reo1 

1 

2π ⋅ Ceo2 ⋅ Reo2 

100E–3 1E+0 10E+0 100E+0 1E+3 10E+3 100E+3 1E+6 10E+6 

Frequency [Hz] 

Gain Phase 

1 1 

Rvo ⋅ Reo1 2π ⋅ Ceo1 ⋅ Reo2 

2π ⋅ Ceo1 ⋅ 

Rvo + Reo1 


Jan 25, 2011 

200 

150 

100 

50 

0 

–50 

–100 

–150 

–200 

Phase [°] 

Gm–v ⋅ 

Figure 6 V-Amp Frequency Characteristics 

Gm–v ⋅ Reo2 

Rvo ⋅ Reo1 

Rvo + Reo1 

Gm-v = 200 μA/V 

Rvo = 4 MΩ 

Reo1 = 3 MΩ 

Reo2 = 2.2 kΩ 

Ceo1 = 470 pF 

Ceo2 = 6800 pF 

3.12 Phase Compensation Circuit of Voltage Amplifier 

Output voltage load regulation is in inverse proportion to open loop gain of the voltage amplifier. The voltage variation 

(dVout) of output voltage until the output voltage reaches to the voltage, at which the power limiter is activated, is 

shown in the formula (28). 

dVout = 

– ⋅ 

ΔVeo Rfb1 + Rfb2 

Gm-v ⋅ Ro Rfb2 

⋅ ⋅ ⋅ (28) 

Where �Veo denoting the voltage range of EO terminal is around 3.9 V, Gm-v is the tranceconductance of voltage 

amplifier, Ro is the total output impedance of the voltage amplifier, and it is obtained by the formula (29), assuming 

Rvo as the output impedance of the voltage amplifier by itself. 

Rvo ⋅ Reo1 

Ro = 

Rvo + Reo1 

⋅ ⋅ ⋅ (29) 

Gm-v is 180 �A/V and Rvo is around 2.5 M�. Reo1 results in 925 k�, if dVout is set at –5 V. On the EVB, it is set at 

820 k�. 

The loop compensation of the voltage amplifier is determined by the gain of boost stage and the divided gain of 

feedback resistor. 

GF-V, denoting the gain of boost stage, is shown by the formula (30). 

Rfb2 

Pout 

GF-V = 

⋅ 

Rfb1 + Rfb2 2πf ⋅ Cout ⋅ ΔVeo ⋅ Vout 

⋅ ⋅ ⋅ (30)


Frequency characteristics of voltage loop is expressed by the product of frequency characteristics of boost stage and that 

of voltage amplifier. Compensation is necessary enough to decrease ripple voltage, in which the twice of AC frequency 

is included. 

As an aim, parameters should be set such that the gain of the voltage loop should be around –30 dB at ripple frequency, 

and that the cutoff frequency should be set at the value as close as zero cross point of voltage loop in order to keep the 

phase margin of the voltage loop. 

Below describes the example of basic settings: 

GF-V results in 0.00432 times (–47.3 dB) at twice of minimum AC frequency (80 Hz). Therefore, the voltage amplifier 

gain should be + 17.3 dB (7.33 times) in order have voltage loop gain be –30 dB at 80 Hz. 

Cut off frequency of the voltage amplifier is set at 5.18 Hz (80 Hz � 7.33 / 111.1) because of open loop gain of voltage 

amplifier is 40.9 dB (111.1 times). Therefore, Ceo1 results in 0.049 �F (1 / (2� � 5.28 Hz � 617.5 k�)). On the EVB, 

Ceo1 is set at 0.033 �F. The calculated/theoretical characteristic is shown in figure 7. Characteristics varies for each 

application, so that, please adjust parameters, such as Reo2, Ceo2, Reo3, Ceo3, etc., if necessary. 

Gain [dB] 

–30dB 

–160° 

100 

80 

60 

40 

20 

0 

–20 

–40 

–60 

–80 

–100 

–200 

100E-3 1E+0 10E+0 100E+0 


1E+3 10E+3 100E+3 

Phase Margin 

Zero Cross 

Frequency 

2*fac(min) 

Zero Cross 

Phase 


Jan 25, 2011 

200 

160 

120 

80 

40 

0 

–40 

–80 

–120 

–160 

Phase [°] 

–180° 

Figure 7 Voltage Loop Frequency Characteristics 

Gain of boost stage 

Gain of Voltage Amplifier 

FB Voltage Divide Gain 

Phase of Voltage Loop 

Gain of Voltage Loop


3.13 Phase Compensation Circuit of Current Amplifier 

Loop compensation of the current amplifier is determined by the gain of voltage, Vrcs (hereafter "gain of PWM"), that 

is detected by the resistor converting current to voltage, from Vcao to be inputted to the PWM. 

The gain of PWM is obtained by the formula (31). 

VRcs Vout ⋅ Rcs 

GF-C = ⋅ 

Vcao ΔVCT ⋅ (Rcs + jωL) 

⋅ ⋅ ⋅ (31) 

Where �Vct, denoting the amplitude of oscillation on CT terminal, is around 2.95 V. 

The gain of current loop is product of gain of PWM and gain of current amplifier. 

Frequency characteristics of the current loop should be set such that it has enough gain at twice of AC input frequency, 

in order to sufficiently smooth the current waveform passed through full wave rectifier, and that it has rather low gain at 

switching frequency. As an aim, set the gain at twice of AC input frequency at the value larger than 50 dB, have the 

zero cross frequency 1/10 of switching frequency, and set the gain at switching frequency at –30 dB. On the EVB, 

Rcao1 is set at 82 k�, Rcao2 is 2.2 k�, Ccao1 is 470 pF, Ccao2 is 6800 pF. 

The calculated/theoretical characteristic is shown in figure 8. 

Over 

50dB 

Gain [dB] 

Around 

–30dB 

100 

80 

60 

40 

20 

0 

–20 

–40 

–60 

–80 

–100 

2 × AC freq. 

Zero Cross 

freq. 

Zero Cross 

freq. 

Zero freq. of 

C-Amp Switching freq. 

Around 

1/10 

Zero Cross 

Phase 

1E+0 10E+0 100E+0 1E+3 10E+3 100E+3 1E+6 


–150° 

–160 

–180° 

–200 


Jan 25, 2011 

200 

160 

120 

80 

40 

0 

–40 

–80 

–120 

Phase [°] 

Phase 

Margin 

Figure 8 Current Loop Frequency Characteristics 

PWM Gain 

Gain of Current Amplifier 

Gain of Current Loop 

Phase of Current Loop 

In general, phase compensation circuit of the current amplifier should be connected between CAO terminal and VREF 

terminal. However, sometimes having the phase compensation circuit connected between CAO and GND stabilizes the 

operation of it more than connected between CAO and VREF terminals, except for Rcao1. (Rcao1 should be connected 

between CAO and VREF terminals.) If Rcao1 is not connected any where, or connected between CAO terminal and 

GND, the operation might be unstable when the load of the system is light, because amount of detected current becomes 

smaller by the light load and then the output of the current amplifier becomes unstable and then the pulse width of 

PWM might be controlled to be wider.


3.14 Pattern Layout 

In designing the pattern layout, pay as much attention as is possible to the following points: 

(1) Place the IC pins (particularly, CGND, CAI, PFC-ON, IAC, FB) and their wiring as far from high-voltage switching 

lines (particularly the drain voltage for the power MOSFET) as possible and in general design the wiring to 

minimize switching noise. 

(2) Wiring connecting between CGND and Rcs via Rmo should be placed near Rcs with separate line. 

(3) It is probable that the operation becomes stable by inputting signals via low pass filter to CLIMIT, PFC-ON, IAC, 

FB terminal. However, it should be noted that applying low pass filter too strongly might make the operation 

unstable on the contrary. 

(4) Place a resistors and capacitors connected to VREF, RT, CAO, CT, VCC as close to the IC as possible, and make 

wiring length as short as possible. 

(5) Below are the items to which attention should be paid generally in pattern layout of PCB listed in order of a priority. 

These items are just for reference for pattern layout design, so that please verify the operation of the actual board 

sufficiently: 

1. Place the IC as far from high voltage switching lines as possible. 

2. Place the stabilizing capacitor for VREF as close to the IC as possible. 

3. Place the stabilizing capacitor for VCC as close to the IC s possible. 

4. Place the resistors and capacitors (Rcao1, Rcao2, Ccao1, Ccao2) for CAO terminal as close to the IC as possible. 

5. Wiring between CGND and Rcs via Rmo. 

6. Place the timing resistor for RT as close to the IC as possible. 

7. Place the timing capacitor for CT as close to the IC as possible. 

8. Place the resistors and capacitors (Reo1, Reo2, Ceo1, Ceo2) for EO as close to the IC as possible. 

9. Place the resistors and capacitors (Rpfc1, Rpfc2, Cpfc) for PFC-ON as close to the IC as possible. 

10. Place the resistors (Rfb1, Rfb2) for FB as close to the IC as possible. 

11. Place the resistors (Rac) for IAC as close to the IC as possible. 

12. Place the resistors (Rclimit1, Rclimit2) for CLIMIT as close to the IC as possible 

13. Place the capacitor (Cdelay) for DELAY as close to the IC as possible. 

14. Place the capacitor (Css) for SS as close to the IC as possible. 

(6) There is a potential that placing the heat sink between ICs and power MOSFET might be a some kind of shield and 

this might reduce the radiation noise (figure 9). 

Website and Support 

Renesas Electronics Website 

http://www.renesas.com/ 

Inquiries 

http://www.renesas.com/inquiry 

IC 

Heat Sink 

F 

E 

T 


Jan 25, 2011 

Heat Sink 

Figure 9 The Example of Parts Allocation 

All trademarks and registered trademarks are the property of their respective owners. 

F 

E 

T 

IC

Revision Record 

Description 

Rev. Date Page Summary 

1.00 Jan 25, 2011 — First edition issued 

A-1

Notice 

1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas 

Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to 

be disclosed by Renesas Electronics such as that disclosed through our website. 

2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or 

technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or 

others. 

3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. 

4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for 

the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the 

use of these circuits, software, or information. 

5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and 

regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to 

the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is 

prohibited under any applicable domestic or foreign laws or regulations. 

6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics 

assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 

7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product 

depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas 

Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for 

which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the 

use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. 

The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. 

"Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; 

personal electronic equipment; and industrial robots. 

"High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically 

designed for life support. 

"Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical 

implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. 

8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage 

range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the 

use of Renesas Electronics products beyond such specified ranges. 

9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and 

malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the 

possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to 

redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, 

please evaluate the safety of the final products or system manufactured by you. 

10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics 

products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes 

no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 

11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. 

12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. 

(Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. 

(Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. 

SALES OFFICES 

Refer to "http://www.renesas.com/" for the latest and detailed information. 

Renesas Electronics America Inc. 

2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. 

Tel: +1-408-588-6000, Fax: +1-408-588-6130 

Renesas Electronics Canada Limited 

1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada 

Tel: +1-905-898-5441, Fax: +1-905-898-3220 

Renesas Electronics Europe Limited 

Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K 

Tel: +44-1628-585-100, Fax: +44-1628-585-900 

Renesas Electronics Europe GmbH 

Arcadiastrasse 10, 40472 Düsseldorf, Germany 

Tel: +49-211-6503-0, Fax: +49-211-6503-1327 

Renesas Electronics (China) Co., Ltd. 

7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China 

Tel: +86-10-8235-1155, Fax: +86-10-8235-7679 

Renesas Electronics (Shanghai) Co., Ltd. 

Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China 

Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898 

Renesas Electronics Hong Kong Limited 

Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong 

Tel: +852-2886-9318, Fax: +852 2886-9022/9044 

Renesas Electronics Taiwan Co., Ltd. 

7F, No. 363 Fu Shing North Road Taipei, Taiwan, R.O.C. 

Tel: +886-2-8175-9600, Fax: +886 2-8175-9670 

Renesas Electronics Singapore Pte. Ltd. 

1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632 

Tel: +65-6213-0200, Fax: +65-6278-8001 

Renesas Electronics Malaysia Sdn.Bhd. 

Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia 

Tel: +60-3-7955-9390, Fax: +60-3-7955-9510 

Renesas Electronics Korea Co., Ltd. 

11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea 

Tel: +82-2-558-3737, Fax: +82-2-558-5141 

http://www.renesas.com 

© 2011 Renesas Electronics Corporation. All rights reserved. 

Colophon 1.0

R2A20115 Application Note - Renesas Electronics

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?