Software development tools synthesis - Microelectronics - ESA

Available RTOSRTOS ERC-32 LEON-II LEON-III LEON-III(MMU)SupplierRTEMS(LGPL)V4.8.0(Open Src) Edisoft /OARV4.6.5 OAR.V4.6.1+ AstriumVxWorks V6.5-leon WindRiverV5.4-leon WindRivereCOS(GPL)V3.x (SMP)Aeroflex-GRORKOstralesIntegratedwith GNATUsesGNATPro UPM () TAS(internal)4/11/2009ADCSS-2009 Micro processor for Space Applications 4

Available RTOS for Time & Space PartitioningTSPRTOSERC-32LEON-II LEON-III LEON-III(MMU)SupplierAIR-IIRTEMSPikeOSXTratumTRL-3(4) GMV-SkySoftBeing portedto LEONBeing portedto LEON SYSGO Uni ofValenciaIMA moduleCommon Core Processor(TSP architecture)Com’s portIPC memoryto memoryApplication 1Application nIO ApplicationIO driver’sBSW ServicesPartition OSBSW ServicesPartition OSBSW ServicesPartition OSSystem ExecutiveIPC through Memory to Memory transfer4/11/2009ADCSS-2009 Micro processor for Space Applications 5

Simulator / emulator supportSoftwareemulatorsERC-32 LEON-II LEON-III LEON-III(MMU)SupplierTSIMInstructionlevel(0.3 x RT) Aeroflex-GRLeon-SVESimERC32/SimLEONInstructionlevelInstructionlevel Spacebel Astrium /CNESSim-SCOC3InstructionlevelAstrium(internal)QERx(LGPL)Dynamictranslation(4-8 x RT)FFQTECHSciSysUni of CoimbraReSP(GPL)Instructionlevel Coming Soon Politecnico ofMilanESOCsimulatorInstructionlevelESOC4/11/2009ADCSS-2009 Micro processor for Space Applications 6

Dynamic translation emulator vs. TSIMTSIMERC32*QERxERC32*TSIMLEON2QERxLEON2Stanford Raw 1.23s 0.29s 2.43s 0.30sDhrystone Raw 64.20s 9.68s 216.00s 9.22sStanford Factor 1 4.2 1 8.1Dhrystone Factor 1 6.6 1 23.4Stanford Benchmark provided with TSIM (not recompiled)Dhrystone benchmark, 1 Million iterations (recompiled from source)*ERC32– TSIM ERC32 v1.3– 32-bit SUSE 8.2, 2.8 GHz Intel Pentium 4 processorLEON2– TSIM LEON2 v2.0.9– 32-bit SUSE 10.1, 2.8 GHz Intel Pentium 4 processor– Simplistic cache modelling in QERxLEON TSIM slower that ERC32 TSIMQERx LEON2 ~10% faster than QERx ERC32 – timer model differences?4/11/2009ADCSS-2009 Micro processor for Space Applications 7

Simulator / emulator supportHw-inloopemulatorsERC-32 LEON-II LEON-III LEON-III(MMU)SupplierSHAM6µ-p in theloop(25 Mhz)ChessEngineeringLEON-SVFFPGA LEON-IIFT IP core(100 MHz)ESA/Astrium-sasTSIM-HWFPGA LEON-IIIP core(100 MHz)Aeroflex-GR4/11/2009ADCSS-2009 Micro processor for Space Applications 8

LEON emulator architecturePIO control100 MHzClock,reset…LEON2 FTSuspendControllerRAMROMIO detectionSimulation softwareFCPP/ESSFPGA timeExclusion memoryTimed Event handlerFPGA board (ADM-XRC-5T2)PCIKernel driverHost PCKey function Suspend Controller will suspend Leon while simulating I/O4/11/2009ADCSS-2009 Micro processor for Space Applications 9

LEON emulator performance• Emulator outperforms instruction set software simulatorsFlight OBC (MHz)100 MHz93 MHzExample: The LeonSVF simulates a flightOBC which runs at 90MHz and produces5000 control IO/s + 10K Bytes/s of data(realistic in ESA missions) faster thanreal-time.Realistic OBC:40-90MHzLeonSVF is faster than real-time foron-board computers in this region. A SW-simulatoris slower than real-time.LeonSVF emulator: limit30 MHzLeonSVF and SW-simulators are faster than real-time for OBCsin this region.SW-based instruction set simulators: limit3000 5000realistic8000I/O per secondTo I/O control registers4/11/2009ADCSS-2009 Micro processor for Space Applications 10

Test toolsUnit andIntegrationtestERC-32 LEON-II LEON-III LEON-III(MMU)SupplierCANTATA++ C/C++ Src code instrumentation IPLAdatest95 Ada95 Src code instrumentation IPLVectorCAST C/C++/Ada Src code instrumentation VectorsoftwareIBM-RationalTest RealTimeC/C++/Java/AdaSrc code instrumentationIBMKlocworks C/C++ Static analysis IPLPolyspace C/C++/Ada Static analysis Mathworks4/11/2009ADCSS-2009 Micro processor for Space Applications 12