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Welcome to the Engineers’ Guide
to USB Technologies 2012
What a difference a year makes. When we put together our last USB resource guide,
the USB Implementers Forum had just announced the first certified SuperSpeed USB
(USB 3.0) chipsets. When I talked to embedded companies, most of them told me that
they were still in watch-and-see mode with respect to USB 3.0. For many embedded
applications, Hi-Speed USB and even USB 1.0 met application needs, and developers
loved that the spec was familiar, well-understood and relatively easy to implement.
This time around, SuperSpeed USB is definitely in the limelight.
According to recent statistics from In-Stat and IDC, the total USB installed base is
10+ billion units – and is growing at a rate of 3+ billion units per year. SuperSpeed
USB 3.0-enabled device shipment forecasts are expected to grow from 77 million
in 2011, to 436 million in 2012, and 902 million in 2013. Longer-range forecasts
expect shipments of these devices to exceed two billion units in 2015, coming
close to matching expected shipments of Hi-Speed USB 2.0-enabled devices.
USB seems well on its way to earning its “universal” nomenclature. It has become
the standard for battery charging and power delivery as well as data transfer, and
is a preferred connection for field upgrades. And with many embedded systems
becoming more smartphone-like with respect to demands for high-end graphics,
sophisticated user interfaces and extensive peripheral support, USB 3.0 seems to
be driving into the embedded space faster than we expected.
If all this sounds a little overwhelming, fear not. This issue – and our corresponding
USB technology channel at www.eecatalog.com/usb – are filled with the
product and design resources you need to become master of the universe… or at
least the Universal Serial Bus.
Cheryl Berglund Coupé
Editor, EECatalog.com
P.S. To subscribe to our series of Engineers’ Guides for embedded developers
and engineers, visit:
www.eecatalog.com/subscribe
EECatalog
www.eecatalog.com/usb 1

Contents
No Stopping This Bus!
By Cheryl Coupé, Editor ...........................................................................................................................................................3
Advanced USB Bridge ICs - Delivering Greater System Value
By Dave Sroka & Gordon Lunn, Future Devices Technology International (FTDI).....................................................................8
Voyager M3i
By LeCroy ............................................................................................................................................................................... 10
Advisor T3
By LeCroy ............................................................................................................................................................................... 11
Low-cost Cortex-MO USB solutions with Smart Card interface
By NXP .................................................................................................................................................................................. 12
Total Phase Beagle USB Analyzers
By Total Phase ....................................................................................................................................................................... 14
Going Native with SuperSpeed
By Mike Micheletti, LeCroy ...................................................................................................................................................16
USB Aims for Truly Universal
By Tim McKee, Intel Corporation...........................................................................................................................................20
The Cohabitation of NAND Flash and USB 3.0
By Eric Huang, Synopsys, Inc. ...............................................................................................................................................23
The Way of the Future
By Gregory Quirk, Mouser Electronics...................................................................................................................................26
SuperSpeed USB 3.0 for Smarter Phones
By Eric Huang, Sr. Product Marketing Manager for Semiconductor USB Digital IP, Synopsys, Inc. .....................................29
Growth of USB in Medical Devices
By Manasi Khare, Microchip Technology Inc. ....................................................................................................................... 31
The Evolving Needs of the Developer Community
By Derek Fung, Total Phase ...................................................................................................................................................40
Products and Services
Hardware
ICs
Microchip Technology Inc.
8-bit USB PIC Microcontrollers from Microchip ............35
External USB Bridges from Microchip ...........................36
Featured 16-bit PIC® MCU and dsPIC® DSC USB
devices from Microchip .................................................37
Software
Middleware
Micro Digital Inc
smxUSBH (Host Stack), smxUSBD
(Device Stack), smxUSBO (OTG) .................................38
HCC Embedded
Embedded USB ..............................................................39
2 Engineers’ Guide to USB Technologies 2012

No Stopping This Bus!
Naming a computer interface “universal” back in the wild
west days of the mid-1990s had overtones of hubris. But
there’s no doubting the standard’s cosmic appeal as USB
3.0 gains support and traction across the industry. We
talked to Gordon Lunn, senior application engineer at
Future Technology Devices International (FTDI); Sukhdeep
Hundal, VP of engineering and technology at Icron
Technologies Corporation; Kris Kendall, marketing manager
for NXP’s MCU Interface Products; and Derek Fung,
VP of business for Total Phase to learn more.
EECatalog: What trends are you seeing in the implementation
of USB in embedded applications? Any surprises
there?
Gordon Lunn, FTDI: A key accelerating
trend for USB in embedded systems is the
increasing number of times this is used for
battery charging and power delivery. It has
moved away from simply being a data port.
As part of this new benefit of being able to
charge devices, the port is now required to detect the type
of power source connection that is being made. A standard
downstream port is capable of delivering a maximum of
500 mA while a dedicated charging port is much higher
(1.5 A). Determining what type of host port you are connected
to allows for improved and faster charging.
A second growth area is with configurable designs; designs
that require firmware upgrades. Increasingly USB is the
preferred connection to access a PC port or memory stick
for implementing a field upgrade.
Thirdly we will be seeing a lot more interest in connecting
peripheral hardware to phone or tablet devices. This may
be with conventional USB host chipsets or with Android’s
unique Open Accessory Mode whereby the host PC or
tablet is actually the USB peripheral and the peripheral
accessory is the USB host. This has many advantages, such
as simplifying the software required to run on the Android
platform (i.e., no drivers). Also, as the accessory provides
power to the USB port of the Android, there is no battery
drain from the accessory.
EECatalog SPECIAL FEATURE
USB has moved beyond a simple data port. New developments mean this
“universal” standard is becoming even more so, especially with shot-inthe-arm
support from Intel and Microsoft.
By Cheryl Coupé, Editor
Sukhdeep Hundal, Icron: Definitely a shift
from USB 1.1 to USB 2.0. We are seeing more
demand for USB as a direct-access storage
device, thus the need for USB 2.0’s higher
throughputs.
Kris Kendall, NXP: On the host PC side, it used to be a
“discrete solution” designed on the motherboard. Discrete
solution here means it is a bridge controller from PCIe to
USB 3.0. These discrete solutions can easily be placed very
close to the connector. However, Intel and AMD are now
integrating these USB 3.0 controllers (xHCI controllers)
into their chipsets. Intel is integrating FrescoLogic solution,
and AMD is integrating NEC/Renesas solution. This
means that the chipset will be located somewhere close to
the center of the motherboard, and will be far away from
connector. An integrated solution seems to be the trend
right now. A discrete solution is mainly used on plug-in
cards, and they are used to upgrade current computers
that don’t have the USB 3.0 capability.
From the device side, we have seen USB 3.0 storage devices
most of the time. Now people are coming out with devices
such as HD cameras or USB 3.0 multi-function docking
stations to utilize the high-speed interface. People used
to develop USB 3.0-to-SATA bridge ICs to adapt existing
SATA HDDs, but more and more vendors are implementing
USB 3.0 SSD controllers so that it can directly interface
with NAND flashes. This will reduce the cost to convert
from USB3àSATA and SATAàNAND interfaces.
USB usage in embedded systems so far has been largely centered
on dealing with the loss of serial and parallel ports on
PCs and laptops, the loss of parallel interface printers, and
with capitalizing on the low cost and convenience of USB
thumb drives for transporting information. However, USB
offers many other capabilities that are available to solve other
problems in the embedded space. We expect to see these uses
grow in the future with USB Wi-Fi, USB storage,USB Ethernet,
USB printers, USB docking, USB-based audio visual,
USB monitors and so on. Plug and play and higher speed
with USB 3.0 and built-in OS driver support for several of
these device classes is driving the USB implementation as a
primary standard in the embedded space.
www.eecatalog.com/usb 3

EECatalog SPECIAL FEATURE
Derek Fung, Total Phase: For USB 3.0,
the major interest has been for bandwidthintensive
applications such as mass storage
and video. But these applications represent
only a small portion of the overall USB
embedded device market. USB is becoming
more ubiquitous in new microcontrollers; consequently
we are seeing many first-time USB developers. We’ve seen
huge interest in USB training classes that we offer. While
people always clamor for
more speed at the high-end,
you cannot underestimate
the growth and proliferation
of devices at full- and highspeed.
EECatalog: What does
Intel’s recent addition of USB
3.0 in Series 6/7 chipsets
(for Gen 3 Core “Ivy Bridge”
CPUs) mean to the embedded
market?
Lunn, FTDI: Adding USB 3.0 into the Intel chipset will
certainly improve the availability of the technology to the
general market. In essence, the user gets USB 3.0 for free.
This will push USB 3.0 into the mainstream peripheral
market, as OEMs know that this type of SuperSpeed port
will be there. This will encourage more and more applications
to adopt it, with the end result that users will see the
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benefits of the higher performance of this technology. With
5 Gbps capability, it may be that system configurations
could change. For example, devices such as ultrabooks and
tablets may be able to offload internal storage and be able
to run at acceptable speeds from external drives, or USB
SuperSpeed could be used to drive monitors thus eliminating
dedicated graphics busses. Finally, the real “shot in
the arm” for USB 3.0 will be Windows 8 including native
support later this year.
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4 Engineers’ Guide to USB Technologies 2012
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Hundal, Icron: With computers
now shipping with
USB 3.0 included, there is no
need to have a third-party
controller, thus USB 3.0 adoption
will start to take off.
Kendall, NXP: Ivy Bridge CPU
doesn’t really include the USB
3.0 function. It is the chipset
“PantherPoint” that has the
USB 3.0 function. For sure,
integrating the USB 3.0 controller into the chipset means
one less component needed on the PCB. Systems with smaller
footprints (such as tablet PCs) can be designed. A discrete
solution usually provides two ports, but chipsets can provide
up to four ports now. That means more connecting ports for
consumers to plug in. And cost is already included in the
system chipset. Consumers don’t have to pay extra (or are
already paying) for this feature.

Integrated USB 3.0 controller with Ivy Bridge platforms
is a key driver in driving higher bandwidth audio visual,
graphics and high-def video in embedded applications.
We should see more high-end entertainment, consumer
devices and productivity embedded devices in the near
future .
Fung, Total Phase: Intel’s
official support and Windows
8 inclusion of USB 3.0 will
help drive the industry into
mainstream adoption, but
there has been huge progress
in the deployment of USB
3.0 well before Intel’s entry
– USB 3.0 ports are already
common on new computer
designs. For devices, the USB
Implementer’s Forum has
pointed out that the pace of
certified USB 3.0 devices has
already surpassed previous
iterations of the protocol.
We’ve seen many high-performance
USB 3.0 drives with prices beginning to reach
parity with their older USB 2.0 counterparts and coupled
with Intel’s official support, we expect to see an acceleration
of the USB 3.0 adoption rate.
Intel is supporting both
Thunderbolt and USB
3.0/2.0 so expect both
standards to co-exist in the
prosumer space, where the
customer is willing to pay a
premium for that additional
throughput.
EECatalog SPECIAL FEATURE
While early-adopter focus has been primarily about speed
and not power, we are optimistic that more devices will
take advantage of the power management aspects of USB
3.0 and it will become more ubiquitous in delivering a
better user experience as the cost of implementing and
adding USB 3.0 drops.
EECatalog: Where do you see
opportunities for other highspeed
interconnects such as
Thunderbolt in embedded
applications, either instead
of or along with USB?
Lunn, FTDI: Given the
higher data rates that
Thunderbolt and USB 3.0
offer, they are highly suited
to transferring significant
amounts of data in a shorter
time. This really equates to
memory storage, perhaps
as a localized alternative to
NAS storage for video/media
files or for streaming media files such as video, both in
the home and commercially. Thunderbolt has already been
shown to be capable of providing an interface for MAC/
PC monitors and as the Thunderbolt interface allows for
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many protocols over one connector this may allow for simplified
product designs with fewer connectors and simpler
cabling.
The difficulty for Thunderbolt is that many existing
peripherals run on USB, which is well established, and
to ask consumers to move to Thunderbolt will require a
lot of new equipment or converter boxes to allow legacy
hardware to continue to work. This may be a difficult task
and as such we may see Thunderbolt and USB co-exist for
some time while Thunderbolt or the faster USB 3.0 begin
to carve out new applications.
Hundal, Icron: Intel is supporting both Thunderbolt and
USB 3.0/2.0 so expect both standards to co-exist in the
prosumer space, where the customer is willing to pay a
premium for that additional throughput.
Kendall, NXP: Today, comparable external connectivity to
USB 3.0 is Thunderbolt, in terms of speed (Gbps) and consumer
availability. But a Thunderbolt solution in general is still
more expensive compared to a USB 3.0 solution. A Thunderbolt
cable (from Apple) will cost more than $40, but a USB 3.0 cable
could be just a few dollars. In order to implement Thunderbolt,
the system needs to have a Thunderbolt controller, which adds
extra cost to the system design. As mentioned previously,
Intel chipsets already have USB 3.0 integrated, therefore, no
additional cost is added. Maybe Thunderbolt is mainly for the
high-end market compared to USB 3.0. USB 3.0 is backwardcompatible
with USB 2.0. People can still use their existing
USB 2.0 devices on the USB 3.0 ports. But Thunderbolt is only
backward-compatible with DisplayPort.
Thunderbolt and USB will co-exist on computing platforms.
Thunderbolt will be more adopted for high-bandwidth graphics
and multiple video streams for the professional and high-end
enthusiasts where the high bandwidth is effectively utilized,
while USB 3.0 will serve most mainstream low-cost humaninterface
devices and external storage and embedded devices.
Very consumer friendly with plug and play – it just works.
Fung, Total Phase: We view Thunderbolt as complementary
to USB since it enables the ability to extend PCIe out of a
laptop more easily than current ExpressCard slots. Thunderbolt
enables devices to easily bridge to PCIe, but given that
PCIe is very raw, developers often prefer a higher-level protocol
(like USB!) for communication. Therein lies one of the
core benefits of USB.
EECatalog: The USB-IF recently announced two new initiatives:
the USB audio/visual device class specification
and a new power delivery specification using the VBUS
line in the USB cable. What impacts do you expect to see
for these in embedded applications?
EECatalog SPECIAL FEATURE
Lunn, FTDI: The power-delivery class is particularly interesting
as this allows peripherals and hosts to supply power.
Also at 100W it will be suitable for powering most peripheral
devices from the USB port. Cabling will be simplified as
both data and power go through the same connector. Also in
time we may see a standardization of all power connectors
being a USB connector, making it simpler for consumers to
power devices from a small range of adapters.
Hundal, Icron: USB audio/visual device class specification
on its own will mean improved interoperability and the new
power-delivery spec will increase utility. Taken together, we
will see an increase in embedded USB applications which is
great for the market.
Kendall, NXP: USB audio/visual class specification is a
new specification from USB-IF and it can serve certain AV
applications, especially USB-based docking or similar. But
it does not provide support similar to HDMI or DisplayPort
for higher resolution applications and over longer cable
lengths (like a few meters). We believe for space constrained
embedded applications, USB would be adopted but we
anticipate the audio visual interface to co-exist, as feasible.
We anticipate USB power delivery to gain significant market
traction and gain tremendous momentum across the board
for a multitude of applications once the final specification
is released.
Fung, Total Phase: We expect great things on these two
fronts. One of the great features of USB is the fact that you
can power and operate a device through a single connection.
The new power delivery expands that horizon even more
and combined with the new A/V class, a single USB port can
be the gateway for comprehensive, single-port docking solutions
for the next generation of mobile devices, ushering in
a new era of consumer convenience.
Video over USB does exist today, but the development of
the A/V class makes it an open standard, which ultimately
benefits the consumer. In summary, the new initiatives
make it simpler and more convenient for consumers to use
USB devices, and that will help accelerate adoption.
Cheryl Berglund Coupé is editor of EECatalog.
com. Her articles have appeared in EE Times,
Electronic Business, Microsoft Embedded Review
and Windows Developer’s Journal and
she has developed presentations for the Embedded
Systems Conference and ICSPAT. She has
held a variety of production, technical marketing and writing
positions within technology companies and agencies in the
Northwest.
www.eecatalog.com/usb 7

Advanced USB Bridge ICs -
Delivering Greater System Value
By Dave Sroka & Gordon Lunn, Future Devices Technology International (FTDI)
Universal serial bus (USB) interfaces continue to be the most abundant
in the market, as they offer a means of easily moving data,
while ensuring that high levels interoperability are made possible
and enabling inexpensive implementation to be realized. However,
in all products the underlying need to innovate continues and this
is certainly true of USB, with system designers now facing ever
shortening development cycles and the need optimize cost.
USB bridge ICs present a convenient and cost-effective way to
add a USB port. There are a considerable number of IC offerings
now available, but as with any industry sector the variation in
features and functionality that they possess is critical. Some
bridge ICs are better attuned to meet the exacting demands of
the electronic design community than others.
There are a number of major issues that the modern design engineer
faces when wishing to incorporate USB into their system
design. The following article will look at implementation trade-offs
and how certain semiconductor manufacturers have responded to
them. In light of current environmental guidelines, such as Energy
Star, the power consumption of electronics hardware is a major
issue. As a result implementation of a USB connectivity solution
should not heavily impinge on the system’s total power budget.
Device FT200XD FT201X FT220X FT221X FT230X FT231X FT240X
Description I²C slave
to USB 2.0
Full Speed
Performance 3.4
Mbits/sec
I²C slave
to USB 2.0
Full Speed
3.4
Mbits/sec
SPI/FT1248
(4-bits) to
USB 2.0
Full Speed
0.5
MByte/sec
SPI/FT1248
(8-bits) to
USB2.0 Full
Speed
1
MByte/sec
With electronic products and equipment becoming increasing
packed with features and functionality, maximizing utilization of
available board space is paramount. As a result it is highly beneficial
if the specified USB connectivity solution has compact dimensions so
that it can be implemented into systems that are space constrained.
In many cases, the USB interconnect is now starting to act as the
principal route through which to power portable electronics goods.
This has led to an increase of current sourcing levels that the standard
can support. Previously USB supported a current of 500 mA
through a standard downstream port (SDP), but to keep recharging
periods as short as possible an updated version of the USB charging
specification has now been ratified. This permits1.8 A of current
to be carried (more than trebling the charging capacity) through a
dedicated charging port (DCP) - where both the data lines have been
shorted out. Differentiating between a DCP and an SDP is crucial
if the advantages of enhanced charging are to be realized. The USB
charging circuits with DCP detection that have been used so far
have been fairly complex in nature. They have required inclusion of
a large quantity of discrete components. Often they also required
intervention by the system microcontroller, which detracted from
overall system performance as processing capacity was sacrificed
to support the detection process and enable battery charging.
Lastly, this detection and enabling function was not automatic and
would require software code generation and engineering support
for implementation and validation.
FTDI’s team of USB experts are fully aware of the difficulties that
design engineers now have to deal with. In response, the company
has developed the X-Chip series of advanced USB bridge ICs. These
ICs boast a far more comprehensive feature set than competing IC
offerings on the market. This allows design engineers to tackle the
various system level challenges discussed earlier, as well as being
able to deliver higher USB
Basic UART
to USB 2.0
Full Speed
3
Mbaud
Full UART
to USB 2.0
Full Speed
3
MBaud
CBUS Pins * 1 6 1 1 4 4 2
Clock
Oscillator
EE/MTP
Memory
Packages 10-pin
DFN
Figure 1: The X-Chip Series
FIFO to
USB 2.0
Full Speed
1
Mbyte/sec
Internal Internal Internal Internal Internal Internal Internal
Internal Internal Internal Internal Internal Internal Internal
16-pin
SSOP/
16-pin QFN
16-pin
SSOP/
16-pin QFN
20-pin
SSOP/
20-pin QFN
16-pin
SSOP/
16-pin QFN
20-pin
SSOP/
20-pin QFN
24-pin
SSOP/
24-pin QFN
charging currents to their
products without being
forced to compromise on
system performance.
DCP Detection
The integrated functionality
within the X-Chip enables
automatic detection of
connection to a DCP, so
that system logic can be
switched from data transfer
mode over to charging
mode. If a DCP is detected,
the IC asserts a signal on
one of its output pins to indicate this to the system. The number of
discrete components needed for this task is low and the intervention
of the system microcontroller is no longer required. In addition, as
the function is hard-wired into the X-Chip devices there is no need
to develop the function independently - thus software development
time and overall project schedule is shortened. . A description of the
products in the X-Chip series is shown in Figure 1, with a comparison
between its DCP detection and that of conventional USB connectivity
solutions being shown in Figures 2 and 3 respectively.
8 Engineers’ Guide to USB Technologies 2012

Figure 2: X-Chip Simplifies DCP Detection Circuit
Other Features
In addition to taking care of the DCP detection, the members of
the X-Chip series all exhibit low power consumption. By employing
advanced semiconductor process, as well as having a core that runs
at 1.8 V rather than the 3.3 V normally used, these ICs draw less than
8 mA when fully active (approximately a third less than the majority
of competing devices on the market) and a mere 125 μA while it is
in suspend mode. A built-in PLL clocking mechanism means that
further board space can be saved and fewer components need to be
sourced, as an external oscillator is not required. In addition, the
ability to output a system clock from the configurable pins means
that added flexibility for the system implementation is possible.
X-Chip devices all contain a small amount of non-volatile (2 kBytes)
EE memory that can offer great system utility. Commonly used for
storage and configuration of product descriptors, this multi-time
programmable (MTP) memory can be key to facilitating other
platform requirements that OEMs may have. For example, manufacturing
data, or product revision information could be stored, or the
unique FTDI Chip ID, programmed into the device could be used in
an encryption or security implementation. In the end, having a small
EE re-programmable memory could save the cost of adding another
device to the bill of materials and free up board space.
As the number of IO pins that must be supported has a huge
influence on the footprint of the USB controller on the printed
circuit board, any effort to optimize these configurations is well
spent. In the X-Chip series, the IOs have been optimized to the
feature set and the number of pin kept to a minimum. While this
means more parts are offered in the series, it does also translate
that each part is more optimized. In addition, as the X-Chip offers
many system level features (PLL, EE memory and internal regulators),
the requirement for IO support of these functions could
be eliminated in the board design, assuming a good match of the
feature to the system requirement.
By specifying highly integrated, more feature-rich bridge ICs, the
complexity of bringing USB to systems can be greatly reduced. The
X-Chip furnishes the industry with a USB interface solution which
has the timing, memory and the DCP detection functionality all
integrated into its silicon. The value proposition that the X-Chip
series can deliver is extensive, including, saving board space,
reducing the number of external components, enhancing system
performance, curbing overall system cost, lowering power budget
and shortening the development process. By understanding and
utilizing as many of these features as possible, FTDI is confident
that your end product design can be optimized.
CONTACT INFORMATION
Future Technology Devices
International Limited (USA)
7235 NW Evergreen Parkway
Suite 600
Hillsboro, OR 97124-5803
USA
+1 (503) 547-0988 Telephone
+1 (503) 547-0987 Fax
us.sales@ftdichip.com
http://www.ftdichip.com
www.eecatalog.com/usb 9

Voyager M3i
USB 3.0 Protocol Analyzer & Exerciser System
By LeCroy
The Voyager M3i is LeCroy’s flagship USB 3.0 validation
platform that provides end-to-end testing of USB systems
and software. When used for USB analysis, the Voyager sits
in the data path and transparently records the USB traffic
to provide unambiguous visibility of the exchange between
host and device.
Approved for USB-IF Compliance Testing
Designed from the start to address compliance testing, the
Voyager platform is available with an advanced exerciser
capable of generating both USB 2.0 and 3.0 traffic. Sample
scripts are included that allow the Voyager to emulate a
host or device and programmatically send illegal or erroneous
traffic to a device. A fully automated compliance
checker is also available to verify conformance to the USB
3.0 specification.
Features and Benefits
CATC Trace - Captured traffic is displayed using the legendary
CATC Trace which has become the industry’s de
facto standard for USB protocol analysis. With LeCroy’s
intuitive interface users can easily navigate from the packet
layer up to the logical transfer layer allowing fast debug of
protocol issues.
Unmatched Accuracy - The Voyager provides fast-locking
on the SuperSpeed signal and is the only analyzer that
records every 10-bit symbol for uncompromised visibility
to problems on the bus.
Non-Intrusive Analysis - While inline, the analyzer seamlessly
monitors low power states while accurately showing
all link transitions time-stamped within the display.
Analyze USB 3.0 & 2.0 - Concurrent high-speed and
SuperSpeed recording allows end-to-end viewing of data
transfers across a USB 3.0 hub.
Intelligent Triggering - The LeCroy USB 3.0 analyzers
provide real time hardware-based triggering to pinpoint
protocol events of interest. Trigger events can be specified
at the lowest levels including bus states and ordered sets
(Link up, SKP, etc…), control transfers, error conditions,
and header fields.
4GB Recording Capacity - The Voyager features 4GB
recording memory plus USB and Gbe links for uploading
recorded traffic to the host PC. Use pre-capture filtering
to extend capacity further - or use spool-to-disk capture to
record bus events for hours or even days.
Comprehensive Class Decoding - Comprehensive USB
device classes are decoded automatically eliminating the
tedious process of decoding transactions manually. This
includes Mass Storage, UASP, 3.0 Hub, PTP/Still Image,
Media Transfer Protocol (MTP), Printer, PictBridge, and all
popular USB device classes
Compatible Operating Systems:
Availability:
The powerful Voyager M3i and the portable Advisor T3 are
available in both USB 2.0/3.0 models; or in USB 2.0 configurations
that are upgradeable to support USB 3.0
CONTACT INFORMATION
LeCroy Corporation - Protocol
Solutions Division
3385 Scott Blvd.
Santa Clara, CA 95054
408 653-1262 Telephone
408-727-6622 Fax
PSGsales@lecroy.com
www.lecroy.com
10 Engineers’ Guide to USB Technologies 2012

Advisor T3
USB 3.0 Protocol Analyzer
By LeCroy
LeCroy’s Advisor T3 is an ultra-portable SuperSpeed USB
2.0/3.0 analyzer that delivers unmatched accuracy at an
extraordinary price. Based on LeCroy’s market-leading Voyager
verification system, the
Advisor T3 includes the same
market-leading reliability as
the flagship system.
Comprehensive Triggering -
Essential for efficient testing of
USB 2.0 and USB 3.0, the Advisor
T3 includes hardware-based event
triggering that can be specified
at every level - from logical bus
states to mass storage commands.
Accurate and Reliable - The
Advisor T3 provides the same
loss-less capture of USB 2.0
and 3.0 traffic as the Voyager
system including SuperSpeed
link training, LFPS events,
state changes, and raw 10-bit
symbols.
Portable and Affordable - The
Advisor’s unique small formfactor
fits within any briefcase yet boasts 2GB of recording
memory. The system also offers spool-to-disk capture, making
it well suited for testing software drivers or analyzing system
performance over extended periods.
Insight with Confidence -
For system debug, error recovery, and performance optimization,
the Voyager and Advisor T3 systems help ensure
that hardware and software for USB 3.0 deliver excellent
compatibility and interoperability.
CONTACT INFORMATION
LeCroy Corporation - Protocol
Solutions Division
3385 Scott Blvd.
Santa Clara, CA 95054
408 653-1262 Telephone
408-727-6622 Fax
PSGsales@lecroy.com
www.lecroy.com
www.eecatalog.com/usb 11

Low-cost Cortex-M0 USB solutions with
Smart Card interface
Delivering robust USB performance at a low price point, these low-cost devices are compelling
replacements for 8/16-bit USB microcontrollers. The highly fl exible USB architecture is, quite
simply, a better approach to USB. NXP offers the widest range of ARM-based USB solutions, as
well as easy-to-use software and integrated development platforms that make NXP a one-stop
shop for USB.
Features
ARM Cortex-M0 processor, running at frequencies of up to
50 MHz
Memory:
- Up to 128 kB on-chip fl ash program memory
- Total of 12 kB SRAM data memory
- Up to 4 kB EEPROM
- USB drivers-HID, MSD and CDC, EEROM API, 32-b Divide API
- In-System Programming (ISP-UART, USB) and In-Application
Programming (IAP) via on-chip bootloader software
Debug options:
- Standard JTAG test/debug interface. Serial Wire Debug
- Boundary scan for simplifi ed board testing
Up to 54 General-Purpose I/O (GPIO) pins with confi gurable
pull-up/pull-down resistors, repeater mode, and open-drain
mode
- Two GPIO grouped interrupt modules enable an interrupt
based on a programmable pattern of input states of a
group of GPIO pins
NXP 50-MHz, 32-bit
ARM Cortex-M0 TM
microcontrollers LPC11U00
- High-current source output driver (20 mA) on one pin (P0_7)
- High-current sink driver (20 mA) on two true open-drain
pins (P0_4 and P0_5)
Four general-purpose counter/timers with a total of
up to 5 capture inputs and 13 match outputs
Programmable Windowed WatchDog Timer (WWDT) with a
dedicated, internal low-power WatchDog Oscillator (WDO)
Analog peripherals:
- 10-bit ADC with input multiplexing among eight pins
Serial interfaces:
- USB 2.0 Full-Speed device controller
- USART with fractional baud-rate generation
- USART supports an asynchronous Smart Card interface
(ISO 7816-3)
- Two SSP controllers with FIFO and multi-protocol
capabilities
- I2C-bus interface supporting the full I2C-bus specifi cation
and Fast-mode Plus (Fm+)
12 Engineers’ Guide to USB Technologies 2012

Clock generation:
- Crystal oscillator with an operating range of
1 to 25 MHz (system oscillator)
- 12 MHz Internal RC oscillator (IRC) trimmed to 1% accuracy
- Internal low-power, low-frequency WatchDog Oscillator
- PLL allows CPU operation up to the maximum CPU rate
with the system oscillator or the IRC as clock sources
A second, dedicated PLL is provided for USB
- Clock output function
Power control:
- Four reduced power modes: Sleep, Deep-sleep,
Power-down, and Deep power-down
- Power profi les residing in boot ROM
- Processor wake-up from Deep-sleep and Power-down
modes via reset, selectable GPIO pins, watchdog interrupt,
or USB port activity
Power-On Reset (POR)
Brownout detect with four separate thresholds for interrupt
and forced reset
LPC11U00
ARM
CORTEX-M0
Up to 50 MHz
High-speed GPIO (Up to 54)
32-bit Timers (2)
16-bit Timers (2)
Systick Timer
Windowed WDT
Power Control
PMU, power modes, BOD,
single V dd power supply, POR
Clock Generation Unit
12 MHz, 1% IRC OSC,
Watchdog OSC,
1-25 MHz System OSC,
System PLL
AHB-LITE Bus
APB Bus
Bridge
Flash
Up to 128 kB
SRAM
Up to 12 kB
EEPROM
Up to 4 kB
ROM
USB drivers in ROM for HID,
MSC and CDC, EEPROM API,
32-bit divide API
SSP/SPI (2)
I 2 C
USB
USART /
Smart card interface
SERIAL INTERFACES
ADC
8-channel, 10-bit
SYSTEM ANALOG
http://www.nxp.com/products/microcontrollers/
Unique device serial number for identifi cation
Single 3.3 V power supply (1.8 to 3.6 V)
Temperature range -40 to +85 °C
Available in 48-pin LQFP, 64-pin LQFB, 48-pin TFBGA,
and 33-pin HVQFN package
Pin-compatible with the LPC134x series
Maximizing connectivity, minimizing power
Connectivity options on the LPC11U00 series include two
Synchronous Serial Port (SSP) interfaces, I2C with Fast-mode
Plus feature for 10x higher bus-drive capability, a Universal
Synchronous-Asynchronous Receiver/Transmitter (USART) and
a Smart Card interface. The Smart Card interface (ISO7816-3)
provides a plug-and-play interface for Smart Cards, making
the LPC11U00 a good fi t for e-commerce applications.
Small form-factor mobile & consumer apps
As an extension of NXP’s proven LPC1100 family, the LPC11U00
series delivers up to 128 kB Flash, up to 12 kB SRAM, up to 4 kB
EEPROM a variety of serial interfaces, four system timers with
PWM functionality, an 8-channel, 10-bit ADC, and up to up to
54 GPIOs. In addition to several standard package offerings,
the LPC11U00 series is offered in a miniature 4.5 x 4.5 mm
TFBGA48 package, making it especially suited for small
form-factor mobile and consumer applications.
www.eecatalog.com/usb 13

TM
Total Phase Beagle USB Analyzers
The Right Tool for Any Job
Beagle USB 12 Protocol Analyzer
Monitor Full- and Low-speed USB
Descriptor Parsing
growth rate of 178% 1
approach in designing our line of Beagle protocol
Beagle USB 480 Protocol Analyzer
Monitor High-, Full- and Low-speed USB
Instant USB Class-Level Decoding
Class decoding of USB 2.0 data with the Beagle USB 480 analyzer
testing tool expense.
Beagle USB 12 Protocol Analyzer
Beagle USB 480 Protocol Analyzer
USB and receive instant USB class-level decoding.
14 Engineers’ Guide to USB Technologies 2012
Beagl
filter d
capture
with ou

s
er
Beagle USB 5000 SuperSpeed Protocol Analyzer
Monitor USB 3.0 and USB 2.0 traffic
Data Center Software monitoring USB 3.0 data and LTSSM View with the Beagle USB 5000 analyzer
Beagle USB 5000 SuperSpeed Protocol Analyzer
filter data, or set external triggers for USB 3.0 and 2.0
captures.
with our award-winning Data Center
Beagle USB 5000 SuperSpeed Protocol Analyzer
filter data, or set external triggers for USB 3.0 and 2.0
captures.
1
USB 2011: SuperSpeed Comes to Market
Software. Whether
with our award-winning Data Center
Data Center Software monitoring USB 3.0 data and LTSSM View with the Beagle USB 5000 analyzer
Software. Whether
1
USB 2011: SuperSpeed Comes to Market
www.eecatalog.com/usb 15

EECatalog SPECIAL FEATURE
Going Native with SuperSpeed
Why access to native 10b data is essential to troubleshooting USB 3.0 designs.
By Mike Micheletti, LeCroy
One of the critical technical advances that enable modern
high-speed serial data links, such as SuperSpeed USB 3.0, is a
data encoding scheme called 8b/10b.
8b/10b encoding is a proven means of overcoming a technical
issue that arises when designing systems that use high data
rates to transfer data over long distances. Depending on the
data rate and physical transmission medium, “long” in this
context can refer to a few feet or many miles. 8b/10b encoding
introduces the concept of a “native 10b data stream” which is
the actual information transmitted over the physical link.
The 10b data stream is essentially a “scrambled” version of the
8b data stream. It is this decoded 8b data which is then reassembled
into the frames and data payloads that are familiar
to users of previous generations of USB. The native 10b data
stream is only visible at the very lowest levels of the PHY
layer. It is the PHY layer’s responsibility to convert the native
10b data stream into the 8b
patterns. In the process, the
PHY layer can detect transmission
errors received in the
10b patterns. This represents
important debug information
which remains hidden from
the user if only the higher-level
8b data stream is available for
view.
All commands and data transferred
on a SuperSpeed USB
3.0 data link are entirely in 10b symbols. Only analyzers that
capture and preserve the native 10b symbols allow users to see
what was actually transmitted and received.
Only analyzers that capture
and preserve the native 10b
symbols allow users to see
what was actually transmitted
and received.
Differential Receivers
The technical issues that are addressed by 8b/10b encoding
arise due to the nature of the differential receivers that make
such high-speed data links possible. To understand the use of
8b/10b encoding, we first need to understand some requirements
of differential receivers. Differential receivers were one
in a series of key technical developments that enabled longdistance,
high-speed serial data links.
Back in the early days of digital electronics, signal transmission
was accomplished by having the receiver measure the DC
voltage level of the incoming signal against a common ground
shared by transmitter and receiver. In this simple world, using
TTL logic as an example, a voltage of 0V represented a logical
“0” and a voltage of +5V represented a logical “1” (Figure 1).
The clock was also common to both receiver and transmitter so
the receiver could easily determine when to measure the signal
for the next bit.
There were a number of problems
in trying to extend this
technology to higher data
rates and longer distances,
and one key problem was the
inability to provide a stable
and common ground reference
level when systems became
physically separated (Figure
2). The development of differential
receivers provided
a solution, where the signal level is measured between two
conductors, rather than against a common ground. While
the nominal “ground voltage level” might vary appreciably
Figure 1: A representation of a short string of data bits (01011010) as measured at the output of the transmitter, where there is a clean signal
available,
16 Engineers’ Guide to USB Technologies 2012

Figure 2: The signal as it might arrive at the receiver, showing added noise, DC bias and offset.
Figure 3: After passing through the differential receiver, much of the noise and the DC bias has been removed
(since these effects are largely common to both conductors). The signal allows for recovery of the clock, which
in turn allows the bits to be timed and decoded correctly for accurate data transmission to be completed.
from one location to another, existing technology such as
twisted-pair conductors helped ensure that the DC offset was
essentially the same for both conductors, and therefore the
differential voltage between the two remained constant and
measurable by the receiver.
Differential receivers were also able to extract the clock signal
(to obtain precise data bit location) from the incoming signal
by observing the rate of change of signals on the incoming
transmission. By extracting the clock from the data, the
receiver is able to “lock on” to the incoming signal and correctly
translate the incoming signal back into data bits as originally
transmitted by the remote device (Figure 3).
The Need for 8b/10b Encoding
However, there were some restrictions to this DC voltage
approach. One of those restrictions was the need to ensure
that the incoming data provided variations in signal level at
a sufficient rate that the receiver could continue to recover
the clock from the incoming signal. For example, if the data
being transmitted consisted of long strings of 0s (or of 1s), the
receiver would see what appeared to be no signal on the line,
and the “lock” would be lost.
A second problem was that, to function well, the differential
receivers (which are AC-coupled) required the incoming data
to effectively be DC-neutral; in other words, that over periods
EECatalog SPECIAL FEATURE
of time longer than a few bits
that the number of 1s received
roughly matches the number of
0s received. If the signal is not
DC-balanced, the DC component
of the signal charges the
capacitor of the high-pass filter
used as the AC coupler, and distorts
the signal input.
Both these constraints are
not typical of real data, which
often contains long strings of
0s or 1s (for example as filler at
the end of a data file).
The solution to this issue
was the development of an
encoding scheme, in which the
“real data” is encoded using a
scheme which ensures that no
more than five “0” values or
five “1” values will ever occur
in a row, and also ensures that
over time the total number of
1s transmitted closely matches
the total number of 0s. In
order to accomplish this, each
8-bit byte is encoded into a
10-bit symbol. By adding two
extra bits to each byte, the potential range of data symbols is
four times as large as the possible range of original 8b bytes.
By careful selection of values from this much larger range of
possible symbols, each 8b byte can be encoded using a 10b
symbol chosen to ensure that no more than five “0” values
or five “1” values occurred in a row. [For more details on how
this encoding scheme works, see http://en.wikipedia.org/
wiki/8b/10b_encoding.]
Furthermore, since the 1:1 encoding of 8-bit bytes into 10-bit
symbols uses only one quarter of the available 10-bit symbols
(since the addition of two extra bits creates four times as many
unique combinations in the 10b space as in the 8b space), a
second set of symbol codes can be selected for every possible
8b byte, and these are selected to help compensate for excessive
0 or 1 values in the previously transmitted symbol(s). So
in 8b/10b encoding, each data byte has two different symbols,
one selected to have slightly more “1” values and the other
to have slightly more “0” values. These different symbols are
called positive and negative disparity, and the transmitter
keeps track of the running disparity and selects the appropriate
symbol for the next byte to compensate for any disparity
introduced by the previous symbol, resulting in a signal which
is DC-balanced.
The entire 8b/10b encoding and managing this “running disparity”
is handled by the network’s physical layer (PHY), and
www.eecatalog.com/usb 17

EECatalog SPECIAL FEATURE
Figure 4: Data to be transmitted is passed to the PHY layer, where the data is encoded into a 10b
data stream and transmitted to the receiver, then decoded back to an 8b data stream.
in commercial USB 3.0 transceivers this process is completely
transparent to higher levels of the firmware/software stack,
which see only 8b data values. A typical commercial USB
3.0 transceiver, such as the Texas Instruments TSUB1310A,
takes the incoming 5 Gb/s high-speed serial 10b data stream,
Analyzer with PIPE PHY Analyzer with custom PHY
When 8b/10b encoding errors occur, the PIPE PHY
may set a flag that indicates a 10b symbol did not
decode properly. But it’s not possible to see the actual
10b symbols that were received. The analyzer simply
labels the characters to imply an error. At best, such an
analyzer may attempt to reverse calculating the invalid
character, but with no running disparity information the
actual 10b character received cannot be determined.
decodes the native 10b into 8b traffic,
and passes the 8b data stream to the
USB controller via a 16-bit parallel bus
operating at 250 MHz. This PHY interface
for the PCI Express and USB 3.0
architectures (PIPE) is a term borrowed
from PCI Express. The only traffic visible
to the USB controller is the 8b data
stream.
However, when designing or troubleshooting
SuperSpeed USB devices, it is
critical to understand that the native
data traffic actually being transmitted
in a USB 3.0 data link is always being
transmitted entirely in 10b symbols
(Figure 4).
Designing USB 3.0 Test
Equipment
For SuperSpeed USB links, test
equipment intended to investigate
protocol issues must be designed to
give engineers visibility to the native
10b traffic, so that low-level errors
associated with the 8b/10b encoding can be identified and
eliminated. A USB protocol analyzer typically captures
a “trace” of the data traffic passing between devices, and
provides error identification, decoding and displays of
this traffic to enable an engineer to locate and eliminate
When encoding errors occur, analyzers using custom
logic designed to capture the native 10b data show that
the symbol was not valid by marking in red. The actual
10b symbol (3A9) can be easily seen by “drilling down”
to the native 10b trace recording, allowing developers
to see transmission errors or bit flip errors. Running
disparity is also preserved allowing users to distinguish
running disparity errors from other encoding errors.
Figure 5: A comparison of information provided to the user by an analyzer that captures only decoded 8b data (on left) and an analyzer that
captures the native 10b data (on right).
18 Engineers’ Guide to USB Technologies 2012

protocol errors. If the recorded traffic is collected as 8-bit
data, the engineer is blind to protocol errors that may be
occurring at the native 10b level.
There are two basic approaches to designing a protocol analyzer’s
data-capture circuitry. Some USB 3.0 analyzers rely on
commercially available SuperSpeed PIPE PHYs as described
above. The main limitation when considering test equipment
that uses USB 3.0 PIPE PHYs is that the interface on these
chips does not preserve the 10-bit symbols on the bus. Since
the 8b/10b encoding/decoding and running disparity process
occurs within the transceiver, “off-the-shelf” PIPE PHYs convert
the data stream to 8-bit patterns before transferring the
data to the analyzer trace memory. In the process, it discards
the original 10-bit patterns including running disparity.
Without the running disparity information, it becomes impossible
to accurately recreate the 10b symbols, especially when
an invalid 10b symbol is received. While the PIPE PHY may
indicate receipt of an invalid 10b symbol, it does not identify
which invalid 10b symbol was received. Also, while PIPE PHYs
may indicate a running disparity error, they do not identify
the disparity value that was received or the previous symbol’s
running disparity.
The more appropriate approach to designing the PHY for use
in a USB 3.0 protocol analyzer is to custom-design the PHY to
allow direct access to and capture of the native 10b data traffic
used in USB 3.0. This approach provides obvious advantages
in maintaining the actual data transmitted between devices,
and allows the user direct visibility to errors occurring in the
10b level.
Showing Actual 8b/10b Codes
Header packets and link commands are designed to tolerate a
single bad symbol within their packet delimiters. When these
errors occur, SuperSpeed devices are required to accept these
packets as long as three out of four framing symbols are valid.
Both analyzer approaches can detect when 10-bit symbol
errors occur. The difference (highlighted in Figure 5) indicates
that PIPE PHY-based analyzers do not show the actual 10-bit
symbol when it contains an error. This is easy to see using
USB-IF Link Layer test case 7.05 (Header Packet Framing
Robustness) that intentionally corrupts the HP framing. Only
analyzers that capture and preserve native 10b symbols allow
users to see what was actually received.
This is important in attempting to resolve problems in developing
new SuperSpeed USB 3.0 products, since although a
PIPE PHY-based product may be able to inform the user in
invalid symbol was received, no other information about the
symbol is available. Engineers cannot differentiate between,
for example, an encoding error associated with a specific 8b
byte and a hardware issue that repeatedly introduces incorrect
bits into specific locations in the data stream. The inability
to directly identify the invalid symbols means more time lost
and additional, more expensive test equipment required in
EECatalog SPECIAL FEATURE
tracking down the source of the problem so that it might be
resolved.
Both analyzer approaches can detect and report errors in the
payload portion of headers, data frames, and link commands
(using CRC checks). However, analyzers that utilize the PIPE
PHY only have access to the 8-bit bytes to analyze the traffic.
This is normal for commercial PHYs because higher layers only
use the 8-bit values. However, when it comes to test equipment,
developers generally want to capture the most detailed
picture possible of traffic on the bus (for example, the header
packet framing error example above).
In the event developers using PIPE PHY based analyzers need
visibility to 10-bit errors in link or header framing, the only
alternative is attaching a scope to the system-under-test to
capture the raw bit information.
Figure 6: Both the Voyager M3i and Advisor T3, shown above, use
custom PHY designs and feature true 10b symbol capture for uncovering
the root cause issues affecting USB 3.0 link stability.
LeCroy’s USB 3.0 analyzers, the Voyager M3i and the Advisor
T3, both utilize custom PHY designs and feature true 10b
symbol capture (Figure 6). When it comes to debugging link
layer or 8b/10b encoding issues, users will benefit having this
additional information from the analyzer. Visibility to the
native 10b symbols captured at the physical layer can help
uncover root cause issues effecting link stability, resulting in
faster problem resolution and quicker time-to-market for new
USB 3.0 product designs.
Mike Micheletti is USB product manager for the
LeCroy Protocol Solutions Group, which includes
the company’s USB 3.0 analyzers, the Voyager M3i
and the Advisor T3 which utilize custom designs
using deserializer components and feature true
10b symbol capture.
www.eecatalog.com/usb 19

EECatalog SPECIAL FEATURE
USB Aims for Truly Universal
USB is making leaps and bounds to become a truly universal connector. The mentality
of not only advancing current technology, but branching out and re-using IP in
new areas has rightly made USB a leader in the industry.
By Tim McKee, Intel Corporation
The USB protocol is expanding its application to become
a completely universal connection medium. It seems that
the USB Implementers Forum (USB-IF) will not stop until
the USB cable can be used for any technological connection
that one can imagine. USB has pressed forward in the standard
protocol by releasing the SuperSpeed USB 3.0, but is
also developing specifications to expand the applications
of USB. The increased data rate provided by SuperSpeed
has greatly increased the possibilities of product extension,
and the IF is taking full advantage. The three most
relevant specifications to making USB a truly universal
transfer protocol are Super Speed Inter-chip (SSIC), USB
Power Delivery and USB Audio/Video (A/V).
Super Speed Inter-chip (SSIC) Optimized
for Mobile Devices
The USB 3.0 promoters group has teamed up with the
MIPI Alliance to define SSIC, a low-power,
high-bandwidth chip-to-chip interconnect
based on the USB protocol over the MIPI
M-PHY. The M-PHY makes use of Reference
M-PHY MODULE Interface (RMMI) instead
of the USB standard PIPE interface between
the link and the physical layer (Figure 1).
Because of its low power consumption, SSIC
is being optimized for internal use on mobile
devices. Using the USB protocol in a chip-tochip
solution is not a new idea all together.
Hi-Speed USB utilized this idea as well, using
high-speed inter-chip (HSIC) to replace I2C.
The newer SSIC will feature much higher
data rates and power efficiency.
Current chip interconnects have begun to
limit the capabilities of smartphones and
tablets, but SSIC plans to expand capabilities
rather than limit them. The target for
per-lane data rate over SSIC starts with 1.2
to 2.9 Gbits/s and will eventually reach 5.8
Gbits/s. On the power threshold, the aim is
for between 1 and 5 picojoules per bit per
second. In high-speed mode, the power level
would amount to an average of approximately
20 milliwatts. These power levels paired with
low pin count and high data rates make this
technology very attractive to the mobile
device industry.
Another advantage of SSIC will be its cost of development.
Current competing technology offers its specification to
peripheral chip designers for a one-time fee of $100,000.
SSIC will be royalty-free to all members of the MIPI Alliance
and the USB 3.0 Promoters group that are at the adopterlevel
when using the technology for “mobile terminals with
voice capabilities.” This specification is not the only one
that adds a promising power twist to the USB protocol.
USB Power Delivery Boosts Charging Power
The standard USB 3.0 specification constrains the power
delivery over a USB cable to a mere 4.5 watts (5 volts, 0.9
amps). USB 2.0 is even lower at 2.5 watts (5 volts, 0.5 amps).
These power levels work fine for charging small form
factor devices like smartphones and cameras. For larger
electronics such as monitors, printers and laptop PCs
however, 4.5 watts doesn’t even come close to supplying
Figure 1: Example SSIC implementation using minimal topology modification in the link
layer and above. All SSIC specifics are contained in the PHY adapter level including the
PIPE3interface to RMMI bridge.
20 Engineers’ Guide to USB Technologies 2012

the required power. Headed by the USB-IF, developers are
working on a USB Power Delivery specification that will
deliver power levels up to 100 watts (5 volts, 20 amps),
an adequate level for many more consumer electronics
(Figure 2).
Negotiating a device’s voltage and amperage upon connection
(already included in the USB specification), along
with the new, higher power levels, creates a unique powering
situation. Any USB
connector will be capable
of supplying power to lowpower
devices like mice
and keyboards, high-power
24-inch monitors, and
everything in between. More
wattage is not the only thing
that this new spec will offer.
Bidirectional power delivery is also included, allowing
one to change power source without touching the cable
between two devices. Allowing charge direction to change
creates a type of shared power when devices are connected.
Whichever connected device has more power could charge
the other and, in a way, equalize the power levels. The
power delivery should operate on current standard cables
and connectors, making for a near seamless transition to
this new addition to the USB family.
EECatalog SPECIAL FEATURE
Figure 2: With USB Power Delivery, a much larger range of consumer devices will be able to utilize power over a USB cable. This figure shows some
of the added device types as compared to other USB specifications.
That mess of wires behind
the desk may be seeing its
final days.
This development could easily eliminate the need for
peripheral devices to have anything more than one USB
cable plugged in to operate completely with a host PC.
Removing the need for an AC/DC power converter will
drive down prices of any USB product that was formerly
externally powered as well. Imagine sitting at your desk
and having only one clunky power block plugged into
your wall, and everything else powered through USB.
That mess of wires behind the desk may be seeing its final
days. A notebook PC could
rely solely on a USB connection
for power. With help
from USB Power Delivery
technology,we can see a scenario
where your computer
monitor can have one cable
connected that supplies not
only power, but also audio
and video with another one of USBs new specifications,
USB A/V.
Promise of Lower Cost High-Definition
A/V Delivery
Today, high-definition audio and video delivery only
brings to mind HDMI as a technology that can supply
true HD video with sound. HDMI is a newer technology
that started in the early 21st century that delivers great
www.eecatalog.com/usb 21

EECatalog SPECIAL FEATURE
quality and reliability from my experience. The only
downfall that comes with the HDMI cable is the price. A
high-quality,one-meter cable can cost anywhere from $20
to $60 at your local electronics store. On the other hand,
reliable USB standard cables can be found at the same store
for fewer than$10. It is for this reason and many others
that there is excitement to see USB A/V hit the market.
USB has already solidified its name in the market as a
reliable data-transfer mechanism and is a standard port
on every computer on the market. Boasting up to 10x the
speeds of Hi-Speed USB 2.0, SuperSpeed USB 3.0 will be
amply capable of transferring high-definition audio and
video over its established, dependable protocol. The biggest
challenge with transferring audio and video comes with
achieving continuously correct timing. A small error in an
audio stream can be heard by
a user and is considered unacceptable.
Video on the other
hand is a little more lenient.
One or two pixels in error are
mostly unrecognizable, but
missing a whole frame can
ruin the user’s experience.
Eliminating errors while
keeping the audio and video
in sync makes an A/V connector
difficult to create with
quality that we expect from USB. Fresco Logic was able to
give a live demo of the A/V technology at Computex 2012
Taipai, boasting full HD over a USB 3.0 cable to a secondary
monitor. Although there is no specific date as to when the
A/V technology will come to the consumer, the aim is to use
it in ultrabooks, tablets, smartphones, pico projectors, HD
displays and TVs. It seems as though USB A/V will become a
direct competitor with HDMI and boast a much lower price
point due to USB’s low cost implementation. Could we see a
shift in the audio/video connection market? I guess we will
just have to wait and see.
USB connectors throughout
a house provide the
possibility of having a fully
networked “smart house.”
Leaps Toward Universal
USB is making leaps and bounds to make it a truly universal
connector. The mentality of not only advancing current
technology, but branching out and re-using IP in new areas
has rightly made USB a leader in the industry. Seeing all
these advances in USB technology makes me think about
the future: Today’s computing power of a laptop computer
held in the palm of your hand. USB wall sockets throughout
your house instead of the standard three-prong outlet that
we use today. An entertainment system using only USB
cables for data and power. All of these ideas could soon be a
reality for the common consumer.
What could be the next? USB connectors throughout a
house provide the possibility of having a fully networked
“smart house.” An Internet connection could be achieved
by simply plugging in a device
to be charged. Looking ahead
toward the next generation of
standard USB, the challenge
becomes how far the transfer
speed can be pushed without
making major changes in the
design that USB has used
for years. Communication
mediums are beginning to
test the limitations of the
traditional copper wire.
Creativity and pioneering are crucial to the continuing
development of technologies that are used every day. The
possibilities are endless and it’s innovative technologies
like USB that are helping to lead the way.
Tim McKee is a hardware/software engineer for
Intel I/O Technology and Standards. He is a recent
graduate from Oregon State University with
a degree in electrical and computer engineering.
He currently works on hardware proof-of-concept
prototypes and compliance software
22 Engineers’ Guide to USB Technologies 2012

The Cohabitation of NAND
Flash and USB 3.0
Many factors influence data-transfer performance, including
the type of storage used in a device. The storage options
available to designers offer performance and price tradeoffs.
NAND flash, a type of non-volatile memory, is used
in mobile products to store phone numbers, apps, photos,
videos and music. As USB 3.0
becomes ubiquitous in highperformance
mobile devices,
the question is whether the
NAND flash in a device can
effectively handle USB 3.0
throughput.
NAND Flash Formats
NAND flash is packaged in a
variety of ways. You may be
familiar with it as the secure data (SD) cards that slip into
your digital camera, or a USB flash drive that you carry around
to transfer files. Those USB flash drives (sometimes called
“jump drives” or “thumb drives”) can offer blazing speed like
the Lexar Triton’s 155 Mbps read/150 Mbps write, or slower
speeds like the give aways handed out at trade shows.
NAND flash appears in ultrabooks
as solid state drives (SSDs). SSDs
consume about one-third the
power of hard disk drives (HDDs)
because SSDs do not have any
mechanical moving parts. SSDs
are also about 3X faster than
HDDs. However, SSDs cost about
3X more than HDDs, so ultrabook
manufacturers typically keep
SSDs to 128GB or less.
NAND speed is limited only by
the price that mobile device
manufacturers are willing to
pay. Every year, the price of
NAND flash drops, so manufacturers
are able to add in more
and faster NAND memory for
the same price.
EECatalog SPECIAL FEATURE
As USB 3.0 becomes ubiquitous in mobile devices, can NAND flash handle
the throughput?
By Eric Huang, Synopsys, Inc.
The question that you need
to answer for your product
is: In which tier will it
compete?
Figure 1: Possible sources of latency
When designing products that will ship two years from now,
it’s key to consider the future cost and performance of NAND
flash. NAND flash performance also affects USB performance,
which can determine design decisions around which generation
of USB to implement.
Factors Affecting
USB Performance
Both hardware and software
will affect the performance of
the connection between a USB
device (e.g., USB flash drive),
and a host, (e.g., PC, tablet
PC, game console, digital TV).
Figure 1 shows possible sources
of latency, with a USB 3.0 xHCI
host on the left, and a USB 3.0 peripheral on the right. Minimizing
latency in both the hardware and software, on the host
and the device, will ensure optimal USB performance.
The operating system plays a part on the hardware as well
as the software. If the software layers are loaded down
with lots of applications or software, the system will slow
www.eecatalog.com/usb 23

EECatalog SPECIAL FEATURE
down in the same way a PC does when too many windows
are open. In addition, the speed of the application and the
quality of the drivers will impact performance. A wellwritten
driver uses memory correctly and uses parameter
settings in USB to maximize throughput.
Hosts and devices with high-performance hardware that
offer plenty of CPU cycles allow the USB to take advantage
of fast throughput. First-in, first-out (FIFO) memories
stored in local RAM must be adequately sized to receive
and process incoming and outgoing data, and the bus on the
hardware must be fast enough to move the data from the
USB controller to the CPU. If the RAM allocated is either
too slow or too small, the system will wait for the FIFO to
empty (data to be transferred elsewhere) before moving
more data through USB.
The hardware must be synchronized with the OS and
driver to transfer data into the system RAM or NAND for
use by the CPU. For example, if a video card and the USB
3.0 host are competing for bandwidth on the same hardware
bus, USB throughput will decrease.
The USB 3.0 PHY must be
built to transmit cleanly
and, more importantly, to
receive and clean up data
after it travels through the
USB cable. Keep in mind that
the USB cable can also affect
throughput: A bad cable,
poorly constructed, can
interfere with traffic travelling
between the client and
the host.
On the client side, the same hardware and software factors
can affect throughput to and from the peripheral (e.g.,
smart phone or flash drive). In addition, if the peripheral
includes a spinning USB hard drive or a USB printer inkjet
head, mechanical limitations can affect speed as well.
This also means that the NAND memory (hardware) is
one part of the system (possibly in both the host and the
device) that can impact throughput. Slower NAND can
slow overall throughput, while faster NAND, like that
found in the Lexar Triton flash drive, can make good use
of USB 3.0 bandwidth (as shown in the video demo here).
The Ideal System
USB throughput is not a function of just the controller
and the PHY, but includes an entire system of software,
buses, operating systems and cables. Even when the controller
and PHY can achieve SuperSpeed USB 3.0 speeds
of 400 megabytes per sec (MBps), or 4 Gbps, performance
is proven on an ideal system of high-performing parts. In
the system used in the video referenced above that dem-
NAND speed is limited only
by the price that mobile
device manufacturers are
willing to pay.
onstrates the performance of the DesignWare® USB 3.0
PHY and controller, RAM was used for storage instead of
NAND. Since RAM is instantaneous, the demo wasn’t limited
by NAND read/write speeds. This helped to idealize
the system by eliminating a possible latency.
Even when most of a system can handle USB 3.0 speeds,
NAND flash speed often remains a limitation. However, as
the demand for fast access increases, so do NAND speeds.
Apple’s most recent launch of the new MacBook Pro advertises
read speeds of 500 MBps. So it is possible to read data
incredibly quickly off the NAND flash. This capability
allows huge spreadsheets and large video files to appear on
screen faster, and editing, saving and compiling to be done
in a flash. The NAND flash in such systems is designed to
deliver performance that can support USB 3.0 speeds.
What Will Your Market Bear?
A fundamental consideration for determining whether to
implement faster NAND flash is the target market. In a
given market, there can be one to three market leaders
that make the fastest, fanciest “tier 1” products. These
market leaders make the most money both by margin
and by volume. The rest of
the market players fight for
the lower-margin business.
Companies making “tier 2”
products generate revenue
by differentiating on one
or two features. Companies
making “tier 3” products
typically make money based
on volume. Many companies
offer products that fit into
different tiers. This year’s tier 2 product can be costreduced
in the second year, and price-reduced to compete
with tier 3 the third year.
If you are competing with the market leaders in tier 1
products, USB 3.0 is now a requirement. In the case of
smartphones and tablets, TI’s OMAP 5 and Samsung
Exynos 5 have already moved.
If you are competing with tier 2 products, you either
target to move your product into tier 1, or hold a strong
feature lead in tier 2 to command a price premium over
your competitors. In both of these cases, adopting USB
3.0 is required—either to move into tier 1, or to give your
customers the value that they demand. Staying with USB
2.0 while the competition adopts USB 3.0 will allow your
competition to take over the feature lead, and therefore
the price premium.
In tier 3 products, it is possible that USB 2.0 will be good
enough for the next few years. However, it is just as likely
that USB 3.0 will be required to maintain a foothold in the
24 Engineers’ Guide to USB Technologies 2012

market. Tier 3 products without USB 3.0 may simply need
to compromise on price even further.
The Future of Cohabitation
By 2014 or 2015 most, if not all,tier 1 and tier 2 products
will support USB 3.0, so system design starts this year
must include USB 3.0 to compete. Product architects
should demand that NAND be upgraded to keep up with
USB 3.0. Operating at over 100 Mbps, this new breed of
NAND is much faster than today’s SD memory and 3x
faster than effective USB 2.0 speeds. Tier 1 products will
push the speed limits of NAND to over 400 MBps (4Gbps)
as consumers get used to, and require, USB 3.0 speeds.
The question that you need to answer for your product is:
In which tier will it compete? If you want to win against
market leaders’ tier 1 products by offering the highest performance,
you need USB 3.0. It’s only after that decision
EECatalog SPECIAL FEATURE
is made that you need to find the NAND flash that meets
your system’s required speed. As NAND flash technology
gets faster and cheaper and USB 3.0 adoption becomes
ubiquitous, USB will, in fact drive the broader use of fast
NAND flash. Fast NAND will complement USB 3.0 and
cohabitate in every electronic product in true harmony.
Eric Huang is currently senior product marketing
manager for Semiconductor USB Digital IP
at Synopsys, Inc. He has been working on USB
since 1995, starting with the world’s first BIOS
that supported USB keyboards and mice. He also
served as chairman of the USB On-The-Go Working
Group for the USB Implementers Forum from 2004-2006.
Huang received an M.B.A. from Santa Clara University, an M.S.
in engineering from University of California Irvine, and a B.S. in
engineering from the University of Minnesota.
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The Way of the Future
USB has revolutionized data transfer across most aspects of the industry, delivering
speed, effortless charging and plug-and-play simplicity. See what’s new, what’s improved
– and a few issues you still need to be aware of.
By Gregory Quirk, Mouser Electronics
In today’s fast-paced world of computers, peripherals
and mobile devices, USB inspires confidence as the most
widely accepted, reliable form of connectivity out there.
The Universal Serial Bus is a set of interface specifications
for high-speed wired communication between electronic
systems. USB is everywhere, with over six billion devices
connecting with USB worldwide.
While USB 2.0 is still widely
used, smartphones that
can take advantage of the
improvements offered by
USB 3.0 are on the way.
Since the release of USB version 2.0 in 2001, data rates
have increased from 480 Mbps (megabits per second) to 5
Gbps in USB 3.0, as has maximum bus power and device
current draw. The most significant change to USB 3.0 has
been the introduction of two additional differential data
pairs in parallel with the existing data bus, thus increasing
the number of connections from four to nine. This allows
full-duplex, simultaneous transfer of data as opposed to the
half-duplex unidirectional USB 2.0 bus.
In addition to increased date transfer rates, the new specification
also increases the amount of current available to
power external devices from 500ma to 900ma.
“Since its introduction in 2001, high-speed USB technology
has revolutionized data transfer across most aspects of the
industry, delivering speed, effortless charging and plugand-play
simplicity,” says Kevin Hess, vice president of
technical marketing at Mouser Electronics. “USB 3.0 has
revolutionized the plug-and-play potential of USB once
more, delivering greater flexibility for power and faster
data transfer rates, opening the potential to be utilized in
an even broader range of consumer applications.”
In 2010, the number of devices with USB 3.0 ports reached
about 100 million units, with approximately 70 million USB
3.0 (SuperSpeed) devices shipped in 2011 alone. One reason
for the traction of USB 3.0, aside from the technical advantages
over USB 2.0 and existing consumer familiarity with
USB, is the openness of the connection. The xHCI specification
was released in May 2010, allowing operating systems,
including the open-source Linux community, to integrate
the USB stack. Like Linux, USB is royalty free.
Speed Increase
There are many advantages that USB 3.0 offers. The first,
and most obvious, is the increased transfer speed, which
gave USB 3.0 the nickname of SuperSpeed USB. While the
theoretical top speed of nearly 5 Gbps is not easy to meet,
most speed tests have resulted in anywhere from a 3x to
10x improvement over the previous version. In one test, it
would take about 14 minutes to transfer 25GB of data over
USB 2.0, while the same amount of information only took
four minutes using USB 3.0.
This advancement is one of the key reasons for acceptance
of the new USB standard. More devices are capable
Fig 1: Amphenol’s USB 3.0 SuperSpeed GSB3 series connectors are
among the latest technology for next-generation designs. Photos:
Courtesy of Mouser Electronics
26 Engineers’ Guide to USB Technologies 2012

of storing more information, such as HD video and high
megapixel pictures, or hard drives with larger capacity
found in stand-alone hard drives or portable video players
like iPads. When transferring from one device to the
other, the greater speed enabled by SuperSpeed USB saves
the consumer a considerable amount of time.
Low Power Transfer
In addition to the greater speed, USB 3.0 fundamentally
changes the way that data is transferred. Previously, the
USB device would “poll” the computer to see if new data was
trying to be transferred and it prevented the computer from
entering a low power state to conserve battery life. While
EECatalog SPECIAL FEATURE
this did not consume a significant amount of power, when
using a laptop, every bit of battery life counts. Instead of this
technique, SuperSpeed employs an asynchronous method of
determining if data is available and will only turn on when
you attempt to read or write to the connected device.
More power is available for USB devices so that they can
charge faster. Unfortunately, this is still not sufficient to
turn off the “not charging” indicator on the iPad without
an included power driver, as the iPad requires 2.1A of
power and USB 3.0 offers 0.9A.
Fig 2: Distributor Mouser Electronics has developed an entire USB 3.0 technology training microsite on its website. Photos: Courtesy of Mouser
Electronics
www.eecatalog.com/usb 27

EECatalog SPECIAL FEATURE
However, not everything about USB 3.0 is an improvement
over the previous version. The cable length and total distance
have been decreased. While this may not be an issue
for most consumer applications, it could potentially cause
some concerns for commercial use – especially when it is
not convenient to have the host machine close to the connected
devices. However in those cases, people can weigh
the speed benefits with the convenience, or they could
turn to alternative methods, such as wireless technology.
Fig 3: Wurth Electronics manufacturers the newest cable assemblies
with USB 3.0 ports. Photos: Courtesy of Mouser Electronics
Circuit Protection
At data communication speeds of 5Gbps, protecting these
circuits from electrostatic discharge (ESD) is a significant
challenge. In addition to higher data rates, the USB 3.0
standard defines up to six data communication channels,
and continuous shrinkage in IC geometries is making
these circuits more susceptible to electrostatic discharge
damage. The parasitic capacitance of a protection device
has always been a major issue, but along with a low
clamping voltage, these characteristics are now critical
selection criteria for designers.
Some protection-device manufacturers have designed their
products for a minimal parasitic capacitance to maximize
signal integrity while others have maximized clamping performance
at the cost of higher capacitance. Understanding
the trade-offs between these selection criteria across the
different protection technologies such as varistors, polymers
and silicon is key to achieving a successful design.
With many different ESD protection technologies available
on the market today for USB 3.0 protection, it has been
shown that SPA TVS Diode Arrays, such as the SP3011,
offer superior clamping performance versus competing
technologies, extremely low loading capacitance, and are
ideal for protecting high-speed USB 3.0 data lines.
However, not everything
about USB 3.0 is an
improvement over the
previous version.
Future Deployment
“With the faster performance and higher storage capacity in
a given amount of time made possible by SuperSpeed USB,
more systems will be employing USB 3.0 in the future,” concludes
Mouser’s Hess. “While USB 2.0 is still widely used,
smartphones that can take advantage of the improvements
offered by USB 3.0 are on the way. This will greatly boost consumer
acceptance, especially given the already widespread
integration of HD photography and recording capabilities
into handheld devices. With an expected 160 million smartphones
to be sold in 2013, many of which are expected to
utilize USB 3.0, SuperSpeed is the way of the future.”
Gregory Quirk is a technical writer for Mouser Electronics.
Many of his articles on the latest technologies, applications and
trends, including audio, energy harvesting, lighting, sensors
and medical can be found at www.mouser.com. Quirk has been
a technical writer since 2004, focusing on semiconductor components,
consumer devices and business trends. He has written
numerous articles for industry publications and presented at
technical conferences. His expertise has been sought by the financial
community on multiple occasions to predict design-wins
in popular consumer products.
28 Engineers’ Guide to USB Technologies 2012

SuperSpeed USB 3.0 for
Smarter Phones
By Eric Huang, Sr. Product Marketing Manager for Semiconductor USB Digital IP, Synopsys, Inc.
Consumers demand more from phones. Children message
friends. Students e-mail teachers. Parents track their kids’ locations.
Grandparents download photos. In every country, in every
city, consumers record more HD videos and take more high-res
pictures. This forces a transition from basic phones to smartphones,
and from smartphones to smarter phones. Yet, no matter
how “smart” a phone is, it is useless if it can’t work all day, offer
plenty of storage, and deliver fast data transfer. To address this
need, device manufacturers will transition from USB 2.0 to USB
3.0 to save power, improve performance, and add functionality,
so consumers can carry their media, music, video camera, digital
camera, and internet everywhere, anytime.
Consumers’ appetite for smartphones and tablets will grow as price
points come down and features increase. Mobile devices with capabilities
like recording HD video need more memory and the ability
to transfer data faster. Marketers will say the wireless cloud is the
answer. No way. Wireless is not the answer. Not only will mobile
devices need more memory and faster data transfer, but they’ll
also need to squeeze every bit of CPU power and every second of
battery life to deliver maximum time for talking and surfing the
internet—requirements that the cloud cannot address.
Only SuperSpeed USB (aka USB 3.0) will meet the need for lowpower
data transfers with high throughput. USB 3.0 provides
faster performance—up to 10x faster than USB 2.0, and at least
10x faster than going to the cloud. In addition, USB 3.0 offers lower
power consumption per Gb transferred than either option. USB 3.0
reduces both CPU loading and on-chip bus interrupts, so the CPU
cycles can be dedicated to functions
like graphics processing, in
order to maximize SoC performance.
Transitioning from USB
2.0 to USB 3.0 in SoC designs will
enable phones with longer battery
lives, faster data transfers,
and greater access to storage.
More Storage Needs
More Speed
Smartphones will continue to
grow in market share as service
providers push data packages
that generate additional revenue,
while consumers pull on
the demand side by requesting
more features and higher data
speeds. A recent example of a
smarter phone is the iPhone
EECatalog SPECIAL FEATURE
4S. Users take eight megapixel pictures and record 1080p video.
To store this digital content, the iPhone 4S contains up to 64
GB of memory. Future phones will contain 128 GB of memory
or more. Users fill the iPhone memory with pictures of family
vacations, wild parties, college graduations, camping trips, and
visits to the zoo.
Will LTE, 3G phone networks, and the cloud be sufficient for
moving pictures and videos quickly and storing them forever? It’s
unlikely. The amount of data created will be larger than the data
slowed down with the success of the first iPhone). Instead, pictures
and video will be stored on external hard drives for posterity, but
only after being transferred to a PC first. Transferring and storing
videos, pictures, and other data forever in the cloud is slow and can
be costly, so users will require USB 3.0 for fast transfer to PCs.
How USB 3.0 Blows Away the Cloud
While the cloud seems like a convenient, low-cost entity for
everyone to store their personal photos and videos, it is not the
best long-term solution. The cost of a 1 TB USB 3.0 hard drive
today is less than $100, and 1 TB of memory will store a lifetime
of pictures and videos. On the other hand, storing 1 TB
in the cloud costs thousands of dollars per year, and restricts
consumers to a single service or set of devices. In addition, the
data transfer for just 10 GB of data through the cloud for the
storage of one HD video would be costly–service providers will
only support this if it makes them more money.
www.eecatalog.com/usb 29

EECatalog SPECIAL FEATURE
Even with existing slow networks, service providers have redefined
what an “unlimited” data plan includes by putting limits
on data usage. So the cloud isn’t a viable long-term storage option
for most consumers. Mainstream users will likely choose a USB
3.0 external drive to continue to be the backup method of choice
for digital media and data. Most consumers will transfer their
content to PCs or other hardware for safekeeping.
Upgrade, Download
Consumers want to download their personally created or purchased
digital movies and content on to their smart phone.
If you own an iPhone today or ever have upgraded from one
iPhone to another, you know how many long hours it takes to
move your media from one device to the other. With even more
data to transfer between future phones, USB 2.0 isn’t going to
cut it. Consumers will demand the faster data rates that USB 3.0
offers. The table below shows the relative speed and complexity
of four generations of USB specifications.
Longer Battery Life with Higher Performance
In the future, smartphones will have a SuperSpeed USB 3.0 device
port acting as a peripheral to sync with your laptop. SuperSpeed
USB transfers large amounts of data and reduces the power consumed.
How? During data transfer, USB 3.0 requires about 2x
the power, but provides 10x the speed. This means that you can
transfer 10 GBs of data in 1/10th the time using USB 3.0 while
consuming only 20% of the power of USB 2.0 for the transfer.
Once the transfer has completed, USB 3.0 stops transmitting. USB
2.0 transmits continuously, but USB 3.0 turns off. Therefore, the
“passive” power consumption is also lower, which allows the battery
to last longer. Even if the battery is charging from a host at
the time, the system runs cooler, allowing CPU cycles, bus cycles, or
interrupts to be available for other functions. Those cycles enable
greater functionality while USB 3.0 operates, so it doesn’t consume
the processing performance from other on-chip functions.
Mostly a USB Peripheral, Sometimes a USB
Host
In the same way that USB 2.0-based phones work today, USB
3.0-based smartphones will also be used as a USB 3.0 peripheral.
This means that your PC, TV, or game console is the host, and
your phone is the peripheral. You plug your phone into a TV. The
TV (host) reads the pictures or video off the phone (peripheral or
device), and you watch the images on your TV. The TV manages and
requests the data from the phone.
However, internally, SuperSpeed USB 3.0-based smartphones will
contain a USB 3.0 dual-role device controller. This single USB 3.0
port acts as either a peripheral (device) port or a host port. This
helps the smartphone act as a laptop substitute when using the
USB 3.0 port in host mode. Users can plug it into a USB 3.0 docking
station that provides power to charge the phone through one USB
3.0 port, and uses other USB 3.0 ports to connect to a monitor, keyboard,
mouse, and external hard drive. A good illustration of this
concept in USB 3.0 today is the Targus USB 3.0 Docking Station.
The docking station can act as a USB 3.0 peripheral while the
smartphone acts as a host. As a USB 3.0 host, the smartphone can
connect and manage the input and output to the monitor from the
USB keyboard and mouse. USB 3.0 makes this more compelling by
offering fast data rates to enable high-resolution video streaming
and support video transfer to the HDMI and DVI ports to view
video on the consumer’s monitor. USB 3.0 video in these designs
will be supported by chips from companies like DisplayLink, which
transfer video data from USB 3.0 to HDMI. For a demonstration of
the DisplayLink product, visit the To USB or Not to USB Blog.
SuperSpeed USB 3.0 Smartphones
USB 3.0 provides faster performance with lower power consumption
for mobile devices by reducing the overall loading on the CPU
and on-chip bus. Data transfers across the system bus into memory
faster, and then stops transmitting on the system bus. The USB
core stops, and the DMA stops transferring data (because there
is no more data to transfer). Therefore, USB 3.0 uses less power,
resulting in longer battery life. This means more CPU cycles and
more bus bandwidth are available to support high-value features
such as graphics processing.
Today, the availability of USB 3.0 devices, dual-role devices, and
host IP controllers and PHYs gives system makers more options
for integrating features and add-on products that consumers
want. With the availability of smartphones with SuperSpeed USB
3.0, the entire ecosystem of adjacent USB 3.0 market segments
will be positively impacted including tablet PCs, personal computers,
digital storage, TVs, set-top boxes, and digital still and
video cameras. To be ready for this next generation of SuperSpeed
USB 3.0-ready smartphones, new products must support USB
3.0—are your products ready?
In his role as senior product marketing manager for semiconductor
USB digital IP, Eric Huang is responsible for managing
USB 3.0 and USB 2.0 IP. Huang worked on USB at the beginning
in 1995 with the world’s first BIOS that supported USB
keyboards and mice while at Award Software. After a departure
into embedded systems software for real-time operating systems,
Huang returned to USB cores and software at inSilicon,
the world’s leading supplier of USB IP at the time. inSilicon was
later acquired by Synopsys in 2002.
30 Engineers’ Guide to USB Technologies 2012

Among the important trends in the medical market today
is the increase in healthcare spending. In their 2011 World
Health Statistics report, the World Health Organization
said that, on a global basis, the health economy is growing
considerably faster than Gross Domestic Product (GDP).
They went on to say that, from 2000 to 2008, health
spending rose from 8.3% of total GDP, to 8.5%, and the
per-capita total expenditure on health at the average
exchange rate rose from (US$) $484 to $854. This is a substantial
increase during the eight year period.
As a result of this increasing global investment in healthcare,
more medical devices are becoming end-user items.
Today, medical devices are not restricted to hospitals and
doctors’ offices. Rather, we are seeing a significant trend
toward home healthcare, where more and more medical
equipment is being designed for home use. Products such
as remote-monitoring devices for blood pressure and
glucose levels, as well as new drug delivery systems, are
becoming commonplace in
the homes of patients with
chronic conditions.
This market trend is also
encouraging innovation in
the field of medical electronics.
As personal medical
devices are becoming more
ubiquitous, companies are
looking into developing
products with lower power consumption and the smallest
possible form factors, and they’re adding connectivity to
enable the easy exchange of data.
The medical industry has long understood the benefits of
standards such as USB to implement the exchange of data
in medical facilities, which it is now deploying for remote
in-home patient monitoring. USB’s fast, reliable and “plug
and play” nature is almost perfect for medical applications
where devices need to be portable, robust and easily upgradable.
Companies are also coming up with new techniques
that directly insert isolation within the USB signal path,
which eliminates the need for external isolation components
and therefore helps to minimize the size and cost
of products. The medical industry is truly leveraging USB
technology across a wide variety of healthcare devices.
EECatalog SPECIAL FEATURE
Growth of USB in Medical Devices
USB is becoming the de-facto standard for wired connectivity in healthcare devices.
By Manasi Khare, Microchip Technology Inc.
PHDC is essentially the USB
stack designed specifically
for medical devices with
USB connectivity.
The Continua Health Alliance was formed to provide
design guidelines and product certification programs, and
has become a benchmark organization in the medicaldevice
industry. In particular, it is working with the USB
Personal Healthcare Device Class (PHDC) specification to
leverage seamless interoperability between devices. This
effort means that USB will likely remain the backbone of
wired connectivity in healthcare devices for some time.
USB Standardization for Medical Devices
As USB interface adoption in a variety of medical devices
increased, a common standard was essential to maintain
interoperability. In particular, interoperability was required
to guarantee that different devices produced by different
vendors could successfully communicate with each other
and exchange meaningful data. The Continua Health Alliance
began with this goal in mind. They have united elegant
technology and medical devices with healthcare-industry
leaders to empower patients to exchange vital medical
information, and improve the
way they manage health and
wellness. It has established
an ecosystem of connected
personal health products and
created design guidelines
based on connectivity standards.
There are nearly 250
technology, medical-device
and healthcare companies
that have joined this alliance
to conform to the interoperability between devices and provide
an opportunity to truly manage personalized health
and wellness. The complete list of active Continua Health
Alliance participating member companies can be found
at http://www.continuaalliance.org/about-the-alliance/
member-companies.html.
Seeing the growing need for seamless interoperability
between personal healthcare devices and USB hosts, in 2007
the USB Implementer’s Forum (USB-IF) developed the USB
Personal Healthcare Device Class (PHDC). The introduction
of PHDC allowed personal healthcare devices – such as
blood-pressure monitors or glucose meters – to connect via
USB to consumer electronics such as PCs or mobile health
appliances. In 2008, the Continua Health Alliance approved
the USB PHDC and established a product-certification program
that formalizes interoperability conformation using
www.eecatalog.com/usb 31

EECatalog SPECIAL FEATURE
Figure 1: Typical PHDC-based healthcare system
this USB standard. Since then, the Continua Alliance has
regularly provided updated design guidelines that allow
devices to maintain seamless interoperability.
The Personal Healthcare Device Class
(PHDC)
PHDC is essentially the USB stack designed specifically
for medical devices with USB connectivity, and it was
designed to enable seamless interoperability between
personal-healthcare devices and USB hosts. It defines the
functionality necessary for personal-healthcare devices to
send standardized data and messages to hosts over USB,
using industry standards such as the IEEE 11073-20601
Optimized Exchange Protocol. A typical PHDC-based
healthcare system is shown in Figure 1.
Similar to the USB 2.0 specifications that define various
device classes such as human interface device (HID), communications
device class (CDC) and Mass Storage, the
PHDC specification has been further sub-categorized into
the following three themes, each focusing on a specific
area for the typical usage of personal medical device:
1. Physical Fitness: For devices that focus on enabling
people to stay healthy and fit, such as exercise watches,
heart-rate monitors and exercise bikes.
2. Disease Management: For devices that focus on
detecting, monitoring and treating diseases, such as
drug-delivery systems.
3. Independent Aging: For devices that help seniors live unassisted,
such as activity monitors and medication reminders.
The above categorization system helps define the data and
message structure for each device, depending on its usage
and focus area. The PHDC specification does not use a new
data or messaging format to exchange data. Instead, it
uses the existing IEEE 11073-20601 Optimized Exchange
Protocol, which allows for vendor-defined data and messaging
standards (Figure 2).
The software architecture of the PHDC stack ensures
code robustness, portability and reliability in embedded
systems development. A USB PHDC-based solution can be
seen as a tiered system consisting of the core USB PHDC
stack and an IEEE Optimized Exchange Protocol that
communicates with the stack and translates the data to
external API applications that the devices can use. Several
layers of software abstraction isolate the end application
from low-level communication drivers, allowing code
portability and ease of use. A high-level view of a typical
PHDC-based system is shown in Figure 3.
The PHDC specification has simplified USB communication
for personal healthcare devices, and has expanded the
use of USB to a vast array of personal-healthcare devices.
Additionally, the PHDC stack is helping companies achieve
faster time to market for their products, while leveraging
cross-business expertise and enabling the market expansion
of personal healthcare devices.
The complete PHDC specification can be viewed at
http://www.usb.org/developers/devclass_docs/Personal_
Healthcare_1.zip.
32 Engineers’ Guide to USB Technologies 2012

Figure 2: PHDC’s data-exchange mechanism
A Look Ahead
With PHDC in place, another challenge that remains for
employing USB in medical devices is to overcome electrical
isolation issues. To accomplish this goal, companies are
focusing more on EMC and ESD tests that will offer consumers
safer and more robust USB devices.
The Continua Health A lliance recently made its most recent
design guidelines available to anyone as a free download.
Figure 3: High-level view of a USB PHDC-based solution
EECatalog SPECIAL FEATURE
These design guidelines were previously available only
to Continua Alliance members during interoperability
testing. Why this is important? The guidelines can now
help all medical developers build end-to-end, plug-andplay
systems more efficiently, by facilitating seamless
connectivity between personal connected healthcare
devices and services, such as smart phones and remote
monitoring devices. It will also allow vendors to create
devices that make the collection and sharing of personal
www.eecatalog.com/usb 33

EECatalog SPECIAL FEATURE
health data convenient and secure for consumers and
healthcare providers, liberating system integrators to
develop innovative solutions.
To request a design guideline document from Continua,
please visit http://www.continuaalliance.org/products/
design-guidelines.html.
Conclusion
As home-based medical care becomes more pervasive, the
personal healthcare products market continues to grow. To
better enable this growing trend, companies are adopting
interoperability standards that allow consumers to use a
wider variety of devices and connect them together for
remote-monitoring purposes. The Continua Health Alliance
continues to work with the PHDC specification to
leverage seamless interoperability between devices. As a
result, USB is becoming the de-facto standard for wired
connectivity in healthcare devices.
Additional Resources
Microchip Technology offers a free PHDC stack that is
compatible with all of our 8-bit, 16-bit and 32-bit USB
USB Technologies ONLINE
PIC® microcontrollers. You can download the stack today,
as a part of the Microchip Libraries for Applications, at
www.microchip.com/mla. Inside the library, PHDC code
examples are labeled as USB\Device – PHDC, such as
Device – PHDC – Blood Pressure Monitor.
If you have any questions related to the subjects covered in
this article, please contact us at http://support.microchip.com.
Manasi Khare is senior corporate applications
engineer at Microchip Technology, focusing on
USB applications based upon Microchip’s analog
devices and PIC microcontrollers. She joined the
company in 2006. Before joining Microchip, she
received an MS degree in Electrical Engineering
from West Virginia University in 2005. As a part of her
Master’s thesis research, she worked on the statistical analysis
portion of an iris-recognition system. Her work was published
in the journal IEEE Transaction on Information Forensics
and Security, in 2006. After graduation, Manasi briefly
worked for the International Biometric Group in New York, NY
as a Research Associate Engineer.
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34 Engineers’ Guide to USB Technologies 2012

ICs
8-bit USB PIC Microcontrollers
from Microchip
As USB reaches ubiquity in the Personal Computing
nications
interface for embedded applications. With
the advent of inexpensive USB microcontrollers, the
availability of free software enabling fast development,
and the vast installed base of USB-connected
consumer devices, the interface has become the defacto
standard for off-board serial communication.
Microchip offers a wide variety of highly integrated
8-bit MCUs designed to add cost-effective USB device
capability to any application.
FEATURES & BENEFITS
◆ USB 2.0 Compliant Full/Low Speed Interface ensures
compatibility with all standard communication
classes
◆ Flexible Input Voltage Options allow many of our
USB MCUs to operate from battery power up to 5.5
Volts
◆
accuracy from the internal oscillator, thus eliminating
cost and board space
◆
features, such as charging and power supply control
circuitry.
◆ controllers
contain all hardware necessary to easily
proximity sensors into your embedded system
TECHNICAL SPECS
◆ Full Speed USB Device Mode
◆
performance
◆ ules
◆
Microchip Technology Inc.
AVAILABILITY
A comprehensive portfolio of 8-bit PIC MCUs with USB is
available now. The following is a list of featured devices.
PIC16F1459, PIC18F14K50, PIC18F26J50, PIC18F27J53
PIC18F46J50, PIC18F47J53, PIC18F67J50, PIC16F86J55,
PIC18F87J50, PIC18F97J94.
All devices in Microchip’s 8-bit USB portfolio are supported
by the Microchip Application Libraries (MLA),
MPLAB® X IDE, and the MPLAB XC8 compiler. For a
complete list of available products and tools, please visit
www.microchip.com/8bit.
APPLICATION AREAS
Portable handheld devices
ing,
Pedometers
CONTACT INFORMATION
Microchip Technology Inc.
2355 W. Chandler Blvd.
Chandler, AZ 85224
USA
888-MCU-MCHP Toll Free
480-792-7200 Telephone
480-792-7277 Fax
here2help@microchip.com
www.microchip.com
ICs

ICs
Microchip Technology Inc.
External USB Bridges from Microchip
Microchip’s USB bridges enable systems designers to
implement USB connectivity without having to have much
knowledge about the protocols themselves. For most applications,
connectivity to industry-standard protocols are
but are not necessarily the key value-add functionality. By
providing a simple way to add USB connectivity to their
systems, it enables them focus more on implementing their
value-added functionality in their systems.
FEATURES & BENEFITS
◆ Complete Plug and Play Solutions - Evaluation board and
supporting software provide an “out of the box” solu-
expertise.
◆
chip configurations. This can help to simplify
designs allowing for pin function flexibility.
◆ Small Form Factor Increasing Ease of Adding to Existing
Systems - Very small footprint packages including 20-pin
additional board space for adding USB connectivity to
existing systems.
TECHNICAL SPECS
◆ MCP2200 USB-to-UART Serial Converter
◆ MCP2210 USB-to-SPI Protocol Converter
AVAILABILITY
evaluation board for the MCP2200 USB-to-UART device.
The board allows for easy demonstration and evaluation
of the MCP2200. The accompanying software allows the
special device features to be configured and controlled. The
board is powered from USB and has a test point associ-
ated with each GPIO pin. In addition, two of these pins are
connected to LEDs which can be used to indicate USB-to-
UART traffic when the associated pins are configured as
TxLED and RxLED pins respectively. MCP2210 Evaluation
Kit (ADM00421) The MCP2210 Evaluation Kit is a development
and evaluation platform for the MCP2210 device. The
MCP2210 Motherboard is designed to work together with
the MCP2210 Breakout Board. The motherboard provides
the test points needed for measurements and it also contains
the following SPI slave chips:
are SPI slaves controlled by the MCP2210.
The MCP2210 Evaluation Board Demo software can be
used to demonstrate the MCP2210 as a USB-to-SPI (Master)
Utility software allows custom device configuration. A DLL
package is also available in order to allow development of
custom software using the MCP2210.
APPLICATION AREAS
storage or transfer
multi-meters, data loggers
CONTACT INFORMATION
Microchip Technology Inc.
2355 W. Chandler Blvd.
Chandler, AZ 85224
USA
888-MCU-MCHP Toll Free
480-792-7200 Telephone
480-792-7277 Fax
here2help@microchip.com
www.microchip.com
ICs

ICs
Featured 16-bit PIC® MCU
and dsPIC® DSC USB
devices from Microchip
FEATURES & BENEFITS
◆
◆
◆
◆
◆
Microchip Technology Inc.
TECHNICAL SPECS
◆ USB Device with eXtreme Low Power MCU
◆
AVAILABILITY
CONTACT INFORMATION
Microchip Technology Inc.
2355 W. Chandler Blvd.
Chandler, AZ 85224
USA
888-MCU-MCHP Toll Free
480-792-7200 Telephone
480-792-7277 Fax
here2help@microchip.com
www.microchip.com
ICs

Middleware
Micro Digital Inc
smxUSBH (Host Stack),
smxUSBD (Device Stack),
smxUSBO (OTG)
Compatible Operating Systems: SMX ® RTOS, Easily ported to
proprietary environments, stand alone, and other RTOS’s
USB Support: USB Host, Device, On-The-Go
smxUSBH (Host Stack), smxUSBD (Device Stack), and
smxUSBO (On The Go) are robust solutions for adding
USB connectivity to embedded devices. Written in
ANSI-C, their clean, modular design makes USB implementation
surprisingly easy. Developed explicitly for use
in embedded devices, smxUSB has small code and RAM
footprints. For smxUSBH (Host), with the mass storage
class driver, typical code and RAM sizes are 29KB and
6KB, respectively, including a typical driver for the
USB host controller. For smxUSBD (Device) with mass
storage emulation, typical code and RAM sizes are 15KB
and 6KB, respectively, including a typical driver for the
USB device controller. smxUSBO (OTG) adds 7KB code.
While optimally supported by SMX ® RTOS, smxUSB
is portable and can be easily ported to proprietary
environments, other RTOSs, and is often used standalone.
Read and write performance are excellent, and
are listed in the product data sheets.
Available with smxUSBH, or separately, are host class
drivers including audio, mass storage, HID, printer, hub,
serial, mouse, keyboard, CDC ACM (modem), RFID, Serial
USB to serial adapter, USB to Ethernet adapter, RFID, Sierra
wireless, video, and WiFi with WPA. With smxUSBD are
device class emulators for serial, multiport serial, mouse,
mass storage, audio with MIDI, video, MTP/PTP, Ethernet
over USB (RNDIS), Device Firmware Upgrade (DFU), and
composite. Device class emulators are Windows compatible
and do not require custom Windows drivers, except
multiport serial and DFU which are included.
Used with the smxFS, DOS/FAT-compatible file system,
smxUSBH (Host) supports mass storage devices such as
Thumb Drives and USB hard drives. smxUSBD (Device)
used with smxFS turns an embedded device into a Windows-compatible
USB Drive. Both solutions provide an
easy way of transferring files to and from an embedded
device.
FEATURES & BENEFITS
◆ Small code and RAM foot print.
◆ Easily adapted to proprietary environments, commercial
RTOSs, or standalone use. Pre-integrated
with SMX RTOS.
◆ Full support for many USB host and device controllers,
including those on popular processor chips.
◆ With smxFS (file system), smxUSBH enables easy
USB Thumb Drive support.
◆ smxUSBD enables easy connection to Windows PCs
without requiring custom Windows drivers
TECHNICAL SPECS
◆ Support for USB 1.1, USB 2.0 and OTG
◆ Full source code in ANSI-C with 90 days of support
and maintenance.
◆ Support for wide range of 16 and 32 bit processors:
ARM, Cortex, Blackfin, ColdFire, PowerPC, RX, SH,
x86 and others.
◆ Supplied with complete, easy-to-read manuals,
which include detailed sections on porting.
◆ Support for a wide range of processor on-chip USB
controllers, external USB controllers such as the
ST-Ericsson (NXP) ISP family, Maxim, Synopsys, and
OHCI, UHCI and EHCI compliant controllers.
AVAILABILITY
CONTACT INFORMATION
Micro Digital Inc
2900 Bristol Street
Suite G 204
Costa Mesa, CA 92626
USA
714.437.7333 Telephone
714.432.490 Fax
sales@smxrtos.com
www.smxrtos.com
Engineers’ Guide to USB Technologies 2012
Now
APPLICATION AREAS
Wide range of consumer and embedded devices that can
benefit from USB connectivity.
Middleware

Middleware
Embedded USB
Compatible Operating Systems: FreeRTOS, Keil RTX, MQX,
Nucleus, Quadros RTXC, ThreadX, u-velOSity, uC/OS-II, CMX
RTX, eCOS, emBOS, EUROS, ‘no-RTOS’, custom schedulers &
super loops.
USB Support: USB Host, Device & OTG
Embedded USB for Professionals
HCC Embedded has been supplying professional middleware
to the embedded industry for more than a decade.
Our software is ‘white labeled’ by many of the industry’s
leading RTOS companies and is deployed in thousands
of successful and innovative applications. HCC is a company
focused entirely on embedded communications
and storage. In order to effectively deploy our software,
we have created an advanced embedded framework that
enables our software to easily drop into any environment
– regardless of processor, tools or RTOS. This means that
our USB stacks not only give you access to excellent software
technology, but also enable you to create applications
that can use rich media and lightning fast data transfer.
FEATURES & BENEFITS
◆ USB Host: HCC’s USB Host stack is a scalable suite that
enables an embedded host to control a variety of USB
devices including pen-drives, printers, audio devices,
joysticks, virtual serial ports and network interfaces.
The embedded USB host stack supports EHCI, OHCI
and non-standard USB controllers.
◆ USB Device: HCC’s USB device stack allows developers
to integrate USB device functionality into their embedded
devices. It is available with a comprehensive suite
of class drivers that gives the device many functional
possibilities, including operating as a pen-drive, virtual
serial port, joystick, audio system or a network card.
◆ USB OTG: On-the go acts as a switch between the USB
host and device stacks, determined by the state of the ID
pin. In many cases, OTG software is not required. HCC
provides the hooks for this configuration as standard with
the EUSB host and device stacks. HCC also provides a
full software OTG stack that supports the SRP and HNP
protocols for negotiating between two connected devices
in order to decide which one shall operate as the host.
◆ AllSpeeds & Transfer Types: HCC USB comprehensively
supports all USB End-point/Transfer Types and Interface
Speeds including Low (1.5Mbs), Full (12Mbs) and High
Speed (480Mbps). Transfer types include Control, Interrupt,
Bulk, and Isochronous, providing the base for the
widest possible range of class drivers.
◆ Composite, Compound & Complex Devices: HCC
provides support for multiple USB functions to be used
on the same device.
TECHNICAL SPECS
CONTACT INFORMATION
HCC Embedded
◆ Extensive Class Driver Support - External Hub - Mass
Storage - Remote NDIS (RNDIS) - CDC Abstract Control
Model (CDC_ACM) - CDC Ethernet Control Model
(CDC- ECM) - CDC Ethernet Emulation Module (CDC-
EEM) - OBEX devices - FTDI USB serial devices - Audio
- Midi - Human Interface Device (HID) - Media Transfer
Protocol - Printers - PICTBRIDGE - Personal Healthcare
Device (PHCD)
◆ HCC’s unique position as a middleware developer
means that we can offer tight integration of file
systems, serial and Ethernet interfaces to support
communications between different protocols. Connecting
different devices to a PC used to involve many
hardware inter- faces and protocols – e.g. Ethernet
ports, serial ports, ATA/IDE interfaces, audio ports,
video adapters etc. HCC USB provides the capability
to share a single high- speed bus between many
peripheral types - connecting TCP/IP networks over
USB interfaces either as local or remote network
adapters.
AVAILABILITY
Immediately for Atmel AVR32, SAM3/7/9; ARM Cortex-
M0/M3/M4, ARM7/9/11; Freescale ColdFire, Kinetis,
PowerPC, i.MX; Infineon C164; Microchip PIC24, PIC32;
NXP LPC1000/2000/3000/4000; Renesas SH-2A, RX600;
STMicro STM32; Texas Instruments MSP430, Stellaris,
C2000, Hercules.
APPLICATION AREAS
Any embedded application requiring USB Connectivity.
HCC Embedded
444 East 82nd Street
New York, NY 10028
USA
+1 212 734 1345 Telephone
info@hcc-embedded.com
www.hcc-embedded.com
Middleware

VIEWPOINT
The Evolving Needs of the
Developer Community
Engineers working on their first USB device today could very well be working on a
high-performance USB 3.0 product in the space of a few years. This engineer doesn’t
have the time or the luxury of re-learning a new class of USB analyzer every year.
By Derek Fung, Total Phase
In the past, only hardware engineers had the budget to
purchase USB protocol analyzers. The introduction of new,
low-cost protocol analyzers helped place these devices in the
hands of software, driver and firmware engineers as well. As
the cost for these devices has come down, new features make
it even easier for new USB engineers to start using these tools.
Intuitive real-time class decoding and instantaneous view/
filter of trace captures are just two of the features which save
time for engineers.
Across our many thousands of USB customers, several consistent
trends have emerged. These trends may have their roots
in USB 2.0, but they are becoming more important in the
expanding market of USB 3.0 and beyond.
Engineers Want Tools to Make Them More
Efficient
Engineers demand USB tools that will help them see multiple
issues in a simple, yet highly configurable interface that fits
their individual needs. With the increasing complexity of USB
devices, these tools must support engineers as they iteratively
test and debug their systems. Real-time feedback is crucial. As
tweaks are made in firmware, Verilog, etc., embedded engineers
do not want to be adversely impacted by slow tools. Protocol
analyzers need to move with the same speed as the engineer
so that they can quickly highlight trouble points through
iterative changes. Otherwise, engineers are left wasting time
waiting for the tool to catch up and time is money.
Engineers Want Tools that Fit the Way they
Work
Engineers don’t want to change the way they work to fit the
tool. Much like integrated development environments provide
real-time visibility into software, developers need the same
real-time data interactivity with their protocol analyzer. No
more waiting for downloads to complete before analysis and
debugging begins. Developers want tools that arrive at their
labs and simply work right out of the box when they plug them
in–no special configurations, no long learning curve to become
productive; just plug and debug.
Engineers Want Tools Optimized for Their
Specific Job
With the near ubiquitous availability of USB in microcontrollers
of all shapes and sizes, we have seen an explosion in
USB development as engineers are leaving older and slower
protocols behind and adopting USB. Engineers that are new to
USB appreciate solutions such as protocol analyzers that help
them more easily adapt to the additional complexities of USB
versus the older, slower protocols. Additionally, as the market
has exploded, more engineers are demanding highly specialized
tools that are truly optimized for their job. For example,
field engineers need lightweight tools that can be powered
from the host without sacrificing power or features of realtime
interactivity.
Many experienced engineers need to leverage advanced features
such as advanced state machine-based triggers to detect
complex or especially hard-to-find problems. These advanced
features enable them to get the most out of their experience.
Other very experienced engineers don’t want to be constrained
by manufacturer GUIs; they want the option of seeing raw data
efficiently so that they can do specialized custom analysis.
These three trends point to a maturing and broadening USB
market. While developers may range from inexperienced to
expert, they all point to the same fundamental needs: efficient
tools that work the way they want them to, with advanced
features they can grow into. Engineers working on their
first USB device today could very well be working on a highperformance
USB 3.0 product in the space of a few years. This
engineer doesn’t have the time or the luxury of re-learning a
new class of USB analyzer every year. Engineers want a tool
suite that will grow with their need.
Derek Fung is the VP of business at Total Phase.
He has over 10 years’ experience managing the
sales, marketing and operations of all Total Phase
products, including the line of Beagle USB protocol
analyzers.
40 Engineers’ Guide to USB Technologies 2012

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Adding Connectivity to Your Design
Microchip off ers support for a variety of wired and wireless communication protocols,
including peripheral devices and solutions that are integrated with a PIC® Microcontroller
(MCU) or dsPIC® Digital Signal Controller (DSC).
Microchip’s Solutions include:
USB
8-, 16- and 32-bit USB MCUs for basic, low-cost
applications to complex and highly integrated systems
along with free license software libraries including
support for USB device, host, and On-The-Go.
Ethernet
PIC MCUs with integrated 10/100 Ethernet MAC,
standalone Ethernet controllers and EUI-48/EUI-
64 enabled MAC address chips.
CAN
8-, 16- and 32-bit MCUs and 16-bit DSCs with
integrated CAN, stand-alone CAN controllers, CAN
I/O expanders and CAN transceivers.
LIN
LIN Bus Master Nodes as well as LIN Bus Slave Nodes for
8-bit PIC MCUs and 16-bit dsPIC DSCs. The physical layer
connection is supported by CAN and LIN transceivers.
Wi-Fi®
Innovative wireless chips and modules allowing a
wide range of devices to connect to the Internet.
Embedded IEEE Std 802.11 Wi-Fi transceiver modules
and free TCP/IP stacks.
ZigBee®
Certifi ed ZigBee Compliant Platform (ZCP) for the
ZigBee PRO, ZigBee RF4CE and ZigBee 2006 protocol
stacks. Microchip’s solutions consist of transceiver
products, PIC18, PIC24 and PIC32 MCU and dsPIC DSC
families, and certifi ed fi rmware protocol stacks.
MiWi TM
MiWi and MiWi P2P are free proprietary protocol
stacks developed by Microchip for short-range
wireless networking applications based on the IEEE
802.15.4 WPAN specifi cation.
BEFORE YOUR NEXT WIRED
OR WIRELESS DESIGN:
1. Download free software libraries
2. Find a low-cost development tool
3. Order samples
www.microchip.com/usb
www.microchip.com/ethernet
www.microchip.com/can
www.microchip.com/lin
www.microchip.com/wireless
Wi-Fi Comm Demo Board
(DV102411)
The Microchip name and logo, the Microchip logo, dsPIC, MPLAB and PIC are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks are the property of their registered owners.
©2012 Microchip Technology Inc. All rights reserved. 03/12