Challenges of SSD Forensic Analysis - Digital Assembly

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Reading Each read operation introduces a potential error After several reads to the same location, there is some chance <strong>of</strong> error for consecutive reads from that location. Writing Two types <strong>of</strong> operation to facilitate Writing ▪ Set all bits to 1 (Erase) ▪ Set bits from 1 to 0. (Program) ▪ Cannot set bits from 0 to 1, must reset all bits to one (Erase) To write a block, must erase (set all bits to 1), then program (set appropriate bits to 0). To rewrite, must always use the erase program cycle.
Basic Algorithms Source: Micron TN-‐29-‐42: Wear-‐Leveling Techniques in NAND Flash Devices
Page 1 and 2: Nasir Memon - Polytechnic Institute
Page 3 and 4: Overview SSD’s are fairly new to
Page 5 and 6: 2.5” SATA 3.8Gbps SSD 2.5” SATA
Page 7 and 8: Flash Memory NOR Flash vs. NAND Fl
Page 9 and 10: SLC NAND Flash (x8) MLC NAND FLASH
Page 11 and 12: Implementation Overview
Page 13 and 14: Manufacturers can use any kind of i
Page 15 and 16: Pages are basic programmable units
Page 17: Block: 64 Pages … … 512 Bytes 1
Page 21 and 22: Spread the drive wear across the en
Page 23 and 24: Dynamic When allocating blocks, ch
Page 26 and 27: http://www.insidehw.com/Reviews/Sto
Page 28 and 29: IO Microcontroller Intel PC29AS21AA
Page 31 and 32: IDE interface allows logical data r
Page 33 and 34: As soon as you do a write, a block
Page 35 and 36: Hard to read data off chips directl

Challenges of SSD Forensic Analysis - Digital Assembly

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