Challenges of SSD Forensic Analysis - Digital Assembly

Recommendations

Info

http://www.insidehw.com/Reviews/Storage/ Intel-‐X25-‐M-‐<strong>SSD</strong>.html Certified for 25 MB/s read speed and 70 MB/s write speed. MLS <strong>SSD</strong> standard. 10-‐channel memory controller. Each channel is “responsible” for two memory chips. This controller works like a RAID 0 system but with flash memory.
Solid State Drive SATA Data Interface SATA Power Interface Internal Architecture SPI Flash Cache Microcontroller NVRAM Permanent Storage Flash Chip Flash Chip Flash Chip Flash Chip Flash Chip Flash Chip Flash Chip Flash Chip Flash Chip Flash Chip
Page 1 and 2: Nasir Memon - Polytechnic Institute
Page 3 and 4: Overview SSD’s are fairly new to
Page 5 and 6: 2.5” SATA 3.8Gbps SSD 2.5” SATA
Page 7 and 8: Flash Memory NOR Flash vs. NAND Fl
Page 9 and 10: SLC NAND Flash (x8) MLC NAND FLASH
Page 11 and 12: Implementation Overview
Page 13 and 14: Manufacturers can use any kind of i
Page 15 and 16: Pages are basic programmable units
Page 17 and 18: Block: 64 Pages … … 512 Bytes 1
Page 19 and 20: Basic Algorithms Source: Micron TN-
Page 21 and 22: Spread the drive wear across the en
Page 23 and 24: Dynamic When allocating blocks, ch
Page 28 and 29: IO Microcontroller Intel PC29AS21AA
Page 31 and 32: IDE interface allows logical data r
Page 33 and 34: As soon as you do a write, a block
Page 35 and 36: Hard to read data off chips directl

Challenges of SSD Forensic Analysis - Digital Assembly

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?