Combining High-Resolution Pulsed TIVA and ... - ASM International

This is evident when comparing Fig. 5(b), a digitally zoomed
overlay image obtained using a 0.85-NA 100x NIR lens, to
Fig. 5(a), the overlay image obtained by using a SIL in superhemispherical
mode and a 20x NIR backing lens.
Circuit Analysis
The CAD navigation tool showed that the site highlighted
by pulsed TIVA with SIL pointed to a particular transistor. On
circuit analysis and layout tracing, it is unambiguous that the
TIVA signal came from an input to a level restorer circuit that
fed to the failing signal (Fig. 6).
Fig. 6: Block diagram of circuitry of interest. Circled transistor
T1 is highlighted by high-resolution pulsed TIVA.
Transistor T1, a PMOSFET, is the input of a level restorer
circuitry made up of two inverters: the larger D1, which feeds
forward, and the smaller D2, which helps to hold the state. A
wrong input from either a leaky or a slow PMOS T1 could
change the state of the restorer, causing the signal to flip and
the reported failure. The level restorer is powered by the
voltage supplies VDD1 and VDD2, which also supported the
observed failure.
III. Physical Failure Analysis
PFI and PFA approach
As mentioned earlier, with technology scaling of ICs, nonvisible
defects have become common phenomena in FA. On
top of this challenge, the electrical failure signature for many
of the failures is soft, as presented in this study. Therefore, the
utilization of non-destructive PFI is essential to indicate the
exact failing location before attempting PFA. This section
demonstrates the successful use of nanoprobing to reveal faults
in the level restorer. The theory of nanoprobing [4] has been
adequately described in the literature.
This study used a scanning electron microscope (SEM)based
nanoprobing system. This system provides the capability
of maneuvering the probe tips by nanometer range to land
exactly on top of the individual source, drain, and gate
tungsten contact (Fig. 7). The SEM provides a high-resolution
real-time image that facilitates locating the device and placing
3
the probe tips. The SEM is operated at 1 keV to ensure there is
no transistor degradation [5].
Based on the level restorer layout and information from
electrical fault isolation described in Section II, our first
approach was to perform layer-by-layer inspection using SEM.
This traditional PFA technique failed to reveal any obvious
anomalies from metal 4 down to contact level. This is not
surprising, since this is a temperature-sensitive failure (soft
failure).
Fig. 7: SEM image (right) showing three tungsten probes (black
arrows) landing on tungsten contacts of the NMOS transistor in the
inverter image on the left.
With the individual transistor isolated at contact level,
nanoprobing is the one of the best way to obtain full-transistor
electrical characterization. Families of current versus voltage
(I/V) curves are collected on multiple transistors on the good
and failing level restorer. Basic transistor parameters such as
threshold voltage (Vt), saturation drive current (Isat), and N/P
ratio can be extracted with ease. N/P ratio is the value of Nchannel
Isat divided by P-channel Isat. A higher N/P ratio means
the NMOS drive strength is higher than the PMOS drive
strength. Mixed-signal circuits need tight control of this ratio
since they operate in the analog domain of the IV curve.
Data analysis
There are five PMOS and five NMOS transistors in each
level restorer identified as the failing circuit during fault
isolation, four of those inverters in parallel and grouped into
D1 in Fig. 6 while the last one, D2, is used to hold the state of
the restorer like a latch.
Fig. 8(a) shows the one of the five PMOS IDSAT curves
obtained from the failing and good level restorer with the gate
voltage set at -1V. Almost 20% deviation is observed in the
drive current of the good and bad PMOS transistor, with the
bad circuitry showing lower drive strength. Fig. 8(b) shows the
NMOS IDSAT curve with the gate voltage at 1V. The NMOS
transistor does not show a significant deviation between the
good and bad curves.