Combining High-Resolution Pulsed TIVA and ... - ASM International

Fig. 8(a): PMOS transistor in the failing site exhibits 20-30%
lower drive current (see comparison red line) compared to the good
level restorer.
Fig. 8(b): NMOS transistor in the failing site shows comparable
drive current compared to the good level restorer.
This measurement is repeated in the other four PMOS and
NMOS transistors, which showed a similar response of lower
PMOS drive strength. It is therefore obvious that the failing
area exhibited weak PMOS I/V characteristics with acceptable
NMOS characteristics. This, in turn, drove the N/P ratio of the
bad transistors significantly higher than the good transistors.
To validate this result, a similar experiment is conducted on a
second bad DUT (not shown here), and the results are found to
be repeatable.
Defect Identification
After the exact failing transistor is successfully identified
using nanoprobing, defect identification techniques like
focused ion beam (FIB) and scanning tunneling electron
microscopy (STEM) are used, but revealed no physical
defects. A transmission electron microscopy (TEM) sample is
then prepared to understand the low drive current behavior.
The result of TEM, however, revealed no defects, and
construction analysis did not show any difference between
good and bad transistors. While TEM is a proven powerful
tool in FA [6], it has some shortcomings, like the difficulty of
quantifying the extent of implantation.
4
With the feedback of drive strength non-conformance and
the lack of physical defects, the fabrication facility had
increased confidence in its identification of the failure
mechanism, and it corrected the process to increase the drive
strength of the PMOS transistor, resulting in a 100% fix.
IV. Conclusion
This paper discussed the creative use of pulsed TIVA with
SIL to obtain increased sensitivity and resolution during static
fault isolation. This is the first report of this technique being
applied to mixed-signal circuitry to detect drive strength- and
N-P ratio-related failure mechanisms. Fig. 5 clearly highlight
of the capabilities of this technique.
A fault isolation image that resulted from the combination
of pulsed TIVA with SIL resulted in faster identification of the
root cause and, therefore, its fix. The paper also highlights the
importance of nanoprobing to identify non-visual defects and
characterize the electrical performance of circuits.
V. References
[1] Phang, JCH et al., “A Review of Laser Induced
Techniques for Microelectronic Failure Analysis,” Proc
Int Symp Physical & Failure Analysis of Integrated
Circuits (IPFA 2004), 5-8 Jul 04, pp. 255-261, 2004.
[2] Phang, JCH et al., "Resolution and Sensitivity
Enhancements of Scanning Optical Microscopy
Techniques for Integrated Circuit Failure Analysis,” Int
Symp Physical and Failure Analysis of Integrated Circuits
(IPFA 2009), 6-10 Jul 09, pp. 11-18, 2009.
[3] Quah, ACT et al., “Combining Refractive Solid
Immersion Lens and Pulsed Laser Induced Techniques for
Effective Defect Localization on Microprocessors,” Proc
International Symposium for Testing & Failure Analysis
2008, pp. 402-406.
[4] Faure, D and Waggoner, CA, “A New Sub-micron
Probing Technique for Failure Analysis in Integrated
Circuits,” ESREF 2002.
[5] Mizuno, T et al., “Maximum Permissible EB Acceleration
Voltage for SEM-Based Inspection before Electrical
Characterization of Advanced MOS,” IEEE 45th Annual
International Reliability 2007.
[6] Williams, DB and Carter, CB, Transmission Electron
Microscopy: A Textbook for Materials Science, Vols. 1-4
(Plenum Press, New York, 1996).