Systems Reference Library IBM System/360 Principles of Operation

NAME MNEMONIC TYPE EXCEPTIONS CODE NOTE
Multiply
Decimal MP SS T P,A,S,D FC 5
Multiply
Halfword MH RX A,S 4C 2
Multiply (Long) N MDR RRF S,U,E 2C 3
Multiply (Long) N MD RXF A,S,U,E 6C 3,8
Multiply (Short) N MER RRF S,U,E 3C 3
Multiply (Short) N ME RXF A,S,U,E 7C 3,4
OR 0 RX C A,S 56 4
Set Storage
Key
Shift Left
SSK RRZ M, A,S 08 7
Double
Shift Left
Double
SLDA RS C S, IF 8F 1
Logical
Shift Right
SLDL RS S 8D 1
Double
Shift Right
Double
SRDA RS C S 8E 1
Logical
Store
Store IIalfword
Store (Long)
Store Multiple
Store (Short)
Subtract
Subtract
SRDL
ST
STH
STD
STM
STE
S
RS
RX
RX
RXF
RS
RXF
RX C
S
P,A,S
P,A,S
P,A,S
P,A,S
P,A,S
A,S,
8C 1
50 4
40 2
60 3,8
90 4
70 3,4
IF 5B 4
Halfword
Subtract
SH RX C A,S, IF 4B 2
Logical
Subtract Norm-
SL RX C A,S 5F 4
alized (Long) NSDR
Subtract Norm-
RRF,C S,U,E,LS 2B 3
alized (Long) NSD
Subtract Norm-
RXF,C A,S,U,E,LS 6B 3,8
alized (Short) NSER
Subtract Norm-
RRF,C S,U,E,LS 3B 3
alized (Short) NSE
Subtract Unnormalized
RXF,C A,S,U,E,LS 7B 3,4
(Long) SWR RRF,C S, E,LS 2F 3
Subtract Un-
normalized
(Long) SW RXF,C A,S, E,LS 6F 3,8
Subtract Unnormalized
( Short) SUR RRF,C S, E,LS 3F 3
Subtract Unnormalized
( Short) SU RXF,C A,S, E,LS 7F 3,4
The spccification interruption can occur in normal sequential
operation following branching, LOAD psw, intcrruption, or manual
operation (Note 1).
The spccification interruption can occur during an interruption
(Note 6).
SPECIFICATION INTEnnUPTION NOTES
1 Even register spccification
2 Two-byte unit of information specification
3 Floating-point register specification
4 Four-bytc unit of information specification
5 Decimal multiplier or divisor size specification
6 Zero protection key specification
7 Block address specification
8 Eight-byte unit of information specification
Data (D)
1. The sign or digit codes of operands in decimal
arithmetic, or editing operations, or CONVERT TO
BINARY, are incorrect.
2. Fields in decimal arithmetic overlap incorrectly.
3. The decimal multiplicand has too many highorder
significant digits.
The operation is terminated in all three cases.
The instruction-length code is 2 or 3.
NAME MNEMONIC TYPE EXCEPTIONS CODE NOTE
Add Decimal AP SST,C P,A, D, DF FA 1
Compare
Decimal CP SS T,C A, D F9 1
Convert to
Binary CVB RX A,S,D IK 4F
Divide Decimal DP SS T P,A,S,D, DK FD 1
Edit ED SS T,C P,A, D DE
Edit and Mark EDMK SS T,C P,A, D DF
Multiply
Decimal MP SS T P,A,S,D FC 1,2
Subtract
Decimal SP SS T,C P,A, D, DF FB 1
Zero and Add ZAP SS T,C P,A, D, DF F8 1
All instructions listed may have incorrect codes.
DATA INTEHRUPTION NOTES
1 Overlapping fields
2 Multiplicand length
Fixed-Point Overflow (IF)
A high-order carry occurs or high-order significant bits
are lost in fixed-point addition, subtraction, shifting,
or sign-control operations.
The operation is completed by ignoring the information
placed outside the register. The interruption
may be masked by psw bit 36.
The instruction-length code is 1 or 2.
NAME MNEMONIC TYPE EXCEPTIONS CODE
Add AR RR C IF 1A
Add A RX C A,S, IF 5A
Add Halfword AH RX C A,S, IF 4A
Load Complement LCR RR C IF 13
Load Positive LPH RR C IF 10
Shift Left Double SLDA RS C S, IF 8F
Shift Left Single SLA RS C IF 8B
Subtract SR RR C IF IB
Subtract S RX C A,S, IF 5B
Subtract Halfword SH RX C A,S, IF 4B
Fixed-Point Divide (IK)
1. The quotient exceeds the register size in fixedpoint
division, including division by zero.
2. The result of CONVERT TO BINARY exceeds 31 bits.
Division is suppressed. Conversion is completed by
ignoring the information placed outside the register.
The instruction -length code is 1 or 2.
NAME MNEMONIC TYPE EXCEPTIONS CODE
Convert to Binary CVB RX A,S,D, IK 4F
Divide DR RR S, IK ID
Dividc D RX A,S, IK 5D
Appendix G 151