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Brett Fox - EEWeb

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Brett Fox

Touchstone

Semiconductor, Inc.

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Issue 24

December 6, 2011

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TABLE OF CONTENTS

Brett Fox 4

Touchstone Semiconductor, Inc.

Interview with Brett Fox - President and CEO

Featured Products

Software and Hardware Platform Enable 10

Over One TeraFlop Processing Rates

BY MICHAEL PARKER WITH ALTERA

An introduction to a processing platform that provides the advantages of both floating point and

fixed point processing.

System Perspective on Specifying 14

Electronic Power Supplies:Load

Characterization

BY BOB STOWE WITH TRUE POWER RESEARCH

Learn about the effect of the load when specifying a power supply.

RTZ - Return to Zero Comic 17

EEWeb | Electrical Engineering Community Visit www.eeweb.com 3

8

TABLE OF CONTENTS


INTERVIEW

Brett Fox

Touchstone Semiconductor, Inc.

How did Touchstone come

about?

The idea for this company has been

floating around with me for many

years, actually since I left Maxim in

early 2000. Back then was not the

right time to start a company like

Touchstone. At the time, the funding

was going toward businesses that

were one-product, one-customer

type models. VCs could make an

investment and it could quickly turn

into money. We were trying to build

a real company. When I left Micrel

in 2005 I started to think about what

I wanted to do. I was fortunate

enough to know some people in

venture capital. Crosslink Capital, a

VC firm in San Francisco, asked me

to be an Entrepreneur in Residence

(EIR), which is a pretty cool job.

You essentially are given a salary,

an office, and a business card. You

get to sit in on their meetings and

see the inner workings of how a

venture capital firm works. They

will help you look at companies in

your space, and if you want to start

Brett Fox - President and CEO at Touchstone Semiconductor, Inc.

a company, they will help you do

that. The real genesis of Touchstone

started there. I started to work on

finding a team of people, flushing

out the business plan more, making

contacts and all those types of

things. When I left Crosslink in early

2008, Touchstone was formed, and

I started raising money in earnest.

What was the most

challenging aspect of starting

Touchstone?

The most challenging thing was

raising the money. It took us two

years to raise our funding. We

started in early 2008 and found the

first investor, Opus Capital, within

a month. Most people say if you

can find one investor, you will find

another one easily. In our particular

case, because of the economic

environment of 2008 combined with

the environment of semiconductor

investments (which continued to

worsen throughout the year), we

saw that it was unlikely we would

close our funding in 2008. After

2008, we really had to regroup.

Opus stood with us. In the summer

of 2009, the economic environment

was getting better; VCs were

starting to put money to work. We

EEWeb | Electrical Engineering Community Visit www.eeweb.com 4

FEATURED INTERVIEW


INTERVIEW

started to raise money in earnest

again. In early fall, we found Khosla

Ventures as our second investor. I

am thrilled at how it worked out; we

found two really good investors who

know our space. Opus’ Managing

Partner, Gill Cogan, was actually

an original investor in Maxim, and

when you look at our business

model, we knew he would be a

fantastic resource. Pierre Lamond

led the deal for Khosla Ventures.

Pierre is a co-founder of National

Semiconductor and was involved

with Linear Technology and many

other successful semiconductor

companies. He was very familiar

with what we were doing, and was

looking for a company like ours to

invest in. Our funding (money in

the bank) came on March 8, 2010,

and since that time it has been a

relatively straightforward ride for

the company. I am not saying there

have not been bumps along the way,

because indeed there are always

unforeseen things.

Can you tell us about the

Founders of Touchstone

Semiconductor, Inc.?

All of us either come from Maxim,

Linear, or Analog Devices. Most of

the team has worked together in

one way, shape, or form.

I have my BSEE from the University

of California, San Diego, and

my MBA from the University of

Southern California. In 1989 I joined

Maxim, and before that I was a

designer for about five years. When

I joined Maxim, it was a roughly

$40 million company, and when I

left in 2000, they were making over

a billion dollars in revenue. I was

very fortunate—right place, right

time, and right set of skills. I ended

up setting the strategic direction

for most areas of the company.

After Maxim I worked at a start-up

for about nine months. Then I went

to Micrel for about four years and

ran the high bandwidth division. I

ended up turning that around from

being the least profitable division of

the company to the most profitable

when I left. From there I went to

Crosslink Capital for about a year,

and then started working full time

on Touchstone.

The thing that we really

want customers to think

about Touchstone is that

the company is doing

cool and unique things.

Hopefully, as time goes

on, we will achieve

that reputation, and

customers will look to

us for those types of cool

and unique products.

Jeroen Fonderie, the Vice President

of Engineering, has a PhD from Delft

University in the Netherlands. That is

one of the best engineering schools

for analog designers in Europe.

When he was there he wrote a book

on op amp design. He has written

over 20 scientific publications, and

he holds seven patents. Beyond

that, he is a fantastic manager, and

a very good business man. In the

Analog world, that is a very rare

combination. When you put all three

of those factors together, you have

a great VP of Engineering for a

company like Touchstone.

Adolfo Garcia, our VP of Marketing

and Applications, started out also as

a designer. He went from being in

the design world to joining Analog

Devices, and worked there for

several years before moving on to

Linear Technology and continuing in

applications for several more years.

He then worked at Micrel, which is

where we crossed paths. He was

running part of that business on the

analog side. He then worked at a

couple of other analog companies,

and when I was looking to start

Touchstone, he was the ideal guy to

run marketing and applications. You

want someone who is technically

very strong and who can cover a lot

of different products.

The design team is mostly from

Maxim, Linear, Analog Devices,

National, or MPS. All of the designers

in the company have also worked

together in some way, shape, or

form. Some of the designers and I

go back 20 years; they all average

about 20 years of experience and

about 10 patents per designer. So

this is a group that can hit the ground

running, can work independently,

and will be able to get things done

in a reasonable time period. We

also wanted people that fit in our

company culture, you want people

that work well together. It does not

mean that everyone has to be best

friends or see eye to eye on every

issue, but they have to be able to

work well together and understand

EEWeb | Electrical Engineering Community Visit www.eeweb.com 5

FEATURED INTERVIEW


INTERVIEW

the focus of the company. Everyone

here believes in our model and is

moving forward to implement our

strategy.

How do you choose the

products to manufacture?

We have two strategies we are

working in parallel. The primary

focus at the beginning was

alternative source products. We

did this because it solves a big

problem that our customers face

today. Most of the parts in the High

Performance Analog segment are

sole-sourced. That means that there

is one source, and if customers have

a problem obtaining a product from

the primary source, they are out

of luck. We provide an alternative

source, and an assurance of supply

they cannot have using only Maxim.

In parallel with that, we are working

on proprietary parts, which is the

long-term future of the company.

We want customers to think of us as

a very different company. We want

to develop things that are really

different, unique, and cool to solve

problems that are not being solved

today. That is our basic product

choosing methodology.

Our philosophy follows the words

of Hall of Fame baseball player

Willie Keeler: “Hit ‘em where they

ain’t.” To us, this means don’t create

the obvious products because

customers will naturally gravitate

toward the big companies. We are

pursuing a niche strategy where

we focus on markets that are big

enough for us to make money but

not so big that the larger companies

would be interested in pursuing

them.

What industry sectors are you

looking at?

We are pretty flexible in terms of

what we do. The initial focus of the

company is toward industrial types

of companies. We have naturally

evolved to low power applications.

We are combining those two things

together and it seems to be working.

As you target single-source

applications components, is

there any concern with IP as

you design this part?

We are designing in a different

technology from the primary source,

so almost by definition we have to

use different architectures. We look

at patents before we start. We do not

want to infringe on someone else’s

patents. We do not want to cause

any unneeded issues.

We want to fill niches

in the marketplace,

build our business up,

and show engineers

that we can solve

problems that have not

been solved before.

Can you tell us more about

the manufacturing and

testing?

We are using TSMC as our primary

foundry. They are a great partner

and have been very supportive

along the way. We do most of

our development in their 0.18µ

technology but we are not limited to

just that. We can use any technology

that they have. That is the nice thing

about our business model; we are

flexible. We are able to pick the

right technology for the product.

We are old school with regard to

testing. We test everything that we

develop. If we are guaranteeing our

specifications over temperature,

we test and make sure that it will

perform exactly what we say it will.

How do you keep up with

inventory?

That is one of the big advantages

for us. Because everything we are

developing is on 8-inch wafers and

we hold a lot of stuff in die banks, it

does not cost us a huge amount of

money to manufacture. If someone

comes in with a huge order, we are

able to manufacture, test, and ship

it pretty fast.

Can you tell us about your low

power op amp?

Customers seem to love the

TS1001 600nA, 0.8V Op Amp. Even

customers who cannot use it seem

to love it, which is really nice for us.

It has been a great door opener for

the company. Where we are seeing

a lot of use for this part is in lowpower

applications. If someone

needs bandwidth less than a

kilohertz, and you want to reduce

power consumption, it is perfect.

Customers are getting really excited

about it in those specific types of

applications.

What can we expect to see

from Touchstone in the future?

We have a couple of different

EEWeb | Electrical Engineering Community Visit www.eeweb.com 6

FEATURED INTERVIEW


INTERVIEW

product families coming out at the

end of September and October

2011. I am a little bit hesitant to

say anything until they come out

because the scary thing in our

business is until you see it and know

it works, it’s not a sure thing.

The thing that we really want

customers to think about Touchstone

is that the company is doing cool

and unique things. Hopefully, as

time goes on we will achieve that

reputation, and customers will look

to us for those types of cool and

unique products. We want to fill

niches in the marketplace, build our

business up, and show engineers

that we can solve problems that

have not been solved before.

How many products would

you like to see Touchstone

having in five years?

Our minimum goal is 200, and it

looks like we will easily be able

to achieve that. We will continue

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expanding our support staff around

those products. Right now we have

25 people in the company, and

we are always looking for good

designers. We have a very high bar

regarding who we hire. We have an

extremely talented and cohesive

team, so it is an elite group that

people will be joining. ■

EEWeb | Electrical Engineering Community Visit www.eeweb.com 7

FEATURED INTERVIEW


FEATURED PRODUCTS

Fastest 14-bit Sample-and-Hold Amplifier

Datel, a business unit of Murata Power Solutions has announced what it

claims is the world’s fastest stand alone 14bit sample and hold amplifier.

According to the company, the SHM-14 amplifier has a 70MHz full power

bandwidth and 250MHz small signal bandwidth that achieves 12 and

14bit acquisitions within 25ns (/-0.012%) and 35ns (/-0.003%) respectively.

Datel adds that the low power device has an aperture jitter within 1ps

and a low output noise of 65uV rms. Output linearity is within +/-0.0023%,

while digital sample/hold inputs are differential and compatible with all

logic families including TTL, CMOS and ECL. For more information,

please click here.

3-GHz, 10-Output Level Translator

The LMK00301 is a 3-GHz, 10-output differential fanout buffer intended

for high-frequency, low-jitter clock/data distribution and level translation.

The input clock can be selected from two differential inputs or one

crystal input. The selected input clock is distributed to two banks of 5

differential outputs and one LVCMOS output. Each output bank can be

configured as LVPECL, LVDS, or HCSL drivers, or disabled to reduce

power. The LVCMOS output has a synchronous enable input for runtpulse-free

operation when enabled or disabled. The LMK00301 can

be powered from a single 3.3 V supply, or dual 3.3 V/2.5 V supplies for

lower power operation. The LMK00301 provides high performance,

versatility, and power efficiency, making it ideal for replacing fixedoutput

buffer devices while increasing timing margin in the system. For

more information, please click here.

Tightest Offset Current-Sense Amplifiers

Touchstone Semiconductor, a developer of high-performance analog

integrated circuit solutions, announced the TS1100 family of 1µA currentsense

amplifiers that cut offset to 30µV, over 3X tighter than the closest

competitor. The tight offset allows users to not have to increase power

consumption in order to achieve improved accuracy. This is something

that cannot be done with any other low power current sense amplifier.

The TS1100 is available in four gain options from 25V/V to 200V/V, so

customers can choose the ideal gain option for their unique application.

For more information, please click here.

EEWeb | Electrical Engineering Community Visit www.eeweb.com 8

FEATURED PRODUCTS


Avago Technologies Motion Control Solutions

World’s Smallest Miniature

Reflective 3-channel Encoder

Features Advantages Benefits

3-channel encoding

(AB and I)

Index Signal “I” No need for separate

components to generate

the index signal

Miniature size Surface mount leadless

package: 3.95 mm (L) x

3.4mm (W) x 0.95mm H)

Ability to fit into

miniature motor designs

304 LPI High encoding resolution Various CPR capable

by adjusting to the

matching ROP of the

codewheel

Built in Interpolator of

1x, 2x, and 4x

High operating

frequencies: 55 kHz

at 1x interpolation

1x, 2x and 4x via external

pinouts

Operating frequencies can

be increased by external

interpolator pinouts by

maximum of 4x

Index gating Options available for both

gated and ungated versions

-20°C to 85°C Industrial application

capable

Base CPR resolution can

be interpolated by end

user

Corresponding high

RPM performance with

increased frequencies

Catering for various user

gating requirements

Covering consumer,

commercial and

industrial applications

Avago Technologies AEDR-850x three

channel reflective encoders integrate

an LED light source, photo detector

and interpolator circuitry.

It is best suited to applications where

small size and space matters!

Applications include medical hand

held devices, camera phones, wheel

chairs, actuator, vending machine

applications, just to name a few.

To request a free sample go to:

www.avagotech.com/motioncontrol


1Processing Rates

Software and Hardware

Platforms Enable Over

TERAFLOP

Computing applications have long used floating

point numerical processing, including many in CPU

architectures, which are mathematically superior

and support wide dynamic ranges. However, most

embedded applications have traditionally used fixed

point processing. Despite significantly increasing

development complexity (often three times the time of

floating point development), fixed point microprocessors,

DSPs, and FPGAs can generally provide lower power

consumption, lower costs, and in the case of FPGAs,

much higher processing rates.

A new FPGA-based floating point flow is available that

allows for the same high processing rate as enjoyed

by fixed point applications to be achieved in floating

point applications. A floating point co-processor which

can be tightly coupled to FPGA hardware is also newly

available, allowing both hardware and software floating

point data processing to be leveraged. In addition, both

of these new capabilities still support high throughput,

fixed point processing for the parts of the DSP datapath

that do not need the dynamic range of floating point

processing. The result is a processing platform that

Michael Parker

Sr Technical Manager

provides the advantages of both floating point and

fixed point processing, while providing the flexibility to

seamlessly partition and optimize the implementation

between hardware and software.

Parallelism is a key advantage of a hardware solution

like FPGAs, but it is often not applied to floating point

signal processing because long latencies make the

data dependencies in algorithms, such as matrix

decomposition, difficult to manage. Therefore, the

resultant systems offered poor performance levels and

were uncompetitive with other platforms such as GPU or

multi-core CPU architectures.

Altera has developed a floating point design flow

that overcomes these issues. Rather than building a

datapath from individual operators, the entire datapath

is considered as a single function, with inter-operator

redundancy factored out. Mantissa representation can

be converted to hardware-friendly twos complement,

and mantissa widths extended to reduce the frequency

of normalizations. Elementary functions can be

implemented as much as possible using hard multipliers,

EEWeb | Electrical Engineering Community Visit www.eeweb.com 10


TECHNICAL ARTICLE

which offer guaranteed internal routing and timing, as

well as low power and latency. New techniques can be

applied for matrix decompositions, with the algorithms

restructured to remove most of the data dependencies,

so that parallel—and therefore high latency—datapaths

can be used for these computations.

This approach is known as “Fused Datapath,” and when

combined with a new 28nm Variable Precision DSP

block architecture, offers extremely high data processing

capabilities, in excess of one TeraFLOPS on a single

FPGA die. The Fused Datapath technology has been

embedded in Altera’s DSPBuilder design suite, which

allows the full simulation and system design capabilities

of Mathworks’ Matlab and Simulink to be utilized. This

FPGA innovation in high-performance floating point

enables the parallel hardware architecture advantages

to be used in the very highest performance applications

where the dynamic range of floating point is required.

An example of the matrix inversion processing capability

with the latest floating point Cholesky matrix processing

design is shown in Figure 1.

Multi-Channel Cholesky Inversion Core

Matrix Size Vector Size Throughput (matrices/sec) Latency (us)

100x100

50x50

75x75

50x50

25x25

20x20

50

50

25

25

25

20

29,900

128,000

42,700

118,000

256,000

1,000,000

380

270

392

304

71

96

Multiple single precision Cholesky cores may be implemented with a single FPGA

Figure 1: FPGA-based Floating Point Processing Throughput

Example

For more information on Altera’s FPGA floating point

design flow using Altera’s DSPBuilder Advanced

Blockset and Mathworks’ Simulink, please refer to the

recent BDTI whitepaper and toolflow evaluation available

here.

Most floating point applications are currently

implemented in software. With this new FPGA design

flow now offering extremely high processing rates, a

new architecture can be conceived that uses a tightly

coupled C-programmable engine as a co-processor to

the FPGA, rather than just the reverse. The FPGA can

implement the repetitive, high GFLOPS portions of the

algorithm, while the co-processor can deal with the

more complicated and data-dependent algorithms. This

approach would combine the performance advantages of

hardware implementations with the ease of development

of software implementations.

The new Anemone floating point processor from

BittWare connects to the FPGA via high-rate, low latency

link ports. All access to off-chip memory is through

the FPGA, as are off-board interfaces, such as PCIe

backplanes or Ethernet ports. The Anemone processor

is a multi-core design, currently offering 16 cores

per chip, all interconnected in a mesh network with a

shared memory model. Each core has 32 Kbytes of local

memory, supports IEEE-754 floating point processing,

and is individually programmable using ANSI-C. The 16core

Anemone chip offers 32 GFLOPS, while consuming

only two watts of total power. Four Anemone chips,

providing 128 GFLOPS, are available on an FMC (VITA

57) standard daughter card for use on FPGA host boards

such as AMC, PCIe, and VPX. These are available today

with Altera high end Stratix IV FPGAs, as shown in Figure

2, and will be offered later this year with Stratix V FPGAs.

The Anemone-to-FPGA interface is made transparent

to the application using BittWare’s ATLANTiS

FrameWork, which can bolt up seamlessly to Altera’s

QSys FPGA system interconnect tool. This facilitates

optimal partitioning of processing tasks between the

Anemone and FPGA. With up to one TeraFLOPS of

hardware floating point processing on Stratix V FPGAs,

and 128 GLOPS of software floating point processing

on Anemone, extremely high computational rate

applications can be implemented in a low form factor,

low power consumption platform.

An example application might be high-performance

airborne radar systems. The FPGA can implement the

digital downconversion, beamforming, MTI filtering,

Doppler FFT processing, pulse compression, and

matrix inversions needed in space-time adaptive

processing (STAP). The Anemone processor is ideal

for lower GFLOPs but more complex tasks. Examples

of this are CFAR detection processing, computing beam

forming coefficients, adapting and controlling radar

modes, and transmit waveform generation. Low latency

between the processing sub-systems is essential, and

EEWeb | Electrical Engineering Community Visit www.eeweb.com 11

TECHNICAL ARTICLE


TECHNICAL ARTICLE

LEDs

ANENOME

Floating Point

Co-Processor

ANENOME

Floating Point

Co-Processor

ANENOME

Floating Point

Co-Processor

ANENOME

Floating Point

Co-Processor

DDR3 SDRAM

(up to 1 GB) 32

DDR3 SDRAM

(up to 1 GB) 32

Link Ports

Clocks, I2C, JTAG, Reset

Figure 2: Anemone-Stratix High Performance Floating Point Processing System featuring an AAFM co-processing mezzanine on an S4-3U-

VPX.

these requirements are not easily met with GPU or CPU

architectures. The combination of Anemone and Stratix

FPGAs offer an ideal balance of TeraFlops processing

power, flexibility to partition across hardware and

software implementation, high GLOPS/Watt, and a very

compact form factor.

This combination can also be ideal for any embedded

application requiring high-performance computing

power in military, medical imaging, wireless, or test

equipment applications. Through the choice of FPGA

and number of Anemone chips, the design can easily

scale the level of processing power. The availability of

Anemone-Stratix systems on BittWare’s COTS boards

and systems supports rapid product development

cycles.

RS-232

JTAG

Header

About the Author

Michael Parker received his MSEE from Santa Clara

University in California, and his BSEE from Rensselaer

Polytechnic Institute in New York. He has over 20 years

of DSP wireless engineering design experience with

companies such as Alvarion, Soma Networks, TCSI,

Stanford Telecom, and numerous startup companies.

Michael joined Altera in January 2007, and is responsible

for Altera’s entire digital signal processing (DSP) product

planning.

Michael authored a book entitled Digital Signal

Processing 101, published in 2010 and has written and

published over 20 technical articles on DSP, floating

point, and various other technology subjects. ■

EEWeb | Electrical Engineering Community Visit www.eeweb.com 12

Control

Port

FINe

Bridge

Data

Port

FPGA

Stratix IV GX

(4SGX230/530)

FLASH

Supported by:

ATLANTiS Framework

Serdes

GigE

10/100 Ethernet (Build Option)

32

32

4x

4x

4x

3x

DDR3 SDRAM

(up to 1 GB)

DDR3 SDRAM

(up to 1 GB)

32 LVDS pairs

4 bits DIO or RS 232/RS422

(Build Options)

4 bits DIO

(Build Option without 10/100 Eth.)

(sRIO, PCIexp, 10GigE)

P0

P1

P2

TECHNICAL ARTICLE


System Perspective

on Specifying Electronic

Power Supplies:

Bob Stowe

Power Supply Design Consultant

Load

Characterization

In a previous issue (Issue 19) we introduced the topic of

“A System Perspective on Specifying Electronic Power

Supplies.” In this article we will learn about the effect of

the load on specifying a power supply.

The following drawing shows a power supply in a

very simplified form, connected to a simplified load.

The feedback and control circuit measures the output

voltage, compares it to a reference (not shown), and

adjusts the source voltage to maintain the load voltage

constant. This process is not perfect, and the power

supply specifications describe the deviation from

perfection. The deviation from perfection must be within

the requirements demanded by the load for the load to

operate satisfactorily.

The Importance of

Understanding the Load

The load imposes a major portion of the performance

requirements on the power supply. The power supply is

never a perfect black box and it is extremely important

to treat it as a vital and integral part of your system. It

must meet the demands placed upon it by the load in

several key performance measures. The most common

measures are discussed below:

Static Requirements

Typically, the load requires one of the following

parameters to be provided and controlled to within

a certain tolerance band: voltage, current, or power.

The other two parameters which are not controlled

would be called compliance parameters. For example,

a subassembly might be designed to operate with a

controlled input voltage of 5 volts. When excited with

a controlled input voltage of 5 volts, the subassembly

responds by drawing up to 10 amperes, and consuming

up to 50 watts of power. This means that the power supply

must maintain the output voltage at 5 volts and be able

to provide up to 10 amperes of current, since up to 10

amperes is what the load draws when excited by 5 volts.

In this case, power is an alternate way of expressing

compliance because power is the same as voltage times

current.

EEWeb | Electrical Engineering Community Visit www.eeweb.com 13


TECHNICAL ARTICLE

Some loads may require different controlled parameters

at different times. Such an example is a battery charger

which might require constant current for battery charge

mode and constant voltage for battery maintenance

mode.

Loads will require the controlled parameter to be within a

certain tolerance band for proper operation. The power

supply must maintain the controlled parameter within

the tolerance band.

These parameters may be expressed in terms of average,

RMS, or a peak value with a duration qualifier.

Dynamic Requirements

Loads also exhibit dynamic characteristics which change

over time.

Time Transients

Many types of loads frequently change their effective

impedance. Such an example might be a computer

printer which exhibits rapid step changes in effective

impedance. For such a device to function properly, the

power supply must be able to rapidly source spurts

of output current while maintaining the output voltage

within a specified band. This means that the power

supply must have enough output capacitance and high

enough control loop bandwidth to maintain the output

Vsource

Power Supply

Zout

Feedback

and

Control

Figure 1: Simplified representation of power supply and load.

voltage within the prescribed limits. Loads which have

this type of behavior must have power supplies specified

to limit the droop on the leading edge of the pulse, and

recover to within a certain band of the steady state output

in a prescribed time interval.

Voltage Dependence

Non-linear loads change impedance as voltage is

increased. One example is a typical solid-state circuit

which might draw very little current at low voltages,

and then begin to draw current with a very rapid and

nonlinear increase as voltage is increased.

A more problematic configuration is cascading a power

supply with a second power supply of a switching

converter design. A switching converter has a nonlinear

negative resistance characteristic. At very low input

voltages, below the turn-on threshold, the current may

be miniscule. When the input voltage is increased to

the turn-on threshold, the input current suddenly draws

very high current. As the input voltage is increased, the

input current decreases, following a constant power

characteristic. If care is not taken in the first power

supply design and cable length, the load (the switching

converter) will cycle on and off because of the voltage

drop in the cable length and/or the output impedance of

the power supply.

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Iload

Zload

+

Vload

_

TECHNICAL ARTICLE


TECHNICAL ARTICLE

Frequency Dependence

EEWeb

Electrical Engineering Community

Loads can create a frequency dependence which

is not obvious to the untrained user. This frequency

dependence is of at least two forms:

1. Resonant behavior can occur due to inductance and

capacitance in both the power supply and the load.

It is possible for power supplies to resonate with

load capacitance or inductance if the power supply

is not designed well for the load. This resonance

will usually take place at frequencies determined

by the reactive elements in the system. This effect is

usually undesirable unless the system is designed to

be resonant.

2. The power supply control loop behavior can be

adversely influenced due to load capacitance and

inductance. The presence of substantial capacitance

or inductance can move the control loop poles and

zeros, substantially changing the transient response

and ripple rejection capability of the power supply

by decreasing or possibll increasing the bandwidth

of the power supply.

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Temperature Dependence

Loads must operate in their intended environment. More

often than not, the power supplies for these loads must

operate in the same environment. These environments

may be benign, such as a test laboratory, or severe,

as in down-hole oil and natural gas exploration. The

power supply must be able to work in the environment

of the load, or the power supply environment must be

separated from the load to allow satisfactory operation.

About the Author

Bob Stowe has over 21 years of experience in various

disciplines related to electronic energy conversion,

possesses a master’s degree in power electronics,

and is a member of IEEE in good standing. He also

has obtained his certification in power electronics from

the University of Colorado (COPEC). Additionally, he

graduated from the United States Naval Academy in 1984

with a bachelor’s degree in electrical engineering, and

served for five subsequent years as a United States Naval

Officer. As a former military officer, he is familiar with

military project requirements. Bob now works for True

Power Research as a Power Supply Design consultant. ■

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TECHNICAL ARTICLE


High Efficiency 5V, 10A Buck Regulator

ISL95210

The ISL95210 is a high-efficiency step-down regulator that can

deliver 10A of output current from a 5V input. The small

4mmx6mm QFN package and only four external components

provide a very small total solution size. Low resistance internal

MOSFETs deliver excellent efficiency and permit full power

operation in a +90°C ambient without airflow.

The regulator operates from an input voltage of 2.97V to 5.5V,

and provides a 0.6% accurate output voltage over the full

operating temperature range. Intersil's patented R4 control

architecture provides exceptional transient response with no

external compensation components. The output voltage may be

programmed by an internal DAC or by an external resistor divider

(see “Output Voltage Programming” on page 11 for more

details).

Several digital control signals provide flexibility for users that

want additional features. Switching frequency, switching mode,

output voltage margining and daisy-chained power-good

functions are all programmed by these pins. The ISL95210 also

includes comprehensive internal protection for overvoltage,

undervoltage, overcurrent and over-temperature conditions.

Related Literature

• See AN1485, “ISL95210 10A Integrated FET Regulator

Evaluation Board Setup Procedure”

VIN = 5V

CONTROL

SIGNALS

CIN

10µF

VCC

VIN

PVCC

EN

PG_IN

FSET

VSEL1

MPCT

MSEL

VSEL0

FCCM

PGOOD

PHASE

VOUT

VCC

AGND

PGND

T-PAD

LOUT

420nH

VOUT = 1.2V

COUT

220µF

FIGURE 1. 10A DC/DC CONVERTER USING ONLY 4 EXTERNAL

COMPONENTS

November 17, 2011

FN6938.3

ISL95210

FSW= 800kHz

1µF

+

POWER GOOD

LOUT = MPC0740LR42C (NEC/TOKIN)

COUT = 2TPLF220M5 (SANYO)

Features

• 10A Continuous Output Current

• 2.97V to 5.5V Input Voltage Range

• Up to 95% Efficiency

• Full Power Operation in +90°C Ambient without Airflow

• R4 Control Architecture Delivers Excellent Transient

Response Without Compensation

• Pin Selectable Output Voltage Programming

• ±0.6% Output Voltage Accuracy Over Full Operating

Temperature Range

• Programmable Enhanced Light-Load Efficiency Operation

• Output Voltage Margining and Power-good Monitor

• Small 6mmx4mm QFN Package

Applications

• Point-of-Load Power Supplies

• Notebook Computer Power

• General Purpose Power Rail Generation

EFFICIENCY (%)

100

95

90

85

80

75

70

65

Get the Datasheet and Order Samples

http://www.intersil.com

60

55

50

VIN = 5V

VOUT = 1.2V

FSW = 800kHz

0 1 2 3 4 5

IOUT (A)

6 7 8 9 10

FIGURE 2. EFFICIENCY OF CIRCUIT SHOWN IN FIGURE 1

(INCLUDES INDUCTOR LOSSES)

Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2011

All Rights Reserved. All other trademarks mentioned are the property of their respective owners.


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